Synchronous rectification voltage reduction module

Abstract

The invention relates to the technical field of power management chips, and discloses a synchronous rectification step-down module which is characterized in that a power ground PGND serves as a power reference ground, PCB layout needs to be careful, in order to achieve the best effect, the PGND needs to be connected in a copper laying mode with a via hole, an advanced different mode (AAM) is started, when the power ground is lower than the power reference ground, an internal clock is blocked, and when the power ground is lower than the power reference ground, the PGND is connected with a power source. The module enters a frequency hopping mode, the module enters a DCM mode when the module slowly rises along with the increase of the output current and the minimum value exceeds, the module is switched from the DCM mode to a CCM mode when the inductive current does not drop to 0 in one period, and in the CCM mode, when the VILsense does not reach the value set by VCOMP in the PWM period of 83% of the CCM mode, an upper tube is forcibly switched off, and a lower tube is forcibly switched off when the VCOMP does not reach the value set by VCOMP. Therefore, continuous output current as high as 2A can be realized in a wide input voltage range from 4.5 V to 24V, and excellent load regulation rate and linear regulation rate are achieved.

Description

Technical Field

[0001] The present invention relates to the technical field of power management chips, and more specifically, to a synchronous rectification and buck module. Background Art

[0002] A power management integrated circuit is a chip that is responsible for the conversion, distribution, detection and other power management of electrical energy in electronic equipment systems. It is mainly responsible for converting source voltage and current into power that can be used by loads such as microprocessors and sensors. In existing technologies, due to the widespread popularity of the Internet of Things and people's long-term demand for miniaturization of mobile Internet devices, longer standby life, and more flexible working modes, the switching power supply will also develop in the direction of smaller peripheral devices, more efficient light and heavy load ranges, and more diverse working modes. Therefore, we propose a synchronous rectifier buck module

[0003] SUMMARY OF THE INVENTION Adjustment

[0004] In order to solve the problems raised in the above background technology, the present invention provides a synchronous rectification and buck module.

[0005] A synchronous rectification and buck module provided by the present invention adopts the following technical solution: a synchronous rectification and buck module, characterized in that it comprises:

[0006] Feedback pin FB Connect the FB pin to an external resistor divider between the output and AGND pin to set the output voltage;

[0007] The output pin VCC is internally 4.9V, and the module integrates VCC output capacitors;

[0008] The analog ground AGND is used as the reference ground for the logic circuit, and AGND is internally connected to PGND;

[0009] The switch output pin SW is copper-plated at pins 4, 5, and 6;

[0010] The power supply output pin OUT is connected to the load, and an output capacitor needs to be installed on a circuit;

[0011] The power ground PGND is used as the power reference ground. The PCB layout needs to be extra careful. To achieve the best effect, PGND needs to be connected by copper plating with vias.

[0012] The supply voltage input pin IN powers the internal MOSFET and regulator. The input voltage range of the module is +4.5V to +24V. An ESR resistor and a low-inductance capacitor are connected to the IN pin to remove coupling. The input capacitor should be as close to the IN pin as possible, connected to it using wide PCB traces, and use multiple vias.

[0013] Preferably, NC is also included, and the NC pin must be kept floating.

[0014] Preferably, a bootstrap pin BST is further included, which has a bootstrap capacitor integrated therein, so no external capacitor is required.

[0015] Preferably, an EN enable control pin can start the module's working mode from AAM to DCM and then to CCM mode, or the module will not enter the AAM mode when lightly loaded, and the floating EN pin connected to the ground can stop the module from working.

[0016] Preferably, the power-good output indication pin PG is also included as an open-drain output, and PG is connected to VCC via a pull-up resistor of 100 kΩ.

[0017] Preferably, the feedback pin FB is connected to a voltage source for comparing the FB voltage with an internal 0.798V reference voltage (V RES ) and outputs a current proportional to the difference between the two.

[0018] Preferably, the output pin VCC is connected to V CC There is a voltage regulator, by V IN Input supply and at full V IN range, when V IN When VIN is greater than 4.9V, the output of the regulator is in full regulation. When VIN is lower than 4.9V, the output decreases accordingly. The module integrates an internal decoupling capacitor.

[0019] Preferably, the power output pin OUT is connected to an output voltage comparator for monitoring the internal VCC.

[0020] Preferably, the module has an internal soft start function (SS) for soft start in order to prevent the output voltage of the module from overshooting during startup;

[0021] Pre-biased startup function for achieving monotonic linear startup at pre-biased output voltage;

[0022] The overcurrent protection function is used for inductor. When the current peak exceeds the internal peak current limit threshold, the upper tube is turned off and the lower tube remains on until the inductor current drops below the internal valley current limit threshold;

[0023] The over-temperature shutdown protection function is used to stop the module from switching when the internal chip temperature exceeds 150°C. Once the temperature is below 130°C, the module resumes operation;

[0024] The bootstrap drive circuit function is used to power the drive circuit of the power MOSFET upper tube by the internal bootstrap capacitor;

[0025] Snubber Circuit Function Additional RC used in snubber circuit to clamp voltage spikes and suppress ringing voltage.

[0026] In summary, the present invention includes the following beneficial technical effects:

[0027] 1. The module is provided with a power supply voltage range of 4.5V to 24V through the input voltage (VIN). When the module starts, the internal soft start SS startup circuit generates a voltage that slowly rises from 0V to 4.9V to prevent the module output voltage from overshooting during startup. The enable control (EN) controls the startup and shutdown of the module. When the EN pin is pulled high, the module starts and starts the advanced abnormal mode (AAM). When it is lower than, the internal clock is blocked, allowing the module to enter the frequency hopping mode, thereby achieving light load power saving operation. When it slowly rises with the increase of output current, the module starts to operate at a low frequency. When the inductor current rises and exceeds its minimum value, the module enters DCM mode. When the inductor current no longer drops to 0 within a cycle, the module switches from DCM mode to CCM mode. In CCM mode, when VILsense does not reach the value set by VCOMP within an 83% CCM mode PWM cycle, the upper tube is forced to shut down, thereby achieving a continuous output current of up to 2A within a wide input voltage range of 4.5V to 24V, with excellent load regulation and linear regulation, and fast transient response capability.

[0028] 2. The module adopts QFN20 (3mmx5mmx1.6mm) package, with 1 inductor, 2 capacitors and power MOSFET built in. The module adopts PCB layout to lay out GND, VOUT and VIN, achieving a very compact solution with fast transient response capability. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 This is a circuit diagram of the Vo=5V, Io=2A mode application in an embodiment of the present invention;

[0030] Figure 2 This is a circuit diagram of the Vo=3.3V, Io=2A mode application in an embodiment of the present invention;

[0031] Figure 3 This is a circuit diagram of the Vo=1.8V, Io=2A mode application in an embodiment of the present invention;

[0032] Figure 4 This is a circuit diagram of the Vo=1.5V, Io=2A mode application in an embodiment of the present invention;

[0033] Figure 5 This is a circuit diagram of the Vo=1.2V, Io=2A mode application in an embodiment of the present invention;

[0034] Figure 6This is a circuit diagram of the Vo=1V, Io=2A mode application in an embodiment of the present invention;

[0035] Figure 7 is a schematic diagram of the functional block diagram structure in an embodiment of the present invention;

[0036] Figure 8 is a schematic diagram of the AAM control logic in an embodiment of the present invention;

[0037] Fig. 9 is a schematic diagram of a DCM working mode in an embodiment of the present invention;

[0038] Fig.10 is a schematic diagram of a Zener diode connection structure in an embodiment of the present invention;

[0039] Fig.11 is a schematic diagram of an internal bootstrap charging circuit in an embodiment of the present invention;

[0040] Fig.12 is a schematic diagram of an additional internal RC buffer circuit in an embodiment of the present invention;

[0041] Fig.13 is a schematic top view of a PCB layout in an embodiment of the present invention;

[0042] Fig.14 is a bottom view schematic diagram of a PCB layout in an embodiment of the present invention;

[0043] Fig.15 It is a schematic diagram of the packaging structure in an embodiment of the present invention. DETAILED DESCRIPTION

[0044] The following is combined with Figure 1-15 The present invention is described in further detail.

[0045] It should be noted that the drawings are schematic and not to scale. For the sake of clarity and convenience, the relative sizes and proportions of the parts shown in the drawings are exaggerated or reduced in size, and any size is only illustrative and not restrictive. In addition, the same reference symbol is used for the same structure, element or accessory appearing in more than two figures to reflect similar features.

[0046] The embodiment of the present invention discloses a synchronous rectification and buck module. Figure 1-15 , a synchronous rectifier step-down module that can achieve up to 2A of continuous output current over a wide input voltage range of 4.5V to 24V with excellent load regulation and line regulation;

[0047] Reference Fig.13 , 14,15,First, the module adopts QFN20 (3mmx5mmx1.6mm) package, with 1 inductor, 2 capacitors and power MOSFET built in. The module adopts PCB layout to lay out GND, VOUT and VIN, achieving a very compact solution and fast transient response capability;

[0048] Feedback pin FB Connect the FB pin to the external resistor divider between the output and AGND pin to set the output voltage. When the FB voltage is lower than 400mV, the frequency reduction comparator can reduce the oscillator frequency to prevent the time limit from running out of control during a short-circuit fault. The resistor divider should be as close to the FB pin as possible. Avoid placing vias on the FB trace;

[0049] The feedback pin FB is connected to the internal 0.798V reference voltage (V RES ) and outputs a current proportional to the difference between the two. The output current will then charge or discharge the internal compensation network to form the COMP voltage for controlling the power MOSFET current. The optimized internal compensation network can minimize the number of external components and greatly simplify the design of the control loop.

[0050] The output pin VCC is internally 4.9V, and the module integrates a VCC output capacitor. The output pin VCC is connected to a voltage regulator, powered by the input, and works in the full range. When it is greater than 4.9V, the output of the voltage regulator is in a fully regulated state. When VIN is lower than 4.9V, the output decreases accordingly. The module integrates an internal decoupling capacitor;

[0051] The analog ground AGND is used as the reference ground for the logic circuit, and AGND is internally connected to PGND;

[0052] The switch output pin SW is copper-plated at pins 4, 5, and 6;

[0053] The power output pin OUT is connected to the load. An output capacitor needs to be installed on a circuit. The power output pin OUT is connected to an output voltage comparator for monitoring the internal VCC.

[0054] The NC pin must remain floating;

[0055] The bootstrap pin BST has an internal bootstrap capacitor, so no external capacitor is required;

[0056] The power ground PGND is used as the power reference ground. The PCB layout needs to be extra careful. To achieve the best effect, PGND needs to be connected by copper plating with vias.

[0057] The supply voltage input pin IN powers the internal MOSFET and regulator. The input voltage range of the module is +4.5V to +24V. An ESR resistor and a low-inductance capacitor are connected to the IN pin to remove coupling. The input capacitor should be as close to the IN pin as possible, connected to it using wide PCB traces, and use multiple vias.

[0058] The enable control pin EN drives EN to a high level to start the module, and drives EN to a low level to shut down the module. The internal 870kΩ resistor between EN and GND allows the module to be shut down even when EN is left floating.

[0059] Reference Fig.10 EN is clamped by a 6.5V internal series voltage regulator diode. When EN is directly connected to a voltage source without a pull-up resistor, the voltage source amplitude needs to be limited to ≤6V to prevent damage to the Zener diode;

[0060] Connect the EN input to V through a pull-up resistor IN When EN is on, the EN input current needs to be limited to less than 100μA.

[0061] The module has an internal soft-start function SS, which causes the module's output voltage to overshoot. When the module starts, the soft-start voltage (SS) generated by the internal circuit rises slowly from 0V to 4.9V. When SS is lower than V REF The error amplifier uses SS as a reference. When SS is higher than V REF The error amplifier uses V REF As a reference value, the SS time is internally set to 1.6ms (V OUT from 10% to 90%);

[0062] The pre-biased startup function can achieve monotonic linear startup under the pre-biased output voltage. If a fixed voltage is pre-biased at startup, V SS Slowly rise, when V SS When the sampled output voltage of the FB pin is exceeded, the module successively turns on the internal resistance of the upper and lower tubes, and the output voltage rises following the internal SS slope;

[0063] The power supply is good. The output pin PG has a power supply good output indication (PG) to indicate whether the output voltage of the module is ready. PG is an open-drain output. Connect PG to VCC (or another voltage source) through a 100kΩ pull-up resistor. When the input voltage is applied, the internal V SS >1V, the PG pin will be pulled down to GND. Once V SS >1V(when V FB Greater than V REF 90% of the time), PG is pulled high (after a 35μs delay). During normal operation, the PG pin is at V FBdrops below V REF Pull down at 83% of (after 80μs delay);

[0064] When undervoltage lockout protection (UVLO) or overtemperature protection (OTP) occurs, the PG pin is immediately pulled low; when overcurrent (OC) occurs, the PG pin is pulled low at V FB drops below V REF Pull down at 83%;

[0065] The undervoltage lockout protection (UVLO) on the module can stop the module from working when the input voltage is insufficient. The module undervoltage lockout protection (UVLO) comparator can monitor the output voltage of the internal LDO (VCC). The rising typical threshold of the undervoltage lockout protection (UVLO) is 3.9V, and the falling typical threshold is 3.225V.

[0066] The over-current protection (OCP) on the module has a cycle-by-cycle current limiting protection function. When the inductor current peak exceeds the internal peak current limiting threshold, the upper tube is turned off and the lower tube remains on until the inductor current drops below the internal valley current limiting threshold. After the peak current limiting threshold is triggered, the valley current limiting circuit reduces the operating frequency, and the output voltage continues to drop until VFB is below the under-voltage (UV) threshold (usually 50% lower than the reference value);

[0067] Once UV is triggered, the module will enter hiccup protection mode and periodically restart the module. This protection mode is particularly useful when the output is short-circuited to ground, greatly reducing the average short-circuit current, alleviating thermal problems, and protecting the module. Once the overcurrent condition disappears, the module will exit the hiccup protection mode;

[0068] The over-temperature shutdown protection function is used to stop the module from switching when the internal chip temperature exceeds 150°C. Once the temperature is below 130°C, the module resumes operation;

[0069] The bootstrap drive circuit is used to power the drive circuit of the power MOSFET upper tube by the internal bootstrap capacitor. This drive circuit has built-in UVLO protection. The rising threshold of UVLO is 2.2V and the hysteresis is 150mV. The bootstrap capacitor voltage is V IN Internal regulation via D1, M1, C4, L1 and C2 (see Fig.11 ), if V BST -V SW When VSW exceeds 5V, U1 adjusts M1 to maintain 5V voltage on C4;

[0070] Snubber circuit function: An additional RC snubber circuit to clamp voltage spikes and suppress ringing voltage to achieve higher EMI performance;

[0071] The power dissipation of the RC snubber circuit can be estimated using formula (1):

[0072] P Loss =f S ×C S ×V IN 2

[0073] fS is the switching frequency, Cs is the buffer capacitor, and VIN is the input voltage;

[0074] To improve efficiency, the CS value should not be set too high. It is recommended to use 5.6ΩRS and 330pFCS to build an RC snubber circuit (see Fig.12 );

[0075] If V IN and V EN If both exceed their respective thresholds, the module starts. The internal reference voltage circuit starts first to generate a stable reference voltage, and then the internal regulator is enabled. The regulator provides a stable power supply for the rest of the circuits.

[0076] The chip will be shut down in three situations: VIN is too low, VEN is too low, and over-temperature shutdown protection. During the shutdown process, the signal loop is first blocked to avoid false triggering. Then the COMP voltage and internal power supply are pulled down. The floating drive is not affected by this shutdown command;

[0077] Reference Figure 8 , the module starts by enabling the control pin (EN) to control the working mode of the module. When the module is in the advanced asynchronous mode (AAM) with a fixed input and output voltage, V COMP For the built-in fixed voltage, V COMP is the error amplifier output voltage, which represents the peak inductor current information. COMP Lower than V AAM When the internal clock is blocked, the module will enter the frequency hopping mode to achieve light load power saving. COMP Higher than V AAM The internal clock will restart once, and the high-side power MOSFET (HS-FET) will remain on until V ILsense The current reaches V COMP Set voltage value;

[0078] Reference Fig. 9 , V COMP As the output current increases, it slowly rises. When its minimum value exceeds V AAM After that, the advanced asynchronous mode AAM control mode switches to the discontinuous conduction mode (DCM), in which the internal 2MHz clock starts the pulse width modulation (PWM) cycle, and the upper tube remains on until V ILsense Reach V COMPThe voltage reaches the set value (after the dead time), and then the lower tube (LS-FET) remains on until the inductor current value drops to 0. In each clock cycle, the module repeats the same action;

[0079] When the inductor current no longer drops to zero within a cycle, the module switches from DCM mode to CCM mode. In CCM mode, the internal 2MHz clock starts the pulse width modulation (PWM) cycle, keeping the high-side tube on until V ILsense Reach V COMP The module adjusts the output voltage by repeating the same action in each cycle. If V ILsense Not reaching V COMP If the set value is exceeded, the upper tube is forced to be turned off to adjust the output voltage;

[0080] In V IN =12V, TJ = -55℃ to +125℃(7), typical value test condition is T J =+25℃:

[0081]

[0082]

[0083]

[0084]

[0085] Specifically, the module is provided with a power supply voltage ranging from 4.5V to 24V through the input voltage (VIN). When the module is started, the internal soft-start SS startup circuit generates a voltage that slowly rises from 0V to 4.9V to prevent the module output voltage from overshooting during startup. The enable control (EN) controls the startup and shutdown of the module. When the EN pin is pulled high, the module starts and starts the advanced abnormal mode (AAM). When V COMP Lower than V AAM When V COMP As the output current increases, it slowly rises and its minimum value exceeds V AAM After that, the module enters DCM mode;

[0086] In DCM mode, the internal 2MHz clock starts the pulse width modulation (PWM) cycle, and the upper tube remains on until V ILsense Reach V COMPThe voltage reaches the set value (after the dead time), and then the lower tube (LS-FET) remains on until the inductor current value drops to 0. In each clock cycle, the module regulates the output voltage by repeating the same action;

[0087] When the inductor current no longer drops to 0 within a cycle, the module switches from DCM mode to CCM mode. In CCM mode, the internal 2MHz clock starts the pulse width modulation (PWM) cycle, and the upper tube remains on until V ILsense Reach V COMP The set voltage value (after the dead time), and then the lower tube remains on until the next clock cycle begins. The module adjusts the output voltage by repeating the same action in each cycle;

[0088] When VILsense does not reach the value set by VCOMP within 83% of the PWM cycle, the upper tube is forced to shut down;

[0089] Through the above mechanism, a continuous output current of up to 2A can be achieved within a wide input voltage range of 4.5V to 24V, with excellent load regulation and linear regulation, and fast transient response capability.

[0090] Finally, a few points should be explained: First, in the description of the present invention, it should be noted that, unless otherwise specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, which may refer to mechanical connection or electrical connection, or internal communication between two components, or direct connection. "upper", "lower", "left", "right", etc. are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may change;

[0091] Secondly: In the drawings of the embodiments disclosed in the present invention, only the structures related to the embodiments disclosed in the present invention are involved, and other structures can refer to the general design. In the absence of conflict, the same embodiment and different embodiments of the present invention can be combined with each other;

[0092] Finally: The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A synchronous rectification and buck module, characterized in that: include: Feedback pin FB Connect the FB pin to an external resistor divider between the output and AGND pin to set the output voltage; The output pin VCC is internally 4.9V, and the module integrates VCC output capacitors; The analog ground AGND is used as the reference ground for the logic circuit, and AGND is internally connected to PGND; The switch output pin SW is copper-plated at pins 4, 5, and 6; The power supply output pin OUT is connected to the load, and an output capacitor needs to be installed on a circuit; The power ground PGND is used as the power reference ground. The PCB layout needs to be extra careful. To achieve the best effect, PGND needs to be connected by copper plating with vias. The supply voltage input pin IN powers the internal MOSFET and regulator. The input voltage range of the module is +4.5V to +24V. An ESR resistor and a low-inductance capacitor are connected to the IN pin to remove coupling. The input capacitor should be as close to the IN pin as possible, connected to it using wide PCB traces, and use multiple vias.

2. A synchronous rectification and buck module according to claim 1, characterized in that: Also includes NC, the NC pin must remain floating.

3. The synchronous rectification and buck module according to claim 1, characterized in that: It also includes a bootstrap pin BST, which has an internal bootstrap capacitor, so no external capacitor is required.

4. The synchronous rectification and buck module according to claim 1, characterized in that: It also includes an EN enable control pin that can start the module's working mode from AAM to DCM and then to CCM mode, or the module will not enter the AAM mode when lightly loaded. The floating EN pin connected to the ground can stop the module from working.

5. The synchronous rectification and buck module according to claim 1, characterized in that: Also included is a power-good output indication pin PG as an open-drain output, which is connected to VCC via a 100kΩ pull-up resistor.

6. The synchronous rectification and buck module according to claim 1, characterized in that: The feedback pin FB is connected to the internal 0.798V reference voltage (V RES ) and outputs a current proportional to the difference between the two.

7. The synchronous rectification and buck module according to claim 1, characterized in that: The output pin VCC is connected to V CC There is a voltage regulator, by V IN Input supply and at full V IN range, when V IN When VIN is greater than 4.9V, the output of the regulator is in full regulation. When VIN is lower than 4.9V, the output decreases accordingly. The module integrates an internal decoupling capacitor.

8. The synchronous rectification and buck module according to claim 1, characterized in that: The power output pin OUT is connected to an output voltage comparator for monitoring the internal VCC.

9. The synchronous rectification and buck module according to claim 1, characterized in that: The module has an internal soft start function (SS) for soft start in order to prevent the output voltage of the module from overshooting during startup; Pre-biased startup function for achieving monotonic linear startup at pre-biased output voltage; The overcurrent protection function is used for inductor. When the current peak exceeds the internal peak current limit threshold, the upper tube is turned off and the lower tube remains on until the inductor current drops below the internal valley current limit threshold; Over-temperature shutdown protection function is used when the internal chip temperature exceeds 150°C, the module stops switching action. Once the temperature is lower than 130°C, the module resumes working; The bootstrap drive circuit function is used to power the drive circuit of the power MOSFET upper tube by the internal bootstrap capacitor; Snubber Circuit Function Additional RC used in snubber circuit to clamp voltage spikes and suppress ringing voltage.

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