Energy efficient ultra wide band pulse radio system and method

Abstract

An ultra wide band (UWB) technique utilizes modulation coded pulses over a wide spectrum at very low power over a short distance for digital data transmission. Such UWB systems may operate with their receivers in the presence of interfering signals, and may provide robust communications. Thus, an accurate and sharp filter is required that operates at low power and advantageously does not require a high-precision high-power clock. Furthermore, many UWB applications require location and / or distance determination of other elements, and thus providing UWB-based distance determination and / or location capabilities will be beneficial, which will remove the need to increase the complexity of additional devices and typically significant power consumption.

Description

[0001] This case is a divisional application filed again for the invention patent with an application date of 2018-06-29, a submission date of June 21, 2021, a divisional application number of 202110683705.8, and a name of "High-efficiency and energy-saving ultra-wideband pulse radio system and method"; the divisional application 202110683705.8 is a divisional application based on the invention patent with an application date of 2018-06-29, an application number of 201880043724.0, and a name of "High-efficiency and energy-saving ultra-wideband pulse radio system and method" as the parent case. Technical Field

[0002] The present invention relates to ultra-wideband wireless communications, and more particularly to extremely low power pulse radios that utilize low energy detectors and provide ranging. Background Art

[0003] Ultra-wideband (UWB) technology is a technology that transmits digital data as modulated coded pulses over a very wide frequency spectrum over short distances at very low power. This pulse-based transmission is an alternative to using modulated sine waves to transmit information, which is the technology used in current wireless communication standards and systems, such as IEEE 802.11 (Wi-Fi), IEEE802.15 wireless personal area networks (PANs), IEEE 802.16 (WiMAX), Universal Mobile Telecommunications System (UMTS), Global System for Mobile Communications (GSM), General Packet Radio Service (GPRS), and access to the Industrial, Scientific and Medical (ISM) band and International Mobile Telecommunications-2000 (IMT-2000).

[0004] UWB transmissions from antennas are defined by a transmitted signal bandwidth that exceeds the smaller of 500 MHz or 20% of the center frequency. Therefore, pulse-based systems (where each transmitted pulse occupies the full UWB bandwidth or a collection of at least 500 MHz narrowband carriers) such as orthogonal frequency division multiplexing (OFDM) can access the UWB spectrum on a regular basis. The pulse repetition rate can be low or can be extremely high. Pulse-based UWB radar and imaging systems tend to use low to medium repetition rates (typically in the range of 1 to 100 megapulses per second). On the other hand, communication systems support high repetition rates (typically in the range of one to two gigabits per second), thereby supporting short-range gigabits per second communication systems. Unlike carrier modulation-based systems that are affected by both deep fading and inter-symbol interference (ISI), since each pulse in a pulse-based UWB system occupies a large bandwidth, possibly even the entire UWB bandwidth, such a system is relatively immune to multipath fading, but is affected by inter-symbol interference.

[0005] When considering applications such as wireless sensor networks and portable electronic devices, UWB transceivers should ideally be highly integrated in functionality to achieve a small footprint, support low-cost and high-volume manufacturing, and be energy efficient so as to operate on limited power sources such as batteries, indoor solar cells, small outdoor solar cells, or power sources developed using technologies such as thermal gradients, fluid flow, small fuel cells, piezoelectric energy harvesters, micromachined batteries, and fiber-optic power. By using discrete pulses as modulation, an efficient duty-cycling scheme can be achieved when the transmitter is inactive, which can be further improved by using on-off shift keying (OOK) modulation.

[0006] In addition, some UWB operating frequencies, such as between 3.1 GHz and 10.6 GHz, are approved by the U.S. Federal Communications Commission for indoor UWB communication systems and allow for use in small antennas that can be easily integrated into overall reduced footprint solutions such as sensors, mobile devices, or portable electronic devices, etc. Therefore, UWB systems with low power consumption can support a wide range of applications, including (but not limited to) sensor networks, smart buildings, medical equipment, remote sensing, remote monitoring, remote control, agriculture, industry, control, automation, personal monitoring, etc.

[0007] Such UWB systems can also operate through their receivers in the presence of interfering signals, thereby providing robust communications in noisy wireless environments and unregulated wireless environments. Therefore, it would be beneficial to provide circuit designers with accurate and sharp filters that operate at low power. The inventors have proposed filtering methods such as removing the need for an accurate carrier within the receiver.

[0008] In many applications of UWB devices, it is desirable or necessary to accurately determine the position and / or distance of other elements. Therefore, it would be beneficial to provide circuit, device and system designers with UWB-based distance measurement and / or location capabilities that would remove the need to add additional complexity and often significant power consumption by adding a global positioning system (GPS) receiver or ultrasonic / laser distance measurement circuits and / or devices. For such UWB-based location and / or distance measurement applications, it would be even more beneficial to maintain the overall low power consumption of the UWB impulse radio.

[0009] After describing the specific embodiments of the present invention in conjunction with the accompanying drawings, other aspects and features of the present invention will become apparent to those skilled in the art. Summary of the invention

[0010] The present invention is directed to ultra-wideband wireless communications, and more particularly, to very low power impulse radios that utilize low energy detectors and provide ranging.

[0011] According to an embodiment of the present invention, there is provided a method for filtering in a UWB receiver by providing an N-way filter combined with an energy detector using a low-precision clock source.

[0012] According to an embodiment of the present invention, a method for establishing a distance between a pair of ultra-wideband (UWB) transceivers is provided, the method comprising: synchronizing a first ultra-wideband (UWB) transceiver with a second UWB transceiver; transmitting a first packet including a plurality of UWB pulse beams from the first UWB transceiver; after transmitting a last pulse beam, starting a first timer associated with the first UWB transceiver; processing the received plurality of UWB pulse beams on the second UWB transceiver; synchronizing with a predetermined pulse within the UWB pulse beam of the first packet using a circuit including at least a first correlator and a first delay locked loop; and upon determining that the predetermined pulse is detected within the last pulse beam of the plurality of pulse beams, Thereafter, starting a second timer associated with the second UWB transceiver; transmitting a second packet from the second UWB transceiver when the second timer reaches a predetermined waiting time; processing a plurality of received UWB pulse beams associated with the second UWB transceiver on the first UWB transceiver; synchronizing with a predetermined pulse within the UWB pulse beam of the second packet using a circuit including at least a second correlator and a second delay locked loop; stopping the first timer after determining that a predetermined pulse within the last of the plurality of pulse beams of the second packet is detected; and calculating a flight time based on the time elapsed by the first timer and determining a distance between the first UWB transceiver and the second UWB transceiver.

[0013] According to an embodiment of the present invention, there is provided a method for establishing a distance between a pair of ultra-wideband (UWB) transceivers, the method comprising: transmitting a UWB pulse using a first UWB transceiver operating at a first clock rate, the first clock rate having a first integration window dependent on the first clock rate; receiving the UWB pulse at a second UWB transceiver operating at a second clock rate, the second clock rate having a second integration window dependent on the second clock rate; integrating the received UWB signal within a second integration window and determining when the received energy within the second integration window exceeds a predetermined threshold that a UWB pulse has been received; After determining that the UWB pulse is received, transmitting the echo signal in the next second integration window; integrating the received UWB signal within a first integration window and determining when the received energy within the first integration window exceeds a predetermined threshold that a UWB pulse has been received; passing the integrated energy within the first integration window to a digital signal processing (DSP) circuit; and An estimate of the elapsed time is obtained using DSP circuitry.

[0014] After describing the specific embodiments of the present invention in conjunction with the accompanying drawings, other aspects and features of the present invention will become apparent to those skilled in the art. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Embodiments of the present invention will now be described, by way of example only, with reference to the accompanying drawings, in which:

[0016] Figure 1A Wearable technology to support biometric data collection and / or presentation utilizing wireless communications according to embodiments of the present invention;

[0017] Figure 1B An example of wireless technology supporting home automation and location services according to an embodiment of the present invention;

[0018] Figure 2A A single pulse UWB protocol according to the prior art and a multi-pulse symbol UWB protocol according to an embodiment of the present invention;

[0019] Figure 2B The symbol, frame and stream structure of the multi-pulse symbol UWB protocol according to an embodiment of the present invention;

[0020] Figure 3 A schematic diagram of a transmitter circuit of a UWB transmitter / transceiver according to an embodiment of the present invention;

[0021] Figure 4 A schematic diagram of a ground switch power amplifier circuit for a UWB transmitter / transceiver according to an embodiment of the present invention;

[0022] Figure 5 A schematic diagram of a digitally controlled oscillator circuit for a UWB transmitter / transceiver according to an embodiment of the present invention;

[0023] Figure 6 A schematic diagram of a pulse generator circuit for a UWB transmitter / transceiver according to an embodiment of the present invention;

[0024] Figure 7 is a schematic diagram of a receiver circuit for a UWB receiver / transceiver according to an embodiment of the present invention;

[0025] Figure 8 A schematic diagram of a low noise amplifier circuit for a UWB receiver / transceiver according to an embodiment of the present invention;

[0026] Fig. 9 A schematic diagram of a square mixer circuit for a UWB receiver / transceiver according to an embodiment of the present invention;

[0027] Fig.10A schematic diagram of a variable gain amplifier circuit for a UWB receiver / transceiver according to an embodiment of the present invention;

[0028] Fig.11 A schematic diagram of a clock generator circuit for a UWB transmitter / receiver / transceiver according to an embodiment of the present invention;

[0029] Fig. 12A and Fig. 12B A schematic diagram of an integrator / analog-to-digital synchronization circuit for a UWB receiver / transceiver according to an embodiment of the present invention;

[0030] Fig.13A A system overview of a UWB receiver using an N-way bandpass filter according to an embodiment of the present invention;

[0031] Fig. 13B A system overview of a UWB receiver using an N-way band-stop filter according to an embodiment of the present invention;

[0032] Fig.14 A simplified block circuit representation of an N-way filter utilizing bandpass filtering;

[0033] Fig.15A For use Fig.14 An embodiment of a general circuit representation of an N-way filter for bandpass filtering depicted in;

[0034] Fig. 15B For use Fig.15A A time representation of a clock signal of an embodiment of the general circuit representation depicted in;

[0035] Fig. 15C for Fig.15A A variation of the embodiment represented by the general circuit depicted in , which variation removes N-1 resistor elements;

[0036] Fig.16 for Fig.15A A variation of the embodiment represented by the general circuit depicted in FIG. 1 that reduces the number of switches by N and makes the circuit a single-sided design;

[0037] Fig.17 for Fig.16 A differential circuit variation of the embodiment represented by the general circuit depicted in;

[0038] Fig.18 For use Fig.14 An embodiment of a general circuit representation of an N-way filter for band-stop filtering depicted in;

[0039] Fig.19 A simplified block circuit receiver representation of a ranging extension for a UWB receiver according to an embodiment of the present invention;

[0040] Fig. 20 For example, a UWB receiver according to an embodiment of the present invention Fig.19 A simplified timing diagram of a first distance determination mode of operation depicted in FIG.

[0041] Fig.21 For use Fig. 20 An exemplary process flow of a first distance determination operation mode according to an embodiment of the present invention is depicted in;

[0042] Fig. 22 is an exemplary process flow for a second distance determination mode of operation according to an embodiment of the present invention; and

[0043] Fig.23 For example, a UWB receiver according to an embodiment of the present invention Fig. 22 A simplified timing diagram of the second distance determination mode of operation is depicted in FIG. DETAILED DESCRIPTION

[0044] The present invention relates to ultra-wideband wireless communications, and more particularly to extremely low power pulse radios that utilize low energy detectors and provide ranging.

[0045] The following description provides only exemplary embodiments and is not intended to limit the scope, applicability or configuration of the present invention. Instead, the following description of the exemplary embodiments will provide a supporting description for implementing the exemplary embodiments for those skilled in the art. It should be understood that various changes may be made to the functions and arrangements of the elements without departing from the spirit and scope set forth in the appended claims.

[0046] As used herein and throughout the present disclosure, "ultra-wideband" (UWB) refers to a radio communication system in which the bandwidth of the signal transmitted and emitted from an antenna exceeds the lesser of 500 MHz or 20% of the center frequency.

[0047] As used herein and throughout the present invention, "radio" refers to the physical implementation of a system that can transmit and receive data wirelessly. This includes (but is not limited to) radio frequency integrated circuits, printed circuit board wireless modules.

[0048] As used herein and throughout this disclosure, "impulse radio" refers to a radio system that utilizes pulse-like signals for its transmissions.

[0049] As used herein and throughout the present invention, "quasi-low IF" refers to an intermediate frequency (IF) generated in an RF signal processor circuit such as, for example, a receiver, where a signal in a first frequency range is converted into a signal in a second frequency range, and the inventors use this intermediate frequency to distinguish their novel approach from the prior art, in which such conversion by various systems and methods is referred to as "zero IF," where they employ a subsequent high pass filter to remove a frequency block including DC from a second frequency range or "low IF," where the converted second frequency range includes DC, but the subsequent RF circuitry or RF elements are AC coupled, thereby removing the included frequency block.

[0050] As used herein and throughout the present invention, "portable electronic device" (PED) refers to a wireless device that is used for communication and other applications and requires a battery or other independent form of energy for power. This includes (but is not limited to) devices such as cellular phones, smart phones, personal digital assistants (PDAs), portable computers, pagers, portable multimedia players, portable game consoles, laptop computers, tablet computers, sensor nodes, and e-readers.

[0051] As used herein and throughout the present invention, "fixed electronic equipment" (FED) refers to wireless and / or wired devices used for communications and other applications that require connection to a fixed interface for power. This includes (but is not limited to) laptops, personal computers, computer servers, kiosks, game consoles, digital set-top boxes, analog set-top boxes, Internet-enabled devices, Internet-enabled televisions, and multimedia players.

[0052] As used herein, "user" may refer to, but is not limited to, an individual or group of individuals whose biometric data may be monitored, acquired, stored, transmitted, processed, and analyzed locally or remotely from the user, such as through the user's collaboration with a service provider, third-party provider, enterprise, social network, social media, etc., via a dashboard, web service, website, software plug-in, software application, graphical user interface, etc., for example, electronic content. This includes, but is not limited to, private individuals, organizational and / or enterprise employees, community organization members, charity organization members, men, women, children, teenagers, and animals. In its broadest sense, users may also include, but are not limited to, software systems, mechanical systems, robotic systems, Android systems, etc., characterized by data related to a subset of conditions including, but not limited to, their environment, medical conditions, biological conditions, physiological conditions, chemical conditions, ambient environmental conditions, positional conditions, neurological conditions, drug conditions, and one or more specific aspects of one or more of these said conditions.

[0053] "Wearable devices" or "wearable sensors" refer to miniature electronic devices worn by a user, including electronic devices under, within, with, or on top of clothing, and are part of the broader general category of wearable technology that includes "wearable computers," which in contrast refer to general or specialized information technology and media developments. Such wearable devices and / or wearable sensors may include, but are not limited to, smart phones, smart watches, electronic textiles, smart shirts, activity trackers, smart glasses, environmental sensors, medical sensors, biosensors, physiological sensors, chemical sensors, ambient environment sensors, position sensors, neural sensors, drug delivery systems, medical testing and diagnostic equipment, and motion sensors.

[0054] A: Example application scenarios

[0055] Embodiments of the present invention are described and presented in the context of a transmitter / receiver / transceiver system as described in the inventor's World Intellectual Property Office application WO / 2016 / 191851, entitled "Systems and Methods for Spectrally Efficient and Energy Efficient Ultra-Wideband Impulse Radios with Scalable Data Rates," filed on May 31, 2016, and World Intellectual Property Office application WO / 2015 / 103692, entitled "Systems relating to Ultra-Wideband Broadcasting comprising Dynamic Frequency and Bandwidth Hopping," filed on January 1, 2015. However, it will be apparent to one skilled in the art that transmitter / receiver / transceiver designs and systems may be employed when utilizing the embodiments of the present invention relating to filtering and ranging.

[0056] However, within embodiments of the present invention, the increased efficiency of these systems established by the inventors in the above-mentioned patent applications for transmitter / receiver / transceiver systems is maintained. Such low power transmitter / receiver / transceiver systems increase the feasibility of self-powered wireless sensor networks, which operate, particularly in compact, small footprint sensors, using energy harvested from the environment such as solar energy, vibration, temperature, etc. rather than from batteries with limited available power. If UWB devices did not have such low power requirements, then the footprint of a UWB transceiver occupying a few square millimeters would not require tens of square centimeters of solar cells to power it. Therefore, extremely low power UWB devices need to reduce the footprint of solar cells to power them, or support other devices to power them, which is otherwise not feasible. Embodiments of the present invention are intended to be compatible with sub-micron CMOS design and manufacturing processes provided by commercial foundries.

[0057] Low power UWB transmitters / receivers and transceivers have a range of applications including Figure 1A 100A to the third image 100C in the example for a wearable device depicted. In the first image 100A, an example of a wearable device is depicted, and in the second image 100B, an example of a smart garment is depicted, wherein the UWB device can be attached to the fabric of these different smart garment items or encapsulated in the fabric of these different smart garment items. Compared with the device / clothing that usually collects background, environment and biometric data and transmits it to another electronic device in the first image 100A and the second image 100B, respectively, the third image 100C depicts an example of a wearable device presenting information to a user. However, a low-power UWB receiver combination transducer, LED, etc. also provides the possibility of providing tactile and / or visual feedback to the user based on the received data. In other embodiments, the LED in the smart garment can be lit based on the UWB signal received by the UWB receiver in the smart garment.

[0058] Smart clothing can be made of smart fabrics and used to allow remote physiological monitoring of various vital signs of the wearer, such as heart rate, respiratory rate, body temperature, activity and posture, or, alternatively, it refers to conventional materials with embedded sensors. Smart shirts can, for example, record electrocardiograms (ECGs) and provide heart rate through inductance plethysmography, accelerometers, optical pulse oximeters, galvanic skin response (GSR) for skin moisture monitoring, and blood pressure. Information from such wearable devices can be stored locally or with associated devices (such as smartphones), or remotely stored in personal servers, remote cloud-based storage devices, etc., and usually communicated via wireless networks such as Bluetooth, RF, WLAN or cellular networks, but wired interfaces can also be provided, such as to the user's smartphone, laptop or dedicated housing, allowing data extraction and charging of batteries within the wearable device.

[0059] Figure 1A Also depicted in the fourth image 100D and fifth image 100E are sensors and electronic devices that provide biometric data related to the user. For example, in the fourth image 100D, the user's smart clothing provides data from sensors, including (but not limited to) acoustic environment information provided via MEMS microphone 105, user breathing analysis provided by lung capacity sensor 110, global positioning provided via GPS sensor 115, user body temperature and / or ambient temperature provided via thermometer 120, and blood oxygen data provided by pulse oximeter 125. These data are enhanced by effort data obtained by muscle activity sensor 130, motion data via 3D motion sensor (such as 3D accelerometer), user weight / carrying data from pressure sensor 140, and walking / running data from pedometer 145. These data can be used alone or in combination with other data, including, for example, from such as Figure 1A The fifth image 100E depicts data acquired by a medical device associated with a user.

[0060] As depicted, these medical devices may include (but are not limited to) deep brain neurostimulators / implants 150, cochlear implants 155, cardiac defibrillators / pacemakers 140, gastric stimulators 145, insulin pumps 170, foot implants 175, and portable data loggers 180. Typically, these devices will communicate with a body region aggregator, such as a smart phone or dedicated wearable computer. Therefore, it is apparent that a user may associate one or more sensors with themselves by a conscious decision (e.g., wearing a blood glucose sensor), an unconscious decision (e.g., carrying an accelerometer in their phone), or based on an event (e.g., installing a pacemaker to address heart problems). In most cases, data transmission from a wearable device to a PED / FED, such as periodic biometric data, is typically low, however in some cases, such as smart glasses, continuous and / or larger amounts of data transmission / reception may be required. Even continuous data acquisition, such as, for example, heart monitoring, may be transmitted in burst mode, since even a minute's worth of data is not large.

[0061] Figure 1A A sixth image 100F of a Hi-Fi audio system is also depicted, which represents an example of electronic devices connected to a UWB wireless impulse radio in a residential, commercial, manufacturing or retail environment. Thus, speakers, CD / DVD players, preamplifiers, power amplifiers, turntables, etc. can be interconnected as other configurations, such as a digital set-top box, a personal video recorder (PVR), a television (TV) or multiple PED / FEDs to a wireless router, etc. Alternatively, point-of-sale (PoS) terminals can be networked, electronic displays within a retail environment fed from a central server, automated robots within a manufacturing facility updated with activity, etc.

[0062] Reference now Figure 1B, depicting a first environment 100F and a second environment 100G, which respectively relate to examples of deployment scenarios for UWB wireless impulse radios according to embodiments of the present invention, the deployment scenarios relating to enhancing home automation and wireless interconnection in the first environment 100F or providing wireless location services for personnel, instruments, and medical supplies in the second environment 100G. Considering the first environment 100F, a series of deployment scenarios are depicted, including air conditioning 1001, energy efficiency 1002, monitoring 1003, entertainment 1004, timers 1005, lighting 1006, motor control 1007, environment 1008, sprinklers 1009, appliances 1010, and security 1011. In most cases, the demand for data transmission / reception is still very limited and irregular. Similarly, in the second environment 100G, which depicts a simplified schematic diagram of hospital wireless-based location services, inventory tracking services, etc., can range from tracking patients to hospital instruments (such as carts, diffusion pumps, etc.) to medical equipment connections (such as patient monitors, electrocardiograms (EKGs), etc.) and medical consumables, etc. Again, data rates are typically low, but beyond that there may be a large number of devices operating concurrently in a small area where interference is unacceptable.

[0063] Within such an environment, data related to the occupancy of zones within either of the first environment 100F and the second environment 100G, respectively, can enhance these other UWB-enabled sensors, etc. or provide coverage. For example, a lighting controller 1006 within a room can determine a low brightness level and try to turn on the lights. However, if the occupancy sensor based on UWB ranging determines that there are no users in the room, then the lighting controller 1006 is "taken over." However, in other embodiments, the lighting controller 1006 can be associated with a large area with multiple lighting fixtures and virtually established zones. Therefore, a UWB ranging device according to an embodiment of the present invention can determine whether an individual is present within a predetermined range of the UWB ranging device and is therefore associated with its zone. In this way, for example, lights in a corridor can be turned on and off to reflect occupancy, or can be turned on in front of and off behind a security guard when he walks along the corridor at night, for example.

[0064] B: Dynamic multi-pulse beam structure

[0065] A design method for pulse beam based impulse radio is established in the inventor's prior patent applications WO / 2016 / 191851 "Systems and Methods for Spectrally Efficient and Energy Efficient Ultra-Wideband Impulse Radios with Scalable Data Rates" and WO / 2015 / 103692 "Systems relating to Ultra-Wideband Broadcasting comprising Dynamic Frequency and Bandwidth Hopping", wherein by utilizing multiple pulses per beam with real-time configurable parameters such as phase, frequency, amplitude and bandwidth, the inventor establishes a UWB transmitter design that can dynamically fill the UWB spectrum, which are incorporated herein by reference. UWB communications allow the use of wideband transmissions as long as the spectrum masks of the appropriate regulatory agencies are followed. For example, in the United States, the allocated frequency band is 3.1 GHz ≤ f ≤ 10.6 GHz, and the Federal Communications Commission (FCC) of the United States stipulates the spectrum masks regarding the maximum transmit power in different sub-bands on the allocated frequency band. This supports pulsed operation with the advantage of low power consumption, since the transceiver can be cycled to consume power only when a pulse is to be transmitted or received. Since the spectrum mask allows a fixed maximum power spectral density for transmission, it is advantageous to maximize the occupied bandwidth in order to maximize symbol energy and extend the achievable distance of the wireless link. However, using a single pulse for communication results in a trade-off between pulse bandwidth and required synchronization accuracy, since an increase in pulse bandwidth corresponds to a decrease in pulse duration, resulting in more challenging and potentially more expensive circuit implementations, while increasing the energy required for synchronization.

[0066] The inventors have addressed this trade-off and removed it by applying multiple pulses with different spectra to the conceptual step of bit generation. Figure 2A , in the first image 200A, a time and frequency domain diagram of a prior art impulse radio is depicted, where each bit 210 is an impulse oscillation at a single frequency, such that the spectrum is a single peak 230 centered at f0 within the frequency range allowed by the regulator's UWB mask 220 and below the maximum power within that frequency range. In contrast, Figure 2AAs depicted in the second image 200B in FIG. 2 , each bit 260 comprises a series of sub-pulses 260A to 260C, each at a frequency f1; f2; f3, respectively. Thus, the multi-pulse spectrum 280 of the symbol (bit 260) is conceptually obtained by summing the individual pulse spectra of the sub-pulses 260A to 260C (phase perturbations omitted for clarity), which increases the bandwidth while increasing the total symbol duration compared to the single-pulse prior art approach, while maintaining the maximum power below the UWB mask 220 allows the symbol energy to be maximized while relaxing the timing requirements and synchronization level required at the receiver. Any number of pulses with different sets of parameters can be included in the beam to adapt the pulse spectrum to a given requirement.

[0067] In order to provide maximum signal energy without violating the emission mask, the phase of the pulses must be randomized, that is, the spectrum needs to be whitened to avoid generating "spectral lines" typically found in periodic signals, and the correlation between pulses must be reduced to ensure that the multi-pulse spectrum is the sum of the spectrum of the single pulse bandwidth. This can be achieved by applying a pseudo-random noise (PRN) sequence to phase modulation in the power amplifier of the transmitter. Since the receiver is insensitive to the phase of the signal (due to its non-coherent detection scheme as will be described later), phase synchronization between the transmitter and receiver is not required to achieve this. The exact spectral shape of the transmitted signal can be controlled by generating pulses of different frequencies and durations in each symbol. The inventors refer to symbols or bits as comprising "pulse beams". The spectrum of a pulse beam is easy to calculate because its power is the sum of the power spectra of the single pulse bandwidth. This allows simple dynamic reconfigurability in response to changes in the environment or user needs, and also allows operation across different regulatory environments.

[0068] Due to the pulsed nature of the signal, out-of-band spectral sidelobes occur. Even though pulse shaping reduces the sidelobe level, the maximum value of the sidelobe may still be several dB higher than the average out-of-band power spectral density. By applying the PRN sequence to the least significant bit (LSB) of the duty cycle control bits, the width of each pulse can be randomly jittered. This is equivalent to jittering the position of the sidelobes and nulls in the out-of-band spectrum, effectively whitening the out-of-band spectrum to its mean value and increasing the margin toward the FCC spectrum mask.

[0069] For example, Figure 2BAs shown, modulation of the broadband data stream can be achieved through on-off keying (OOK) or pulse position modulation (PPM). In OOK modulation 2020, the presence of a pulse beam indicates a "1", while the absence of the beam indicates a "0". This is a lower power communication scheme because the transmitter only needs to be active when sending a "1" and can remain in sleep mode when the data bit is a "0". Since the data is only being transmitted about half of the time (ensured by appropriate data encoding), this can also increase the communication distance, which means that each pulse beam can contain more energy and still meet the emission mask imposed by regulatory agencies.

[0070] However, OOK modulation requires defining a threshold in order to decide whether the received data is a "1" or a "0". This may reduce performance in environments where channel characteristics or interfering signal levels change rapidly. In these cases, for example, PPM modulation 2010 may be preferred as an alternative modulation scheme. In this case, the position of the pulse beam within the symbol period determines whether a "1" or a "0" is received. In essence, the detector compares the energy received in the first half of the symbol period with the energy received in the second half of the symbol period to make a decision, thereby creating a frame-level threshold that can compensate for rapidly changing environments. According to the inventor's design, by using a burst mode communication scheme with a parallel digitized architecture, switching between OOK and PPM modulation within the same transmitter-receiver pair can be performed.

[0071] Therefore, in Figure 2B , symbols 200C for PPM 2010 and OOK 2020 modulation schemes are depicted. In addition, a frame structure 200D is depicted, wherein each frame 200D is preceded by a synchronization block 2030 for achieving fine synchronization in the receiver, and a start bit 2040 for correcting drift in symbol synchronization before transmitting / receiving data 2050. Due to the simple synchronization structure, only a short synchronization block 2030 is required, reducing its overhead on the effective data rate of the system. Between frames 200D, the transmitter and receiver are powered off to reduce power consumption. This produces a stream 200E with a resulting structure of start 2060, frame 200D, and sleep 2080.

[0072] This transmission protocol is also very suitable for reconfigurable data rates. As an illustrative example of system operation, assume that symbols are sent every 50ns within a frame at a 1Mbps data rate, a 1kbit frame size, and a 20Mbps burst data rate. In this example, each frame will have a duration of 50μs. To achieve a 1Mbps data rate, the frame repetition rate will be 1kHz, i.e., one frame is sent every 1ms. This means that the receiver will only be active for 50μs every 1ms, resulting in a duty cycle of 5%. In order to achieve a 100kbps data rate with the same frame rate and duration, the only necessary change is to reduce the frame repetition rate to 10ms (i.e., one frame is sent every 10ms). Now, the receiver will only be active for 50μs every 10ms, resulting in a duty cycle of 0.5%. Therefore, a 10× reduction in data rate also results in a 10× reduction in power consumption.

[0073] C: Example UWB transmitter

[0074] refer to Figure 3 , depicts a schematic diagram of a transmitter 300 according to an embodiment of the present invention. The pulse mode block 310 stores the configuration of the pulses used to represent the current symbol. From the symbol rate clock (i.e., 20 MHz), the delay locked loop (DLL) 330 generates multiple phases. The rising edge of each clock phase represents the start of a pulse in the symbol pulse bundle. The multiplexer 320 is triggered by the edge of the clock phase and selects the configuration of the current pulse from the pulse mode block 310. The pulse generator (pulser) 350 generates a pulse with a pulse width set by the multiplexer 320, and enables the digitally controlled oscillator (DCO) 340 and the power amplifier (PA) 350. When enabled, the DCO 340 generates a Gaussian shaped pulse with a frequency set by the multiplexer 320, which is then amplified by the PA 360 and radiated by the antenna 370. Therefore, the pulse mode block 310 establishes a pulse for a symbol or a sequence of symbols. In this way, updating the pulse pattern block 310 adjusts the pulse sequence used for each symbol, and thus the pulse pattern block 310 can be dynamically updated based on one or more factors, including (but not limited to) network environment data, a predetermined sequence, date, time, geographic location, signal-to-noise ratio (SNR) of the received signal, and regulatory masks.

[0075] C1. Transmitter Pulse Generation and Shaping

[0076] The DCO 340 output may be shaped to provide a predetermined frequency and / or amplitude characteristic, either discretely or in combination with the action of the pulser 350. For example, within the embodiments of the invention described within this specification, the use of Gaussian shaping and methods of Gaussian pulse shaping are proposed and employed. The embodiments depicted within this patent employ shaping of the pulses via the PA 360 by adjusting its ground connection. This allows the transmitter to operate entirely in the digital domain, allowing for an all-digital architecture with negligible quiescent current consumption. Furthermore, the use of an all-digital transmitter architecture allows for very aggressive power cycling, i.e., at the pulse level. However, in other embodiments, alternative shaping methods and shape profiles may be employed.

[0077] C2. Ground Switch Power Amplifier

[0078] The pulsed nature of UWB transmissions requires a power amplifier (PA) capable of delivering high instantaneous power levels through pulse shaping to reduce the side lobes of the pulse spectrum. To achieve low average power consumption, high power efficiency, efficient power cycling, and fast wake-up / sleep transition times are required. The embodiments of the present invention presented in this specification have adopted Figure 4 The depicted switching power amplifier (SW-PA) 400 is used to transmit a UWB pulse beam. Thus, the SW-PA 400 represents Figure 3 4. As depicted, the first transistor M1 410 and the second transistor M2 420 act as switches whose inputs are complementary digital clocks generated by the DCO, which allows the implementation of a fully differential SW-PA 400. The frequency of these digital clocks sets the center frequency of the bandwidth of each single pulse in the pulse beam, and the pulse enable signal applied to the third transistor M3 430 sets the duration of each pulse. Thus, the complementary digital clocks are generated by the VCO P 440 and VCO N 450, while the pulse enable / pulse duration is a pulse signal provided by the pulser 350 coupled to the PULSE 460, so that the SW-PA 400 ground connection via the third transistor M3 430 is modified by the signal. DD In the case of SW-PA 400 output at RF P 470 and RF N 480 places available.

[0079] Since symmetry forces the operation of the other side to be identical, the functionality can be described by considering only one side (half circuit) of the differential SW-PA 400. When the first transistor M1 410 is turned on, the output of the SW-PA 400 (in this case, RF P 470) connected to GND PANode. Because the DC voltage output by SW-PA 400 is V DD (through inductor L1), so when the first transistor M1 410M1 is turned off, the output of SW-PA400 becomes V DD +(V DD -GND PA )=2×V DD -GND PA Combining these two cases yields 2×V DD -GND PA Therefore, by connecting GND PA The voltage at the node is shaped, and the SW-PA 400 output can be a directly shaped version of the clock signal to generate an output pulse. By design, the output pulse is shaped by the third transistor M3 430 and C5 to achieve a Gaussian distribution for the best balance between pulse duration and bandwidth, and to minimize the sidelobe power in the pulse spectrum. The SW-PA 400 generates an output pulse when activated by the third transistor M3 430, which acts as an enable switch to ensure that the power amplifier consumes only static power.

[0080] C3. Digitally controlled oscillator

[0081] In the embodiments of the present invention proposed in this specification, the following Figure 5 The depicted fully differential ring DCO (FDR-DCO) 500, therefore the FDR-DCO 500 represents Figure 3 The FDR-DCO 500 provides a digital clock to the Figure 4 The FDR-DCO 500 has a first transistor M1 510 and a second transistor M2 520 of the SW-PA 400 and is fed by the output of the pulser 350 to switch its operation and generate a clock that is fed to the SW-PA 400. The frequency of the FDR-DCO 500 is set by a first capacitor bank and a second capacitor bank, respectively including a first capacitor C1 540A and a second capacitor C2 540B and a third capacitor C3 540C and a fourth capacitor C4 540D, which are connected to the outputs of the first fully differential inverter INV1 510 and the second fully differential inverter INV2 520, respectively. The output from the third fully differential inverter INV3 530 provides a VCO coupled to the SW-PA 400. P 440 and VCO N 450 complementary digital clock VCO P and VCO N .

[0082] Thus, in one embodiment of the present invention, the first capacitor C1 540A through the fourth capacitor C4 540D have the same capacitance value and are each a programmable capacitor bank with 4-bit programmability, although other levels of programmability, etc. may be employed. The third switch S3 550A and the fourth switch S4 550B are used to turn off the FDR-DCO 500 and save power when pulses are not being transmitted. The fourth inverter INV4 570 combines with the first switch S1 560A and the second switch S2 560B to pre-charge the oscillator node prior to oscillation (when the FDR-DCO 500 is turned off) to control the polarity of the phase modulated pulses. This also creates an oscillator with an extremely fast startup time (a fraction of a ns), thereby increasing the power cycling efficiency of the transmitter. When a pulse is to be generated, the FDR-DCO 500 is enabled by opening the first switch S1 560A and the second switch S2 560B and closing the third switch S3 550A and the fourth switch S4 550B, while at all other times the FDR-DCO 500 is in a low power sleep state. DD An additional PMOS transistor is added between the current branch of the SW-PA 400 in order to quickly switch off the SW-PA 400 at the end of the pulse and improve the pulse shaping.

[0083] C4. Pulse Generator

[0084] The pulse signal from the pulser 350 coupled to the DCO 340 (eg, FDR-DCO 500) and the PA 360 (eg, SW-PA 400) is generated using a pulse generating circuit. Figure 6 The pulse generator (PURGEN) 600 depicted in FIG. 6 and thus PULGEN 600 represents Figure 3 610 and 620. As depicted, the input signal is routed directly and indirectly to the AND gate 650 via the first inverter INV1 610 and the second inverter INV2 620. The first inverter INV1 610 and the second inverter INV2 620 are part of a variable delay circuit that combines a first capacitor C1 630 and a second capacitor C2 640, which are programmable capacitor banks, although other levels of programmability, etc., may be employed. Thus, a rising edge on the DATA line causes the circuit to generate a pulse in the order of nanoseconds. The pulse width is a function of the variable delay generated by the first capacitor C1 630 and the second capacitor C2 640, which can be digitally tuned to allow the pulse width to be digitally programmed.

[0085] D. Typical UWB receiver

[0086] refer to Figure 7, depicts a schematic diagram of a receiver 700 according to an embodiment of the present invention. The RF signal from antenna 710 is initially amplified by a low noise amplifier (LNA) 720 and then passed to a second stage radio frequency amplifier (AMP1) 730. A first square mixer (MIX1) 740 multiplies the signal with itself to convert to an intermediate frequency (IF). A third stage variable gain amplifier (VGA) 750 further amplifies the signal and implements a bandpass filtering function. The VGA 750 output is then coupled to a second square mixer (MIX2) 760, which downconverts the signal to a baseband frequency. Parallel integrators (INT1 and INT2) sum the signal energy, which is digitized by analog to digital converters (ADC1 and ADC2) within a digital processor (not depicted for clarity, but described, for example, below with respect to the digital processor (DIGIPRO) 1200 of FIG. 12).

[0087] D1. Receiver Detection and Interference Suppression

[0088] The receiver IF chain utilizes an instantaneous bandwidth that is approximately the bandwidth of a single pulse, such as 500 MHz, while the total spectrum covers a wider bandwidth, such as via a pulse beam strategy, 3 GHz ≤ f ≤ 6 GHz for BW = 3 GHz. This allows for lower power consumption of the circuit blocks after the pulse down-conversion, while still allowing the ultra-wide bandwidth spectrum to be used for communications. Receivers for UWB signals are challenging because the wide bandwidth of the desired signal requires a high bandwidth receiver chain. In addition, the presence of in-band narrowband interferers, DC offsets, and 1 / f noise is also a problem in low power implementations. Therefore, the IF stage is expected to: Operate in a quasi-low IF architecture to avoid DC offset issues; Reduce 1 / f noise in the RF section, and Suppress typical narrowband interferers (e.g., signals with BW < 50MHz) to improve system robustness and interference suppression.

[0089] To achieve this, high-pass decoupling capacitors are specified within the receiver 700 to ensure that no significant amount of the desired pulse energy is cut off during this process. In addition, this is coupled with a second squaring stage after the IF stage to maintain full sensitivity. The double squaring method for enhancing energy detection sensitivity / noise suppression in the receiver and generating a rectified signal is very suitable for CMOS integration. This double squaring method takes advantage of the pulse characteristics of the received signal to enhance detection because it is actually equivalent to nonlinear processing of each pulse. The first squaring operation down-converts the received pulse to a quasi-low IF signal, while the second squaring operation allows the use of the entire down-converted pulse energy to increase the probability of detection, rather than just using the detected amplitude / peak value as in other prior art pulse radio receivers. As described, the high-pass filtering between the two squaring operations can mitigate DC offset, reduce 1 / f noise and suppress narrowband interference.

[0090] It is obvious to those skilled in the art that Figure 7 The proposed non-coherent receiver architecture does not require frequency synchronization, or knowledge of the pulse phase / frequency pattern used by the transmitter, which is advantageous.

[0091] D2. Low noise amplifier

[0092] The embodiments of the present invention proposed in this specification adopt Figure 8 The low noise amplifier (LNA) 800 depicted in FIG. 8 and thus LNA 800 represents Figure 7 The differential input signal RF P and RF n The third capacitor C3 850A and the fourth capacitor C4 850B are coupled to the drains of a pair of common-gate transistors M1 810 and M2 820, respectively, and the pair of transistors are biased at their gates with V BLAS and its bias current is sunk to ground via inductor L1. At the drains of M1 810 and M2 820, current shunt peaking is performed by resistors R1 830 and R2 840 in conjunction with inductor L2 870 to increase the bandwidth of the amplified signal. The signal is coupled from LNA 800 to the output port OUT via the first capacitor C1 860A and the second capacitor C2 860B. P and OUT N .

[0093] D3. Square Mixer

[0094] like Fig. 9 The depicted square mixer (SQ-MIX) 900 has been adopted in the embodiments of the present invention presented within this specification, and therefore, SQ-MIX 900 represents Figure 7740 and the second square mixer MIX2 760 in the embodiment of the invention. As depicted in the figure, the differential input signal IN P and IN N The input signal is coupled to the gates of transistors M7 910 and M8 920 whose transconductance converts the signal into a differential drain current. At the same time, the input signal is also coupled to the cross-coupled transistor pairs M3:M4 and M5:M6, which direct the drain current to the positive (OUTPUT) of the SQ-MIX 900. P ) or negative (OUT N ) side, thereby multiplying the input by itself, i.e. squaring it. Transistors M1 and M2 are biased as current sources 950 to provide maximum voltage gain at the output. Bias circuit 960 is coupled to the input signal and includes capacitors C1 to C4 and resistors R1 to R4, ensuring that the NMOS transistors are biased to the appropriate bias point.

[0095] D4. Variable gain amplifier

[0096] like Fig.10 The depicted variable gain amplifier gain stage (VGA-GS) 1000 has been employed within the embodiments of the present invention presented within this specification, and thus VGA-GS 1000 represents Figure 7 750. The differential input signal IN P and IN N are coupled to the gates of the composite transistor pairs M1:M2 and M3:M4, respectively. Each composite transistor M1 to M4 depicted in the insert includes a transistor array 1070 formed by an array of transistors 1075(1) to 1075(N) having connected sources and drains and whose gates can be connected to the signal or ground depending on the switch position. Thus, the composite transistor pairs M1:M2 and M3:M4 have switchable transconductances. The effective transconductance on the positive side (OUT P ) is equal to the difference in transconductance between M1 and M3, and the effective transconductance on the negative side (OUT N ) is equal to the difference in transconductance between M2 and M4. Therefore, the gain can be adjusted by the switch position in the composite transistor. Transistors M6 and M7 are biased as current sources 1030 to maximize the output voltage gain. Capacitors C3 and C4 implement low-pass filtering at the output node, while capacitors C1 and C2 and bias resistors R1 and R2 implement high-pass filtering at the input node. Therefore, the VGA-GS1000 operates with an effective bandpass filter response.

[0097] E. Transmitter-Receiver Synchronization and Clocking

[0098] As discussed above, unlike in some other wireless protocols, the receiver (Rx) and transmitter (Tx) of a UWB communication link are synchronized with each other through distributed timing information. Therefore, the requirement of each circuit is effective synchronization between Tx and Rx in order to maintain the extremely aggressive duty cycle of a wireless impulse radio according to an embodiment of the present invention, thereby maintaining the energy efficiency inherent in radio communication pulses. Therefore, the inventors have established a low-latency transmitter / receiver synchronization method / algorithm using dedicated synchronization hardware, including a dual clock timer system for ultra-low sleep mode power consumption. This allows effective synchronization between Tx and Rx in order to maintain the extremely aggressive duty cycle of the radio, thereby maintaining the energy efficiency inherent in radio communication pulses.

[0099] A multi-phase clock baseband transceiver is designed to reduce the clock frequency (e.g., 20 MHz instead of 200 MHz) and improve power efficiency. In addition, to allow faster synchronization and enhanced interference detection, Fig. 12A A parallelized ADC / integrator architecture is used in the DIGIPRO 1200. This architecture allows full signal observability during the receive time frame. This architecture also allows dynamic changes in the modulation scheme (e.g. OOK, PPM) to improve the robustness of the communication based on the channel or regulatory environment.

[0100] E1. Low power clock generator

[0101] refer to Fig.11 , depicts a first clock generator (CLKGEN1) 1100 that may be employed within embodiments of the present invention presented within this specification, and thus CLKGEN1 1100 is directed to Figure 7 The transmitter 300 in the receiver 700 and provides a 20MHz signal to the DIGIPRO 1200 in the receiver 700. The low power clock generator CLKGEN1 1100 includes an inverter INV1 1120, which is used as a low frequency oscillator, i.e. 32kHz, together with the crystal oscillator XTAL 1110, the resistor R1 and the capacitors C1 and C2. The sinusoidal oscillator signal is amplified by the inverter INV2 1125 into a square wave clock and used as a reference in the phase locked loop (PLL) 1190. The phase locked loop 1190 consists of a voltage controlled oscillator (VCO) 1150, whose output is divided by a divider 1180 and compared with the reference by a phase detector 1130. Depending on whether the divided clock has a frequency lower or higher than the reference frequency, a pulse of a down-conversion or up-conversion is generated. The charge pump 1140, together with the resistor R2 and the capacitors C3 and C4, filters the up-conversion and down-conversion signals into the control signals of the VCO. When locked, the loop generates an output clock that is buffered by inverter INV3 1160 and is an integer multiple of the reference clock.

[0102] As described above, efficient implementation of clock generation and synchronization in UWB transceivers is critical for low power operation. With pulse durations on the order of nanoseconds, conventional and straightforward synthetic digital approaches require reference clocks of hundreds of MHz or more, with high associated dynamic power consumption. Generating the reference clock directly with a crystal clock generator results in relatively high power consumption. Because crystal oscillator power is directly proportional to frequency, operating the crystal oscillator at a much lower frequency (e.g., 32kHz) and multiplying the frequency with a phase-locked loop (PLL) can significantly reduce power consumption. The inventors have utilized this strategy to generate low power clocks in UWB transceivers. The reference clock for the digital logic is set to the symbol frequency, e.g., 20MHz, which is the rate of symbols processed by the digital baseband hardware and is controlled by a clock source such as a PLL. Fig.11 The clock generator CLKGEN1 1100 of the low power low frequency oscillator XTAL 1110 is used to generate the clock. Then, as Figure 3 As described in relation to transmitter 300 in FIG. 1 , the 20 MHz clock is coupled to a delay locked loop (DLL) 330 which derives multiple phases from the clock at nanosecond range intervals which are used as the timing basis for generating symbol pulses in conjunction with multiplexer 320, DCO 340 and pulser 350. The pulse generator control signal is generated by a multiplexer which selects control bits from memory pulse pattern 310 on the edges of the DLL multiphase clock.

[0103] The phase locked loop 1190 has a startup time in the millisecond range, which is actually limited by the number of crystal oscillator cycles required to stabilize the loop. At data rates above 50 kbps, the PLL 1190 and DLL 330 remain on between frames and are optimized for low power consumption. At data rates of 50 kbps or less, both the PLL 1190 and DLL 330 can be power cycled between frames so that the only power consumption during sleep mode comes from the crystal oscillator.

[0104] E2. Synchronization

[0105] Obviously, the receiver clock needs to be synchronized because the transmission method of the UWB link does not transmit clock data. Therefore, as described with respect to FIG. 12, the synchronization block 1230 is Figure 7 The receiver 700 depicted in the figure is used in conjunction with the DigiPro 1200. Fig. 12AAs depicted, the DIGIPRO 1200 includes a pair of dual edge triggered integrator and analog to digital converter (ADC) blocks. Each of the first integrator 1210A and the second integrator 1210B integrates over half of the symbol period, and its output is digitized by one of the first ADC 1220A and the second ADC 1220B. The first integrator 1210A and the second integrator 1210B are clocked via CLK1 1240A and CLK3 1250A, respectively, while the first ADC 1220A and the second ADC 1220B are clocked via CLK2 1240B and CLK4 1250B, respectively. For example, each of the first integrator 1210A and the second integrator 1210B can be a 3-bit flash ADC, respectively. The two integrator-ADC blocks are offset by one quarter of the symbol period, so that a total of four overlapping integration windows are available during each symbol. This is Fig. 12B It is very obvious.

[0106] Synchronization during the synchronization frame blocks is achieved by determining the integration window with maximum energy, so that receiver clock synchronization can therefore in principle be achieved with one synchronization symbol. In practice, additional synchronization symbols are required to account for the variable gain loop that tracks the variations of the radio link channel. PPM demodulation is achieved by observing the integration window with maximum energy for each symbol, and OOK modulation is achieved by observing the energy in a fixed integration window.

[0107] F. N-way filter with energy detector

[0108] like Figure 7 , an exemplary UWB receiver 700 is depicted according to an embodiment of the present invention, wherein an RF signal from an antenna 710 is initially amplified by a low noise amplifier (LNA) 720 before being passed to a second stage RF amplifier (AMP1) 730. A first square mixer (MIX1) 740 multiplies the signal with itself to convert to an intermediate frequency (IF) before a third stage variable gain amplifier (VGA) 750 further amplifies the signal. The VGA 750 output is then coupled to a second square mixer (MIX2) 760, which down-converts the signal to baseband frequency, where parallel integrators (INT1 and INT2) sum the signal energy, which is digitized by analog to digital converters (ADC1 and ADC2) within a digital processor.

[0109] The square mixer (MIX2) 760, hereinafter referred to as the squarer, squares the signal amplitude, which when integrated by the parallel integrator yields the instantaneous energy of the received signal. Integration over a fixed time period yields the total energy of the symbol over that time period. However, the input signal must be filtered so that it is confined to the frequency band of interest in order to reduce noise and the integrated energy of any interfering signals. Figure 7 In the exemplary UWB receiver of , VGA 750 provides this by appropriate design to provide a bandpass filtering function. However, it would be beneficial to separate the amplification and filtering functions, which would allow each function to be optimized independently without significantly affecting power consumption, and allow for both bandstop filters and bandpass filters.

[0110] In the prior art, filters usually bring high power consumption and low quality factor to circuit designers, especially when an intermediate frequency (IF) bandpass filter is required. Therefore, the inventors have established a design method based on combining a switched capacitor N-way filter before a squarer. It will become apparent that the N-way filter can be a bandpass or bandstop filter, and is based on the up-conversion and down-conversion of the low-pass filter in the passive mixer structure. Since the low-pass filter is up-converted to a higher frequency and the center frequency can be tuned by the clock frequency, the quality factor can be high. However, the disadvantage of the N-way filter is the high power consumption of the clock generator required to generate a high-quality clock in the synchronous receiver structure. This makes the technology generally less suitable for low-power applications in the prior art.

[0111] However, the inventors have developed a method to circumvent the disadvantages of N-way filters in terms of clock jitter, so that a low-power clock generator can be used with the N-way filter instead of the prior art high-power high-accuracy (low-jitter) clock generators associated with the N-way filter. The effect of clock jitter is to spread the energy of the input signal over a larger bandwidth, which will reduce the in-band energy in a synchronous receiver. However, in an exemplary UWB receiver according to an embodiment of the present invention, when the N-way filter is used with an asynchronous receiver (e.g., such as Fig. 9 When paired with the energy detector depicted in FIG. 1 , the total signal energy is still captured because the energy detector is insensitive to the frequency spread of the N-way filter timing clock.

[0112] This technique can also be extended to systems that use the squarer as a self-mixer, for example to down-convert a signal around DC. In this scenario, the selectivity of the squarer is improved by the N-way filter, but without consuming as much power because the clock generator can exhibit a more relaxed jitter tolerance.

[0113] F.1 Exemplary Implementation

[0114] refer to Fig.13A and Fig. 13B , depicts an exemplary implementation of the present invention for both passband and stopband variants. Consider Fig.13A , a receiver front end 1360 including, for example, an antenna, an LNA, an RF amplifier, a first square mixer, multiplies the signal with itself to convert to an intermediate frequency (IF) before the VGA further amplifies the signal. The output of the VGA is coupled to an N-way filter 1310 driven by a clock generator (CLK Gen) 1320, wherein the output of the N-way bandpass (NP-BP) filter 1310 is then coupled to a squarer 1330, and then to subsequent receiver circuitry including, for example, an integrator 1340. Fig. 13B , the same overall receiver circuit configuration is depicted, but the N-way bandpass filter 1310 is replaced with an N-way bandstop filter (NP-BS) 1350.

[0115] Fig.14 depicts an exemplary design of an NP-BP 1310 according to an embodiment of the present invention, wherein the received signal V to be filtered IN are coupled to N paths 1410A to 1410N respectively. Each path includes an input switch S X1 (X=1,2,...,N), filter F X (X=1,2,...,N) and output switch S X2 (X=1, 2, ..., N). The outputs from the N paths 1410A to 1410N are respectively combined to provide a filtered output V OUT Filter F X Can be a low pass filter or a band pass filter.

[0116] Fig.15A Depicted in Fig.14 The NP-BP is depicted in which the clock signal applied to each electrical switch and the clock signal for the individual filters F are now indicated. X As depicted, the input electrical switch and the output electrical switch are driven by the same clock signal within each NP-BP 1510A to NP-BP 1510N, for example, CLK0 drives NP-BP 1510A, CLK1 drives NP-BP 1510B, and CLK N-1 Drive BP-NP 1510N. There is an RC filter between each pair of switches, which includes a resistor R connected in series between the pair of switches and a capacitor C connected in parallel with ground. X (X=1,2,...,N). Fig. 15B The clock signal is depicted in Fig. 15C A first specific implementation simplification is depicted, in which a single resistor R is now placed before the division into N paths. Fig.16A further implementation simplification is depicted, in which the NP-BP is implemented as a single-sided design. Thus, the input is coupled to the NP-BP including the clock signal CLK Y (Y=1, 2, ..., N-1) a single switch and associated capacitor C X The output is now the common point between all N paths and the input.

[0117] exist Fig. 9 An exemplary implementation of a squarer 1330 with a square mixer (SQ-MIX) 900 is depicted in FIG. This is a differential squarer implementation and can therefore be coupled to a processor such as Fig.17 The differential N-way filter depicted. Thus, a Fig.16 A pair of NP-BP single-sided filters is depicted in FIG. , each filter comprises an input resistor R with N switches and capacitors. Fig.17 , N=4 so that four parallel paths 1710A to 1710D are depicted with capacitors C1; C2; C3; C4, where the differential circuit now uses a single capacitor coupled to each differential input through its switches. These switches are driven by the appropriate phases of the clock signals labeled CLK(θ=0°); CLK(θ=90°); CLK(θ=180°); CLK(θ=270°). These clocks are generated by a 4-phase clock generator 1720 from differential clocks coupled to the 4-phase clock generator from the clock generator circuit.

[0118] Fig.18 Depicted with Fig.16 The depicted band-stop filter is an equivalent band-stop filter design, where the band-stop filter now includes a capacitor C in series with a resistor R X (X=1,2,...,N).

[0119] G. Ranging and positioning using UWB pulse radio

[0120] As described above, distance determination and position / location measurement are an aspect of many applications having devices / subsystems / systems / components, etc. that employ UWB transceivers. In the case where UWB-based technologies are not utilized within such devices / subsystems / systems / components, etc., additional hardware functionality and associated power consumption, etc. must be provided to achieve the desired distance determination and position / location measurements, for example, by utilizing another wireless technology based on, for example, optical / RF / microwave locally for internal applications covering internal / external environments, or by utilizing Global Positioning System (GPS) / wireless triangulation, etc. in external environments having microwave / RF wireless systems such as Bluetooth, Wi-Fi, WiMAX, etc.

[0121] Thus, the inventors have established two techniques that utilize the low-power pulse-based UWB transmitter / receiver / transceiver developed within this patent application, as well as the devices depicted and described in WO / 2016 / 191851 “Systems and Methods for Spectrally Efficient and Energy Efficient Ultra-Wideband Impulse Radios with Scalable Data Rates” and WO / 2015 / 103692 “Systems relating to Ultra-Wideband Broadcasting comprising Dynamic Frequency and Bandwidth Hopping”, both of which are incorporated herein by reference.

[0122] F1. Time-of-Flight Distance Measurement (Synchronized UWB Transceiver Pair)

[0123] The ranging system is described for a UWB communication link and utilizes an innovative energy detection scheme in combination with an exemplary 20 Mbps air data rate. The capabilities of the UWB transceiver's advanced synchronization scheme are used to ensure robust communication and tracking of the pulse beam, and the ranging scheme is used to "amplify" the arrival time.

[0124] In addition to the UWB transceiver / receiver, an integrated circuit (IC) implementation or hybrid implementation also requires Fig.19 Described and depicted ranging circuit. Depending on the desired ranging estimate tolerance / accuracy, a more accurate timing reference may be required to support ranging estimates in the centimeter range.

[0125] Fig.19 A simplified version of the system block diagram and a simplified pulse train are shown. The incoming pulse train passes through the rear antenna 1910 and passes through a low noise amplifier (LNA) 1920. A portion of the amplified received signal is coupled to a correlator circuit 1940 and the remainder propagates to the remainder of the receiver front end circuit 1930. The correlator circuit 1940 correlates the received signal with a reference pulse provided by a reference pulse generator 1960 and driven by a pulse generator 1970. The pulse generator 1970 itself is driven by a delay locked loop (DLL) 1990 having approximately 50 taps, with a tap spacing of 0.5ns for a nominal 20Mb / s UWB solution according to an embodiment of the present invention established by the inventor. The DLL 1980 is driven by a precision reference clock 1990. The output from the correlator circuit 1940 is fed to a timer circuit.

[0126] Due to the construction of the pulse beam, only one pulse within the incoming pulse train will match the reference (or template) pulse since all pulses in the pulse train have different center frequencies. This means that a UWB energy detector receiver such as that depicted and described above with respect to embodiments of the present invention can still gain the benefit of integrating the energy of the full pulse train to increase communication range, while the ranging portion can "zoom in" on individual pulses to increase timing resolution.

[0127] An exemplary process according to an embodiment of the present invention would start with tap #1, and the taps would advance after each pulse beam until a correlation peak is established. Because the energy detection receiver already knows the "location" of the pulse beam to within 25ns, the search space is greatly reduced. This can result in a significant reduction in hardware complexity, search time, etc.

[0128] F1.1 Time-of-Flight Algorithm

[0129] It is important to note that this exemplary algorithm according to an embodiment of the present invention assumes that the pair of UWB transceivers are already synchronized. Fig. 20 A simplified timing diagram is depicted in Fig.21 An exemplary process flow of an algorithm according to an embodiment of the present invention is depicted. It will be apparent to one skilled in the art that many variations of this exemplary algorithm are possible. The basic accuracy depends on the accuracy of the reference available in the transceiver, and sub-nanosecond accuracy / drift is desirable.

[0130] Reference now Fig.21 , the process includes steps 2105 to 2150. Steps 2105 to 2125 are described as follows: Step 2105: Synchronize the UWB transceiver pair (UWB#1 and UWB#2); Step 2110: UWB chip #1 sends a packet consisting of a UWB pulse beam; Step 2115: UWB chip #1 timer (TC1) starts during the last pulse beam transmission; Step 2120: UWB #2 receives the packet and the correlator circuit 1940 / DLL circuit 1990 synchronizes to the appropriate pulse; and Step 2125: When receiving the synchronization pulse in the last beam, UWB#2 starts the timer.

[0131] Then, steps 2130 to 2150 are performed, including: Step 2130: UWB#2 waits for a precise time known to both transceivers. (Note: Chip#2 knows when the last beam appears because the length of the packet is known.) Step 2135: After a precise waiting time, chip #2 transmits the same type of packet back to chip #1; Step 2140: Execute the same synchronization process in which chip #1 is executed; Step 2145: Chip #1 determines that the last bundle in the packet has arrived, and stops its TC1 timer to obtain the elapsed time TC1 ELAPSE ;and • Step 2150: Chip #1 determines the time of flight (TOF) based on the following equation (1) and from the measured distance. TC1 ELAPSE =TOF+KnownWaitTime+TOF+PacketLength (1)

[0132] Alternatively, once the correlator detects the appropriate pulse, chip #1 can stop its timer, and instead of using "packet length" in the TOF calculation, it can use "number of beams before correlation." This will reduce timing errors, and the number of beams will be known from the transceiver's bit counter.

[0133] Steps 2110 to 2150 may be repeated to provide an average result with improved accuracy. However, optionally, since the transceiver pair already knows approximately which DLL tap to use, the length of the packet may be reduced. Therefore, shorter packets will mean less drift in the clocks between UWB transceivers.

[0134] F.2 Integration time window distance measurement (asynchronous UWB transceiver pair)

[0135] According to an embodiment of the present invention, a pair of UWB circuits, chip #1 and chip #2, can each send a UWB pulse that can be repeated based on the internal clock of the corresponding chip. Both chip #1 and chip #2 can receive UWB pulses from the transmitter of another UWB circuit. The UWB circuit of the method according to an embodiment of the present invention identifies the arrival of UWB pulses by integrating the input signal energy within an integration time window, which is defined as PW1 and PW2 for chip #1 and chip #2, respectively. These integration windows are based on the internal clock of each chip, and chip #1 has a slightly different internal clock than chip #2, making PW2 slightly longer than PW1. Therefore, the two chips cannot be synchronized.

[0136] refer to Fig. 22 , depicts an exemplary process flow of an integration time window method for distance determination, wherein Fig.23 A timing diagram is depicted in FIG.

[0137] The algorithm includes the following steps 2210 to 2280: Step 2210: Chip #1 sends UWB pulse ( Fig.23 The first time sequence 2300A in the figure describes the relationship between the pulse energy and time); Step 2220: After a time ΔT (which is proportional to the distance between the two chips), the pulse arrives at chip #2 ( Fig.23 The second timing 2300B in FIG. Step 2230: To detect the pulse, chip #2 integrates the energy of the input signal within the integration time window ( Fig.23 The third sequence 2300C) Step 2240: If the energy in the integration time window is greater than the threshold, then it is assumed that the pulse arrives at chip #2, and at the beginning of its next integration window, chip #2 sends an echo signal back to chip #1 ( Fig.23 The fourth time sequence 2300D in FIG. Step 2250: After time ΔT, the echo pulse arrives at chip #1 ( Fig.23 The fifth time sequence 2300E); Step 2260: Chip #1 integrates the energy of the input signal within its own integration window (sixth timing 2300F); Step 2270: The integrated energy is then passed to the digital signal processor (DSP) of combo chip #1 to estimate ΔT; and Step 2280: Steps 2210 to 2270 may be repeated multiple times, and the estimated ΔT is averaged to reduce its uncertainty.

[0138] F2.1 Time of Flight with Digital Signal Processing:

[0139] In many ranging algorithms, the time difference (ΔT) between the transmitted signal and the received echo is used to measure the signal's time of flight (TOF). This time of flight is proportional to the distance between the transmitter and the echo generator. However, in the algorithm presented below, the time difference is not measured directly, but is derived using a digital signal processing algorithm. The algorithm exploits the fact that Fig.23 As shown in the sixth graph 22300F in FIG. 22300F, when the echo signal is received, its energy is distributed between two consecutive integration time windows. The exact arrival time of the echo signal can be estimated by processing the ratio of the energy integrated in these two time slots (referred to as E1 and E2, respectively). For example, if the energy is equal, that is, E1=E2, then this means that the signal arrives exactly in the middle of the first time slot. Using a linear approximation, it can be shown that the estimated arrival time is given by equation (2), where PW1 is the width of the time slot.

[0140] Therefore, the time difference ΔTOA is accurately measured and this time should be related to ΔT. Fig.23 As shown, the time difference ΔTOA consists of two time slots: the time between the transmission signal and the echo signal (ΔT12), and the time between the echo signal of chip #2 and the reception signal of chip #1 (ΔT).

[0141] Calculation of ΔT12: If the received signal at chip #2 ( Fig.23 If the third curve 2300C in FIG. 2300C) just reaches the beginning of the integration time window, ΔT12 is equal to ΔT+PW2, otherwise it is a random variable uniformly distributed between ΔT+0.5·PW2 and ΔT+1.5·PW2 due to the asynchronous between chip #1 and chip #2. Therefore, ΔTOA has an average value of 2×ΔT+PW2. Therefore, by repeating the algorithm, ΔTOA can be measured for many samples and averaged to estimate ΔT.

[0142] Specific details are given in the above description to provide a thorough understanding of the embodiments. However, it should be understood that the embodiments can be practiced without these specific details. For example, circuits can be shown in block diagram form so as not to obscure the embodiments in unnecessary details. In other cases, well-known circuits, processes, algorithms, structures and techniques can be shown without unnecessary details so as not to obscure the embodiments.

[0143] The specific implementation of the above-mentioned techniques, blocks, steps and devices can be completed in various ways. For example, these techniques, blocks, steps and devices can be implemented in hardware, software or a combination thereof. For hardware specific implementation, the processing unit can be implemented in one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), processors, controllers, microcontrollers, microprocessors, other electronic units and / or combinations thereof designed to perform the above-mentioned functions.

[0144] In addition, it should be noted that the embodiments may be described as processes depicted as flow charts, flow diagrams, data flow diagrams, structure diagrams, or block diagrams. Although a flow chart may describe the operations as sequential processes, most of the operations may be performed in parallel or simultaneously. In addition, the order of the operations may be rearranged. When the operations of a process are completed, the process terminates, but the process may have additional steps not included in the figure.

[0145] The foregoing disclosure of exemplary embodiments of the present invention has been presented for purposes of illustration and description. The foregoing disclosure is not intended to be exhaustive or to limit the present invention to the precise forms disclosed. Based on the above disclosure, many changes and modifications of the embodiments described herein will be apparent to those of ordinary skill in the art. The scope of the present invention is limited only by the appended claims and their equivalents.

[0146] In addition, when describing representative embodiments of the present invention, this specification may present the method and / or process of the present invention as a specific sequence of steps. However, insofar as the method or process does not rely on the specific order of the steps set forth herein, the method or process should not be limited to the specific order of the steps. As will be appreciated by those of ordinary skill in the art, other sequences of steps are also feasible. Therefore, the specific order of the steps set forth in this specification should not be interpreted as a limitation to the claims. In addition, claims relating to the method and / or process of the present invention should not be limited to performing their steps in the order written, and those skilled in the art can easily understand that the order can be changed and still remain within the spirit and scope of the present invention.

Claims

1. A method comprising: A first ultra-wideband (UWB) transceiver is provided that includes a receiver circuit and a digital signal processor (DSP).

2. The method according to claim 1, wherein The receiver circuit comprises: a filter circuit comprising an input port electrically coupled to an antenna for receiving a UWB signal and an output port, the filter circuit processing the received UWB signal at the output port to generate a processed UWB signal; Clock source; as well as an energy detector circuit electrically coupled to the output port of the filter circuit, the clock source, and the DSP; The first UWB transceiver receives an echo signal generated by a second UWB transceiver in response to a signal transmitted by the first UWB transceiver; as well as The DSP performs a process, the process comprising: establishing the energy within an integration time window, the integration time window being established dependent on a clock signal generated by the clock source; establishing an estimate of the elapsed time between transmission of the signal and receipt of the echo signal, the estimate of the elapsed time being established as a function of an energy distribution determined by the DSP for two consecutive integration time windows in receiving the echo signal; and A distance between the first UWB transceiver and a second UWB transceiver is established using another process that employs the elapsed time estimate.

3. The method according to claim 2, wherein One of the following: establishing an energy distribution by dividing the energy in a second integration time window of the two consecutive integration time windows by the sum of the two consecutive integration time windows; establishing an energy distribution by dividing the energy in a second of the two consecutive integration time windows by the sum of the two consecutive integration time windows, and establishing the estimate of the elapsed time by multiplying the energy distribution by the time of each integration time window; and The first UWB transceiver and the second UWB transceiver are not synchronized with each other.

4. The method according to claim 1, wherein The receiver circuit includes an energy detector circuit coupled to the DSP; as well as The DSP performs a process, the process comprising: transmitting a signal to a second UWB transceiver, wherein the signal triggers an echo signal to be generated by the second UWB transceiver, the echo signal subsequently being received by the first UWB receiver; establishing the energy within an integration time window, the integration time window being established dependent upon a clock signal generated by a clock source forming part of the first UWB transceiver and an output of the energy detector circuit; establishing an estimate of the elapsed time between transmission of the signal and receipt of the echo signal, the estimate of the elapsed time being established as a function of an energy distribution determined by the DSP for two consecutive integration time windows in receiving the echo signal; as well as A distance between the first and second UWB transceivers is established using another process that employs the estimate of the elapsed time.

5. The method according to claim 4, wherein One of the following: establishing an energy distribution by dividing the energy in a second integration time window of the two consecutive integration time windows by the sum of the two consecutive integration time windows; establishing an energy distribution by dividing the energy in a second of the two consecutive integration time windows by the sum of the two consecutive integration time windows, and establishing the estimate of the elapsed time by multiplying the energy distribution by the time of each integration time window; and The first UWB transceiver and the second UWB transceiver are not synchronized with each other.

6. The method according to claim 1, wherein The receiver circuit includes a detector circuit and a synchronization circuit, the synchronization circuit includes a correlation circuit; in The DSP performs a process, the process comprising: transmitting a first packet including a plurality of UWB pulse beams; Starting a first timer associated with transmission of a last pulse beam of the plurality of UWB pulse beams; processing a plurality of other UWB pulse beams forming a second packet received from the second UWB transceiver; synchronizing to a predetermined pulse within a final pulse bundle of the plurality of other UWB pulse bundles of the second group using the synchronization circuit; stopping the first timer upon determining that the predetermined pulse is detected; and The flight time is calculated depending on the elapsed time of the first timer.

7. The method according to claim 6, wherein The correlation circuit includes a delay locked loop (DLL) including a plurality of taps spaced apart at predetermined time offsets relative to each other; The predetermined time offsets of the plurality of taps relative to one another and the number of taps within the plurality of taps are established depending on at least one of a nominal data rate of the second UWB signal and a duration of a group of other UWB pulse beams in the plurality of other UWB pulse beams, the group of other UWB pulse beams comprising data bits within the second packet.

8. The method according to claim 6, wherein the correlation circuit comprising a delay locked loop (DLL) including a plurality of taps spaced apart at predetermined time offsets relative to each other and a reference pulse generator driven by a signal from a pulse generator for generating a reference pulse sequence, wherein the correlation circuit correlates a portion of the plurality of UWB pulse beams received by the first UWB transceiver with the reference pulse sequence generated by the reference pulse generator; The pulse generator is driven by the DLL, which itself is driven by a reference clock; as well as A timing reference process executed by the DSP advances which of the plurality of taps from the DLL is employed by the pulse generator to drive the reference pulse generator to generate the reference pulse sequence until a correlation peak is established with the correlation circuit.

9. The method according to claim 6, wherein The correlation circuit includes a delay locked loop (DLL) including a plurality of taps spaced apart at predetermined time offsets relative to each other; and The DSP performs timing reference processing that employs correlation circuitry dependent upon processing of the plurality of other UWB pulse beams transmitted by a second UWB transceiver.

10. The method according to claim 1, wherein The receiver circuit comprises: a first port, the first port being configured to receive an ultra-wideband (UWB) signal; a filter circuit comprising an input port electrically coupled to the first port for receiving the ultra-wideband (UWB) signal and an output port, the filter circuit processing the received UWB signal at the output port to generate a processed UWB signal; A clock source, wherein the clock source is used to generate a low-precision clock; as well as a detector circuit electrically coupled to the output port of the filter circuit and to the clock source; in The received UWB signal includes multiple symbol pulse beams, each of which represents a current symbol of a data signal, and each of which includes multiple N pulses; wherein each of the N pulses is at a predetermined frequency among multiple M frequencies, has a predetermined amplitude, and has a predetermined pulse length.

11. The method according to claim 1, wherein The receiver circuit comprises: a first port, the first port being configured to receive an ultra-wideband (UWB) signal; a filter circuit comprising an input port electrically coupled to the first port for receiving the ultra-wideband (UWB) signal and an output port, the filter circuit processing the received UWB signal at the output port to generate a processed UWB signal; A clock source, wherein the clock source is used to generate a low-precision clock; a detector circuit electrically coupled to the output port of the filter circuit and to the clock source; as well as a correlator circuit comprising a delay locked loop (DLL) including a plurality of taps spaced apart at predetermined time offsets relative to one another; wherein the correlator circuit is electrically coupled to an antenna for receiving UWB signals; as well as The predetermined time offsets of the plurality of taps from one another and the number of taps within the plurality of taps are established depending on at least one of a nominal data rate of the received UWB signal and a duration of a group of UWB pulse beams comprising data bits within the received UWB signal.

12. The method according to claim 1, wherein The receiver circuit comprises: a first port, the first port being configured to receive an ultra-wideband (UWB) signal; a filter circuit comprising an input port electrically coupled to the first port for receiving the ultra-wideband (UWB) signal and an output port, the filter circuit processing the received UWB signal at the output port to generate a processed UWB signal; A clock source, wherein the clock source is used to generate a low-precision clock; a detector circuit electrically coupled to the output port of the filter circuit and to the clock source; as well as a correlator circuit comprising a delay locked loop (DLL) including a plurality of taps spaced apart at predetermined time offsets relative to one another; wherein the correlator circuit is electrically coupled to an antenna for receiving UWB signals; The correlator circuit further comprises: a reference pulse generator driven by a signal from the pulse generator to generate a reference pulse sequence; and a correlator that correlates a portion of a beam of UWB pulses received by a correlator circuit from the antenna with the reference pulse sequence generated by the reference pulse generator; The pulse generator is driven by a DLL, which is driven by a reference clock; and A timing reference process performed by the apparatus advances which of the plurality of taps from the DLL is employed by the pulse generator to drive the reference pulse generator to generate the reference pulse sequence until a correlation peak is established with the correlator.

13. The method according to claim 12, wherein: the correlator circuit forming part of a timing reference circuit for establishing timing information related to a distance between a pair of UWB transceivers, wherein the first UWB transceiver is one of the pair of UWB transceivers; and or: The timing reference circuit and the detector circuit operate simultaneously; or: The detector circuit is an energy detector circuit, and the timing reference circuit and the energy detector circuit operate simultaneously.

14. The method according to claim 1, wherein The receiver circuit comprises: a first port, the first port being configured to receive an ultra-wideband (UWB) signal; a filter circuit comprising an input port electrically coupled to the first port for receiving the ultra-wideband (UWB) signal and an output port, the filter circuit processing the received UWB signal at the output port to generate a processed UWB signal; A clock source, wherein the clock source is used to generate a low-precision clock; a detector circuit electrically coupled to the output port of the filter circuit and to the clock source; a correlator circuit comprising a delay locked loop (DLL) including a plurality of taps spaced apart at predetermined time offsets relative to one another, wherein the correlator circuit is electrically coupled to the antenna for receiving the UWB signal; and the DSP executes executable instructions stored in the memory; and When executed by the DSP, the executable instructions configure the DSP to perform processes including a process of establishing a timing reference at the first UWB transceiver, the first UWB transceiver employing the correlator circuit in dependence upon processing a UWB pulse beam transmitted by a second UWB transceiver.

15. The method according to claim 14, wherein or: establishing a predetermined time offset of the plurality of taps from one another and a number of taps within the plurality of taps depending on at least one of a nominal data rate for communications between the first UWB transceiver and the second UWB transceiver and a duration of a UWB pulse beam representing a data bit; or: The timing reference process advances which of the plurality of taps from the DLL employed by the pulse generator to drive a reference pulse generator that generates a reference pulse sequence employed by the correlator circuit until a correlation peak is established with the correlator.

16. The method according to claim 1, wherein The DSP establishes a distance between a pair of ultra-wideband (UWB) transceivers including the first UWB transceiver and the second UWB transceiver using a process executed on the first UWB transceiver and the second UWB transceiver; wherein The distance established by the process executed on the first UWB transceiver employs an estimate of a transit time of an echo signal established by the DSP, wherein the echo signal is generated by the second UWB transceiver; The first UWB transceiver and the second UWB transceiver are not synchronized with each other; The first UWB transceiver incorporates: a filter circuit comprising an input port electrically coupled to an antenna for receiving a UWB signal and an output port, the filter circuit processing the received UWB signal at the output port to generate a processed UWB signal; Clock source; as well as an energy detector circuit electrically coupled to the output port of the filter circuit and to the clock source; The DSP establishes the energy within an integration time window, wherein the integration time window is established depending on a clock signal generated by the clock source; as well as The estimate of the transit time is established depending on the energy distribution determined by the DSP for two consecutive integration time windows of receiving the echo signal.

17. The method according to claim 16, wherein or: Establishing the energy distribution by dividing the energy in a second integration time window of the two consecutive integration time windows by the sum of the two consecutive integration time windows; or: The energy distribution is established by dividing the energy in a second of the two consecutive integration time windows by the sum of the two consecutive integration time windows, and the estimate of the elapsed time is established by multiplying the energy distribution by the time of each integration time window.

18. The method according to claim 1, wherein The DSP establishes a distance between a pair of ultra-wideband (UWB) transceivers including the first UWB transceiver and the second UWB transceiver using a process executed on the first UWB transceiver and the second UWB transceiver; wherein The distance established by the process executed on the first UWB transceiver employs an estimate of a transit time of an echo signal established by the DSP, wherein the echo signal is generated by the second UWB transceiver; The first UWB transceiver and the second UWB transceiver are not synchronized with each other; The first UWB transceiver incorporates an energy detector circuit; the DSP establishing the energy within an integration time window, the integration time window being established dependent upon a clock signal generated by a clock source forming part of the first transceiver and an output of the energy detector circuit; and The estimate of the transit time is established depending on the energy distribution determined by the DSP for two consecutive integration time windows of receiving the echo signal.

19. The method according to claim 18, wherein or: Establishing the energy distribution by dividing the energy in a second integration time window of the two consecutive integration time windows by the sum of the two consecutive integration time windows; or: The energy distribution is established by dividing the energy in a second of the two consecutive integration time windows by the sum of the two consecutive integration time windows, and the estimate of the elapsed time is established by multiplying the energy distribution by the time of each integration time window.

20. The method of claim 1, wherein The DSP establishes a distance between a pair of ultra-wideband (UWB) transceivers including the first UWB transceiver and the second UWB transceiver using a process executed on the first UWB transceiver and the second UWB transceiver; wherein The distance established by the process executed on the first UWB transceiver employs an estimate of a transit time of an echo signal established by the DSP, wherein the echo signal is generated by the second UWB transceiver; The process includes: transmitting an ultra-wideband (UWB) pulse using the first UWB transceiver operating at a first clock rate, the first clock rate having a first integration window dependent on the first clock rate; receiving, from the second UWB transceiver, an echo signal generated by the second UWB transceiver in dependence on its reception of the UWB pulse; integrating the received UWB signal within the first integration window and determining when the energy received within the first integration window exceeds a predetermined threshold at which the echo signal has been received; passing the integrated energy within the first integration window to the digital signal processing (DSP) circuit; and An estimate of the elapsed time is established using the DSP circuit.

21. The method according to claim 20, wherein The first UWB transceiver and the second UWB transceiver are not synchronized with each other; The first UWB transceiver incorporates an energy detector circuit; and The estimate of the elapsed time is established depending on an energy distribution determined by the DSP for two consecutive first integration windows of receiving the echo signal.

22. The method according to claim 21, wherein or: Establishing the energy distribution by dividing the energy in a second integration time window of the two consecutive integration time windows by the sum of the two consecutive integration time windows; or: The energy distribution is established by dividing the energy in a second of the two consecutive integration time windows by the sum of the two consecutive integration time windows, and the estimate of the elapsed time is established by multiplying the energy distribution by the time of each integration time window.

23. The method according to claim 20, wherein The echo signal is generated by the second UWB transceiver through a process comprising the following steps: receiving the UWB pulse at the second UWB transceiver, the second UWB transceiver operating at a second clock rate, the second clock rate having a second integration window dependent on the second clock rate; integrating the UWB signal received within the second integration window and determining when the energy received within the second integration window exceeds a predetermined threshold that a UWB pulse has been received; as well as After it is determined that the UWB pulse is received, an echo signal is transmitted in the next second integration window.

24. The method according to claim 20, wherein The first UWB transceiver and the second UWB transceiver are not synchronized with each other; The first UWB transceiver incorporates an energy detector circuit; establishing an estimate of the elapsed time depending on an energy distribution determined by the DSP for two consecutive first integration windows of receiving the echo signal; The UWB pulse includes a plurality of N pulses; wherein each of the N pulses is at a predetermined frequency among a plurality of M frequencies, has a predetermined amplitude, and has a predetermined pulse length; as well as The echo signal includes a plurality of R pulses; wherein Each of the R pulses is at a predetermined frequency among a plurality of S frequencies, has a predetermined amplitude, and has a predetermined pulse length.

25. The method of claim 20, wherein The first UWB transceiver and the second UWB transceiver are not synchronized with each other; The first UWB transceiver incorporates an energy detector circuit; establishing an estimate of the elapsed time depending on an energy distribution determined by the DSP for two consecutive first integration windows of receiving the echo signal; The UWB pulse includes a plurality of N pulses; wherein each of the N pulses is at a predetermined frequency among the M frequencies, has a predetermined amplitude, and has a predetermined pulse length; The echo signal includes a plurality of R pulses; wherein Each of the R pulses is at a predetermined frequency among a plurality of S frequencies, has a predetermined amplitude, and has a predetermined pulse; as well as N, M, R, and S are positive integers greater than or equal to 2.

Images