Method and apparatus for decoding picture data of video, and storage medium

Abstract

The invention relates to a method and apparatus for decoding picture data of a video, and a storage medium. A method for decoding picture data of a video, the method comprising, for a block of the video: obtaining encoded picture data; obtaining a flag indicating the use of intra prediction based on a plurality of reference lines, the reference lines including a left reference line located on the left side of the block and a top reference line located above the block; predicting the block using one or more reference lines selected from the plurality of reference lines based on a value of the flag; and decoding picture data based on the predicted block.

Description

[0001] This application is a divisional application of the invention patent application with application number 201980045597.2, application date May 28, 2019, and invention name “Syntax elements for video encoding or decoding”. Technical Field

[0002] At least one of the present embodiments generally relates to syntax elements for video encoding or decoding. Background Art

[0003] In order to achieve high compression efficiency, image and video coding schemes usually use prediction and transformation to exploit spatial and temporal redundancy in video content. Generally, intra-frame or inter-frame prediction is used to exploit intra-frame or inter-frame correlation, and then the difference between the original block and the predicted block (often expressed as prediction error or prediction residual) is transformed, quantized and entropy encoded. In order to reconstruct the video, the compressed data is decoded by the inverse process corresponding to entropy coding, quantization, transformation and prediction. Summary of the invention

[0004] According to a first aspect of at least one embodiment, a method for decoding picture data of a video is proposed, the method comprising, for a block of the video: obtaining encoded picture data; obtaining a flag indicating the use of intra-frame prediction based on multiple reference lines, the reference lines including a left reference line located on the left side of the block and a top reference line located above the block; predicting the block using one or more reference lines selected from the multiple reference lines based on the value of the flag; and decoding the picture data based on the predicted block.

[0005] According to a second aspect of at least one embodiment, a device for decoding picture data of a video is proposed, the device comprising a processor, the processor being configured to, for a block of the video: obtain encoded picture data; obtain a flag indicating the use of intra-frame prediction based on multiple reference lines, the reference lines comprising a left reference line located on the left side of the block and a top reference line located above the block; predict the block using one or more reference lines selected from the multiple reference lines based on the value of the flag; and decode the picture data based on the predicted block.

[0006] According to a third aspect of at least one embodiment, a computer-readable storage medium is provided, comprising instructions, which, when executed by a computer, cause the computer to perform the above-mentioned method for decoding picture data of a video. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 An example of a video encoder 100 , such as a High Efficiency Video Coding (HEVC) encoder, is illustrated.

[0008] Figure 2A block diagram illustrating an example of a video decoder 200 (eg, a HEVC decoder).

[0009] Figure 3 Examples of coding tree units and coding trees in the compressed domain are illustrated.

[0010] Figure 4 An example of dividing a CTU into a coding unit, a prediction unit, and a transform unit is illustrated.

[0011] Figure 5 An example of a quadtree plus binary tree (QTBT) CTU representation is illustrated.

[0012] Figure 6 An exemplary extended set of coding unit partitions is illustrated.

[0013] Figure 7 An example of an intra prediction mode with two reference layers is illustrated.

[0014] Figure 8 An example embodiment of a compensation mode for bidirectional illumination compensation is illustrated.

[0015] Fig. 9 An interpretation of bt-split-flag according to an example embodiment is illustrated.

[0016] Fig.10 Block diagram illustrating an example of a system in which various aspects and embodiments are implemented.

[0017] Fig.11 A flowchart illustrating an example of an encoding method using a new encoding tool according to an embodiment.

[0018] Fig.12 A flowchart illustrating an example of a portion of a decoding method using a new encoding tool according to an embodiment. DETAILED DESCRIPTION

[0019] In at least one embodiment, the use of the new coding tools described below results in improvements in coding efficiency. In an example embodiment, efficient signaling of these coding tools is transmitting information representing the coding tools used for encoding, for example, from an encoder device to a receiver device (e.g., a decoder or display), so that the appropriate tools are used in the decoding stage. These tools include new partition modes, new intra-frame prediction modes, improved flexibility of sample adaptive offsets, and new illumination compensation modes for bidirectional prediction blocks. Therefore, the proposed new syntax that aggregates multiple coding tools provides more efficient video coding.

[0020] Figure 1 An example of a video encoder 100 , such as a High Efficiency Video Coding (HEVC) encoder, is illustrated. Figure 1An encoder in which improvements are made to the HEVC standard or an encoder adopting a technique similar to HEVC, such as a JEM (Joint Exploration Model) encoder developed by JVET (Joint Video Exploration Team), can also be exemplified.

[0021] In this application, the terms "reconstruction" and "decoding" are used interchangeably, the terms "encoded" or "coded" are used interchangeably, and the terms "image", "picture" and "frame" are used interchangeably. Usually, but not necessarily, the term "reconstruction" is used on the encoder side, and "decoding" is used on the decoder side.

[0022] Prior to encoding, the video sequence may undergo a pre-encoding process (101). For example, a color transform may be applied to the input color picture (e.g., conversion from RGB 4:4:4 to YCbCr 4:2:0), or a remapping of the input picture components may be performed to obtain a signal distribution that is more resilient to compression (e.g., using histogram equalization of one of the color components). Metadata may be associated with the pre-processing and appended to the bitstream.

[0023] In HEVC, to encode a video sequence having one or more pictures, the pictures are partitioned (102) into one or more slices, where each slice may include one or more slice segments. Slice segments are organized into coding units, prediction units, and transform units. The HEVC specification distinguishes between "blocks" and "units", where a "block" is for a specific area in a sample array (e.g., luma, Y), and a "unit" includes a co-located block of all coded color components (Y, Cb, Cr or monochrome), syntax elements, and prediction data associated with the block (e.g., motion vectors).

[0024] For encoding in HEVC, the picture is partitioned into coding tree blocks (CTBs) of a square shape with a configurable size, and a continuous set of coding tree blocks is grouped into slices. A coding tree unit (CTU) contains the CTB of the coded color component. The CTB is the root of a quadtree partitioned into coding blocks (CBs), and a coding block can be partitioned into one or more prediction blocks (PBs) and forms the root of a quadtree partitioned into transform blocks (TBs). Corresponding to the coding blocks, prediction blocks, and transform blocks, a coding unit (CU) includes a prediction unit (PU) and a set of transform units (TUs) in a tree structure, the PU includes prediction information for all color components, and the TU includes a residual coding syntax structure for each color component. The sizes of CBs, PBs, and TBs of the luminance component apply to the corresponding CUs, PUs, and TUs. In the present application, the term "block" may be used, for example, to refer to any one of CTUs, CUs, PUs, TUs, CBs, PBs, and TBs. In addition, "block" may also be used to refer to macroblocks and partitions specified in H.264 / AVC or other video coding standards, and more generally, to arrays of data of various sizes.

[0025] In the example of encoder 100, a picture is encoded by an encoder element as described below. The picture to be encoded is processed in units of CUs. Each CU is encoded using intra or inter mode. When a CU is encoded in intra mode, it performs intra prediction (160). In inter mode, motion estimation (175) and motion compensation (170) are performed. The encoder decides (105) which of intra mode or inter mode is used to encode the CU, and indicates the intra / inter decision through a prediction mode flag. The prediction residual is calculated by subtracting (110) the predicted block from the original image block.

[0026] A CU in intra mode is predicted based on reconstructed neighboring samples within the same slice. A set of 35 intra prediction modes are available in HEVC, including DC, planar, and 33 angular prediction modes. The intra prediction reference is reconstructed from rows and columns adjacent to the current block. The reference extends over twice the block size in both horizontal and vertical directions using available samples from previously reconstructed blocks. When angular prediction mode is used for intra prediction, reference samples may be copied along the direction indicated by the angular prediction mode.

[0027] The applicable luma intra prediction mode for the current block can be encoded using two different options. If the applicable mode is included in the constructed list of three most probable modes (MPMs), the mode is signaled by the index in the MPM list. Otherwise, the mode is signaled by a fixed-length binarization of the mode index. The three most probable modes are derived from the intra prediction modes of the top and left neighboring blocks.

[0028] For inter CU, the corresponding coding block is also partitioned into one or more prediction blocks. Inter prediction is performed at the PB level, and the corresponding PU contains information about how to perform inter prediction. Motion information (i.e., motion vector and reference picture index) can be signaled in two methods, namely "merge mode" and "advanced motion vector prediction (AMVP)".

[0029] In merge mode, the video encoder or decoder assembles a candidate list based on already coded blocks, and the video encoder signals an index for one of the candidates in the candidate list. At the decoder side, motion vectors (MVs) and reference picture indices are reconstructed based on the signaled candidates.

[0030] In AMVP, a video encoder or decoder assembles a candidate list based on motion vectors determined from already encoded blocks. The video encoder then signals an index into the candidate list to identify the motion vector predictor (MVP) and signals the motion vector difference (MVD). On the decoder side, the motion vector (MV) is reconstructed as MVP+MVD. The applicable reference picture index is also explicitly encoded in the PU syntax for AMVP.

[0031] The prediction residual is then transformed (125) and quantized (130), including at least one embodiment for adapting the chrominance quantization parameters, as described below. The transform is generally based on a separable transform. For example, a DCT transform is applied first in the horizontal direction and then in the vertical direction. In recent codecs (such as JEM), the transform used in the two directions may be different (e.g., DCT in one direction, DST in the other), which leads to a wide variety of 2D transforms, while in previous codecs, the variety of 2D transforms was generally limited to a given block size.

[0032] The quantized transform coefficients along with motion vectors and other syntax elements are entropy encoded (145) to output a bitstream. The encoder can also skip the transform and apply quantization directly to the untransformed residual signal on a 4x4 TU basis. The encoder can also bypass both transform and quantization, i.e., directly encode the residual without applying a transform or quantization process. In direct PCM encoding, no prediction is applied and the coding unit samples are encoded directly into the bitstream.

[0033] The encoder decodes the coded block to provide a reference for further prediction. The quantized transform coefficients are dequantized (140) and inverse transformed (150) to decode the prediction residual. The decoded prediction residual and the prediction block are combined (155) to reconstruct the picture block. For example, an in-loop filter (165) is applied to the reconstructed picture to perform deblocking / SAO (sample adaptive offset) filtering to reduce coding artifacts. The filtered image is stored at a reference picture buffer (180).

[0034] Figure 2 A block diagram illustrating an example of a video decoder 200, such as a HEVC decoder. In the example of the decoder 200, a bitstream is decoded by decoder elements as described below. The video decoder 200 generally performs the same Figure 1 The decoding channel is opposite to the encoding channel described in , which performs video decoding as part of encoding the video data. Figure 2 It is also possible to exemplify a decoder in which improvements are made to the HEVC standard or a decoder that adopts a technique similar to that of HEVC, such as a JEM decoder.

[0035] Specifically, the input to the decoder includes a video bitstream that may be generated by the video encoder 100. The bitstream is first entropy decoded (230) to obtain transform coefficients, motion vectors, picture partition information and other encoding information. The picture partition information indicates the size of the CTU and the manner in which the CTU is partitioned into CUs and possibly into PUs when applicable. Thus, the decoder may partition (235) the picture into CTUs and each CTU into CUs based on the decoded picture partition information. The transform coefficients are dequantized (240) (including at least one embodiment for adapting the chroma quantization parameters described below) and inverse transformed (250) to decode the prediction residual.

[0036] The decoded prediction residual and the prediction block are combined (255) to reconstruct the image block. The prediction block can be obtained (270) from an intra-frame prediction (260) or a motion compensated prediction (i.e., inter-frame prediction) (275). As described above, AMVP and merge mode techniques can be used to derive motion vectors for motion compensation, which can use interpolation filters to calculate interpolation of sub-integer samples of a reference block. An in-loop filter (265) is applied to the reconstructed image. The filtered image is stored at a reference picture buffer (280).

[0037] The decoded picture may further undergo post-decoding processing (285), such as inverse color conversion (e.g., conversion from YCbCr 4:2:0 to RGB 4:4:4) or inverse remapping that performs the inverse of the remapping process performed in the pre-encoding process (101). The post-decoding process may use metadata derived in the pre-encoding process and signaled in the bitstream.

[0038] Figure 3 Illustrate an example of coding tree units and coding trees in the compressed domain. In the HEVC video compression standard, a picture is divided into so-called coding tree units (CTUs), which are typically 64x64, 128x128 or 256x256 pixels in size. Each CTU is represented by a coding tree in the compressed domain. This is a quadtree partitioning of the CTU, where each leaf is called a coding unit (CU).

[0039] Figure 4 An example of dividing a CTU into coding units, prediction units and transform units is shown. Each CU is then given some intra or inter prediction parameters ("prediction information"). To do this, it is spatially partitioned into one or more prediction units (PUs), each of which is assigned some prediction information. Intra or inter coding modes are assigned at the CU level.

[0040] Emerging video compression tools include the proposed coding tree unit representation in the compressed domain to represent picture data in a more flexible way. The advantage of this more flexible representation of the coding tree is that it provides increased compression efficiency compared to the CU / PU / TU arrangement of the HEVC standard.

[0041] Figure 5 An example of a quadtree plus binary tree (QTBT) CTU representation is illustrated. The quadtree plus binary tree (QTBT) coding tool provides this increased flexibility. QTBT is a coding tree in which coding units can be partitioned in a quadtree and binary tree manner. The partitioning of the coding unit is determined on the encoder side by a rate-distortion optimization process (determining the QTBT representation of the CTU with the minimum rate-distortion cost). In QTBT technology, the CU has a square or rectangular shape. The size of the coding unit is always a power of 2, typically from 4 to 128. In addition to the various rectangular shapes used for coding units, this CTU representation has the following different features compared to HEVC. The QTBT decomposition of the CTU is divided into two stages: the CTU is first partitioned in a quadtree manner, and then the leaves of each quadtree can be further divided in a binary manner. This is illustrated on the right side of the figure, where the solid line represents the quadtree decomposition stage and the dotted line represents the binary decomposition of the spatially embedded quadtree leaves. In the intra-frame strip, the luminance and chrominance block partition structures are separated and determined independently. The CU is no longer partitioned into prediction units or transform units. In other words, each coding unit is systematically composed of a single prediction unit (2N×2N prediction unit partition type) and a single transform unit (not divided into transform trees).

[0042] Figure 6 An exemplary extended set of coding unit partitions is illustrated. In asymmetric binary and tree partitioning mode (ABT), a rectangular coding unit of size (w, h) (width and height) to be partitioned by one of the asymmetric binary partitioning modes (e.g. HOR_UP (horizontally up)) will result in 2 sub-coding units, each with a rectangular size and Alternatively, a so-called ternary tree partitioning of the CU may be used, resulting in Figure 5The set of possible partitions is given in . A ternary tree consists in partitioning a CU into sub-CUs of a tree of size (1 / 4, 1 / 2, 1 / 4) relative to the parent CU in the considered orientation (eg HOR_TRIPLE for horizontal partitioning mode).

[0043] One or more embodiments using the new topology described above result in significant coding efficiency improvements.

[0044] Figure 7 An example of intra prediction mode with two reference layers is illustrated. In fact, new intra prediction modes are considered in the improved syntax. The first new intra prediction mode is called multiple reference intra prediction (MRIP). This tool helps to use multiple reference layers for intra prediction of a block. Typically, 2 reference layers are used for intra prediction, where each reference layer consists of a left reference array and a top reference array. Each reference layer is constructed by reference sample replacement and then pre-filtered.

[0045] Using each reference layer, a prediction for the block is constructed, typically as done in HEVC or JEM. The final prediction is formed as a weighted average of the predictions derived from the two reference layers. The prediction from the closest reference layer has a higher weight than the prediction from the furthest layer. The weights typically used are 3 and 1.

[0046] In the final part of the prediction process, multiple reference layers can be used to smooth the boundary samples of certain prediction modes using a mode-dependent process.

[0047] In an example embodiment, the video compression tool also includes an adaptive block size for Sample Adaptive Offset (SAO). This tool is an in-loop filter specified in HEVC. In HEVC, the SAO process classifies the reconstructed samples of a block into several categories, and samples belonging to certain categories are corrected using an offset. SAO parameters are either coded per block or can only be inherited from the neighboring block on the left or above.

[0048] A further improvement is proposed by defining an SAO palette mode. The SAO palette keeps the same SAO parameters per block, but these blocks can inherit these parameters from all other blocks. This brings more flexibility to SAO by widening the range of possible SAO parameters for a block. The SAO palette consists of a set of different SAO parameters. For each block, an index is encoded to indicate which SAO parameters to use.

[0049] Figure 8 An example embodiment of a compensation mode for bidirectional illumination compensation is illustrated.Illumination compensation (IC) allows to correct block prediction samples (SMC) obtained via motion compensation by possibly taking into account spatial or temporal local illumination variations.

[0050] SIC =a i .S MC +b i

[0051] In the case of bidirectional prediction, the IC parameters are estimated using samples of two reference CU samples, such as Figure 8 First, the IC parameters (a, b) are estimated between the two reference blocks, and the next IC parameters (ai, bi)i=0,1 between the reference block and the current block are derived as follows:

[0052] in:

[0053] If the CU size is less than or equal to 8 in width or height, IC parameters are estimated using unidirectional processing. When the CU size is greater than 8, a choice is made between using IC parameters derived from bidirectional or unidirectional processing by selecting the IC parameters that minimize the difference to the mean of the IC compensated reference block. Bidirectional optical flow (BIO) is enabled using the bidirectional illumination compensation tool.

[0054] The multiple tools introduced above are selected and used by the video encoder 100 and need to be obtained and used by the video decoder 200. To this end, information indicating the use of these tools is carried in the encoded bitstream generated by the video encoder and obtained by the video decoder 200 in the form of high-level syntax information. To this end, the corresponding syntax is defined and described below. This syntax of aggregating multiple tools allows improved coding efficiency.

[0055] This syntax structure uses the HEVC syntax structure as a basis and contains some additional syntax elements. The syntax elements signaled in italic bold and highlighted in gray in the table below correspond to additional syntax elements according to an example embodiment. It should be noted that the syntax elements can take other forms or names not shown in the syntax table while still handling the same functionality. Syntax elements can reside at different levels, for example, some syntax elements can be placed in a sequence parameter set (SPS) and some syntax elements can be placed in a picture parameter set (PPS).

[0056] Table 1 below illustrates a sequence parameter set (SPS) and introduces new syntax elements inserted into the parameter set according to at least one example embodiment, more specifically: multi_type_tree_enabled_primary, log2_min_cu_size_minus2, log2_max_cu_size_minus4, log2_max_tu_size_minus2, sep_tree_mode_intra, multi_type_tree_enabled_secondary, sps_bdip_enabled_flag, sps_mrip_enabled_flag, use_erp_aqp_flag, use_high_perf_chroma_qp_table, abt_one_third_flag, sps_num_intra_mode_ratio.

[0057]

[0058]

[0059]

[0060]

[0061] Table 1: Modified sequence parameter set

[0062] The new syntax elements are defined as follows:

[0063] -use_high_perf_chroma_qp_table: This syntax element specifies the chroma QP table used to derive the QP used in the decoding of the chroma components associated with a slice as a function of the base chroma QP associated with the chroma components of the considered slice.

[0064] -multi_type_tree_enabled_primary: This syntax element indicates the partitioning types allowed in a coded slice. In at least one implementation, this syntax element is signaled at the sequence level (in the SPS) and thus applies to all coded slices using the SPS. For example, the first value of this syntax element allows quadtree and binary tree (QTBT) partitioning ( Figure 5 NO-SPLIT, QT-SPLIT, HOR, and VER), the second value allows QTBT plus ternary tree (TT) partitioning ( Figure 5NO-SPLIT, QT-SPLIT, HOR, VER, HOR_TRIPLE, and VER_TRIPLE), the third value allows QTBT plus asymmetric binary tree (ABT) partitioning ( Figure 5 NO-SPLIT, QT-SPLIT, HOR, VER, HOR-UP, HOR_DOWN, VER_LEFT, and VER_RIGHT), the fourth value allows QTBT+TT+ABT partitions ( Figure 5 all segmentation cases).

[0065] -sep_tree_mode_intra: This syntax element indicates whether separate coding trees are used for luma and chroma blocks. When sep_tree_mode_intra is equal to 1, luma and chroma blocks use independent coding trees, and thus the partitioning of luma and chroma blocks is independent. In at least one implementation, this syntax element is signaled at the sequence level (in the SPS) and thus applies to all coded slices using this SPS.

[0066] -multi_type_tree_enabled_secondary: This syntax element indicates the types of partitions that are allowed for chroma blocks in a coded slice. The values ​​that this syntax element can take are typically the same as the value of the syntax element multi_type_tree_enabled_primary. In at least one implementation, this syntax element is signaled at the sequence level (in the SPS) and thus applies to all coded slices using this SPS.

[0067] -sps_bdip_enabled_flag: This syntax element indicates that bidirectional intra prediction described in JVET-J0022 is enabled in the coded slices contained in the considered coded video sequence.

[0068] -sps_mrip_enabled_flag: This syntax element indicates that the multiple reference intra prediction tool is used for decoding of the coded slices contained in the considered coded video bitstream.

[0069] -use_erp_aqp_flag: This syntax element indicates whether spatially adaptive quantization of VR360 ERP content as described in JVET-J0022 is activated in the coded slice.

[0070] - abt_one_third_flag: This syntax element indicates whether to activate asymmetric partitioning into two partitions whose horizontal or vertical sizes are 1 / 3 and 2 / 3, or 2 / 3 and 1 / 3 of the horizontal or vertical size of the initial CU, respectively, in the coding slice.

[0071] - sps_num_intra_mode_ratio: This syntax element specifies how to derive the number of intra predictions used for block sizes equal to a multiple of 3 in width or height.

[0072] In addition, the following three syntax elements are used to control the size of coding units (CUs) and transform units (TUs). In at least one implementation, these syntax elements are signaled at the sequence level (in the SPS) and thus apply to all coded slices using this SPS.

[0073] -log2_min_cu_size_minus2 specifies the minimum CU size.

[0074] -log2_max_cu_size_minus4 specifies the maximum CU size.

[0075] -log2_max_tu_size_minus2 specifies the maximum TU size.

[0076] In a variant embodiment, the new syntax elements introduced above are not introduced into a sequence parameter set, but into a picture parameter set (PPS).

[0077] Table 2 below illustrates a sequence parameter set (SPS) and introduces new syntax elements inserted into this parameter set according to at least one example embodiment, more specifically:

[0078] - slice_sao_size_id: This syntax element specifies the size of the blocks on which SAO is applied for the coded slice.

[0079] -slice_bidir_ic_enable_flag: Indicates whether bidirectional illumination compensation is activated for the coded slice.

[0080]

[0081]

[0082]

[0083]

[0084]

[0085] Table 2: Stripe header

[0086] Tables 3, 4, 5, 6 below illustrate coding tree syntax modified to support additional partitioning modes according to at least one example embodiment. In particular, the syntax for enabling asymmetric partitioning is specified in coding_binary_tree(). New syntax elements are inserted into the coding tree syntax, more precisely:

[0087] -asymmetricSplitFlag, indicating whether asymmetric binary split is allowed for the current CU, and

[0088] -asymmetric_type indicates the type of asymmetric binary split. It can take two values ​​to make the horizontal split up or down, or the vertical split left or right.

[0089] Furthermore, the parameter btSplitMode is interpreted differently.

[0090]

[0091] Table 3: coding_tree_unit Table 4: coding_tree

[0092]

[0093]

[0094] Table 5: coding_binary_tree

[0095]

[0096] Table 6: bt_split_mode

[0097] Fig. 9 The interpretation of bt-split-flag according to at least one example embodiment is illustrated. Two syntax elements asymmetricSplitFlag and asymmetric_type are used to specify the value of the parameter btSplitMode. btSplitMode indicates the binary split mode applied to the current CU. btSplitMode is derived differently from the prior art. In JEM, it can take the value HOR,VER. In the improved syntax, it can additionally take the same value as Figure 6 The values ​​corresponding to the illustrated partitions are HOR_UP, HOR_DOWN, VER_LEFT, VER_RIGHT.

[0098] Tables 7, 8, 9 and 10 below illustrate coding unit syntax elements and introduce new syntax elements for bidirectional intra prediction mode.

[0099]

[0100] Table 7: coding_unit

[0101]

[0102] Table 8: cu_data_merge Table 9: cu_data_intra

[0103]

[0104]

[0105] Table 10: cu_data_inter

[0106]

[0107]

[0108] Table 11: cu_residual_data

[0109] Several syntax elements discussed in this document are defined as arrays. For example, btSplitFlag is defined as an array of dimension 4, indexed by the horizontal and vertical position in the picture and the horizontal and vertical size of the coded block. To simplify the notation, the index is not maintained in the semantic description of the syntax elements (e.g., only btSplitFlag[x0][y0][cbSizeX][cbSizeY] is recorded as btSplitFlag).

[0110] Fig.10A block diagram of an exemplary system that can implement various aspects and embodiments is illustrated. System 1000 can be embodied as a device including various components described below, and is configured to perform one or more aspects described in this application. Examples of such devices include, but are not limited to, various electronic devices, such as personal computers, laptop computers, smart phones, tablet computers, digital multimedia set-top boxes, digital television receivers, personal video recording systems, connected home appliances, encoders, transcoders, and servers. The elements of system 1000 can be embodied in a single integrated circuit, multiple ICs, and / or discrete components, either individually or in combination. For example, in at least one embodiment, the processing and encoder / decoder elements of system 1000 are distributed over multiple ICs and / or discrete components. In various embodiments, system 1000 can be communicatively coupled to other similar systems, or coupled to other electronic devices via, for example, a communication bus or through dedicated input and / or output ports. In various embodiments, system 1000 is configured to implement one or more aspects described in this document.

[0111] The system 1000 includes at least one processor 1010 configured to execute instructions loaded therein for implementing various aspects described in this document. The processor 1010 may include embedded memory, input-output interfaces, and various other circuits known in the art. The system 1000 may also include at least one memory 1020 (e.g., a volatile memory device, a non-volatile memory device). The system 1000 may include a storage device 1040, which may include non-volatile memory and / or volatile memory, including but not limited to EEPROM, ROM, PROM, RAM, DRAM, SRAM, flash memory, a magnetic disk drive, and / or an optical disk drive. As non-limiting examples, the storage device 1040 may include an internal storage device, an attached storage device, and / or a network accessible storage device.

[0112] The system 1000 includes an encoder / decoder module 1030, which is configured to process data to provide encoded video or decoded video, and the encoder / decoder module 1030 may include its own processor and memory. The encoder / decoder module 1030 represents a (multiple) module that may be included in a device to perform encoding and / or decoding functions. As is known, a device may include one or both of the encoding and decoding modules. In addition, as known to those skilled in the art, the encoder / decoder module 1030 may be implemented as a separate element of the system 1000, or may be incorporated into the processor 1010 as a combination of hardware and software.

[0113] Program code to be loaded onto the processor 1010 or the encoder / decoder 1030 to perform various aspects described herein may be stored in the storage device 1040 and subsequently loaded onto the memory 1020 for execution by the processor 1010. According to various embodiments, one or more of the processor 1010, the memory 1020, the storage device 1040, and the encoder / decoder module 1030 may store one or more of various items during the execution of the processes described herein. Such items stored include, but are not limited to, input video, decoded video or portions of decoded video, bitstreams, matrices, variables, and equations, formulas, operations, and operation logic for processing to produce intermediate or final results.

[0114] In several embodiments, memory internal to the processor 1010 and / or encoder / decoder module 1030 is used to store instructions and provide working memory for processing required during encoding or decoding. However, in other embodiments, memory external to the processing device (e.g., the processing device may be the processor 1010 or the encoder / decoder module 1030) is used for one or more of these functions. The external memory may be memory 1020 and / or a storage device 1040, such as a dynamic volatile memory and / or a non-volatile flash memory. In several embodiments, the external non-volatile flash memory is used to store the operating system of the television. In at least one embodiment, a fast external dynamic volatile memory such as RAM is used as working memory for video encoding and decoding operations such as MPEG-2, HEVC, or VVC (Versatile Video Coding).

[0115] Input to the elements of system 1000 may be provided through various input devices, as indicated at block 1130. Such input devices include, but are not limited to, (i) an RF section that receives an RF signal transmitted wirelessly, such as by a broadcaster, (ii) a composite input terminal, (iii) a USB input terminal, and / or (iv) an HDMI input terminal.

[0116] In various embodiments, the input device of block 1130 has associated corresponding input processing elements known in the art. For example, the RF section may be associated with elements suitable for: (i) selecting a desired frequency (also referred to as selecting a signal, or band limiting a signal within a frequency band), (ii) down-converting the selected signal, (iii) band limiting the frequency band again to a narrower frequency band to select a signal frequency band that may be referred to as a channel in some embodiments, (iv) demodulating the down-converted and band-limited signal, (v) performing error correction, and (vi) demultiplexing to select a desired data packet stream. The RF section of various embodiments includes one or more elements that perform these functions, such as, for example, a frequency selector, a signal selector, a frequency band limiter, a channel selector, a filter, a down-converter, a demodulator, an error corrector, and a demultiplexer. The RF section may include a tuner that performs various of these functions, including, for example, down-converting a received signal to a lower frequency (e.g., an intermediate frequency or near baseband frequency) or baseband. In a set-top box embodiment, the RF part and its associated input processing element receive the RF signal transmitted by wired (e.g., cable) medium, and by filtering, down-convert and filter to the desired frequency band again to perform frequency selection. Various embodiments rearrange the order of above-mentioned (and other) elements, remove some in these elements, and / or add other elements that perform similar or different functions. The interpolation element can be included in the insertion element between existing elements, for example, inserting amplifier and analog-to-digital converter. In various embodiments, the RF part includes antenna.

[0117] In addition, the USB and / or HDMI terminals may include corresponding interface processors for connecting the system 1000 to other electronic devices across the USB and / or HDMI connections. It is to be understood that various aspects of input processing, such as Reed-Solomon error correction, may be implemented, for example, within a separate input processing IC or within the processor 1010 as desired. Similarly, various aspects of USB or HDMI interface processing may be implemented, for example, within a separate interface IC or within the processor 1010 as desired. The demodulated, error corrected, and demultiplexed streams are provided to various processing elements, including, for example, the processor 1010 and the encoder / decoder 1030 operating in conjunction with memory and storage elements, to process the data streams as needed for presentation on an output device.

[0118] The various components of system 1000 may be arranged in an integrated housing. In the integrated housing, suitable connection means, such as internal buses known in the art, including I2C, buses, wiring and printed circuit boards, may be used to interconnect the various components and transmit data between them.

[0119] The system 1000 includes a communication interface 1050 that enables communication with other devices via a communication channel 1060. The communication interface 1050 may include, but is not limited to, a transceiver configured to send and receive data over the communication channel 1060. The communication interface 1050 may include, but is not limited to, a modem or a network card, and the communication channel 1060 may be implemented, for example, within a wired and / or wireless medium.

[0120] In various embodiments, the data stream is transmitted to the system 1000 using a Wi-Fi network such as IEEE 802.11. The Wi-Fi signals of these embodiments are received on the communication channel 1060 and the communication interface 1050 suitable for Wi-Fi communication. The communication channel 1060 of these embodiments is typically connected to an access point or router that provides access to external networks including the Internet to allow streaming applications and other over-the-air communications. Other embodiments use a set-top box that passes data through the HDMI connection of the input block 1130 to provide the streaming data to the system 1000. Other embodiments use the RF connection of the input block 1130 to provide the streaming data to the system 1000.

[0121] The system 1000 can provide output signals to various output devices including a display 1100, a speaker 1110, and other peripherals 1120. The other peripherals 1120 include one or more of a stand-alone DVR, a disc player, a stereo system, a lighting system, and other devices that provide functions based on the output of the system 1000 in various examples of embodiments. In various embodiments, control signals are communicated between the system 1000 and the display 1100, the speaker 1110, or the other peripherals 1120 using signaling such as AV.Link, CEC, or other communication protocols that enable device-to-device control with or without user intervention. The output devices can be communicatively coupled to the system 1000 via dedicated connections through the respective interfaces 1070, 1080, and 1090. Alternatively, the output devices can be connected to the system 1000 using a communication channel 1060 via the communication interface 1050. The display 1100 and the speaker 1110 can be integrated into a single unit in an electronic device (e.g., a television) with the other components of the system 1000. In various embodiments, the display interface 1070 includes a display driver, such as a timing controller (T Con) chip.

[0122] For example, if the RF portion of input 1130 is part of a separate set-top box, the display 1100 and the speaker 1110 can be alternately separated from one or more other components. In various embodiments where the display 1100 and the speaker 1110 are external components, output signals can be provided via dedicated output connections (including, for example, HDMI ports, USB ports, or COMP outputs). The implementation described herein can be implemented in, for example, methods or processes, devices, software programs, data streams, or signals. Even if only discussed in the context of a single implementation form (for example, discussed only as a method), the implementation of the features discussed can also be implemented in other forms (for example, devices or programs). The device can be implemented in, for example, appropriate hardware, software, and firmware. The method can be implemented in, for example, a device such as a processor, which generally refers to a processing device, including, for example, a computer, a microprocessor, an integrated circuit, or a programmable logic device. The processor also includes a communication device, such as, for example, a computer, a cellular phone, a portable / personal digital assistant ("PDA"), and other devices that facilitate information communication between end users.

[0123] Fig.11 Flowchart illustrating an example of an encoding method using a new encoding tool according to an embodiment. Such an encoding method may be Fig.10 1000 described in the embodiment of the present invention, and more specifically can be implemented by the processor 1010. In at least one embodiment, in step 1190, the processor 1010 selects the encoding tool to be used. Different techniques can be used to make the selection. The user can make the selection through the encoding configuration parameter (typically, flag), which indicates the tool to be used during the encoding and decoding process (and the corresponding parameters, if necessary). In an exemplary embodiment, the selection is made by setting a value in a file, and the flag is read out by the encoding device that interprets the value of the flag that selects which tool to use. In an exemplary embodiment, the selection is made by the manual operation of the user selecting the encoding configuration parameter using the graphical user interface of the processing encoder device. Once the selection is made, the encoding is performed using the selected tool among the other encoding tools in step 1193, and the selection of the tool is signaled in the high-level syntax element (for example, in the next SPS, PPS or even in the slice header).

[0124] Fig.12 Flowchart illustrating an example of a portion of a decoding method according to an embodiment using a new encoding tool. Such a decoding method may be performed by Fig.101000, and more precisely can be implemented by processor 1010. In at least one embodiment, in step 1200, processor 1010 accesses a signal (e.g., a signal received on an input interface or read from a media carrier), extracts and analyzes high-level syntax elements to determine the tools that have been selected on the encoding device. In step 1210, these tools are used to perform decoding and generate a decoded image that can be provided to the device or displayed on the device, for example.

[0125] References to "one embodiment" or "an embodiment" or "one implementation" or "an implementation" and other variations thereof mean that a particular feature, structure, characteristic, etc. described in connection with the embodiment is included in at least one embodiment. Thus, the appearances of the phrases "in one embodiment" or "in an embodiment" or "in one implementation" or "in an implementation" and any other variations thereof appearing in various places throughout the specification are not necessarily all referring to the same embodiment.

[0126] Additionally, this application or its claims may refer to "determining" various information. Determining information may include, for example, one or more of estimating information, calculating information, predicting information, or retrieving information from a memory.

[0127] Furthermore, this application or its claims may refer to "accessing" various information. Accessing information may include, for example, one or more of receiving information, retrieving information (e.g., from a memory), storing information, moving information, copying information, calculating information, predicting information, or estimating information.

[0128] Additionally, this application or its claims may refer to "receiving" various information. As with "accessing," receiving is intended to be a broad term. Receiving information can include, for example, one or more of accessing information or retrieving information (e.g., from memory or optical media storage). Furthermore, "receiving" typically involves, in one way or another, storing information, processing information, transmitting information, moving information, copying information, erasing information, calculating information, determining information, predicting information, or estimating information during an operation.

[0129] It is to be recognized that the use of " / ", "and / or", and "at least one of" below, for example, in the case of "A / B", "A and / or B", and "at least one of A and B", is intended to include selection of only the first listed option (A), or only the second listed option (B), or both options (A and B). As a further example, in the case of "A, B, and / or C" and "at least one of A, B, and C", such language is intended to include selection of only the first listed option (A), or only the second listed option (B), or only the third listed option (C), or only the first and second listed options (A and B), or only the first and third listed options (A and C), or only the second and third listed options (B and C), or all three options (A and B and C). As will be readily apparent to one of ordinary skill in this and related arts, the language may be expanded for many of the items listed. .

[0130] It will be apparent to those skilled in the art that implementations may generate various signals formatted to carry information that may be stored or transmitted, for example. The information may include, for example, instructions for executing a method or data generated by one of the described embodiments. For example, a signal may be formatted to carry a bitstream of the described embodiments. Such a signal may be formatted, for example, as an electromagnetic wave (e.g., using a radio frequency portion of a spectrum) or as a baseband signal. Formatting may include, for example, encoding a data stream and modulating a carrier with the encoded data stream. The information carried by the signal may be, for example, analog or digital information. As is known, the signal may be transmitted over a variety of different wired or wireless links. The signal may be stored on a processor readable medium.

[0131] In variations of the first, second, third, fourth, fifth, sixth, seventh and eighth aspects of at least one embodiment, the parameters representing the partition type include a first value for quadtree and binary tree partitioning, a second value for quadtree and binary tree partitioning plus ternary tree partitioning, a third value for quadtree and binary tree partitioning plus asymmetric binary tree partitioning, and a fourth value for quadtree and binary tree partitioning plus ternary tree partitioning plus asymmetric binary tree partitioning.

[0132] In variations of the first, second, third, fourth, fifth, sixth, seventh and eighth aspects of at least one embodiment, the parameters further include a block size on which the sample adaptive offset is applied for the coded slice.

[0133] In a variation of the first, second, third, fourth, fifth, sixth, seventh and eighth aspects of at least one embodiment, the type of intra prediction mode includes at least one of an intra bi-directional prediction mode and a multi-reference intra prediction mode.

Claims

1. A method for decoding picture data of a video, the method comprising, for a block of the video: Obtaining encoded picture data; obtaining a flag indicating use of intra prediction based on a plurality of reference lines, the reference lines comprising a left reference line located to the left of the block and a top reference line located above the block; predicting the block using one or more reference lines selected from the plurality of reference lines based on the value of the flag; as well as Picture data is decoded based on the predicted block.

2. The method according to claim 1, wherein: The first reference line includes a first line and a first column surrounding the block, the first line is located above the block and the second column is located to the left of the block, and the second reference line includes a second line and a second column surrounding the block, the second line is located above the first line and the second column is located to the left of the first column.

3. The method according to claim 2, wherein: Additional reference lines include additional lines located above the previous line and additional columns located to the left of the previous column.

4. The method according to claim 2, wherein: The prediction is performed as a weighted average from the first reference line and the second reference line.

5. The method according to claim 4, wherein: The prediction from the closest reference line is given a higher weight than the prediction from the farthest reference line.

6. The method according to claim 4, wherein: The weights used are 3 and 1.

7. A device for decoding picture data of a video, the device comprising a processor, the processor being configured to, for a block of the video: Obtaining encoded picture data; obtaining a flag indicating use of intra prediction based on a plurality of reference lines, the reference lines comprising a left reference line located to the left of the block and a top reference line located above the block; predicting the block using one or more reference lines selected from the plurality of reference lines based on the value of the flag; as well as Picture data is decoded based on the predicted block.

8. A computer-readable storage medium comprising instructions which, when executed by a computer, cause the computer to perform the method according to claim 1.

Images