Wireless power system with amplitude shift keying communication

Abstract

The present invention relates to a wireless power system having a wireless power transmitting device and a wireless power receiving device. The wireless power transfer device may include an ASK decoding circuit. The inverter controller may supply a control signal to the inverter based on the clock signal. To improve wireless transmissions at various frequencies of interest, a modulation signal may be used to dither the clock signal used by the inverter controller. To mitigate bit errors in ASK decoding caused by the jitter of the clock signal in the wireless power transmission device, an ASK communication receive circuit in the wireless power transmission device may receive information about the modulated signal used to jitter the clock signal. The ASK communication receive circuit may receive a clock signal that has dithered using the modulated signal, dither an analog-to-digital converter sampling rate using the modulated signal, or include a notch filter circuit having a parameter determined based on the modulated signal.

Description

[0001] This application claims priority to U.S. Patent Application No. 18 / 160,532 filed on January 27, 2023 and U.S. Provisional Patent Application No. 63 / 342,457 filed on May 16, 2022, which are hereby incorporated by reference in their entirety. Technical Field

[0002] The present disclosure relates generally to power systems, and more particularly, to wireless power systems for charging electronic devices. Background Art

[0003] In a wireless charging system, a wireless power transmission device transmits wireless power to a wireless power receiving device. The wireless power transmission device uses a wireless power transmission coil to transmit a wireless power signal to the wireless power receiving device. The wireless power receiving device has a coil and a rectifier circuit. The coil of the wireless power receiving device receives an AC wireless power signal from the wireless power transmission device. The rectifier circuit converts the received signal into DC power. Summary of the invention

[0004] A wireless power transmission device that can be configured to provide wireless power to a wireless power receiving device. The wireless power transmission device may include: a wireless power transmission coil; an inverter configured to supply an AC drive signal to the wireless power transmission coil; an inverter controller configured to supply a control signal to the inverter based on a clock signal jittered using a modulation signal; and an amplitude shift keying communication receiving circuit configured to monitor an AC signal at the wireless power transmission coil based at least in part on information about the modulation signal and decode the monitored AC signal into bits. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] Figure 1 is a schematic diagram of an exemplary wireless power system according to various embodiments.

[0006] Figure 2 is a circuit diagram of an illustrative wireless power system with a dithering circuit that provides a modulated signal to a scaling circuit, according to one implementation.

[0007] Figure 3 is a graph of an exemplary modulation signal that may be used to modulate a clock signal in a power delivery device according to one embodiment.

[0008] Figure 4A is a graph of an exemplary modulation signal having a regular step shape according to one embodiment.

[0009] Figure 4Bis a graph of an exemplary modulation signal having an irregular step shape according to one embodiment.

[0010] FIG. 5A to FIG. 5D is an exemplary formula for down-conversion of a wireless power signal in a wireless power transmission device according to one embodiment.

[0011] Figure 6 is a circuit diagram of an illustrative wireless power system with clock modulation circuitry according to various implementations.

[0012] Figure 7 is a circuit diagram of an illustrative wireless power system with a dithering circuit that provides a modulated signal to an ADC according to one implementation.

[0013] Figure 8 is a circuit diagram of an illustrative wireless power system with a dithering circuit providing a modulated signal to a notch filter circuit according to one implementation.

[0014] Fig. 9 is a flow chart of illustrative operations involved in using a wireless power system according to one implementation.

[0015] Fig. 10A and Fig. 10B is a schematic diagram of an illustrative down-conversion circuit that may be included in a wireless power system according to one implementation. DETAILED DESCRIPTION

[0016] The present invention discloses a wireless power system, which includes a wireless power transmission device. The wireless power transmission device wirelessly transmits power to a wireless power receiving device. The wireless power transmission device can be a charging stand, a charging pad, a portable electronic device with power transmission capability, a removable battery box with power transmission capability, or other power transmitter. The wireless power receiving device can be a device such as a cellular phone, a tablet computer, a laptop computer, a removable battery box, an electronic device accessory, a wearable device such as a watch, or other electronic equipment. The wireless power receiving device uses the power from the wireless power transmission device to power the receiving device and charge the internal battery.

[0017] Wireless power is transferred from a wireless power transmitting device to a wireless power receiving device by driving current through one or more wireless power transmitting coils using an inverter in the wireless power transmitting device. The wireless power receiving device has one or more wireless power receiving coils coupled to a rectifier circuit that converts the received wireless power signal into DC power.

[0018] The wireless power receiving device may include an amplitude shift keying communication circuit. The amplitude shift keying (ASK) communication circuit may be configured to modulate the impedance of the wireless power receiving circuit in the wireless power receiving device, which impedance causes a change in the amplitude of the wireless power transfer signal being transmitted between the wireless power transmitting device and the wireless power receiving device. The wireless power transmitting device may include an ASK decoding circuit configured to decode the signal passed through the coil into bits.

[0019] In some wireless power systems, a modulated signal may be used to jitter a clock signal used by an inverter controller to generate a control signal for the inverter. The wireless power signal (e.g., a square wave, a sinusoid, or some other periodic waveform) generated by the inverter will have its frequency shifted by this jittering process. The jittered waveform can provide beneficial effects such as a reduction in peak amplitude at various frequencies of interest (e.g., harmonics). Exemplary techniques for wireless power signal jittering in a wireless power transfer system are described in U.S. application serial number 17 / 680,463, filed on February 25, 2022, which is hereby incorporated by reference in its entirety.

[0020] However, jittering techniques introduce challenges in ASK communications because the underlying transmission waveform can no longer be assumed to be completely periodic. In order to mitigate bit errors in ASK decoding caused by jitter of the clock signal in the wireless power transmission device, the ASK communication receiving circuit in the wireless power transmission device can receive information about the modulation signal used to jitter the clock signal. The ASK communication receiving circuit can receive a clock signal that has been jittered using the modulation signal, the ASK communication receiving circuit can use the modulation signal to jitter the analog-to-digital converter sampling rate, or the ASK communication receiving circuit can include a notch filter circuit with parameters determined based on the modulation signal.

[0021] Figure 1 An exemplary wireless power system (wireless charging system) is shown in FIG. Figure 1As shown, the wireless power system 8 includes a wireless power transmission device (such as a wireless power transmission device 12), and includes a wireless power receiving device (such as a wireless power receiving device 24). The wireless power transmission device 12 includes a control circuit 16. The wireless power receiving device 24 includes a control circuit 30. The control circuits in the system 8, such as the control circuit 16 and the control circuit 30, are used to control the operation of the system 8. This control circuit may include a processing circuit associated with a microprocessor, a power management unit, a baseband processor, a digital signal processor, a microcontroller, and / or an application-specific integrated circuit having a processing circuit. The processing circuit implements the required control and communication features in the devices 12 and 24. For example, the processing circuit can be used to process user input, process negotiations between the devices 12 and 24, send and receive in-band and out-of-band data, make measurements, estimate power loss, determine power transfer levels, and otherwise control the operation of the system 8.

[0022] The control circuits in the system 8 may be configured to perform operations in the system 8 using hardware (e.g., dedicated hardware or circuits), firmware, and / or software. Software code and other data for performing operations in the system 8 are stored on a non-transitory computer-readable storage medium (e.g., a tangible computer-readable storage medium) in the control circuit 8. Software code may sometimes be referred to as software, data, program instructions, instructions, or code. Non-transitory computer-readable storage media may include non-volatile memory such as non-volatile random access memory (NVRAM), one or more hard disk drives (e.g., disk drives or solid-state drives), one or more removable flash drives or other removable media, etc. The software stored on the non-transitory computer-readable storage medium may be executed on the processing circuit of the control circuit 16 and / or 30. The processing circuit may include a dedicated integrated circuit having a processing circuit, one or more microprocessors, a central processing unit (CPU), or other processing circuits.

[0023] The power transmission device 12 may be a stand-alone power adapter (e.g., a wireless charging pad or charging stand including power adapter circuitry), may be a wireless charging pad or stand coupled to a power adapter or other equipment via a cable, may be a portable device, may be equipment that has been incorporated into furniture, a vehicle, or other systems, may be a removable battery box, or may be other wireless power transmission equipment. The power receiving device 24 may be a portable electronic device, such as a cellular phone, a laptop computer, a tablet computer, a wearable device (such as earbuds or a watch), a removable battery box for wireless charging of an electronic device, or other electronic equipment. The power transmission device 12 and / or the power receiving device 24 may be capable of transmitting and receiving wireless power simultaneously. For example, a single coil in an electronic device may be capable of operating in a power receiving mode (where power is received) or a power transmission mode (where power is transmitted).

[0024] The power transmission device 12 may be coupled to a wall outlet (e.g., an AC power source), may have a battery for powering, and / or may have another power source. The power transmission device 12 may have an AC (AC)-DC (DC) power converter, such as an AC-DC power converter 14, for converting AC power from a wall outlet or other power source into DC power. The DC power may be used to power the control circuit 16. During operation, the controller in the control circuit 16 uses the power transmission circuit 52 to transmit wireless power to the power receiving circuit 54 of the device 24. The power transmission circuit 52 may have a switching circuit (e.g., an inverter circuit 61 formed by a transistor) that is turned on or off based on a control signal provided by the control circuit 16 to form an AC current signal through one or more wireless power transmission coils such as the wireless power transmission coil 36. These coil drive signals cause the coil 36 to transmit wireless power. Multiple coils 36 may be arranged in a planar coil array (e.g., in a configuration where the device 12 is a wireless charging pad) or may be arranged to form a coil cluster (e.g., in a configuration where the device 12 is a wireless charging stand). In some arrangements, device 12 (e.g., a charging pad, a charging stand, a portable electronic device such as a cellular phone, etc.) may have only a single coil. In other arrangements, the wireless charging device may have multiple coils (e.g., two or more coils, 2-4 coils, 5-10 coils, at least 10 coils, less than 25 coils, or other suitable number of coils).

[0025] When AC current passes through one or more coils 36, an alternating electromagnetic (e.g., magnetic) field (wireless power signal 44) is generated, which is received by one or more corresponding receiver coils, such as coil 48 in power receiving device 24. Device 24 may have a single coil 48, at least two coils 48, at least three coils 48, at least four coils 48, or other suitable number of coils 48. When the alternating electromagnetic field is received by coil 48, a corresponding alternating current is induced in coil 48. The AC signal used to transmit wireless power may have any suitable frequency (e.g., 100kHz-400kHz, etc.). A rectifier circuit such as rectifier circuit 50 (which includes a rectifying component, such as a synchronous rectifier metal oxide semiconductor transistor arranged in a bridge network) converts the AC signal received from one or more coils 48 (the received AC signal associated with electromagnetic signal 44) to a DC voltage signal for powering device 24.

[0026] The DC voltage (sometimes referred to as the rectifier output voltage Vrect) generated by the rectifier circuit 50 can be used to charge a battery such as battery 58, and can be used to power other components in the device 24. For example, the device 24 may include an input-output device 56. The input-output device 56 may include an input device for collecting user input and / or performing environmental measurements, and may include an output device for providing output to a user. As an example, the input-output device 56 may include a display, a speaker, a camera, a touch sensor, an ambient light sensor, and other devices for collecting user input, performing sensor measurements, and / or providing output to a user. The device 12 may include an input-output device 69 (e.g., any of the input-output devices described in conjunction with the input-output device 56).

[0027] Device 12 and / or device 24 may communicate wirelessly using in-band or out-of-band communication. Device 12 may, for example, have a wireless transceiver circuit 40 that uses an antenna to wirelessly transmit an out-of-band signal to device 24. Wireless transceiver circuit 40 may be used to wirelessly receive an out-of-band signal from device 24 using an antenna. Device 24 may have a wireless transceiver circuit 46 that transmits an out-of-band signal to device 12. Receiver circuits in wireless transceiver 46 may use an antenna to receive an out-of-band signal from device 12. In-band transmissions between devices 12 and 24 may be performed using coils 36 and 48. In the case of an exemplary configuration, frequency shift keying (FSK) is used to transmit in-band data from device 12 to device 24, and amplitude shift keying (ASK) is used to transmit in-band data from device 24 to device 12. During these FSK and ASK transmissions, power may be wirelessly transmitted from device 12 to device 24.

[0028] The examples of FSK modulation for conveying in-band data from the power transmission device 12 to the power receiving device 24 and ASK modulation for conveying in-band data from the power receiving device 24 to the power transmission device 12 are merely illustrative. In general, any desired communication technique may be used to convey information from the power transmission device 12 to the power receiving device 24 and from the power receiving device 24 to the power transmission device 12. As another example, ASK modulation may be used to convey in-band data from the power transmission device 12 to the power receiving device 24 and / or FSK modulation may be used to convey in-band data from the power receiving device 24 to the power transmission device 12. In general, wireless power may be conveyed between devices simultaneously during in-band communication (using ASK or FSK).

[0029] The control circuit 16 has a measurement circuit 41. The measurement circuit 41 may include a voltage measurement circuit (e.g., for measuring one or more voltages in the device 12, such as a coil voltage associated with a wireless power transfer coil) and / or a current measurement circuit (e.g., for measuring one or more currents, such as a wireless power transfer coil current).

[0030] The control circuit 30 has a measurement circuit 43. The measurement circuit 43 may include a voltage measurement circuit (e.g., for measuring one or more voltages in the device 24, such as a coil voltage associated with a wireless power transmission coil and / or a rectifier output voltage) and / or a current measurement circuit (e.g., for measuring one or more currents, such as a wireless power reception coil current and / or a rectifier output current).

[0031] Figure 2 Illustrative wireless power circuitry in system 8 is shown in an illustrative case where a wireless power transmitting device has been paired with a wireless power receiving device. Figure 2 The wireless power circuitry of the wireless power transmission device 12 includes a wireless power transmission circuit 52 in the wireless power transmission device 12 and a wireless power reception circuit 54 in the wireless power reception device 24. During operation, the wireless power signal 44 is transmitted by the wireless power transmission circuit 52 and received by the wireless power reception circuit 54. Figure 2 An exemplary configuration includes a transmitting coil 36 and a receiving coil 48 .

[0032] like Figure 2 As shown, the wireless power transmission circuit 52 includes an inverter circuit 61 and an inverter controller 106. The inverter controller 106 can provide a control signal to the inverter circuit 61. The inverter circuit (inverter) 61 can be used to provide a signal to the coil 36 based on the control signal from the inverter controller 106. During wireless power transmission, the inverter 61 supplies an AC drive signal to the coil 36 at a certain power transmission frequency. Figure 2 As shown, a circuit component such as a capacitor 70 may be coupled in series with the coil 36 .

[0033] When an alternating current signal is supplied to coil 36, a corresponding alternating electromagnetic signal (wireless power signal 44) is transmitted to a nearby coil, such as exemplary coil 48 in wireless power receiving circuit 54. This induces a corresponding alternating current (AC) current signal in coil 48. A capacitor, such as capacitor 72, may be coupled in series with coil 48. Rectifier 50 receives the AC current from coil 48 and generates a corresponding DC power (e.g., DC voltage Vrect) at output terminal 76. This power may be used to power a load.

[0034] If desired, some devices in the wireless power system 8 may have the ability to both transmit and receive wireless power signals. As an example, a cellular phone or other portable electronic device may have a single coil that can be used to receive wireless power signals from a charging station or other wireless power transmission device and can also be used to transmit wireless power to another wireless power device (e.g., another cellular phone, an accessory device, etc.). A device capable of simultaneously transmitting and receiving wireless power may have all of the components of the wireless power transmission device 12 and all of the components of the wireless power reception device 24 (e.g., the power transmission circuit 52 and the power reception circuit 54 are included in a single device). However, the functionality of wireless power transmission and wireless power reception is not the same as the combination of the wireless power transmission and wireless power reception circuits. Figure 1 and Figure 2 Thus, while the examples herein will focus on the case where a dedicated wireless power transmitting device transfers charge to a dedicated wireless power receiving device, it should be understood that one or both devices may be replaced with a device that both transmits and receives wireless power. In other words, coil 36 may also be capable of receiving wireless power, and coil 48 may also be capable of transmitting wireless power.

[0035] like Figure 2 As shown, the wireless power receiving circuit 54 includes an amplitude shift keying (ASK) circuit 102 (which can be considered as part of the wireless transceiver circuit 46). As an example, the ASK circuit can include a capacitor connected in series and a switch in parallel with the coil 48. Closing and opening the switch changes the impedance of the wireless power receiving circuit 54, which causes a corresponding amplitude disturbance at the signal passing through the coil 36 in the power transmission circuit 52. Therefore, the state of the switch in the modulated ASK circuit 102 can be used to transmit the ASK modulation state from the power receiving device 24 to the power transmission device 12. This example is merely illustrative, and there are other possible ways to implement ASK modulation (e.g., changing the rectifier load). In general, any desired ASK modulation technique can be used. The wireless power transmission circuit 52 may include an ASK communication receiving circuit 104 (which can be considered as part of the wireless transceiver circuit 40), which is used to decode the ASK modulation state into corresponding bits. The ASK communication receiving circuit 104 monitors the amplitude and / or phase of the AC signals passing through the coil 36 and uses ASK demodulation to extract the transmitted in-band data from these signals transmitted by the ASK circuit 102. The use of ASK communication allows data bits to be transmitted in-band from the device 24 to the device 12 through the coils 48 and 36, while power is wirelessly delivered from the device 12 to the device 24 using the coils 36 and 48. Multiple data bits together may constitute a data packet for communication between the devices 12 and 24.

[0036] The wireless power transmission circuit 52 in the power transmission device 12 may include a jitter circuit such as the jitter circuit 84. As previously described, the power transmission device 12 transmits an AC signal to the power receiving device 24 at a power transmission frequency. The power transmission frequency may be between 100kHz-100MHz or any other desired frequency. A clock signal may be provided to the inverter controller 106. Based on the clock signal, the inverter controller 106 may provide a control signal (sometimes referred to as an inverter control signal) to the inverter circuit 61 to cause switches (e.g., transistors) in the inverter circuit to turn on and off to form an AC current signal (at the desired power transmission frequency) through the wireless power transmission coil.

[0037] Some wireless power systems use signal jittering to improve the electromagnetic emission characteristics of the system. For example, the system 8 can jitter the clock signal used by the inverter controller 106 to control the inverter 61 in the wireless power transmission circuit 52. This effectively jitters the frequency of the periodic waveform of the wireless power transmission signal between the power transmission device 12 and the power receiving device 24.

[0038] In this document, various signals (e.g., clock signals) may be referred to as having a corresponding waveform (e.g., the shape of the voltage of the signal over time). A given waveform may have a cyclic shape that repeats at a given frequency (i.e., a given waveform may be periodic). The cyclic shape need not be a regular shape (e.g., a sinusoid). In fact, the cyclic shape may deviate from a sinusoidal shape. However, this type of waveform may still have a frequency associated with the periodic repetition of a non-sinusoidal shape.

[0039] The jitter circuit 84 may output a modulated signal 90 having a corresponding modulation waveform (sometimes simply referred to as a modulation waveform 90). The wireless power transmission device 12 also includes a clock signal 88 (F CLOCK ) (sometimes referred to as clock waveform 88 , power transfer clock waveform 88 , raw clock waveform 88 , initial clock waveform 88 , un-jittered clock waveform 88 , system clock 88 , etc.) Modulation signal 90 is used to modulate system clock waveform 88 .

[0040] Figure 3 is a graph of an exemplary modulation signal that can be used for frequency jittering. The modulation signal is used to frequency modulate (jitter) the system clock signal so that the carrier (eg, the output of the inverter) is frequency jittered. The modulation signal may have a corresponding modulation frequency f m and frequency expansion Δf. Modulation frequency f m is the frequency of the modulating wave 90, also known as the dither pattern repetition rate. In other words, the modulating signal is modulated at the modulation frequency or repetition rate f m Sweeping between two fixed frequencies f1 and f2. The difference between frequencies f1 and f2 may sometimes be referred to as the frequency spread or frequency offset (Δf) of the modulating signal.

[0041] Consider an example where a wireless power system selects a power transfer frequency of 140 kHz. The unmodified clock waveform 88 may be a 140 kHz square wave or sine wave. The modulated signal 90 may have a frequency spread (Δf) of 10 kHz and a modulation frequency (f m ). In this example, after frequency modulating waveform 88 with modulation signal 90, the modified clock signal may sweep back and forth between 135 kHz and 145 kHz at a repetition rate of 15 kHz. In this example, the frequency spread of the modulated signal is evenly distributed around the original frequency of 140 kHz. This may be referred to as center spreading. Alternatively, the frequency modulation may be spread downward (so that the modified clock signal sweeps back and forth between 130 kHz and 140 kHz) or spread upward (so that the modified clock signal sweeps back and forth between 140 kHz and 150 kHz).

[0042] The signal modulation frequency f of the modulation signal 90 m There are many options for modulation, frequency offset Δf, and waveform shape. m It can be greater than 0kHz, greater than 5kHz, greater than 10kHz, greater than 20kHz, greater than 30kHz, greater than 40kHz, greater than 50kHz, greater than 75kHz, greater than 100kHz, greater than 200kHz, less than 5kHz, less than 10kHz, less than 20kHz, less than 30kHz, less than 40kHz, less than 50kHz, less than 75kHz, less than 100kHz, less than 200kHz, etc. The frequency deviation Δf can be greater than 0kHz, greater than 1kHz, greater than 3kHz, greater than 5kHz, greater than 10kHz, greater than 20kHz, greater than 30kHz, greater than 40kHz, greater than 50kHz, less than 1kHz, less than 3kHz, less than 5kHz, less than 10kHz, less than 20kHz, less than 30kHz, less than 40kHz, less than 50kHz, etc. Figure 3 In the example, the modulation signal 90 has a triangular shape. This example is merely illustrative. In general, the modulation signal 90 can have any desired shape (eg, a sinusoidal shape, a square shape, a sawtooth shape, a random shape, or a step shape that approximates any of the foregoing shapes).

[0043] Figure 4A and Figure 4B is a graph of an exemplary modulation signal 90 in clock signal jitter that may be used for wireless power transfer. Figure 4A is an example of a waveform having a step shape that follows a regular pattern (i.e., a regular step shape). Figure 4AIn , the regular step shape approximates a sawtooth shape. The waveform increases in successive steps between a minimum frequency f1 and a maximum frequency f2. Once f2 is reached, the waveform returns to f1 and repeats the pattern. Figure 4A In the waveform, six frequencies (e.g., f1, f2, and four intermediate frequencies) are used. The duration that the clock signal spends at each frequency (e.g., the width of each step) can be the same or approximately the same. Alternatively, the duration that the clock signal spends at each frequency can be changed if necessary.

[0044] exist Figure 4B In FIG. 9 , the modulation signal 90 has an irregular step shape. Similar to Figure 4A , Figure 4B The waveform can have continuous steps between the minimum frequency f1 and the maximum frequency f2. Figure 4B In the waveform, six frequencies are used (e.g., f1, f2, and four intermediate frequencies). However, in Figure 4B The frequencies are not stepped through in ascending (or descending) order. The steps are made in a random order so that the waveform does not have to increase continuously (e.g. Figure 4A as shown) or reduced (e.g., with Figure 4A The use of this type of irregular waveform may be used to optimize jitter in the power delivery device 12. The random sequence may be repeated in each cycle, or may be randomized after each cycle.

[0045] A waveform with a step shape (such as Figure 4A The rule pattern in Figure 4B The irregular pattern in the figure may include any desired number of steps (e.g., three, four, five, six, seven, eight, more than eight, more than ten, etc.).

[0046] In summary, the modulating signal can have multiple discrete steps. The order in which these frequency steps are taken and the duration of each frequency step can be optimized for EMI attenuation or other considerations. The frequency steps can be sequenced in a monotonic, piecewise monotonic, or non-monotonic manner.

[0047] In some arrangements, the jitter circuit 84 may use a fixed modulation signal during the wireless power transfer operation (i.e., the modulation signal does not change over time). In other arrangements, the jitter circuit 84 may optimize the modulation signal based on real-time conditions. The jitter circuit 84 may output an optimized modulation signal based on various inputs including one or more of the following: power receiving device charging state information (e.g., directly reported from the power receiving device using in-band or out-of-band communication, determined based on parameters reported from the power receiving device and / or parameters measured by the power transmission device, etc.), power receiving device parameters (e.g., current and / or voltage at the coil 48 and / or output of the rectifier 50, etc.), power transmission device parameters (e.g., current and / or voltage at the coil 36, duty cycle, etc.), properties of the clock waveform (e.g., frequency and / or shape of the clock waveform 88), maximum frequency jitter constraints, occupied bandwidth constraints, and jitter sequence memory constraints.

[0048] Back to Figure 2 , a specific implementation of the inverter controller 106 (which may be, for example, a pulse width modulator) may optionally include scaling of the received clock signal. In this context, scaling of the clock signal refers to obtaining a high frequency periodic clock signal (e.g., Figure 2 The inverter controller 106 has as its input the system clock signal (F CLOCK Based on the clock signal, the inverter controller 106 generates a scaled clock signal F by counting a certain number of clock cycles and then changing its output C (eg, a pulse width modulated signal). For example, consider a system clock signal (F CLOCK ) has an example of a frequency of 144MHz. In this case, the inverter controller can switch between "0" and "1" every 200 clock counts. This converts to a 360kHz square wave (200 clocks of "1" + 200 clocks of "0" is 400 clocks per cycle, 144MHz / 400=360kHz).

[0049] The number of clocks per cycle (e.g., 400 in the above example) is sometimes referred to as the scaling factor (N PWM ). The scaling factor is a positive integer used to generate a square wave (which is provided to the inverter 61) based on the received clock signal. For a 50% duty cycle, the scaling factor can be divided by two to determine the number of clock cycles between each switching of the inverter controller output. The example of a 50% duty cycle is merely illustrative, and any desired duty cycle may be used.

[0050] As a possible specific implementation, the modulation signal 90 may be applied to the scaling factor N PWM to achieve frequency jittering of the power transfer frequency. For example, the modulation signal is -6, then -2, then +2, then +6. This signal is applied to the fixed NPWM (400) to achieve a jittering pattern of 394, 398, 402, 406, etc. The representation of the modulation signal as a modification of a fixed scaling factor is merely illustrative. In another possible example, the modulation signal 90 may simply be a sequence of scaling factors (e.g., 394, 398, 402, 406, etc.) applied to the incoming system clock.

[0051] Following the above example, the inverter controller 106 may first switch once every 197 clock counts, then once every 199 clock counts, then once every 201 clock counts, then once every 203 clock counts, and so on. In other words, N PWM is set equal to 394, then 398, then 402, then 406, and so on. This changes the PWM waveform frequency from 366.4822kHz to 361.8090kHz, to 358.2090kHz, to 354.6798kHz, and so on. The pattern can then repeat. The amount of time spent at each clock division ratio (e.g., 197, 199, 201, 203, etc.) can be 1 / 2 power cycle, 1 power cycle, 2 power cycles, 3 power cycles, and so on. Using the scaling factor in the inverter controller 106 enables easy tuning of the inverter output.

[0052] Next, consider Figure 2ASK communication receiving circuit 104 in. The ASK communication receiving circuit 104 may include an ASK decoding circuit 108, a down-conversion circuit 110, an analog-to-digital converter 112, and an amplifier 114. The amplifier 114 has a first input and a second input terminal connected to opposite sides of the capacitor 70. Therefore, the amplifier 114 outputs the voltage across the capacitor 70 to an analog-to-digital converter (ADC) 112. The ADC 112 converts the voltage from the amplifier 114 into a digital signal (s(t)), which is provided to the down-conversion circuit system 110. In some symbols, s(t) represents an analog signal, and s[n] represents a digital signal. Although analog implementations of 52 are possible, for ease of explanation without loss of generality, we will focus on digital implementations. Therefore, in this article, s(t)=s(nT)=s[n], where T is equal to 1 divided by the sampling frequency of the ADC 112. The down-conversion circuit 110 can therefore receive a digital signal representing a voltage at the capacitor 70 that varies with time. It should be noted that the down-conversion circuit may alternatively be included before the ADC 112 so that the down-conversion operation is performed in the analog domain. In the subsequent description of the operation of the down-conversion circuit 110, for simplicity, it is assumed that there is no phase offset between s(t) (e.g., the signal measured by the ASK communication receiving circuit 104) and the power signal generated by the inverter 61. In practice, there is a phase offset that can be ignored or can be handled by tracking the phase or performing I / Q demodulation (see Fig. 10B ).

[0053] The down-conversion circuit 110 can process the digital signal from the capacitor ADC 112 to remove the changes in the signal caused by the clock waveform (and thus isolate the changes caused by the ASK communication). The down-conversion circuit 110 can achieve this by multiplying the output of the ADC 112 by a function of the jittered clock signal using a local oscillator. The local oscillator receives a first input from the ADC 112. The first input can be represented by s(t). The input s(t) is equal to the voltage across the capacitor 70 that varies with time. The signal s(t) has a frequency change caused by the jitter applied using the jitter circuit 84.

[0054] Figure 5A The formula in shows an approximation of s(t), where, for simplicity, the signal is represented as a sinusoidal curve with no phase shift relative to the inverter waveform phase. Figure 5A In the formula, A(t) is equal to the amplitude change caused by the amplitude shift keying in the power receiving device 24, and F C Equal to Figure 2 The scaled clock signal (eg, F c =F CLOCK / N PWM ), and t is equal to time. Figure 5A =2πΔF C t, where ΔF C equal Figure 2 The modulated signal 90 in.

[0055] In other words, s(t) measured by ADC 112 is the ASK amplitude change (A(t)), the scaled clock signal F C And the modulation signal 90(ΔF C ) To decode ASK communications, the signal is ideally processed as a function of the ASK amplitude variation (A(t)) only.

[0056] To process signal s(t), downconversion circuitry 110 may use a local oscillator to multiply s(t) by a function including modified clock signal 92 (which is equal to F C +ΔF C Specifically, the down-conversion circuit 110 may multiply s(t) by cos(2πF C t+Δt) or mixed with it, and then apply a low pass filter (LPF) that allows the baseband signal to pass but rejects the high frequency part of the mixer output, such as Figure 5B As shown in Figure 5B , r(t) is a filtered version of s(t) (eg, the output from down-conversion circuit 110) that is subsequently provided to ASK decoding circuit 108. Figure 5B The equation produces Figure 5C The equation in . Figure 5C The equation in is simplified to obtain Figure 5D Equation in . Figure 5D As shown, the down-conversion circuit 110 ultimately outputs a signal (r(t)) that is a function of only the ASK amplitude variation (A(t)). The ASK decoding circuit 108 may decode the signal (r(t)) from the down-conversion circuit 110 into corresponding bits (eg, data packets).

[0057] exist Figure 2 In FIG. 1 , the down-conversion circuit 110 receives a first input s(t) from the ADC 112. The down-conversion circuit 110 receives a second input from the scaling circuit 116. The scaling circuit 116 outputs a signal from a frequency F CLOCK / N SC The value of the sampled sinusoid (eg, sampled cosine (I)) (where N SC is a scaling factor as a positive integer). The scaling factor N in the scaling circuit 116 SC The scaling factor N in the inverter controller 106 may be PWM Update synchronously (for example, N SC =N PWM). In this way, blocks 106 and 116 output signals having matching cycle durations.

[0058] For example, the inverter controller 106 may jitter at a rate of one frequency step every two power cycles. For example, the inverter controller outputs a square wave at 366.4822kHz for 2 cycles and then switches to the next frequency (361.8090kHz). In this case, the scaling circuit 116 provides a cosine with two cycles at 366.4822kHz and then switches to the next frequency (361.8090kHz).

[0059] It is important to note that the down-conversion circuit 110 uses information about the modulation waveform (in the form of an output from the scaling circuit 116 or other internal logic) when processing the signal s(t) it receives. Down-converting the jittered signal (s(t)) based on the modulation waveform produces an output signal r(t) that is free of any jitter artifacts. If the down-conversion circuit does not have information about the modulation waveform, the local oscillator is not synchronized with the actual power signal provided by the inverter 61 (which operates based on the jittered clock signal). If not taken into account, the jittered inverter output bleeds into the signal r(t) provided to the ASK decoding circuit 108, which may result in bit errors. Figure 2 The exemplary circuitry of allows the ASK decoding circuitry (e.g., down-conversion circuitry 110, etc.) to see the same jittered clock signal used by inverter 61 to form the underlying wireless power transfer signal over which ASK communication occurs. This information allows the down-conversion circuitry to remove signal artifacts introduced by the jitter and retrieve a more accurate ASK envelope expected by the ASK circuitry 102 of the data transmission device.

[0060] In the description herein, for simplicity, it is assumed that there is no phase offset between s(t) (e.g., the signal measured by the ASK communication receiving circuit 104) and the power signal generated by the inverter 61. This assumption allows the above equations and analysis to be expressed using only cosine functions (e.g., FIG. 5A to FIG. 5C shown). Fig. 10A A schematic diagram of a down-conversion circuit 110 following this assumption is shown in FIG. Fig. 10A As shown, the down-conversion circuit 110 includes a local oscillator 120 that receives a signal (eg, s(t)) from the ADC 112 and a second input (cos(2πF)) from the scaling circuit system 116. C t+Δt)).

[0061] To account for possible phase shifts between s(t) (eg, the signal measured by the ASK communication receiving circuit 104) and the power signal generated by the inverter 61, the down-conversion circuit 110 may include two local oscillators. Fig. 10B This type of arrangement is shown in FIG. Fig. 10B As shown, the down-conversion circuit system 110 includes a first local oscillator 120-1 and a second local oscillator 120-2. The first local oscillator 120-1 receives a signal (eg, s(t)) from the ADC 112 and a second input (cos(2πF)) from the scaling circuit 116. C t+Δt)). This local oscillator uses a cosine function and represents the in-phase (I) component of the signal. The second local oscillator 120-2 receives the signal from the ADC 112 (eg, s(t)) and the second input (sin(2πF)) from the scaling circuit 116. C t+Δt)). The local oscillator uses a sine function and represents the quadrature (Q) component of the signal. The outputs from the local oscillators (e.g., r(t) from local oscillator 120-1 and r'(t) from local oscillator 120-2) are provided to ASK decoding circuit 108, which can use the two oscillator outputs to perform ASK decoding.

[0062] exist Fig. 10B In the example of FIG. 1 , the scaling circuit 116 may provide a signal from a source having a frequency F CLOCK / N SF The values ​​of the sampled cosine (I) and sine (Q) functions.

[0063] In combination Figures 6 to 9 In the subsequent description of , for simplicity, the assumption of no phase shift can be used again. However, it should be noted that Figures 6 to 9 In any of the Fig. 10B The down-conversion circuit is used to solve the phase shift.

[0064] exist Figure 2 In the embodiment, the clock waveform 88 is jittered by changing the scaling factor used in the inverter controller 106 according to the modulation signal. In this embodiment, both the inverter controller 106 and the scaling circuit 116 receive the clock signal 88 (e.g., an unjittered clock signal). The clock signal 88 may therefore sometimes be referred to as a common clock signal for the inverter controller 106 and the scaling circuit 116. Alternatively, the scaling circuit 116 may receive a clock signal having a frequency that is a known multiple or fraction of the frequency of the system clock 88 (which is received by the inverter controller 106). The jitter circuit 84 provides the modulation signal 90 (e.g., a common modulation signal) to both the inverter controller 106 and the scaling circuit 116. This type of arrangement allows the down-conversion to be synchronized with the jitter of the wireless power signal, which mitigates errors in ASK decoding. However, this example for synchronizing the down-conversion with the jitter of the wireless power signal is merely illustrative.

[0065] In another possible arrangement, Figure 6As shown, a clock modulation circuit 86 is included to directly dither the clock waveform 88 using the modulation signal 84 from the dithering circuit 84. The clock modulation circuit 86 outputs a modified (dithered) clock signal 92, which is then provided to both the inverter controller 106 and the scaling circuit 116.

[0066] like Figure 6 As shown, the power transmission device 12 may include a jitter circuit 84 and a clock modulation circuit 86 for performing frequency jittering during wireless power transmission operation. The jitter circuit 84 and the clock modulation circuit 86 may be considered as part of the power transmission frequency 52 and / or the control circuit 16 in the device 12. In order to improve the wireless power transmission waveform characteristics in the system 8 (such as reducing harmonic emissions), a modulation signal 90 is applied to the clock waveform 88 by the clock modulation circuit 86. The clock modulation circuit 86 can frequency modulate the clock waveform 88 using the modulation signal 90. The corresponding modified clock signal 92 is then provided to the inverter controller 106, which uses the modified clock signal to provide a control signal to the inverter 61. The inverter 61 forms an AC current signal for wireless power transmission based on the control signal from the inverter controller 106. The same clock signal (e.g., the modified clock signal 92) is also provided to the scaling circuit 116 so that the ASK communication receiving circuit 104 removes the jitter pattern from the received ASK signal.

[0067] exist Figure 6 In the embodiment of the present invention, the scaling factor used in both the inverter controller 106 and the scaling circuit 116 may be fixed. The same scaling factor (eg, N ) may be used in both the inverter controller 106 and the scaling circuit 116. SC =N PWM ).

[0068] In another possible arrangement, Figure 7 As shown, the dithering circuit 84 again provides the modulated signal 90 directly to the inverter controller 106 (similar to Figure 2 ). In order to synchronize the down-conversion with the jitter of the wireless power signal, the modulated signal from the jitter circuit 84 is also provided to the ADC 112. The ADC 112 has a certain sampling rate. Figure 2 and Figure 6 In , the sampling rate of ADC 112 is fixed. However, in Figure 7 In the embodiment of the present invention, the modulation signal 90 from the dithering circuit 84 can be applied to the ADC sampling rate. This effectively synchronizes the down-conversion performed by the circuit 110 with the dithering of the wireless power signal.

[0069] exist Figure 7, the scaling circuit 116 and the inverter controller 106 receive (and scale) the common unjittered clock waveform 88. The scaling circuit 116 can scale the unjittered clock waveform using a fixed scaling factor. Therefore, the output from the scaling circuit 116 to the down-conversion circuit 110 is not affected by jitter. However, the s(t) generated by the ADC 112 is synchronized with the jitter of the wireless power signal by modulating the ADC sampling rate with the modulation signal 90. Therefore, the down-conversion circuit 110 produces an output signal r(t) without any jitter artifacts.

[0070] In another possible arrangement, Figure 8 As shown, a notch filter circuit 118 may be included in the ASK communication receiving circuit 104. The notch filter circuit may be inserted between the down-conversion circuit 110 and the ADC 112. The notch filter circuit may apply a notch filter to the output from the ADC 112 to remove the signal portion within a given frequency band. Based on the modulation signal 90 from the jitter circuit 84, the removed frequency band may be determined in advance when the jitter rate (and the associated sideband of the carrier frequency) is known or at run time. A given modulation signal 90 from the jitter circuit 84 may have an associated frequency band that may cause a bit error (if not removed) during decoding. Therefore, removing these parts of the signal before down-conversion (by the circuit 110) mitigates the bit errors in the ASK decoding circuit 108.

[0071] exist Figure 8 In the embodiment, the notch filter circuit 118 is included between the down-conversion circuit 110 and the coil 36. In other words, the notch filtering operation is performed before the down-conversion. When the notch filter circuit is included before the down-conversion circuit, the notch filter circuit can be included after the ADC 112 (e.g., Figure 8 In the analog domain, the notch filter circuit 118 may be inserted between the down-conversion circuit 110 and the ASK decoding circuit 108. In other words, if necessary, the notch filtering operation may be performed after the down-conversion.

[0072] Examples of notch filter circuit 118 include an infinite impulse response (IIR) filter or a finite impulse response (FIR) filter. In the case of a finite impulse response (FIR) filter, the signal (from ADC 112) may be averaged over a period of time equal to an integer multiple of the jitter period (where the jitter period is equal to 1 / f m ).

[0073] Fig. 92 is a flow chart of illustrative operations for operating a power transmission device that performs frequency jittering of a clock signal. As shown, at step 202, a modulation signal may be used to perform frequency jittering of a clock signal that is used by inverter controller 106 to control inverter 61. Jitter circuit 84 may generate the modulation signal. In some cases (e.g., Figure 6 ), the modulation signal may be applied directly to the undithered clock waveform before being provided to the inverter controller 106, and the inverter controller 106 supplies a control signal to the inverter 61 based on the received dithered clock signal. In other cases, the inverter controller 106 may receive the undithered clock signal and the modulation signal separately. The inverter controller 106 may provide a control signal to the inverter 61 by applying the modulation signal to a scaling factor (e.g., as shown in FIG. 1 ) of the clock signal applied to the inverter controller 106. Figure 2 , Figure 7 Figure 8 Regardless of the dithering technique used, the inverter controller 106 can supply control signals to the inverter based on the clock signal dithered using the modulating signal from the dithering circuit 84.

[0074] At step 204, the modulated signal may be provided to the ASK communication receiving circuit 104. There are several possibilities (eg, direct and indirect) on how the modulated signal may be provided to the ASK communication receiving circuit 104. Figure 6 In the embodiment of the present invention, the modified clock signal 92 (which is a function of the modulation signal 90) is scaled and provided to the ASK communication receiving circuit 104 (specifically the down conversion circuit 110). Figure 2 In the embodiment, the modulated signal 90 is provided to the scaling circuit 116. The scaling circuit 116 provides the jittered clock signal (which is a function of the modulated signal) to the ASK communication receiving circuit 104 (specifically, the down-conversion circuit 110). Figure 7 In the case of ASK communication, the modulated signal is provided to the ADC 112 in the ASK communication receiving circuit 104. Figure 8 In the example, the modulated signal is provided to the notch filter circuit 118 in the ASK communication receiving circuit 104.

[0075] In other words, in step 204, the ASK communication receiving circuit 104 receives the modulation signal information. The modulation signal information can be the modulation signal itself (such as Figure 7 and Figure 8 in) or a signal modulated with a modulating signal (such as in Figure 2 and Figure 6 middle).

[0076] In other words, in step 204, the ASK communication receiving circuit 104 receives the frequency jitter information. The frequency jitter information can be the modulation signal itself (such as Figure 7 and Figure 8 in) or a signal that uses a modulated signal for frequency jitter (such as in Figure 2 and Figure 6 middle).

[0077] Finally, at step 206, the ASK communication receiving circuit is used to decode the wireless power signal into corresponding bits. The wireless power signal is measured using amplifier 114 and ADC 112, down-converted and filtered using circuit 110, and then decoded using ASK decoding circuit 108. Notch filtering may optionally be applied before or after down-conversion, such as in conjunction with Figure 8 shown and discussed.

[0078] Each of the jitter circuit 84, the inverter controller 106, the clock modulation circuit 86, the scaling circuit 116, the down-conversion circuit 110, the ASK decoding circuit 108, and the notch filter circuit 118 may include one or more associated microprocessors, power management units, baseband processors, digital signal processors, microcontrollers, and / or application-specific integrated circuits. Each of the jitter circuit 84, the inverter controller 106, the clock modulation circuit 86, the scaling circuit 116, the down-conversion circuit 110, the ASK decoding circuit 108, and the notch filter circuit 118 may be considered as part of the control circuit 16 and / or the wireless power transmission circuit 52.

[0079] The foregoing examples of wireless power transmission devices receiving ASK communications from wireless power receiving devices are merely illustrative. In another possible arrangement, the wireless power receiving device may receive ASK communications from the wireless power transmission device. In this type of arrangement, the wireless power receiving device may include an ASK communication receiving circuit 104 of any one of the embodiments described herein. The ASK communication receiving circuit may use information about the modulated signal (for jittering the wireless power signal) during ASK demodulation. For example, the ASK communication receiving circuit in the wireless power receiving device may receive information about the modulated signal at a down-conversion circuit, a notch filter circuit, or an analog-to-digital converter.

[0080] According to one embodiment, a wireless power transmission device configured to provide wireless power to a wireless power receiving device is provided, the wireless power transmission device comprising: a wireless power transmission coil; an inverter configured to supply an AC drive signal to the wireless power transmission coil; an inverter controller configured to supply a control signal to the inverter based on a clock signal jittered using a modulation signal; and an amplitude shift keying communication receiving circuit configured to monitor an AC signal at the wireless power transmission coil based at least in part on information about the modulation signal and decode the monitored AC signal into bits.

[0081] According to another embodiment, the amplitude shift keying communication receiving circuit includes a down-conversion circuit and an amplitude shift keying decoding circuit that receives the output from the down-conversion circuit, and the wireless power transmission device also includes a scaling circuit, the inverter controller and the scaling circuit both receive a system clock signal and a modulation signal, the inverter controller is configured to supply a control signal to the inverter based on the system clock signal and the modulation signal, and the scaling circuit is configured to output a modified clock signal to the down-conversion circuit based on the system clock signal and the modulation signal.

[0082] According to another embodiment, the amplitude shift keying communication receiving circuit includes a down-conversion circuit and an amplitude shift keying decoding circuit that receives the output from the down-conversion circuit, and the wireless power transmission device also includes a scaling circuit and a clock modulation circuit, the clock modulation circuit is configured to receive a system clock signal and a modulation signal, use the modulation signal to modulate the system clock signal to form a modified clock signal, and provide the modified clock signal to the inverter controller and the scaling circuit, the scaling circuit is configured to receive the modified clock signal from the clock modulation circuit and output a scaled version of the modified clock signal to the down-conversion circuit.

[0083] According to another embodiment, a wireless power transmission device includes a capacitor connected in series with a wireless power transmission coil, and an amplitude shift keying communication receiving circuit includes: an amplifier having a first input and a second input connected to a first opposite side and a second opposite side of the capacitor; an analog-to-digital converter receiving an output from the amplifier, the analog-to-digital converter having a sampling rate jittered according to a modulation signal; a down-conversion circuit receiving an output from the analog-to-digital converter; and an amplitude shift keying decoding circuit receiving an output from the down-conversion circuit.

[0084] According to another embodiment, an amplitude shift keying communication receiving circuit includes: a notch filter circuit, which filters the monitored AC signal, the notch filter circuit receives information about the modulation signal and removes the frequency component of the modulation signal; a down-conversion circuit, which receives the output from the notch filter circuit; and an amplitude shift keying decoding circuit, which receives the output from the down-conversion circuit.

[0085] According to another embodiment, an amplitude shift keying communication receiving circuit includes: a down-conversion circuit, which down-converts the monitored AC signal; a notch filter circuit, which receives the output from the down-conversion circuit, the notch filter circuit receives information about the modulation signal and removes the frequency component of the modulation signal; and an amplitude shift keying decoding circuit, which receives the output from the notch filter circuit.

[0086] According to another embodiment, the inverter controller is a pulse width modulator.

[0087] According to one embodiment, a non-transitory computer-readable storage medium storing one or more programs, the one or more programs being configured to be executed by one or more processors of a wireless power transmission device configured to provide wireless power to a wireless power receiving device, the wireless power transmission device comprising: a wireless power transmission coil; an inverter configured to supply an AC drive signal to the wireless power transmission coil; and an inverter controller configured to supply a control signal to the inverter based on a clock signal jittered using a modulation signal; the one or more programs comprising instructions for monitoring an AC signal at the wireless power transmission coil based at least in part on information about the modulation signal and decoding the monitored AC signal into bits.

[0088] According to another embodiment, the wireless power transmission device also includes a down-conversion circuit, an amplitude shift keying decoding circuit that receives the output from the down-conversion circuit, and a scaling circuit, the inverter controller and the scaling circuit both receive a system clock signal and a modulation signal, the inverter controller is configured to supply a control signal to the inverter based on the system clock signal and the modulation signal, and the scaling circuit is configured to output a modified clock signal to the down-conversion circuit based on the system clock signal and the modulation signal.

[0089] According to another embodiment, the wireless power transmission device also includes a down-conversion circuit, an amplitude shift keying decoding circuit that receives the output from the down-conversion circuit, a scaling circuit, and a clock modulation circuit, the clock modulation circuit being configured to receive a system clock signal and a modulation signal, modulate the system clock signal using the modulation signal to form a modified clock signal, and provide the modified clock signal to the inverter controller and the scaling circuit, the scaling circuit being configured to receive the modified clock signal from the clock modulation circuit and output a scaled version of the modified clock signal to the down-conversion circuit.

[0090] According to another embodiment, the wireless power transmission device also includes a capacitor connected in series with the wireless power transmission coil; an amplifier having a first input and a second input connected to a first opposite side and a second opposite side of the capacitor; an analog-to-digital converter receiving an output from the amplifier, the analog-to-digital converter having a sampling rate jittered according to a modulation signal; a down-conversion circuit receiving the output from the analog-to-digital converter; and an amplitude shift keying decoding circuit receiving the output from the down-conversion circuit.

[0091] According to another embodiment, the wireless power transmission device also includes: a notch filter circuit, which filters the monitored AC signal, the notch filter circuit receives information about the modulation signal and removes the frequency component of the modulation signal; a down-conversion circuit, which receives the output from the notch filter circuit; and an amplitude shift keying decoding circuit, which receives the output from the down-conversion circuit.

[0092] According to another embodiment, the wireless power transmission device also includes: a down-conversion circuit, which down-converts the monitored AC signal; a notch filter circuit, which receives the output from the down-conversion circuit, the notch filter circuit receives information about the modulation signal and removes the frequency component of the modulation signal; and an amplitude shift keying decoding circuit, which receives the output from the notch filter circuit.

[0093] According to another embodiment, the inverter controller is a pulse width modulator.

[0094] According to one embodiment, a method for operating a wireless power transmission device, which is configured to provide wireless power to a wireless power receiving device, the wireless power transmission device includes a wireless power transmission coil, an inverter, an inverter controller and an amplitude shift keying communication receiving circuit, the method comprising: using the inverter to supply an AC drive signal to the wireless power transmission coil; using the inverter controller to supply a control signal to the inverter based on a clock signal jittered using a modulation signal; and using the amplitude shift keying communication receiving circuit to monitor the AC signal at the wireless power transmission coil at least partially based on information about the modulation signal and decode the monitored AC signal into bits.

[0095] According to another embodiment, the wireless power transmission device also includes a scaling circuit, the amplitude shift keying communication receiving circuit includes a down-conversion circuit and an amplitude shift keying decoding circuit, and the method also includes: using the amplitude shift keying decoding circuit to receive the output from the down-conversion circuit; using both the inverter controller and the scaling circuit to receive the system clock signal and the modulation signal; using the inverter controller to supply a control signal to the inverter based on the system clock signal and the modulation signal; and using the scaling circuit to output the modified clock signal to the down-conversion circuit based on the system clock signal and the modulation signal.

[0096] According to another embodiment, the amplitude shift keying communication receiving circuit includes a down-conversion circuit and an amplitude shift keying decoding circuit that receives the output from the down-conversion circuit, the wireless power transmission device also includes a scaling circuit and a clock modulation circuit, and the method also includes using the clock modulation circuit to receive a system clock signal and a modulation signal, using the modulation signal to modulate the system clock signal to form a modified clock signal, and providing the modified clock signal to the inverter controller and the scaling circuit, the scaling circuit is configured to receive the modified clock signal from the clock modulation circuit and output a scaled version of the modified clock signal to the down-conversion circuit.

[0097] According to another embodiment, the wireless power transmission device also includes a capacitor connected in series with the wireless power transmission coil, and the amplitude shift keying communication receiving circuit includes: an amplifier having a first input and a second input connected to a first opposite side and a second opposite side of the capacitor; an analog-to-digital converter, which receives an output from the amplifier, and the analog-to-digital converter has a sampling rate jittered according to a modulation signal; a down-conversion circuit, which receives the output from the analog-to-digital converter; and an amplitude shift keying decoding circuit, which receives the output from the down-conversion circuit.

[0098] According to another embodiment, an amplitude shift keying communication receiving circuit includes: a notch filter circuit, which filters the monitored AC signal, the notch filter circuit receives information about the modulation signal and removes the frequency component of the modulation signal; a down-conversion circuit, which receives the output from the notch filter circuit; and an amplitude shift keying decoding circuit, which receives the output from the down-conversion circuit.

[0099] According to another embodiment, an amplitude shift keying communication receiving circuit includes: a down-conversion circuit, which down-converts the monitored AC signal; a notch filter circuit, which receives the output from the down-conversion circuit, the notch filter circuit receives information about the modulation signal and removes the frequency component of the modulation signal; and an amplitude shift keying decoding circuit, which receives the output from the notch filter circuit.

[0100] The foregoing is merely illustrative and various modifications may be made to the embodiments described. The foregoing embodiments may be implemented independently or in any combination.

Claims

1. A wireless power transmission device configured to provide wireless power to a wireless power receiving device, the wireless power transmission device comprising: Wireless power transfer coil; an inverter configured to supply an AC driving signal to the wireless power transmission coil; an inverter controller configured to supply a control signal to the inverter based on a clock signal dithered using a modulation signal; and An amplitude shift keying communication receiving circuit is configured to monitor an AC signal at the wireless power transmission coil based at least in part on information about the modulation signal and decode the monitored AC signal into bits.

2. The wireless power transmission device according to claim 1 , wherein the amplitude shift keying communication receiving circuit comprises a down-conversion circuit and an amplitude shift keying decoding circuit that receives an output from the down-conversion circuit, and wherein the wireless power transmission device further comprises: A scaling circuit, wherein the inverter controller and the scaling circuit both receive a system clock signal and the modulation signal, wherein the inverter controller is configured to supply a control signal to the inverter based on the system clock signal and the modulation signal, and wherein the scaling circuit is configured to output a modified clock signal to the down-conversion circuit based on the system clock signal and the modulation signal.

3. The wireless power transmission device according to claim 1 , wherein the amplitude shift keying communication receiving circuit comprises a down-conversion circuit and an amplitude shift keying decoding circuit that receives an output from the down-conversion circuit, and wherein the wireless power transmission device further comprises: Scaling circuit; and A clock modulation circuit, wherein the clock modulation circuit is configured to: receiving a system clock signal and the modulation signal; modulating the system clock signal using the modulation signal to form a modified clock signal; as well as The modified clock signal is provided to the inverter controller and the scaling circuit, wherein the scaling circuit is configured to receive the modified clock signal from the clock modulation circuit and output a scaled version of the modified clock signal to the downconversion circuit.

4. The wireless power transmission device according to claim 1 , further comprising a capacitor connected in series with the wireless power transmission coil, wherein the amplitude shift keying communication receiving circuit comprises: an amplifier having first and second inputs connected to first and second opposing sides of the capacitor; an analog-to-digital converter receiving an output from the amplifier, wherein the analog-to-digital converter has a sampling rate that is dithered according to the modulation signal; a down-conversion circuit, the down-conversion circuit receiving the output from the analog-to-digital converter; and An amplitude shift keying decoding circuit receives the output from the down-conversion circuit.

5. The wireless power transmission device according to claim 1 , wherein the amplitude shift keying communication receiving circuit comprises: a notch filter circuit configured to filter the monitored AC signal, wherein the notch filter circuit receives the information about the modulation signal and removes a frequency component of the modulation signal; a down-conversion circuit, the down-conversion circuit receiving an output from the notch filter circuit; and An amplitude shift keying decoding circuit receives the output from the down-conversion circuit.

6. The wireless power transmission device according to claim 1, wherein the amplitude shift keying communication receiving circuit comprises: A down-conversion circuit, wherein the down-conversion circuit down-converts the monitored AC signal; a notch filter circuit that receives an output from the down-conversion circuit, wherein the notch filter circuit receives the information about the modulated signal and removes a frequency component of the modulated signal; and An amplitude shift keying decoding circuit receives the output from the notch filter circuit. 7 . The wireless power transmission device of claim 1 , wherein the inverter controller is a pulse width modulator.

8. A non-transitory computer-readable storage medium storing one or more programs configured to be executed by one or more processors of a wireless power transmission device configured to provide wireless power to a wireless power receiving device, wherein the wireless power transmission device comprises: Wireless power transfer coil; an inverter configured to supply an AC driving signal to the wireless power transmission coil; and an inverter controller configured to supply a control signal to the inverter based on a clock signal dithered using a modulation signal; the one or more programs including instructions for performing the following operations: An AC signal at the wireless power transfer coil is monitored based at least in part on information about the modulation signal and the monitored AC signal is decoded into bits.

9. The non-transitory computer-readable storage medium of claim 8 , wherein the wireless power transmission device further comprises a down-conversion circuit, an amplitude shift keying decoding circuit receiving an output from the down-conversion circuit, and a scaling circuit, wherein both the inverter controller and the scaling circuit receive a system clock signal and the modulation signal, wherein the inverter controller is configured to supply a control signal to the inverter based on the system clock signal and the modulation signal, and wherein the scaling circuit is configured to output a modified clock signal to the down-conversion circuit based on the system clock signal and the modulation signal.

10. The non-transitory computer-readable storage medium of claim 8, wherein the wireless power transmission device further comprises a down-conversion circuit, an amplitude shift keying decoding circuit receiving an output from the down-conversion circuit, a scaling circuit, and a clock modulation circuit, wherein the clock modulation circuit is configured to: receiving a system clock signal and the modulation signal; modulating the system clock signal using the modulation signal to form a modified clock signal; as well as The modified clock signal is provided to the inverter controller and the scaling circuit, wherein the scaling circuit is configured to receive the modified clock signal from the clock modulation circuit and output a scaled version of the modified clock signal to the downconversion circuit.

11. The non-transitory computer-readable storage medium of claim 8, wherein the wireless power transmission device further comprises: a capacitor connected in series with the wireless power transmission coil; an amplifier having first and second inputs connected to first and second opposing sides of the capacitor; an analog-to-digital converter receiving an output from the amplifier, wherein the analog-to-digital converter has a sampling rate that is dithered according to the modulation signal; a down-conversion circuit, the down-conversion circuit receiving the output from the analog-to-digital converter; and An amplitude shift keying decoding circuit receives the output from the down-conversion circuit.

12. The non-transitory computer-readable storage medium of claim 8, wherein the wireless power transmission device further comprises: a notch filter circuit configured to filter the monitored AC signal, wherein the notch filter circuit receives the information about the modulation signal and removes a frequency component of the modulation signal; a down-conversion circuit, the down-conversion circuit receiving an output from the notch filter circuit; as well as An amplitude shift keying decoding circuit receives the output from the down-conversion circuit.

13. The non-transitory computer-readable storage medium of claim 8, wherein the wireless power transmission device further comprises: A down-conversion circuit, wherein the down-conversion circuit down-converts the monitored AC signal; a notch filter circuit that receives an output from the down-conversion circuit, wherein the notch filter circuit receives the information about the modulated signal and removes a frequency component of the modulated signal; and An amplitude shift keying decoding circuit receives the output from the notch filter circuit.

14. The non-transitory computer-readable storage medium of claim 8, wherein the inverter controller is a pulse width modulator.

15. A method of operating a wireless power transmission device, the wireless power transmission device being configured to provide wireless power to a wireless power receiving device, wherein the wireless power transmission device comprises a wireless power transmission coil, an inverter, an inverter controller, and an amplitude shift keying communication receiving circuit, the method comprising: supplying an AC drive signal to the wireless power transmission coil using the inverter; supplying, using the inverter controller, a control signal to the inverter based on a clock signal dithered using a modulation signal; as well as The amplitude shift keying communication receiving circuit is used to monitor an AC signal at the wireless power transmission coil based at least in part on information about the modulation signal and to decode the monitored AC signal into bits.

16. The method of claim 15, wherein the wireless power transmission device further comprises a scaling circuit, wherein the amplitude shift keying communication receiving circuit comprises a down-conversion circuit and an amplitude shift keying decoding circuit, and wherein the method further comprises: Using the amplitude shift keying decoding circuit to receive the output from the down conversion circuit; receiving a system clock signal and the modulation signal using both the inverter controller and the scaling circuit, supplying a control signal to the inverter based on the system clock signal and the modulation signal using the inverter controller; as well as A modified clock signal is output to the downconversion circuit based on the system clock signal and the modulation signal using the scaling circuit.

17. The method of claim 15 , wherein the amplitude shift keying communication receiving circuit comprises a down-conversion circuit and an amplitude shift keying decoding circuit that receives an output from the down-conversion circuit, wherein the wireless power transmission device further comprises a scaling circuit and a clock modulation circuit, and wherein the method further comprises using the clock modulation circuit: receiving a system clock signal and the modulation signal; modulating the system clock signal using the modulation signal to form a modified clock signal; as well as The modified clock signal is provided to the inverter controller and the scaling circuit, wherein the scaling circuit is configured to receive the modified clock signal from the clock modulation circuit and output a scaled version of the modified clock signal to the downconversion circuit.

18. The method of claim 15, wherein the wireless power transmission device further comprises a capacitor connected in series with the wireless power transmission coil, and wherein the amplitude shift keying communication receiving circuit comprises: an amplifier having first and second inputs connected to first and second opposing sides of the capacitor; an analog-to-digital converter receiving an output from the amplifier, wherein the analog-to-digital converter has a sampling rate that is dithered according to the modulation signal; a down-conversion circuit, the down-conversion circuit receiving the output from the analog-to-digital converter; and An amplitude shift keying decoding circuit receives the output from the down-conversion circuit.

19. The method according to claim 15, wherein the amplitude shift keying communication receiving circuit comprises: a notch filter circuit configured to filter the monitored AC signal, wherein the notch filter circuit receives the information about the modulation signal and removes a frequency component of the modulation signal; a down-conversion circuit, the down-conversion circuit receiving an output from the notch filter circuit; and An amplitude shift keying decoding circuit receives the output from the down-conversion circuit.

20. The method according to claim 15, wherein the amplitude shift keying communication receiving circuit comprises: A down-conversion circuit, wherein the down-conversion circuit down-converts the monitored AC signal; a notch filter circuit that receives an output from the down-conversion circuit, wherein the notch filter circuit receives the information about the modulated signal and removes a frequency component of the modulated signal; and An amplitude shift keying decoding circuit receives the output from the notch filter circuit.

Images