Method for manufacturing a semiconductor substrate

Abstract

A preparation method of a semiconductor substrate, comprising: providing a first substrate and a second substrate; performing an oxidation treatment on opposite first and second surfaces of the first substrate to form first and second oxide layers; performing an etching treatment on the first surface of the first substrate to form a groove structure and retain part of the first oxide layer; joining the second substrate and the first substrate to seal the groove structure and form a cavity structure; and performing a rough thinning treatment and a fine thinning treatment on the second substrate in sequence to make the thickness of the second substrate 5-20 microns. The preparation method can realize rough thinning, chemical mechanical polishing and Fourier infrared measurement and other steps by using devices with different functions in a step-by-step manner, thereby breaking through the barrier of insufficient device capacity and greatly improving process flexibility.

Description

TECHNICAL FIELD

[0001] Embodiments of the present disclosure relate to the technical field of semiconductor technology, and in particular, to a preparation method of a semiconductor substrate. BACKGROUND

[0002] With the development of micro-electro-mechanical system technology, semiconductor substrates with cavity structures are increasingly widely used in devices such as pressure sensors and gyroscopes. A silicon oxide layer is usually formed between the top layer of silicon and the underlying substrate. The technology of forming a silicon oxide layer between the top layer of silicon and the underlying substrate is SOI (Silicon-On-Insulator) technology. Semiconductor substrates with cavity structures are usually formed using SOI technology. The principle of SOI technology is to add an insulator between silicon transistors, thereby reducing the parasitic capacitance between the two by half. The advantage is that the clock can be easily improved, and current leakage can be reduced. In terms of process, part of the photomask can be omitted to save costs, so there are advantages in both process and circuit.

[0003] In the prior art, there are problems of insufficient process capability, insufficient equipment precision, or high equipment cost. SUMMARY

[0004] Embodiments of the present disclosure provide a preparation method of a semiconductor substrate. The preparation method can be used to implement rough thinning, chemical mechanical polishing, Fourier infrared measurement, and other steps in steps using devices with different functions, thereby breaking through the obstacle of insufficient device capability and greatly improving process flexibility.

[0005] At least one embodiment of the present disclosure provides a preparation method of a semiconductor substrate. The preparation method comprises: providing a first substrate and a second substrate; performing oxidation treatment on opposite first and second surfaces of the first substrate to form first and second oxide layers; performing etching treatment on the first surface of the first substrate to form a groove structure and retain part of the first oxide layer; joining the second substrate and the first substrate to seal the groove structure and form a cavity structure; and performing rough thinning and fine thinning on the second substrate in sequence to make the thickness of the second substrate 5-20 microns.

[0006] For example, in the preparation method provided by at least one embodiment of the present disclosure, the rough thinning of the second substrate comprises thinning the second substrate to 21-30 microns by mechanical grinding.

[0007] For example, in the preparation method provided by at least one embodiment of the present disclosure, the rough thinning of the second substrate comprises performing rough grinding and fine grinding in sequence.

[0008] For example, in the preparation method provided in at least one embodiment of the present disclosure, the fine thinning process on the second substrate includes a polishing process on the second substrate.

[0009] For example, in the preparation method provided in at least one embodiment of the present disclosure, before the fine thinning process on the second substrate, the thickness of the second substrate is measured by using a Fourier infrared instrument.

[0010] For example, in the preparation method provided in at least one embodiment of the present disclosure, the fine thinning process on the second substrate includes a plurality of polishing processes on the second substrate, and the thickness of the second substrate is measured by using the Fourier infrared instrument after each polishing process.

[0011] For example, in the preparation method provided in at least one embodiment of the present disclosure, the oxidation process on the opposite first surface and second surface of the first substrate includes forming the first oxide layer and the second oxide layer by using a high-temperature oxidation process.

[0012] For example, in the preparation method provided in at least one embodiment of the present disclosure, the first substrate and the second substrate are both silicon substrates, and the folding of the second substrate and the first substrate to seal the groove structure includes bonding the Si-O bonds in the part of the first oxide layer remaining on the first substrate and the Si-Si bonds on the second substrate.

[0013] For example, in the preparation method provided in at least one embodiment of the present disclosure, the thickness of the first oxide layer is 0.5 microns to 1 micron.

[0014] For example, in the preparation method provided in at least one embodiment of the present disclosure, after forming the first oxide layer and the second oxide layer, the first substrate is further subjected to an annealing process.

[0015] For example, the preparation method provided in at least one embodiment of the present disclosure further includes processing the second oxide layer on the second surface of the first substrate to remove the second oxide layer.

[0016] For example, in the preparation method provided in at least one embodiment of the present disclosure, processing the second oxide layer on the second surface of the first substrate to remove the second oxide layer includes processing the second oxide layer by using hydrofluoric acid.

[0017] For example, in the preparation method provided in at least one embodiment of the present disclosure, before the oxidation process on the opposite first surface and second surface of the first substrate, the first substrate and the second substrate are further subjected to a cleaning process. BRIEF DESCRIPTION OF DRAWINGS

[0018] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present disclosure and not limiting of the present disclosure.

[0019] Figure 1 A flow chart of a preparation method of a semiconductor substrate provided by at least one embodiment of the present disclosure;

[0020] Figure 2A A process chart of providing a first substrate and a second substrate in a preparation method of a semiconductor substrate provided by at least one embodiment of the present disclosure;

[0021] Figure 2B A process chart of performing an oxidation treatment on the first substrate in a preparation method of a semiconductor substrate provided by at least one embodiment of the present disclosure;

[0022] Figure 2C A process chart of performing an etching treatment on a first surface of the first substrate in a preparation method of a semiconductor substrate provided by at least one embodiment of the present disclosure;

[0023] Figure 2D A process chart of performing a conjugation on the second substrate and the first substrate in a preparation method of a semiconductor substrate provided by at least one embodiment of the present disclosure;

[0024] Figure 2E A process chart of sequentially performing a rough thinning treatment and a fine thinning treatment on the second substrate in a preparation method of a semiconductor substrate provided by at least one embodiment of the present disclosure;

[0025] Figure 3 A thickness trend chart of different positions of the second substrate after the rough thinning treatment is completed in the preparation method provided by at least one embodiment of the present disclosure;

[0026] Figure 4 A thickness trend chart of different positions of the second substrate after the fine thinning treatment is completed in the preparation method provided by at least one embodiment of the present disclosure;

[0027] Figure 5 A flow chart of another preparation method of a semiconductor substrate provided by at least one embodiment of the present disclosure;

[0028] Figure 6A A process chart of providing a first substrate and a second substrate in another preparation method of a semiconductor substrate provided by at least one embodiment of the present disclosure;

[0029] Figure 6B A process chart of performing an oxidation treatment on the first substrate in another preparation method of a semiconductor substrate provided by at least one embodiment of the present disclosure;

[0030] Figure 6CA process diagram of etching a first surface of a first substrate in a method of manufacturing a semiconductor substrate according to at least one embodiment of the present disclosure;

[0031] Figure 6D A process diagram of joining a second substrate and a first substrate in a method of manufacturing a semiconductor substrate according to at least one embodiment of the present disclosure;

[0032] Figure 6E A process diagram of sequentially performing a rough thinning process and a fine thinning process on a second substrate in a method of manufacturing a semiconductor substrate according to at least one embodiment of the present disclosure; and

[0033] Figure 6F A process diagram of processing a second oxide layer on a second surface of a first substrate to remove the second oxide layer in a method of manufacturing a semiconductor substrate according to at least one embodiment of the present disclosure. DETAILED DESCRIPTION

[0034] In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be described clearly and completely below with reference to the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are only some of the embodiments of the present disclosure, but not all the embodiments of the present disclosure. Based on the described embodiments of the present disclosure, all other embodiments obtained by those of ordinary skill in the art without creative effort belong to the scope of protection of the present disclosure.

[0035] Unless otherwise defined, technical or scientific terms used in the present disclosure should have the same meaning as commonly understood by one of ordinary skill in the art to which the present disclosure belongs. The terms "first", "second", and similar terms used in the present disclosure do not necessarily denote any ordinal, quantity or importance, but are used to distinguish different components. The terms "comprising", "including", "containing" and similar terms are intended to encompass the elements listed after such terms, as well as equivalents thereof, and are not intended to preclude other elements or additional elements. The terms "connected" or "coupled" and similar terms are not limited to a physical or mechanical connection or coupling, but also include an electrical connection or coupling, whether direct or indirect.

[0036] Unless otherwise defined, the terms "parallel", "perpendicular", "same" and the like used in the embodiments of the present disclosure include the strict sense of "parallel", "perpendicular", "same" and the like, and the cases of "approximately parallel", "approximately perpendicular", "approximately same" and the like with certain errors. For example, the "approximately" above can mean that the difference of the compared objects is within 10% or 5% of the average value of the compared objects. In the following of the embodiments of the present disclosure, unless the number of a component or element is specifically indicated, it means that the component or element can be one or multiple, or can be understood as at least one. "At least one" means one or more, and "multiple" means at least two. The "same layer" in the embodiments of the present disclosure refers to the relationship between the multiple film layers formed by the same material after the same step (for example, one patterning process). Here, "same layer" does not always mean that the thickness of the multiple film layers is the same or the height of the multiple film layers in the cross-sectional view is the same.

[0037] The technology of bonding the silicon-oxygen bond included in the first substrate and the silicon-silicon bond included in the second substrate, and thinning the first substrate is the most mature and commercialized SOI technology at present. Specifically, the SOI technology is to bond the first substrate with two main surfaces oxidized as a support substrate and the second substrate together, and then consolidate at a temperature higher than 1000 o C for more than 2 hours, and then thin the thickness of the second substrate by means of grinding, polishing and the like to obtain the final semiconductor substrate with a cavity structure. This technology has the advantages of simple process and low cost, and thus has attracted widespread attention in the industry. As a new type of structure, compared with the ordinary semiconductor substrate, the first substrate and the second substrate are formed with groove structures by means of photolithography and etching process before being closed, and the groove structures are formed with specific pattern distribution on the surface of the first substrate. In the process of preparing the cavity structure, due to the existence of the cavity structure, the contact area of the bonding part between the first substrate and the second substrate is greatly reduced. The part of the second substrate corresponding to the cavity structure is not supported by the first substrate, and the thinner the thickness of the second substrate, the more likely it is to be damaged by mechanical stress and broken during mechanical grinding.

[0038] Moreover, semiconductor devices, especially micro-electro-mechanical system (MEMS) devices, mostly use substrates with a cavity structure, and the thickness and uniformity of the remaining material on the cavity structure need to be precisely controlled. For example, the thickness of the second substrate of a MEMS pressure product is required to be precisely controlled within 5-20 microns. In the process of manufacturing the semiconductor substrate with such a structure, high-precision polishing equipment of Japan DISCO is usually used. Some functions of such high-end equipment need to be customized, the delivery period is usually as long as 2 years, and the purchase price is extremely high, thereby not being conducive to the rapid development and mass production of products.

[0039] The inventors of the present disclosure find that the low-cost but low-precision equipment can be used to make the process effect brought by the improved scheme consistent with the effect of preparation by using imported new equipment by skillfully combining multiple steps with each other, thereby reducing the dependence on foreign high-end new equipment, and the whole process does not need any foreign high-end equipment. For example, by skillfully matching the processing mode of multiple steps combined with each other, the low-cost and low-precision equipment is used to perform rough thinning, chemical mechanical polishing, Fourier infrared measurement and other steps in steps by using equipment with different functions, thereby breaking through the obstacle of insufficient equipment capacity, so that the final process result can completely reach the same level as that of preparation by using foreign high-end equipment, and the investment cost of fixed assets is about 1 / 3 or even lower than the cost of foreign high-end equipment. Moreover, since the process can be performed in steps, the process flexibility is greatly improved, and the whole process steps cannot be performed due to equipment failure in a certain process link.

[0040] The present disclosure provides a preparation method of a semiconductor substrate, which comprises: providing a first substrate and a second substrate; performing oxidation treatment on opposite first and second surfaces of the first substrate to form first and second oxidation layers; performing etching treatment on the first surface of the first substrate to form a groove structure and reserve part of the first oxidation layer; butting the second substrate and the first substrate to seal the groove structure and form a cavity structure; and performing rough thinning and fine thinning on the second substrate in sequence to make the thickness of the second substrate 5-20 microns. The preparation method of the semiconductor substrate provided by the present disclosure can not depend on foreign high-end new equipment, thereby reducing the equipment cost. Moreover, the preparation method provided by the present disclosure is performed in steps, the process flexibility is greatly improved, and the problem that the whole process steps cannot be performed due to equipment failure in a certain process link does not occur.

[0041] For example, Figure 1 A flowchart of a preparation method of a semiconductor substrate provided by at least one embodiment of the present disclosure, Figures 2A-2E A process diagram of a preparation method of a semiconductor substrate provided by at least one embodiment of the present disclosure, Figure 2A A process diagram of providing a first substrate and a second substrate in a preparation method of a semiconductor substrate provided by at least one embodiment of the present disclosure, Figure 2B A process diagram of performing oxidation treatment on a first substrate in a preparation method of a semiconductor substrate provided by at least one embodiment of the present disclosure, Figure 2C A process diagram of performing etching treatment on a first surface of a first substrate in a preparation method of a semiconductor substrate provided by at least one embodiment of the present disclosure, Figure 2DA process diagram of a preparation method of a semiconductor substrate provided by at least one embodiment of the present disclosure, Figure 2E A process diagram of a preparation method of a semiconductor substrate provided by at least one embodiment of the present disclosure, Figure 1 and Figures 2A-2E The preparation method of the semiconductor substrate comprises the following steps.

[0042] Step S101: providing a first substrate and a second substrate.

[0043] For example, in combination with Figure 1 and Figure 2A The first substrate 101 and the second substrate 102 can be silicon substrates, or lightly doped or heavily doped Si substrates, or p-type or n-type doped substrates, and the dopants can be boron, phosphorus, arsenic or other elements. The first substrate 101 is used as a support substrate of the finally formed semiconductor substrate, and the selection of its material is more extensive.

[0044] For example, in one example, the first substrate 101 and the second substrate 102 have the same shape and equal or approximately equal surface areas.

[0045] For example, in one example, the first substrate 101 and the second substrate 102 are silicon substrates, and the thickness of the first substrate 101 and the second substrate 102 can be 550 microns to 700 microns.

[0046] Step S102: performing an oxidation process on the opposite first surface and second surface of the first substrate to form a first oxide layer and a second oxide layer.

[0047] For example, in combination with Figure 1 and Figure 2B The first oxide layer 1011 and the second oxide layer 1012 can be formed in the first substrate 101 by high-temperature oxidation. For example, a silicon dioxide layer can be formed by high-temperature oxidation of a single crystal silicon substrate, so that the first oxide layer 1011 and the second oxide layer 1012 are both silicon dioxide layers. For example, the first oxide layer 1011 can be used as an etch stop layer for subsequent chemical mechanical polishing to prevent the etching liquid from etching the subsequently formed device layer and the like.

[0048] For example, after forming the first oxide layer 1011 and the second oxide layer 1012 on the opposite first surface and second surface of the first substrate 101, and before forming the subsequent layer structure, the first substrate 101 is subjected to an annealing step, and the temperature of the annealing is greater than 1000 o C, for example, the temperature of the annealing can be about 1300 o C.

[0049] For example, the thickness of the first oxide layer 1011 formed on the first surface of the first substrate 101 is 0.5-1 microns. The thickness of the second oxide layer 1012 formed on the second surface of the second substrate 102 is 0.5-1 microns.

[0050] For example, the first oxide layer 1011 and the second oxide layer 1012 are insulating layers, which are silicon oxide layers or silicon oxynitride layers, and the silicon oxide layers are formed by thermal oxidation.

[0051] For example, before the opposite first surface and second surface of the first substrate 101 are subjected to oxidation treatment, the first substrate 101 and the second substrate 102 are subjected to cleaning treatment, so that the uniformity of the thickness and the smoothness of the surface of the first oxide layer 1011 and the second oxide layer 1012 formed subsequently can be ensured.

[0052] Step S103: etching treatment is performed on the first surface of the first substrate to form a groove structure, and part of the first oxide layer is reserved.

[0053] For example, in combination with Figure 1 and Figure 2C the groove structure 1013 can be formed by dry etching or wet etching, so as to prepare for the formation of a cavity structure subsequently.

[0054] Step S104: the second substrate and the first substrate are butted to seal the groove structure and form a cavity structure.

[0055] For example, in combination with Figure 1 and Figure 2D the butting of the second substrate 102 and the first substrate 101 realizes the sealing of the groove structure 1013 and the formation of a cavity structure. When the first substrate 101 and the second substrate 102 are both silicon substrates, and are lightly doped or heavily doped Si substrates, the silicon-oxygen bond on the first substrate 101 and the silicon-silicon bond on the second substrate 102 are bonded to realize the sealing of the groove structure, so that the cavity structure can be formed.

[0056] Step S105: the second substrate is subjected to rough thinning treatment and fine thinning treatment in sequence to make the thickness of the second substrate 5-20 microns.

[0057] For example, in combination with Figure 1 and Figure 2EThe rough thinning of the second substrate 102 includes thinning the second substrate 102 to 21-30 microns by mechanical grinding, which removes most of the thickness of the second substrate 102, so that only fine thinning of the second substrate 102 is needed to obtain a second substrate 102 with a thickness of 5-20 microns, thereby improving the efficiency of the thinning of the second substrate 102, and the method for preparing a semiconductor substrate provided by the embodiment of the present disclosure can make the thickness of the first substrate 101 more uniform, so as to be controlled within ±0.5 microns.

[0058] For example, the rough thinning of the second substrate 102 includes sequentially performing rough grinding and fine grinding, the rough grinding can quickly thin the second substrate 102, and the fine grinding can reduce damage to the second substrate 102. Dividing the rough thinning into two steps of rough grinding and fine grinding can avoid too much thinning in the rough grinding, which causes irreparable damage, and the fine grinding can also ensure the flatness of the surface of the formed second substrate, and the efficiency of the fine grinding is higher than that of the polishing, thereby saving time and economic costs.

[0059] For example, the second substrate 102 has a thickness of 21-30 microns after the rough thinning, which can avoid the second substrate 102 from being broken and cracked due to too much grinding force in the fine grinding. The rough thinning can shorten the time of the subsequent fine thinning, thereby improving the efficiency of the subsequent fine thinning.

[0060] For example, Figure 3 The preparation method provided by at least one embodiment of the present disclosure provides a thickness trend chart of the second substrate at different positions after the rough thinning is completed. As shown in Figure 3 As shown in FIG. 6, nine points are taken on the second substrate 102, and the thickness of the second substrate 102 at the nine points is measured. Figure 3 As can be seen from FIG. 6, the average thickness of the second substrate 102 is 27.12 microns, and the thickness fluctuation of the second substrate 102 is ±2.36 microns.

[0061] For example, in one example, the fine thinning of the second substrate 102 includes polishing the second substrate 102, which can be chemical mechanical polishing. The chemical mechanical polishing can quickly thin the second substrate 102 by the grinding action of ultrafine particles and the chemical corrosion action of slurry, and can also make the polished surface smoother and more flat. For example, the chemical mechanical polishing can be silica gel polishing.

[0062] For example, in one example, the first substrate 101 and the second substrate 102 are both silicon substrates, and the bonding of the Si-O bonds in the remaining part of the first oxide layer on the first substrate 101 and the Si-Si bonds on the second substrate 102 to seal the recess structure includes bonding the Si-O bonds in the remaining part of the first oxide layer on the first substrate 101 and the Si-Si bonds on the second substrate 102.

[0063] For example, after the bonding of the Si-O bonds on the first substrate 101 and the Si-Si bonds on the second substrate 102, due to the presence of the cavity structure in the first substrate 101, the contact area of the bonding part of the first substrate 101 and the second substrate 102 is reduced, and the layer structure formed on the cavity structure in the subsequent process is only supported by the second substrate 102. When the coarse thinning process is used, the mechanical grinding force is large. When the thickness of the second substrate 102 is reduced to less than 21 microns, if the mechanical grinding method is still used to thin the second substrate 102, the second substrate 102 will be damaged and broken. The embodiment of the present disclosure keeps the thickness of the second substrate 102 to be 21 microns to 30 microns after the coarse thinning process, and then performs the subsequent fine thinning process. The time of the subsequent fine thinning process can be shortened, and the efficiency of the subsequent fine thinning process can be improved to prepare a semiconductor substrate with a cavity structure, and the uniformity of the surface of the second substrate is good and effective defect control can be performed.

[0064] For example, in one example, before the fine thinning process of the second substrate 102, a Fourier infrared instrument is used to measure the thickness of the second substrate 102, so that the thickness of the second substrate 102 to be processed can be accurately determined, and the thickness of the second substrate 102 to be thinned in the subsequent fine thinning process can be determined.

[0065] For example, the thickness of the second substrate 102 is measured by using a general Fourier infrared measuring instrument. The first oxide layer between the second substrate 102 and the first substrate 101, which is between 0.5 microns and 1 micron, can be used to accurately measure the resolution of the film layer.

[0066] For example, in one example, the fine thinning process of the second substrate 102 includes multiple polishing processes of the second substrate 102, so that the thickness of the second substrate 102 to be thinned each time can be accurately determined to avoid excessive thinning of the second substrate 102 and cause irreparable loss. For example, the thickness of the second substrate 102 is measured by using a Fourier infrared instrument after each polishing process, so that the thickness of the second substrate 102 to be thinned can be more accurately determined.

[0067] For example, Figure 4The preparation method provided by at least one embodiment of the present disclosure shows the thickness trend of the second substrate at different positions after the fine thinning process is completed. As shown in Figure 4 As shown in Figure 4 It can be seen that the average thickness of the second substrate 102 is 19.79 microns, and the thickness fluctuation of the second substrate 102 is plus or minus 0.59 microns.

[0068] For example, in addition to achieving the thinning of the second substrate 102, the polishing process can also remove surface stress and improve the surface roughness of the second substrate.

[0069] For example, Figure 5 Another flowchart of the preparation method of the semiconductor substrate provided by at least one embodiment of the present disclosure is shown in Figures 6A-6F Another process diagram of the preparation method of the semiconductor substrate provided by at least one embodiment of the present disclosure is shown in Figure 6A Another process diagram of providing the first substrate and the second substrate in the preparation method of the semiconductor substrate provided by at least one embodiment of the present disclosure is shown in Figure 6B Another process diagram of the oxidation process of the first substrate in the preparation method of the semiconductor substrate provided by at least one embodiment of the present disclosure is shown in Figure 6C Another process diagram of the etching process of the first surface of the first substrate in the preparation method of the semiconductor substrate provided by at least one embodiment of the present disclosure is shown in Figure 6D Another process diagram of the butting of the second substrate and the first substrate in the preparation method of the semiconductor substrate provided by at least one embodiment of the present disclosure is shown in Figure 6E Another process diagram of the rough thinning process and the fine thinning process of the second substrate in the preparation method of the semiconductor substrate provided by at least one embodiment of the present disclosure is shown in Figure 6F Another process diagram of the process of the second oxide layer on the second surface of the first substrate in the preparation method of the semiconductor substrate provided by at least one embodiment of the present disclosure is shown in Figure 5 and Figures 6A-6F The preparation method of the semiconductor substrate includes the following steps.

[0070] Step S201: providing a first substrate and a second substrate.

[0071] For example, in combination with Figure 5 and Figure 6A The first substrate 101 and the second substrate 102 can both be silicon substrates, or lightly doped or heavily doped Si substrates, or p-type or n-type doped substrates, and the dopants can be elements such as boron, phosphorus, or arsenic. The first substrate 101 is used as a support substrate of the finally formed semiconductor substrate, and the selection of its material is more extensive.

[0072] For example, in one example, the first substrate 101 and the second substrate 102 have the same shape and the same or approximately equal surface area.

[0073] For example, in one example, the first substrate 101 and the second substrate 102 are both silicon substrates, and the thickness of the first substrate 101 and the second substrate 102 can both be 550 microns to 700 microns.

[0074] Step S202: performing an oxidation process on the opposite first surface and second surface of the first substrate to form a first oxide layer and a second oxide layer.

[0075] For example, in combination with Figure 5 and Figure 6B The first oxide layer 1011 and the second oxide layer 1012 can be formed in the first substrate 101 by high-temperature oxidation. For example, the first oxide layer 1011 and the second oxide layer 1012 can both be silicon dioxide layers formed by high-temperature oxidation of a single-crystal silicon substrate. For example, the first oxide layer 1011 can serve as an etching stop layer for subsequent chemical mechanical polishing to prevent the etching liquid from corroding the subsequently formed device layer and the like.

[0076] For example, after forming the first oxide layer 1011 and the second oxide layer 1012 on the opposite first surface and second surface of the first substrate 101, and before forming the subsequent layer structure, the first substrate 101 is subjected to an annealing process at a temperature greater than 1000 o C, for example, about 1300 o C.

[0077] For example, in one example, the thickness of the first oxide layer 1011 formed on the first surface of the first substrate 101 is 0.5 microns to 1 micron. The thickness of the second oxide layer 1012 formed on the second surface of the second substrate 102 is 0.5 microns to 1 micron.

[0078] For example, the first oxide layer 1011 and the second oxide layer 1012 are insulating layers, which are silicon oxide layers or silicon oxynitride layers, and the silicon oxide is usually formed by thermal oxidation of a single-crystal silicon.

[0079] For example, before performing the oxidation process on the opposite first surface and second surface of the first substrate 101, the first substrate 101 and the second substrate 102 are also subjected to a cleaning process, so as to ensure the uniformity of the thickness and the smoothness of the surface of the subsequently formed first oxide layer 1011 and the second oxide layer 1012.

[0080] Step S203: performing an etching process on the first surface of the first substrate to form a groove structure 1013 and retain part of the first oxide layer.

[0081] For example, in combination with Figure 5 and Figure 6C The groove structure 1013 can be formed by dry etching or wet etching to prepare for the subsequent formation of the cavity structure.

[0082] Step S204: The second substrate and the first substrate are joined to seal the groove structure and form the cavity structure.

[0083] For example, in combination with Figure 5 and Figure 6D The joining of the second substrate 102 and the first substrate 101 seals the groove structure 1013 and forms the cavity structure. When the first substrate 101 and the second substrate 102 are both silicon substrates, and are lightly doped or heavily doped Si substrates, the silicon-oxygen bonds on the first substrate 101 and the silicon-silicon bonds on the second substrate 102 are bonded to seal the groove structure, thereby forming the cavity structure.

[0084] Step S205: The second substrate is sequentially subjected to rough thinning and fine thinning to have a thickness of 5-20 microns.

[0085] For example, in combination with Figure 5 and Figure 6E The rough thinning of the second substrate 102 includes thinning the second substrate 102 to 21-30 microns by mechanical grinding, which is equivalent to removing most of the thickness of the second substrate 102, so that only fine thinning of the second substrate 102 is needed to obtain a second substrate 102 with a thickness of 5-20 microns, thereby improving the efficiency of the thinning process of the second substrate 102.

[0086] For example, the rough thinning of the second substrate 102 includes sequential rough grinding and fine grinding. The rough grinding can quickly thin the second substrate 102, and the fine grinding can reduce damage to the second substrate 102. Dividing the rough thinning into two steps of rough grinding and fine grinding can avoid excessive thinning during rough grinding, which cannot be compensated for, and the fine grinding can ensure the flatness of the surface of the second substrate, and the efficiency of the fine grinding is higher than that of the fine thinning, thereby saving time and economic costs.

[0087] For example, after the rough thinning, the second substrate 102 has a thickness of 21-30 microns, which can avoid breakage of the second substrate 102 caused by excessive grinding force during subsequent fine grinding. The rough thinning can shorten the time of subsequent fine thinning, thereby improving the efficiency of subsequent fine thinning.

[0088] For example, in one example, the fine thinning process on the second substrate 102 includes a polishing process on the second substrate 102, which can be a chemical mechanical polishing process. The chemical mechanical polishing process can quickly thin the second substrate 102 and make the polished surface smoother and flatter by virtue of the abrasive action of ultrafine particles and the chemical corrosion action of the slurry. For example, the chemical mechanical polishing can use silica colloidal polishing.

[0089] For example, in one example, the first substrate 101 and the second substrate 102 are both silicon substrates, and the bonding of the second substrate 102 and the first substrate 101 to seal the recess structure includes bonding the Si-O bonds in the remaining part of the first oxide layer on the first substrate 101 and the Si-Si bonds on the second substrate 102.

[0090] For example, after the bonding of the silicon-oxygen bonds (Si-O bonds) on the first substrate 101 and the silicon-silicon bonds (Si-Si bonds) on the second substrate 102, the contact area of the bonded part of the first substrate 101 and the second substrate 102 is reduced due to the presence of the cavity structure in the first substrate 101, and the layer structure formed subsequently on the cavity structure is only supported by the second substrate 102. When using a coarse thinning process, the mechanical grinding force is large, and when the thickness of the second substrate 102 is reduced to less than 21 microns, if the mechanical grinding method is continued to thin the second substrate 102, the second substrate 102 will be damaged and broken. The embodiment of the present disclosure keeps the thickness of the second substrate 102 to be 21 microns to 30 microns after the coarse thinning process, and then performs subsequent fine thinning process, which can shorten the time of subsequent fine thinning process, thereby improving the efficiency of subsequent fine thinning process, to prepare a semiconductor substrate with a cavity structure, and the uniformity of the surface of the second substrate is good and effective defect control can be performed.

[0091] For example, in one example, before the fine thinning process on the second substrate 102, a Fourier infrared instrument is used to measure the thickness of the second substrate 102, so that the thickness of the second substrate 102 to be processed and the thickness of the second substrate 102 to be thinned in the subsequent fine thinning process can be accurately determined.

[0092] For example, in one example, the fine thinning process on the second substrate 102 includes multiple polishing processes on the second substrate 102, so that the thickness of the second substrate 102 to be thinned each time can be accurately determined to avoid excessive thinning of the second substrate 102 and cause irreparable damage. For example, a Fourier infrared instrument is used to measure the thickness of the second substrate 102 after each polishing process, so that the thickness of the second substrate 102 to be thinned can be more accurately determined.

[0093] Step S206: processing the second oxide layer on the second surface of the first substrate to remove the second oxide layer to form the semiconductor substrate.

[0094] For example, in combination with Figure 5 and Figure 6F processing the second oxide layer 1012 on the second surface of the first substrate 101 to remove the second oxide layer includes processing the second oxide layer with hydrofluoric acid. Processing the second oxide layer with hydrofluoric acid can also form the desired corner shape on the second substrate 102.

[0095] The method for preparing a semiconductor substrate provided by at least one embodiment of the present disclosure has at least the following technical effects:

[0096] (1) In the method for preparing a semiconductor substrate provided by the embodiments of the present disclosure, a low-cost but low-precision device is used, and the processing mode is ingeniously combined with multiple steps, so that the process effect brought by the improved scheme can be completely consistent with the effect of preparation by using imported new devices, thereby reducing the dependence on foreign high-end new devices, and the entire process does not require any foreign high-end equipment.

[0097] (2) In the method for preparing a semiconductor substrate provided by the embodiments of the present disclosure, devices with different functions are used to perform steps such as rough thinning, chemical mechanical polishing, and Fourier infrared measurement, thereby breaking through the obstacle of insufficient device capacity, so that the final process result can completely reach the same level as preparation by using foreign high-end devices, and the investment cost of fixed assets is about 1 / 3 or even lower than the cost of foreign high-end equipment. Moreover, since the steps can be performed step by step, the process flexibility is greatly improved, and the entire process steps cannot be performed due to a fault in a certain process link.

[0098] The following points need to be explained:

[0099] (1) In the drawings of the embodiments of the present disclosure, only the structures related to the embodiments of the present disclosure are involved, and other structures can be referred to the usual design.

[0100] (2) In the case of no conflict, the features in the same embodiment and different embodiments of the present disclosure can be combined with each other.

[0101] The above is only a specific implementation of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art can easily think of changes or replacements within the technical range disclosed by the present disclosure, which should be covered within the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.

Claims

1. A method for preparing a semiconductor substrate, comprising: A first substrate and a second substrate are provided, wherein both the first substrate and the second substrate are silicon substrates; The opposing first and second surfaces of the first substrate are oxidized to form a first oxide layer and a second oxide layer; The first surface of the first substrate is etched to form a groove structure, while retaining a portion of the first oxide layer; The second substrate and the first substrate are mated together to seal the groove structure and form a cavity structure; The second substrate is subjected to coarse thinning and fine thinning processes in sequence to make the thickness of the second substrate 5 micrometers to 20 micrometers; Before performing fine thinning on the second substrate, the thickness of the second substrate is measured using a Fourier transform infrared spectrometer to accurately determine the thickness at which the second substrate needs to be thinned in the subsequent fine thinning process. The fine thinning process of the second substrate includes multiple polishing processes of the second substrate. After each polishing process, the thickness of the second substrate is measured using the Fourier transform infrared spectrometer. The polishing process is a chemical mechanical polishing process, which is polishing with silica gel. The second oxide layer on the second surface of the first substrate is processed to remove the second oxide layer; The coarse thinning process for the second substrate includes thinning the second substrate to 21 micrometers to 30 micrometers by mechanical polishing; The coarse thinning process for the second substrate includes sequential coarse grinding and fine grinding.

2. The preparation method according to claim 1, wherein, The fine thinning process of the second substrate includes polishing the second substrate.

3. The preparation method according to claim 1, wherein, Oxidation treatment of the opposing first and second surfaces of the first substrate includes forming the first oxide layer and the second oxide layer using a high-temperature oxidation process.

4. The preparation method according to claim 1, wherein, Sealing the groove structure by mating the second substrate and the first substrate includes bonding the Si-O bonds in the portion of the first oxide layer retained on the first substrate to the Si-Si bonds on the second substrate.

5. The preparation method according to claim 1, wherein, The thickness of the first oxide layer is 0.5 micrometers to 1 micrometer.

6. The preparation method according to claim 1, wherein, After forming the first oxide layer and the second oxide layer, the first substrate is further subjected to an annealing process.

7. The preparation method according to claim 1, wherein, Processing the second oxide layer on the second surface of the first substrate to remove the second oxide layer includes treating the second oxide layer with hydrofluoric acid.

8. The preparation method according to claim 1, wherein, The process further includes cleaning the first and second substrates before oxidizing the opposing first and second surfaces of the first substrate.

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