Display panel and display device

Abstract

According to the display panel and the display device, the display panel comprises a central display area and at least one first cuttable area which are arranged in the first direction, and the first cuttable area is located on the side, close to a frame of the display panel, of the central display area; the display panel further comprises a plurality of cascaded shift register circuits, and the shift register circuits are located in the central display area. According to the invention, the shift register circuit is arranged in the central display area, so that the shift register circuit capable of working normally can be ensured when a small-size display panel is obtained through cutting, and conditions are provided for stable working of the display panel obtained after cutting. Besides, the shift register circuit is arranged in the central display area, so that conditions are provided for reducing the cutting limitation of the display panel, the product yield of the small-size display panel obtained by cutting is improved, the development cost is reduced, and the working efficiency of preparing the small-size display panel is improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] In the production of display panels, when large-sized display panels are recut to obtain small-sized display panels according to the market demand for different panel sizes, the problem of the small-sized display panels not being able to display normally after cutting may occur. Studies have found that the reason for this problem is that when cutting the display panel, the wiring materials of different film layers remain at the cutting point, resulting in a short circuit, or the drive control circuit and pixel circuit of the display panel are damaged due to cutting, so that the display panel obtained after cutting cannot work normally. In order to solve the above problems, relevant technicians will develop panels separately according to different size requirements, but this is costly in terms of cost and production efficiency. Summary of the invention

[0003] In view of this, the present application provides a display panel and a display device to solve the above problems.

[0004] In a first aspect, an embodiment of the present application provides a display panel, comprising a central display area and at least one first cuttable area arranged along a first direction, and the first cuttable area is located on a side of the central display area close to the frame of the display panel; the first direction is parallel to the plane where the display panel is located; the display panel also includes a plurality of cascaded shift register circuits, and the shift register circuit is located in the central display area.

[0005] In a second aspect, an embodiment of the present application provides a display device, comprising a display panel as provided in the above embodiment.

[0006] In the embodiment of the present application, setting the shift register circuit in the central display area is conducive to avoiding the shift register circuit being damaged or removed by cutting when it is located in the cutting area, resulting in the inability to perform normal cascade transmission between the shift register circuits; it is conducive to ensuring that when the display panel is cut to obtain a small-sized display panel, the small-sized display panel includes a shift register circuit that can work normally, thereby providing conditions for the stable operation of the display panel obtained after cutting. In addition, setting the shift register circuit in the central display area is also conducive to providing conditions for reducing the cutting restrictions of the display panel, which is conducive to improving the product yield of the small-sized display panel obtained by cutting, reducing the development cost for display panels of different sizes, and improving the work efficiency of preparing small-sized display panels. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0008] Figure 1 A display panel provided in an embodiment of the present application;

[0009] Figure 2 A schematic diagram of a small-sized display panel obtained by cutting provided in an embodiment of the present application;

[0010] Figure 3 Provided in the embodiments of this application Figure 1 Schematic diagram of the cross section along the A-A' direction;

[0011] Figure 4 A method provided in the embodiment of the present application Figure 1 Schematic diagram of the cross section along the B-B' direction;

[0012] Figure 5 A schematic plan view of another display panel provided in an embodiment of the present application;

[0013] Figure 6 A schematic diagram of a pixel circuit provided for an embodiment of the application;

[0014] Figure 7 A method provided in the embodiment of the present application Figure 5 Schematic diagram of the cross section along the C-C' direction;

[0015] Figure 8 A method provided in the embodiment of the present application Figure 5 A magnified schematic diagram of the middle area E1;

[0016] Fig. 9 A schematic plan view of another display panel provided in an embodiment of the present application;

[0017] Fig.10 A method provided in the embodiment of the present application Fig. 9 A magnified schematic diagram of the middle area E2;

[0018] Fig.11 A schematic plan view of another display panel provided in an embodiment of the present application;

[0019] Fig.12 A schematic plan view of another display panel provided in an embodiment of the present application;

[0020] Fig.13 A schematic diagram of a display device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0021] In order to better understand the technical solution of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0022] It should be clear that the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0023] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "an", "the" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.

[0024] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0025] In the description of this specification, it is necessary to understand that the words such as "substantially", "approximately", "approximately", "about", "roughly", "substantially" and the like described in the claims and embodiments of the present application refer to what can be generally recognized within a reasonable process operation range or tolerance range, rather than an exact value.

[0026] It should be understood that although the terms first, second, etc. may be used to describe directions, routings, pixel circuits, etc. in the embodiments of the present application, these should not be limited to these terms. These terms are only used to distinguish directions, routings, pixel circuits, etc. from each other. For example, without departing from the scope of the embodiments of the present application, the first direction may also be referred to as the second direction, and similarly, the second direction may also be referred to as the first direction. The applicant of this case has provided a solution to the problems existing in the prior art through careful and in-depth research.

[0027] Figure 1 A display panel provided in an embodiment of the present application, Figure 2 A schematic diagram of a small-sized display panel obtained by cutting provided in an embodiment of the present application.

[0028] The present application embodiment provides a display panel 100, such as Figure 1As shown, it includes a central display area A1 and at least one first cuttable area B1 arranged along a first direction X1, and the first cuttable area B1 is located on one side of the central display area A1 close to the frame of the display panel 100. The first direction X1 is parallel to the plane where the display panel 100 is located.

[0029] Combination Figure 2 As shown, a small-sized display panel 100' can be obtained by cutting along a cutting edge P1 from a display panel 100 of a public size. The cutting edge P1 coincides with the edge of the cut small-sized display panel 100'. The display panel 100 in the technical solution of the present application includes a first cuttable area B1. Taking the display panel 100 in the technical solution of the present application as a display panel of a public size as an example, a small-sized display panel 100' can be cut from the display panel 100. The cutting edge P1 is located in the first cuttable area B1, and the central display area A1 is located away from the frame of the display panel 100. When the display panel 100 is cut, it is beneficial to avoid the central display area A1 from being cut, thereby helping to ensure the product yield of the cut small-sized display panel 100'.

[0030] The display panel 100 further includes a plurality of cascaded shift register circuits 10, which can be used to transmit control signals to the display panel 100 and drive the display operation of the display panel 100. Therefore, for the display panel 100 or the small-sized display panel 100', including the shift register circuit 10 that can normally transmit the control signal is the basis for ensuring the normal operation of the display panel.

[0031] In the embodiment of the present application, setting the shift register circuit 10 in the central display area A1 is conducive to preventing the shift register circuit 10 from being damaged or removed by cutting when it is located in the cutting area B1, resulting in the inability to perform normal cascade transmission between the shift register circuits 10; it is conducive to ensuring that when the display panel 100 is cut to obtain a small-sized display panel 100', the small-sized display panel 100' includes a shift register circuit 10 that can work normally, thereby providing conditions for the stable operation of the display panel obtained after cutting. In addition, setting the shift register circuit 10 in the central display area A1 is also conducive to providing conditions for reducing the cutting restrictions of the display panel 100, which is conducive to improving the product yield of the small-sized display panel obtained by cutting, reducing the development cost for display panels 100' of different sizes, and improving the work efficiency of preparing small-sized display panels.

[0032] Figure 3 Provided in the embodiments of this application Figure 1 Schematic diagram of the cross section along the A-A' direction.

[0033] In one embodiment of the present application, Figure 1 , Figure 3As shown, the display panel 100 further includes a substrate 20 .

[0034] The display panel 100 further includes first wirings 30 , which are located on one side of the substrate 20 , and a plurality of first wirings 30 extend along a first direction X1 and are arranged along a second direction X2 . The second direction X2 intersects the first direction X1 and is parallel to the plane where the display panel 100 is located.

[0035] The display panel 100 further includes a first wiring 30 and a second wiring 40, wherein the second wiring 40 and the first wiring 30 are located on the same side of the substrate 20 and the second wiring 40 and the first wiring 30 are located on different conductive film layers. Optionally, the second wiring 40 is located on a side of the first wiring 30 away from the substrate 20. The plurality of second wirings 40 extend along the second direction X2 and are arranged along the first direction X1. Both the first wiring 30 and the second wiring 40 in the display panel 100 can be used to transmit electrical signals so that the display panel 100 works.

[0036] Continue to refer Figure 1 As shown, when a small-sized display panel 100' is cut from the display panel 100, it is necessary to cut along the cutting edge P1. The cutting edge P1 located in the first cuttable area B1 extends along the second direction X2. Optionally, the cutting edge P1 is arranged between two adjacent second wirings 40, which is helpful to avoid cutting the second wirings 40. Figure 1 As shown, if the cutting edge P1 is located on the second routing line 40, since there are multiple intersections between the first routing line 30 and the second routing line 40, the first routing line 30 overlaps with the second routing line 40 at the intersection position, and when the second routing line 40 is cut, the intersection position will also be cut. At the intersection position, the cutting action is likely to cause the routing material to remain, deform, etc., so that the first routing line 30 and the first routing line 30 are short-circuited at the intersection, thereby affecting the accuracy of signal transmission between the first routing line 30 and the second routing line 40. Therefore, setting the cutting edge P1 extending along the second direction X2 between two adjacent second routing lines 40 is also conducive to reducing the risk of short-circuiting the second routing line 40 and the first routing line 30 due to the cutting action, and improving the working stability of the display panel 100' obtained by cutting.

[0037] Optionally, the first wiring 30 is a scan line, and the output ends of the plurality of shift register circuits 10 arranged along the second direction X2 can be electrically connected to the first wiring 30, and the signal generated by the shift register circuit 10 is transmitted by the first wiring 30 to the pixel circuit 200 in the display panel 100 to control the display operation of the display panel 100. Optionally, the second wiring 40 can be a power line, and the power line can include a first power line PVDD and a second power line PVEE, collectively referred to as the second wiring 40 herein.

[0038] In the related art, the second wiring is usually arranged densely. When cutting the display panel along the cutting edge, due to the cutting error, it is easy to mistakenly cut the adjacent second wiring, causing a short circuit problem. However, the market demand for small-sized display panels 100' is diverse. When cutting a small-sized display panel 100' on the display panel, the requirements for the position positioning and cutting accuracy of the cutting edge are high. It is difficult to directly cut the display panel according to the required size and ensure the working stability of the display panel 100', which is not conducive to improving the working efficiency of producing display panels 100' of different sizes and improving the product yield of the display panel 100'.

[0039] In the embodiment of the present application, the number density of the second wirings 40 in the first cuttable area B1 is set to be smaller than the number density of the second wirings 40 in the central display area A1, which is conducive to increasing the distance between two adjacent second wirings 40 in the first cuttable area B1, and is conducive to providing a larger setting space for the cutting edge P1 between the two adjacent second wirings 40. When cutting along the cutting edge P1 between the two adjacent second wirings 40, the area of ​​the reserved cutting safety zone is also increased, which is conducive to reducing the risk of short circuit caused by cutting the second wiring 40; in addition, there may be some other circuit elements and wirings between the two connected second wirings 40. Reducing the number density of the second wirings 40 in the first cuttable area B1 is conducive to reserving avoidance space for the cutting edge P1 to avoid other circuit elements and wirings, thereby improving the product yield of the display panel 100' obtained by cutting.

[0040] In summary, the decrease in the number density of the second routing lines 40 within the first cuttable area B1 is conducive to reducing the difficulty of setting the position of the cutting edge P1, and can appropriately reduce the requirements for cutting accuracy, thereby improving the preparation efficiency of cutting the display panel 100 to obtain display panels 100' of different sizes, effectively saving the development time and preparation cost of the display panel 100', and at the same time providing a guarantee for the stable operation of the display panel 100'.

[0041] In some other embodiments, the cutting edge P1 includes a portion of the cutting edge extending along the first direction X1. Optionally, this portion of the cutting edge is set between two adjacent first wirings 30, which is conducive to avoiding cutting the first wiring 30, and is also conducive to reducing the risk of short circuiting the first wiring 30 and the second wiring 40 due to the cutting action, and improving the working stability of the display panel 100' obtained by cutting. Similarly, setting the number density of the first wirings 30 in the first cuttable area B1 to be smaller than the number density of the first wirings 30 in the central display area A1 is conducive to increasing the spacing between the two adjacent first wirings 30 in the cuttable area, so that the area of ​​the reserved cutting safety zone is also increased when cutting along the cutting edge between the two adjacent first wirings 30, which is conducive to reducing the risk of short circuiting caused by cutting the first wiring 30, and further improving the product yield of the display panel 100' obtained by cutting.

[0042] Figure 4 A method provided in the embodiment of the present application Figure 1 Schematic diagram of the cross section along the B-B' direction, Figure 5 A schematic plan view of another display panel provided in an embodiment of the present application is shown in FIG. Figure 6 A schematic diagram of a pixel circuit provided for an embodiment of the application.

[0043] In one embodiment of the present application, Figure 1 , Figure 4-Figure 5 As shown, the display panel 100 also includes a third routing line 50, and the third routing line 50 and the second routing line 40 are located on the same side of the substrate 20, and the third routing line 50 and the second routing line 40 are located in different conductive film layers. Optionally, the third routing line 50 and the first routing line 30 are located in the same conductive film layer. A plurality of third routing lines 50 extend along the first direction X1 and are arranged along the second direction X2, and the third routing line 50 is electrically connected to the second routing line 40. It can be seen from the above embodiment that the second routing line 40 can be a power line, and the power line arranged in the display panel 100 is usually arranged in a grid. The third routing line 50 is electrically connected to the second routing line 40. Optionally, the third routing line 50 is also a power line, and the third routing line 50 also includes a first power line PVDD and a second power line PVEE. The second routing line 40 and the third routing line 50 located in different film layers are electrically connected across the film layer to provide a power signal for the display panel 100.

[0044] Combination Figure 6 As shown, the central display area A1 and the first cuttable area B1 of the display panel 100 both include a pixel circuit 200, the pixel circuit 200 includes a first transistor M1, and the pixel circuit 100 includes multiple transistors M1. The pixel circuit 200 needs to receive a power signal to start working, so there is a transistor M1 that needs to be electrically connected to the power line.

[0045] In the embodiments of the present application, Figure 5 As shown, the first transistor M1 included in the pixel circuit 200 in the central display area A1 is electrically connected to the second wiring 40, and the first transistor M1 included in the pixel circuit 200 in the first cuttable area B1 is electrically connected to the third wiring 50, which is conducive to reducing the number density of the second wiring 40 located in the first cuttable area B1, and providing conditions for reserving more cutting safety areas in the first cuttable area B1. In addition, when the number of second wirings 40 in the display panel 100 is small, the first transistor M1 in the central display area A1 and the first transistor M1 in the first cuttable area B1 are electrically connected to the second wiring 40 and the third wiring 50 located in different film layers, which is conducive to reducing the electrical connection pressure of the second wiring 40, and is conducive to avoiding the electrical connection of a large number of transistors M1 on a small number of second wirings 40, and is conducive to balancing the number of transistors M1 electrically connected to the second wiring 40 and the third wiring 50, and providing a guarantee for the stable operation of the display panel 100.

[0046] Figure 7 A method provided in the embodiment of the present application Figure 5 Schematic diagram of the cross section along the C-C' direction.

[0047] In one embodiment of the present application, Figure 5 , Figure 7 As shown, the second wirings 40 are all located in the central display area A1 , and the third wirings 50 are electrically connected to the second wirings 40 in the central display area A1 through the via K1 , so that the second wirings 40 and the third wirings 50 form an electrically connected network structure.

[0048] In the embodiment of the present application, the second wiring 40 is not included in the first cuttable area B1, and the second wiring 40 is included in the central display area A1, which is conducive to providing a larger settable area for the cutting edge P1 extending along the second direction X2 in the first cuttable area B1, and reserving a larger cutting safety area, further reducing the cutting accuracy standard and cutting difficulty. In addition, the plurality of pixel circuits 100 in the display panel 100 are arranged in an array along the first direction X1 and the second direction X2. The pixel circuit 100 in the related art is adjacent to the second wiring 40 in the first direction X1. However, after the second wiring 40 is not included in the first cuttable area B1, it is conducive to increasing the available space on the opposite sides of the pixel circuit 100 in the first direction X1, thereby providing a space for the cutting edge P1 extending along the second direction X2 to avoid the pixel circuit 200, thereby reducing the risk of cutting and damaging the pixel circuit 200, and improving the display effect of the display panel 100' obtained by cutting.

[0049] Figure 8 A method provided in the embodiment of the present application Figure 5 Schematic enlargement of the middle area E1.

[0050] In one embodiment of the present application, continue to refer to Figure 5 As shown, the display panel 100 also includes a fourth routing line 60, and the fourth routing line 60 and the second routing line 40 are located on the same side of the substrate 20, and the fourth routing line 60 extends along the second direction X2 and is arranged along the first direction X1. At this time, the first cuttable area B1 includes the fourth routing line 60 but does not include the second routing line 40, and the available space between two adjacent fourth routing lines 40 becomes larger, and the cutting edge P1 extending along the second direction X2 is located between the two adjacent fourth routing lines 60.

[0051] Optionally, the fourth line 60 and the second line 40 are located in the same film layer of the display panel 100, and the fourth line 60 and the second line 40 are adjacent in the first direction X1. Optionally, the fourth line 60 may be a data signal line, and the fourth line 60 may be electrically connected to the pixel circuit 200. Optionally, a plurality of pixel circuits 200 arranged along the second direction X2 are all electrically connected to the same fourth line 60. The fourth line 60 may provide a data voltage to the pixel circuit 200, thereby adjusting the size of the light-emitting drive current generated by the pixel circuit 200.

[0052] Combination Figure 8 As shown, the distance between the pixel circuit 200 in the central display area A1 of the display panel 100 and the fourth wiring 60 electrically connected thereto is D1, and the distance between the pixel circuit 200 in the first cuttable area B1 and the fourth wiring 60 electrically connected thereto is D2, and D2<D1. The pixel circuit 200 is located between two adjacent fourth wirings 60 and is electrically connected to one of the two adjacent fourth wirings 60. In the related art, the distance between the pixel circuit 200 in the display panel 100 and the fourth wiring 60 electrically connected thereto is usually set to be similar or equal.

[0053] In the embodiment of the present application, setting D2<D1 is conducive to shortening the distance between the pixel circuit 200 located in the first cuttable area B1 and the fourth wiring 60 electrically connected thereto, thereby increasing the distance between the pixel circuit 200 and the fourth wiring 60 adjacent to and not electrically connected thereto in the first direction X1, thereby providing space conditions for the setting of the cutting edge P1. The available space on one side of the pixel circuit 200 is increased, and the cutting edge P1 extending along the second direction X2 is arranged in the space between the fourth wiring 60 adjacent to and not electrically connected to the pixel circuit 200 in the first direction X1, which is conducive to better avoiding the pixel circuit 200 by the cutting edge P1. In addition, it is conducive to reducing the risk of damaging the pixel circuit 200 by cutting the cutting edge P1, while also reducing the difficulty of cutting, thereby improving the working efficiency of the display panel 100' whose cutting work is stable in preparing the display panel 100, and reducing the preparation cost.

[0054] Fig. 9 A schematic plan view of another display panel provided in an embodiment of the present application.

[0055] In one embodiment of the present application, Figure 6 , Fig. 9 As shown, the central display area A1 includes a first pixel circuit 2001, and the first cuttable area B1 includes a second pixel circuit 2002. The first pixel circuit 2001 is used to drive the first pixel Pixel 1 located in the central display area A1, and the second pixel circuit 2002 is used to drive the second pixel Pixel 2 located in the first cuttable area B1. The first pixel circuit 2001 is electrically connected to the first wiring, the second wiring, and the fourth wiring. The first pixel circuit 2001 generates a light-emitting driving current under the control of multiple electrical signals, and the first pixel D1 performs light-emitting display after receiving the light-emitting driving current. The second pixel circuit 2002 is electrically connected to the first wiring, the third wiring, and the fourth wiring. The second pixel circuit 2002 generates a light-emitting driving current under the control of multiple electrical signals, and the second pixel D2 performs light-emitting display after receiving the light-emitting driving current.

[0056] The display panel 100 includes a central display area A1 and two first cuttable areas B1. Along the first direction X1, the two first cuttable areas B1 are respectively located on opposite sides of the central display area A1, which is conducive to making the central display area A1 located near the middle of the display panel 100, and is conducive to avoiding retaining the central display area A1 when cutting to obtain the display panel 100', thereby ensuring the stable operation of the display panel 100'. In addition, setting the central display area A1 to be located near the middle of the display panel 100 is conducive to making the display panel 100 adapt to various cutting requirements and reducing the development cost of the display panel 100.

[0057] In an embodiment of the present application, a fourth wiring 60 electrically connected to the second pixel circuit 2002 in the display panel 100 is located on a side of the second pixel circuit 200 close to the central display area A1. At this time, the second pixel circuits 200 located in the first cuttable area B1 are electrically connected to one of the two adjacent fourth wirings 60 close to the central display area A1, and the second pixel circuits 200 are closer to the fourth wiring 60 electrically connected thereto, which is conducive to achieving that the second pixel circuits 200 located on both sides of the central display area A1 on the first direction X1 are both arranged close to the central display area A1, which is conducive to retaining as many second pixel circuits 2002 as possible when the display panel 100' is cut, thereby improving the display effect of the display panel 100'.

[0058] At the same time, the cutting edges P1 are all located at a side of the second pixel circuit 2002 away from the central display area A1, which is conducive to further retaining multiple second pixel circuits 200 and ensuring the operability of the multiple second pixel circuits 200.

[0059] Fig.10A method provided in the embodiment of the present application Fig. 9 Schematic enlargement of the middle area E2.

[0060] In one embodiment of the present application, Fig. 9 , Fig.10 As shown, in the first cuttable area B1, the distance D2 between the fourth wiring 60 close to the central display area A1 and the second pixel circuit 2002 is smaller than the distance D3 between the fourth wiring 60 far from the central display area A1 and the second pixel circuit 2002. In combination with the above content, it can be known that the fourth wiring 60 close to the central display area A1 is electrically connected to the second pixel circuit 2002.

[0061] In the embodiment of the present application, setting D2<D3 is beneficial to increasing the distance between the second pixel circuit 2002 between the second pixel circuit 2002 of the second pixel circuit 2002 and the second pixel circuit 2002 of the second pixel circuit 2002 and the second pixel circuit 2002 of the second pixel circuit 2002 and the second pixel circuit 2002 of the second pixel circuit 200 and the second pixel circuit 20 ...

[0062] In one embodiment of the present application, continue to refer to Fig. 9 , Fig.10 As shown, in the first cuttable area B1, the distance between the fourth wiring 60 away from the central display area A1 and the second pixel circuit 2002 is D3, and D3 ≥ 100 μm, which is conducive to providing data reference for the setting of the first cuttable area B1 and improving the feasibility of the technical solution of the present application. In addition, setting D3 ≥ 100 μm is conducive to ensuring that the second pixel circuit 2002 is not damaged during cutting, which is conducive to providing more convenient conditions for cutting work, thereby improving cutting work efficiency and product qualification rate.

[0063] In one embodiment of the present application, continue to refer to Fig. 9 As shown, the central display area A1 includes a first symmetry axis Z1 , and the extension direction of the first symmetry axis Z1 is the same as the extension direction of the fourth wiring 60 .

[0064] In the embodiment of the present application, the fourth wiring 60 in the central display area A1 is symmetrically distributed with the first pixel circuit 2001 on opposite sides of the first symmetry axis Z1, and in part of the central display area A1 on one side of the first symmetry axis Z1, the fourth wiring 60 is located on the side of the electrically connected first pixel circuit 2001 close to the first symmetry axis. The plurality of fourth wirings 60 in the central display area A1 and the plurality of first pixel circuits 2001 are symmetrically arranged with respect to the first symmetry axis Z1, which is beneficial to improving the structural regularity of the display panel 100, and is beneficial to reducing the difficulty of manufacturing the display panel 100, and improving the manufacturability of the display panel 100. In addition, the first pixel circuit 2001 in the central display area A1 is also electrically connected to the fourth wiring 60 close to the side of the central display area A1, and the second pixel circuit 2002 in the first cuttable area B1 is also electrically connected to the fourth wiring close to the side of the central display area A1. It can be seen that the structures in the midline display area A1 and the first cuttable area B1 located on opposite sides of the first symmetry axis Z1 in the first direction X1 are arranged in alignment, which is beneficial to ensure the uniformity of the pixel circuit 200, ensure the display effect of the display panel 100, and improve the preparation efficiency of the display panel 100.

[0065] In one embodiment of the present application, continue to refer to Figure 1 As shown, the display panel 100 includes a fourth wiring 60 extending along the second direction X2 and arranged along the first direction X1, and the central display area A1 includes a first symmetry axis Z1, and the extension direction of the first symmetry axis Z1 is the same as the extension direction of the fourth wiring 60. Among them, a plurality of shift register circuits 10 are arranged along the second direction X2, and the first symmetry axis Z1 passes through the area where the shift register circuit 10 is located.

[0066] In addition, refer to Fig. 9 As shown, the first cuttable area B1 in the display panel 100 includes the fourth wiring 60 but does not include the second wiring 40 , and a plurality of shift register circuits 10 are arranged along the second direction X2 , and the first symmetry axis Z1 passes through the area where the shift register circuits 10 are located.

[0067] In the embodiment of the present application, setting the first symmetry axis Z1 to pass through the area where the shift register circuit 10 is located is beneficial for making the shift register circuit 10 as close to the middle of the display panel 100 as possible, and is beneficial for ensuring that the shift register circuit 10 is located on the display panel 100' when the display panel 100' is cut, thereby ensuring the normal operation of the display panel 100'.

[0068] In one embodiment of the present application, continue to refer to Figure 1 , Fig. 9As shown, along the second direction X2, the display panel 100 includes a first frame portion border1 and a second frame portion border2. Usually, a driving circuit such as a driving IC is set in at least one of the first frame portion border1 and the second frame portion border2 to provide a cascade driving signal for the shift register circuit 10.

[0069] The multiple cascaded shift register circuits 10 include a first shift register circuit 101 adjacent to the first border portion border1 in the second direction X2, and a second shift register circuit 102 adjacent to the second border portion border2 in the second direction X2. In the technical solution of the present application, the first border portion border1 includes a driver IC as an example for description.

[0070] During the operation of the driver IC, Fig.10 As shown, the driver IC can output a shift register circuit start signal to the first shift register circuit 101 , and a plurality of shift register circuits 10 arranged along the second direction X2 are sequentially started along a direction away from the first frame portion border1 .

[0071] Or, if Fig.11 As shown, the driver IC can output a shift register circuit start signal to the second shift register circuit 102 , and a plurality of shift register circuits 102 arranged along the second direction X2 are sequentially started along a direction close to the first frame portion border1 .

[0072] The above two methods of sequentially starting the shift register circuit 102 can both enable the shift register circuit 102 to output control signals that control the pixel circuit 200 to enter different working stages. The method of sequentially starting the shift register circuit 102 can be selected according to the actual structure and usage requirements of the display panel 100.

[0073] Fig.11 A schematic plan view of another display panel provided in an embodiment of the present application is shown in FIG. Fig.12 A schematic plan view of another display panel provided in an embodiment of the present application.

[0074] In one embodiment of the present application, Fig.11 As shown, the display panel 100 includes a central display area A1, a first cuttable area B1, and a second cuttable area B2. Fig.12 As shown, the display panel 100 includes a central display area A1, two first cuttable areas B1, and one second cuttable area B2.

[0075] Combination Fig.11 , Fig.12As shown, along the second direction X2, the second cuttable area B2 is located on the side of the central display area A1 toward the second frame portion border2. According to the size requirements of the display panel 100', the cutting edge P1 can also be located in the second cutting area B2, and the cutting edge P1 in the second cutting area P1 extends along the first direction X1.

[0076] When cutting along the cutting edge P1, at least part of the first frame portion border1 including the driver IC needs to be retained, so as to ensure that the shift register circuit 10 can receive the control signal and the display panel 100' obtained by cutting can work normally. The second cuttable area B2 is arranged on the side of the central display area A1 facing the second frame portion border2, which is conducive to avoiding the first frame portion border1 from being cut and removed, so as to ensure that the display panel 100' can work normally.

[0077] The driver IC outputs the shift register circuit start signal to the first shift register circuit 101, and the multiple shift register circuits 10 arranged along the second direction X2 are sequentially turned on in the direction away from the first border portion border1. After the second cuttable area B2 is cut and removed, it is obvious that the second shift register circuit 102 close to the second border portion border2 is also cut and removed. At this time, the path of the cascade signal from the second shift register circuit 102 to the first shift register circuit 1001 is sequentially turned on and there is a risk of being cut off.

[0078] In an embodiment of the present application, a driver IC is provided to output a shift register circuit start signal to the first shift register circuit 101, and a plurality of shift register circuits 10 arranged along the second direction X2 are sequentially turned on in a direction away from the first border portion border1. This is beneficial to avoiding a situation where the shift register circuit 10 in the display panel 100' obtained after the second cuttable area B2 of the display panel 100 is cut cannot be turned on, and is beneficial to ensuring that the plurality of shift register circuits of the cut display panel 100' can all operate normally.

[0079] In one embodiment of the present application, continue to combine Figure 1 , Figure 6 As shown, the present application takes the pixel circuit 200 as a 7T1C circuit as an example for explanation. The pixel circuit 200 includes a power supply voltage writing module 203, and the power supply voltage writing module 203 includes a transistor M1, and the first electrode of the transistor M1 is electrically connected to the first power line PVDD. From the above content, it can be known that the second line 40 may include the first power line PVDD and the second power line PVEE. The second line 40 can be used to transmit the power supply voltage. The second line 40 transmits the first power supply voltage to the power supply voltage writing module 203 to drive the pixel circuit 200 to start working.

[0080] Optionally, the output end of the pixel circuit 200 is electrically connected to the first pixel Pixel 1, the anode of the first pixel Pixel 1 receives the light-emitting driving current generated by the pixel circuit 200, and the cathode of the first pixel Pixel 1 is electrically connected to the second power line PVEE. The electrostatic signal in the pixel circuit 200 or the display panel 100 can be released through the second power line PVEE.

[0081] Similarly, the third wiring 50 has the same function as the second wiring 40, and the third wiring 50 also includes a first power line PVDD and a second power line PVEE, and the first power line PVDD is electrically connected to the power supply voltage writing module 203 in the pixel circuit 200. Optionally, the second power line PVEE is electrically connected to the cathode of the second pixel Pixel 2.

[0082] The gate of the transistor M1 in the power supply voltage writing module 201 is electrically connected to the first wiring 30. The first wiring 30 here can be used to transmit the first scanning signal S1 to the gate of the transistor M1. The first scanning signal S1 can be a light-emitting control signal. When the first wiring 30 transmits a valid first scanning signal S1, the power supply voltage writing module 201 is turned on, and the power supply voltage writing module 203 transmits the power supply voltage to the pixel circuit 200, driving the pixel circuit 200 to generate a light-emitting driving current.

[0083] The pixel circuit 200 further includes:

[0084] The driving transistor module 202 and the driving transistor module 204 include a transistor M1. When the driving transistor module 204 is turned on, the power supply voltage drives the transistor M1 in the driving transistor module 202 to generate a light-emitting driving current.

[0085] The first reset module 203 is electrically connected to the driving transistor module 202. The first reset module 203 includes a transistor M1. The gate of the transistor M1 is electrically connected to the first wiring 30. The first wiring 30 is used to transmit the second scanning signal S2. When the second scanning signal S2 transmitted by the first wiring 30 is a valid signal, the first reset module 205 is turned on, and the first reset module 203 transmits the first reset voltage Vref1 to the driving transistor module 202, which is used to reset the gate of the transistor M1 in the driving transistor module 202 to prepare for the next generation of the light-emitting driving current.

[0086] The threshold voltage compensation module 204 also includes a transistor M1, wherein the gate of the transistor M1 is electrically connected to the first wiring 30, wherein the first wiring 30 is used to transmit the third scanning signal S3. When the third scanning signal S3 transmitted by the first wiring 30 is a valid signal, the threshold voltage compensation module 204 is turned on to compensate the threshold voltage of the transistor M1 in the driving transistor module 202 to the gate of the transistor M1, so as to improve the accuracy of the light-emitting driving current generated by the driving transistor module 202.

[0087] The light-emitting control module 205 also includes a transistor M1, wherein the gate of the transistor M1 can also receive the first scanning signal S1 transmitted by the first wiring 30. When the first scanning signal S1 transmitted by the first wiring 30 is a valid signal, the light-emitting control module 205 and the power supply voltage writing module 201 are both turned on, and the light-emitting control module 205 transmits the light-emitting driving current to the pixel.

[0088] The data signal writing module 206 also includes a transistor M1, wherein the gate of the transistor M1 receives the third scanning signal S3 transmitted by the first wiring 30. When the first wiring 30 transmits a valid third scanning signal S3, the third scanning signal S4 controls the data signal writing module 206 to be turned on, and the data signal writing module 206 can transmit the data signal Vdata to the driving transistor module 202, so as to control the magnitude of the light-emitting driving current generated by the driving transistor module 202.

[0089] The second reset module 207 includes a transistor M1, wherein the gate of the transistor M1 can be electrically connected to the first wiring 30 transmitting the second scanning signal S2. When the first wiring 30 transmits a valid second scanning signal S2, the first reset module 203 and the second reset module 207 are both turned on. When the second reset module 207 is turned on, the second reset voltage Vref2 is transmitted to the anode of the pixel to reset the pixel, thereby preparing for the next accurate light emission of the pixel.

[0090] It should be noted that the first wiring 30 may represent multiple wirings for transmitting different scanning signals, and multiple wirings for transmitting scanning signals are collectively referred to as the first wiring 30. In addition, the multiple transistors M1 in the pixel circuit 200 may be the same transistors or multiple different transistors.

[0091] In one embodiment of the present application, continue to refer to Figure 1 , Figure 6As shown, the fourth wiring 60 is used to transmit the data signal Vdata. As can be seen from the above embodiment, the pixel circuit 200 includes a data signal writing module 206, and the first electrode of the transistor M1 in the data signal writing module 206 is electrically connected to the fourth wiring 60 to receive the data signal Vdata transmitted by the fourth wiring 60. When the data signal writing module 206 is turned on, the transistor M1 transmits the data signal Vdata from the first electrode to the second electrode, and the second electrode of the transistor M1 is electrically connected to the driving transistor module 202, and then the data signal writing module 206 transmits the data signal Vdata to the driving transistor module 202.

[0092] Fig.13 A schematic diagram of a display device provided in an embodiment of the present application.

[0093] The embodiment of the present application provides a display device 300, such as Fig.13 As shown, the display device includes the display panel 100 provided in the above embodiment, and the display device 300 can be a computer, a television, a mobile phone, a watch and other equipment.

[0094] In the display device 300, setting the shift register circuit 10 in the central display area A1 is conducive to preventing the shift register circuit 10 from being damaged or removed by cutting when it is located in the cutting area B1, resulting in the inability to perform normal cascade transmission between the shift register circuits 10; it is conducive to ensuring that when the display panel 100 is cut to obtain a small-sized display panel 100', the small-sized display panel 100' includes a shift register circuit 10 that can work normally, thereby providing conditions for the stable operation of the display panel obtained after cutting. In addition, setting the shift register circuit 10 in the central display area A1 is also conducive to providing conditions for reducing the cutting restrictions of the display panel 100, which is conducive to improving the product yield of the small-sized display panel obtained by cutting, reducing the development cost for display panels 100' of different sizes, and improving the work efficiency of preparing small-sized display panels.

[0095] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A display panel, It is characterized in that It comprises a central display area and at least one first cuttable area arranged along a first direction, and the first cuttable area is located on a side of the central display area close to the frame of the display panel; the first direction is parallel to the plane where the display panel is located; The display panel further includes a plurality of cascaded shift register circuits, and the shift register circuits are located in the central display area.

2. A display panel, according to claim 1, It is characterized in that The display panel further includes: substrate; A first routing line, the first routing line is located at one side of the substrate, a plurality of the first routing lines extend along the first direction and are arranged along a second direction; the second direction intersects the first direction and is parallel to the plane where the display panel is located; a second routing line, wherein the second routing line and the first routing line are located on the same side of the substrate and the second routing line and the first routing line are located on different conductive film layers; a plurality of the second routing lines extend along a second direction and are arranged along the first direction; The number density of the second wirings in the cuttable area is smaller than the number density of the second wirings in the central display area.

3. The display panel according to claim 2, It is characterized in that The display panel further includes a third routing line, the third routing line and the second routing line are located on the same side of the substrate and the third routing line and the second routing line are located on different conductive film layers; a plurality of the third routing lines extend along the first direction and are arranged along the second direction, and the third routing line is electrically connected to the second routing line; Among them, the central display area and the first cuttable area both include pixel circuits, and the pixel circuit includes a first transistor; the first transistor included in the pixel circuit in the central display area is electrically connected to the second wiring, and the first transistor included in the pixel circuit in the first cuttable area is electrically connected to the third wiring.

4. The display panel according to claim 3, It is characterized in that The second wirings are all located in the central display area, and the third wirings are electrically connected to the second wirings in the central display area through vias.

5. The display panel according to claim 4, It is characterized in that The display panel further includes a fourth routing line, the fourth routing line and the second routing line are located on the same side of the substrate, the fourth routing line extends along the second direction and is arranged along the first direction; The distance between the pixel circuit in the central display area and the fourth wiring electrically connected thereto is D1, and the distance between the pixel circuit in the first cuttable area and the fourth wiring electrically connected thereto is D2, where D2<D1.

6. The display panel according to claim 5, It is characterized in that The central display area includes a first pixel circuit, and the first cuttable area includes a second pixel circuit; the first pixel circuit is used to drive a first pixel located in the central display area, and the second pixel circuit is used to drive a second pixel located in the first cuttable area; The display panel includes the central display area and two first cuttable areas; along the first direction, the two first cuttable areas are respectively located on opposite sides of the central display area; the fourth wiring electrically connected to the second pixel circuit is located on a side of the second pixel circuit close to the central display area.

7. The display panel according to claim 6, It is characterized in that In the first cuttable area, a distance between the fourth wiring close to the central display area and the second pixel circuit is smaller than a distance between the fourth wiring far from the central display area and the second pixel circuit.

8. The display panel according to claim 7, It is characterized in that In the first cuttable area, a distance between the fourth wiring far away from the central display area and the second pixel circuit is D3, and D3≥100 μm.

9. The display panel according to claim 6, It is characterized in that The central display area includes a first symmetry axis, and an extension direction of the first symmetry axis is the same as an extension direction of the fourth wiring; Among them, the fourth wiring in the central display area is symmetrically distributed with the first pixel circuit on opposite sides of the first symmetry axis; and in part of the central display area on one side of the first symmetry axis, the fourth wiring is located on the side of the electrically connected first pixel circuit close to the first symmetry axis.

10. The display panel according to claim 1 or 9, It is characterized in that The display panel includes a fourth wiring extending along a second direction and arranged along the first direction, the central display area includes a first symmetry axis, and the extension direction of the first symmetry axis is the same as the extension direction of the fourth wiring; Wherein, a plurality of the shift register circuits are arranged along the second direction, and the first symmetry axis passes through a region where the shift register circuits are located.

11. The display panel according to claim 10, It is characterized in that Along the second direction, the display panel includes a first frame portion and a second frame portion; the plurality of cascaded shift register circuits include a first shift register circuit adjacent to the first frame portion in the second direction, and also include a second shift register circuit adjacent to the second frame portion in the second direction; the first frame portion includes a driver IC; Among them, the driver IC can output a shift register circuit start signal to the first shift register circuit, and multiple shift register circuits arranged along the second direction are turned on in sequence along the direction away from the first border portion, or, the driver IC can output a shift register circuit start signal to the second shift register circuit, and multiple shift register circuits arranged along the second direction are turned on in sequence along the direction close to the first border portion.

12. The display panel according to claim 11, It is characterized in that The display panel includes the central display area and a second cuttable area; along the second direction, the second cuttable area is located on a side of the central display area facing the second frame portion; The driving IC outputs the shift register circuit start signal to the first shift register circuit, and the plurality of shift register circuits arranged along the second direction are sequentially started in a direction away from the first frame portion. 13 . The display panel according to claim 2 , wherein the second wiring is used to transmit a power supply voltage.

14. The display panel according to claim 6, It is characterized in that The fourth wiring is used to transmit data signals.

15. A display device, It is characterized in that Comprising a display panel as described in any one of claims 1-14.

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