Shield gate type device
By designing the increased width of the trench end and the bottom of the translation contact hole in the double diffusion metal oxide semiconductor shielded gate device of the separation gate, the dilemma between trench spacing and voltage resistance is solved, and the device's voltage resistance is improved The optimization of process design has enhanced the market competitiveness of the product.
Patent Information
- Application Number
- CN202310714588.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-06-14
- Publication Date
- 2024-12-17
AI Technical Summary
When designing a separation gate double diffusion metal oxide semiconductor shielded gate device, there is a dilemma between the trench spacing and the withstand voltage. The narrow trench spacing leads to difficult alignment of contact holes. The wide trench spacing leads to low breakdown voltage. , affecting the stability of product yield.
By designing that the end head width of the first groove structure is greater than the middle width, and the bottom of the contact hole is translated to avoid overlap, thereby reducing the area B between the grooves, enhancing the pressure resistance of the area B while maintaining the groove. The width of the middle part of the groove remains unchanged to ensure that the process window does not decrease.
It improves the voltage resistance and process design optimization of the device, improves the market competitiveness of the product, solves the problem of insufficient exhaust margin in the trench end area, and ensures the optimization of the process design combination of the cellular area.
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Figure CN119153496A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of semiconductor manufacturing, and in particular to a shielded gate type device. Background Art
[0002] When designing the layout of the shielded gate trench device (hereinafter referred to as SGT) formed by the split gate double diffused metal oxide semiconductor (Split Gate DMOS), it is generally considered that the layout distribution of the trench intersection will lead to the difference in the corrosion depth of the polycrystalline recess (depression), so the design of the trench intersection pattern is generally avoided. As a result, there will always be a terminal (the end point of the strip trench) in the trench layout.
[0003] Figure 1 is a schematic diagram of an exemplary SGT groove layout, including a laterally extending groove 120 and a longitudinally extending groove 110, the end of which is Figure 1 The arrows indicate the structures. Figure 1 The structure at the bottom of each groove 110 and the structure at the left and right sides of the groove 120 are omitted.
[0004] When designing the SGT trench layout, it is easy to encounter the trench spacing (also called MESA, i.e. Figure 1 The SGT structure is a dilemma between x) and withstand voltage (breakdown voltage, BV). Figure 1 Contact holes need to be arranged between adjacent trenches 110, so when the MESA is narrow, the alignment of the contact holes becomes very important, and when the MESA is narrow, the process window of the contact holes is relatively small. If the width of the MESA is increased to increase the margin of the process window, the breakdown voltage will be low, resulting in unstable product yield (prone to yield failure). Summary of the invention
[0005] Based on this, it is necessary to provide a shielded gate device that can take into account both the device withstand voltage and the process window of the contact hole.
[0006] A shielded gate device comprises: a plurality of first groove structures extending along a first direction; a second groove structure extending along a second direction; a conductive structure located in a contact hole, wherein the bottom of the contact hole is located between adjacent first groove structures; wherein the first end of each first groove structure is arranged close to the second groove structure, each first groove structure comprises a middle portion and an end portion located at the first end, the width of the end portion of each first groove structure is greater than the width of the middle portion of the same first groove structure, the spacing between the end portions of adjacent first groove structures is less than x, and the spacing between each end portion and the second groove structure is less than x, where x is the spacing between the middle portions of the adjacent first groove structures; the bottom of the contact hole extends along the first direction, and the bottom of the contact hole has a distance greater than zero from the end portion closest to the contact hole in the first direction, so that the bottom of the contact hole and the end portion closest to the contact hole do not overlap in the first direction after translation along the second direction; the first direction is not parallel to the second direction.
[0007] The above-mentioned shielded gate type device reduces the area between the MESA and the second trench structure (hereinafter referred to as region B) by increasing the end portion of the first trench structure. Such a design can reduce region B while keeping the width of the MESA in the middle of the first trench structure unchanged. Since the voltage-resistant weak point of the device is located in region B, by reducing region B, it is equivalent to making the position near the center of region B closer to the first trench structure and the second trench structure, and strengthening the depletion of region B under the inversion effect of the shielding gate and other structures in the first trench structure and the second trench structure, thereby improving the voltage-resistant capacity of the PN junction of region B. Since no contact hole is provided near the end portion, increasing the end portion will not result in a smaller process window. Thereby, it is possible to ensure that the cell area of the device achieves an optimized process design combination, thereby improving the market competitiveness of the product.
[0008] In one embodiment, the shielded gate device also includes: a first conductive type region; a body region, located between adjacent first trench structures and between each of the first trench structures and the second trench structure, and having a second conductive type; the first conductive type and the second conductive type are opposite conductive types; a source region, located in the body region, and having a first conductive type; wherein the conductive structure is electrically connected to the source region; the multiple first trench structures and the second trench structure are located in the first conductive type region, and shielding gates and trench gates are formed in the multiple first trench structures and the second trench structures.
[0009] In one embodiment, each of the first groove structures further includes a transition portion, one end of the transition portion is connected to the end portion, and the other end is connected to the middle portion, and the width of the transition portion gradually increases from the width of the middle portion of the first groove structure where it is located to the width of the end portion of the first groove structure where it is located.
[0010] In one embodiment, the first direction is perpendicular to the second direction.
[0011] In one embodiment, the distance between the end portions of adjacent first groove structures is 70% to 80% of x.
[0012] In one embodiment, the distance between the end portions of adjacent first groove structures is 80% of x.
[0013] In one embodiment, the distance between each end portion and the second groove structure is 70% to 80% of x.
[0014] In one embodiment, the distance between each end portion and the second groove structure is 70% of x.
[0015] In one of the embodiments, the length of the transition portion in the first direction is 0.5 micrometers.
[0016] In one embodiment, in each of the first trench structure and the second trench structure, the shield gate and the trench gate are insulated and isolated by a dielectric layer.
[0017] In one embodiment, the depth of the body region is not greater than the depth of each of the trench gates, and the depth of each of the shield gates is greater than the depth of the trench gates in the same first trench structure or the depth of the trench gates in the same second trench structure.
[0018] In one embodiment, the first conductivity type is N-type, and the second conductivity type is P-type. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] In order to better describe and illustrate the embodiments and / or examples of the inventions disclosed herein, reference may be made to one or more drawings. The additional details or examples used to describe the drawings should not be considered as limiting the scope of any of the disclosed inventions, the embodiments and / or examples currently described, and the best modes of these inventions currently understood.
[0020] Figure 1 is a schematic diagram of an exemplary SGT groove layout;
[0021] Figure 2 is a cross-sectional schematic diagram of an exemplary SGT;
[0022] Figure 3 It is a partial schematic diagram of the layout of the trench and contact hole of the shielded gate device according to one embodiment of the present application;
[0023] Figure 4 A cross-sectional schematic diagram of an SGT according to an embodiment of the present application;
[0024] Figure 5 FIG. 1 is a cross-sectional structure comparison between the second trench structure and the first trench structure in one embodiment of the present application. DETAILED DESCRIPTION
[0025] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present invention are shown in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive.
[0026] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items.
[0027] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers. "Connection" in this specification should be understood as "electrical connection", "communication connection" and the like if the connected circuits, modules, units, etc. have transmission of electrical signals or data to each other. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.
[0028] Spatially relative terms such as "under," "below," "below," "under," "above," "above," etc., may be used herein for ease of description to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that in addition to the orientations shown in the figures, the spatially relative terms are intended to include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, then the elements or features described as "under other elements" or "under" or "under" will be oriented as "on" the other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device may be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.
[0029] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be a limitation of the present invention. When used herein, the singular forms of "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It is understood that "at least one" refers to one or more, and "multiple" refers to two or more. "At least part of an element" refers to part or all of an element. It should also be understood that the terms "compose" and / or "comprise" when used in this specification determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.
[0030] Embodiments of the invention are described herein with reference to cross-sectional views that are schematic diagrams of ideal embodiments (and intermediate structures) of the invention. Thus, variations from the shapes shown due to, for example, manufacturing techniques and / or tolerances can be expected. Therefore, embodiments of the invention should not be limited to the specific shapes of the zones shown herein, but include shape deviations due to, for example, manufacturing. For example, an implanted region shown as a rectangle typically has rounded or curved features and / or an implant concentration gradient at its edges, rather than a binary change from an implanted region to a non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation is performed. Therefore, the regions shown in the figures are schematic in nature, and their shapes are not intended to show the actual shape of the region of the device and are not intended to limit the scope of the invention.
[0031] The semiconductor field vocabulary used in this article is technical vocabulary commonly used by technical personnel in this field. For example, for P-type and N-type impurities, in order to distinguish the doping concentration, P+ type represents P-type with heavy doping concentration, P-type represents P-type with medium doping concentration, P-type represents P-type with light doping concentration, N+ type represents N-type with heavy doping concentration, N-type represents N-type with medium doping concentration, and N-type represents N-type with light doping concentration.
[0032] Based on the above background technology, the inventor believes through experimental research that when the width of MESA is increased, the weak point of breakdown voltage is located at Figure 1 Area B in. Figure 2 FIG. 2 is a cross-sectional view of an exemplary SGT, including a substrate 210, an epitaxial layer 220, an oxide layer 232, a shield gate 234, a trench gate 236, a body region 242, a source region 244, a contact hole 252, a metal interconnect 254, and an interlayer dielectric layer 260. The shield gate 234 and the trench gate 236 are located in the trench (corresponding to Figure 1 In the trench 110 in the embodiment, an oxide layer 232 as a dielectric layer (insulating layer) is formed on the inner surface of the trench and between the shield gate 234 and the trench gate 236. Taking the N-channel DMOSFET as an example, Figure 1 The body region 242 in the 240 is a P well, which forms a PN junction with the (N-) epitaxial layer 220 below to bear the withstand voltage. This PN junction can obtain a stronger depletion effect under the inversion effect of the shielding gate 234, thereby having a stronger withstand voltage capability.
[0033] Please also see Figure 1 and Figure 2 , Figure 2 The depletion of the cell structure at the end must not only consider Figure 2 In addition to the depletion in the horizontal direction, we also need to consider the depletion in the direction perpendicular to the drawing (abbreviated as the Y-axis direction). The structure before and after the Y-axis direction at the end will affect the overall depletion.
[0034] Under the same process conditions and design rules, that is, when x=y, the depletion of region A only exists between adjacent trenches 110, while the depletion of the ends near region B exists between adjacent ends and between the ends and the trenches 120. The depletion difficulty of region A is lower than that of region B near the trench ends, and when the design BV margin of region A is small, the voltage-withstand weak point of the device is likely to appear in region B. Therefore, when the production line process fluctuates, it is easy to cause unstable product yield (on an exemplary production line, there is a 20% probability that the yield will be lower than 93%).
[0035] from Figure 1The top view of the trench distribution shows that the spacing of the trenches 110 in the cell is the same, and the MESA width x is the same everywhere, similar to a two-dimensional structure. There are shielding gates (located in the trenches) on both sides to assist in depletion. However, at the end position ( Figure 1 In the area B in the figure, MESA becomes a three-dimensional structure and only one side has grooves (i.e. groove 120), and the other three sides rely on the exhaustion fusion of other areas to achieve. Therefore, the exhaustion difficulty is increased compared to the cell. Figure 1 Region A in the figure is an easily depleted region. Under the same process conditions and design rules, the depletion difficulty of region A is lower than that of region B where the trench end is located. When the BV margin of region A is designed to be small, the device breakdown weak point is likely to appear in region B, which may lead to unstable product yield when the production line process fluctuates. However, increasing the depletion margin of region A through design may easily lead to a decline in product performance and loss of market competitiveness.
[0036] See also Figure 1 The horizontal repetition period of the cell can be called pitch. A pitch consists of two parts: the width of the trench and the trench spacing (MESA). The active area of the product is composed of these repeated units spliced horizontally. Figure 2 In the device structure shown, the current flow direction of each cell is Figure 2 In the up and down directions, all the cells are in parallel. The pressure between the source and the drain depends on the PN junction formed by the body region 242 and the epitaxial layer 220. This PN junction can be depleted with a higher average electric field strength under the inversion effect of the shielding gate 234, thereby improving the voltage resistance of the PN junction. Relying on simulation and process trials, technicians can obtain the maximum width requirement of MESA (if it is greater than this width, the BV will be insufficient) for a certain BV voltage resistance requirement under the conditions of specific N-epitaxial layer 220 doping concentration, trench depth, and trench gate 236 depth. However, when the MESA is too narrow, it will bring some control problems in the process, such as the CD (critical dimension) control and alignment problems of the contact hole 252. Therefore, subject to the process capabilities of the factory (fab), MESA has a minimum width setting.
[0037] When the MESA is very narrow, the alignment of the contact hole 252 and the MESA is particularly important. If the contact hole 252 is too close to the sidewall of the trench, the threshold voltage Vth of the product will be significantly offset. Therefore, in order to make the product competitive, the reserved process window will not be very large. For fabs with less advanced process and equipment capabilities, it will be close to its capability limit (for advanced fabs, there is still enough process window). Therefore, choosing the smallest possible MESA may cause unstable product parameters and thus low yield. Even if the process window is reserved, due to the different depletion conditions of area A and area B mentioned above, for products developed only according to two-dimensional simulation results, insufficient depletion may occur in area B ( Figure 1 where x=y).
[0038] The inventors of the present application consider that the contact hole 252 does not need to be provided in region B, so the requirement for the width of the MESA in region B is actually different from that in region A, that is, region B can be reduced. When the width of region B is reduced, the inversion capability of its shield gate 234 is enhanced. Therefore, under the same conditions, the depletion effect of region A can be achieved or even exceeded, thereby solving the problem of insufficient BV margin in region B.
[0039] Please also see Figure 2 and Figure 3 The present application proposes a shielded gate type device, which is a power device, comprising:
[0040] A plurality of first trench structures 310 extending along a first direction;
[0041] A second trench structure 320 extending along a second direction;
[0042] The conductive structure is located in the contact hole 252 , and the bottom of the contact hole 252 is located between adjacent first trench structures 310 .
[0043] The shielding gate 234 and the slot gate 236 are formed in each first trench structure 310. The second trench 320 may be provided with a slot gate or only a shielding gate. The cross-sectional structure of the second trench 320 can be referred to Figure 5 The dotted box part ( Figure 5The other grooves in the first groove structure 310 are first groove structures). The first end of each first groove structure 310 is arranged close to the second groove structure 320, and each first groove structure 310 includes a middle portion 316 and an end portion 312 located at the first end. The width of the end portion 312 of each first groove structure 310 is greater than the width of the middle portion 316 of the same first groove structure 310, and the spacing x1 between the end portions 312 of adjacent first groove structures 310 is less than x, and the spacing y1 between each end portion 312 and the second groove structure 320 is less than x, where x is the spacing between the middle portions of adjacent first groove structures 310. Figure 3 , the bottom of the contact hole 252 extends along the first direction, that is, the contact hole 252 is arranged parallel to the first trench structure 310 on the layout, and the first direction and the second direction are not parallel. Figure 3 In the embodiment shown, the first direction is the Y-axis direction in the figure, and the second direction is the X-axis direction. The bottom of the contact hole 252 has a distance greater than zero from the end portion closest to the contact hole 252 in the first direction, so that the bottom of the contact hole 252 and the end portion 312 closest to the contact hole 252 do not overlap in the first direction after translation along the second direction; that is, with the first direction as the coordinate axis, the coordinate interval of the contact hole 252 and the corresponding coordinate interval of the end portion 312 are completely non-overlapping. It should be noted that Figure 3 The left and right sides of the second trench structure 320 and the structure on the lower side of the first trench structure 310 (and the contact hole 252 ) are omitted.
[0044] The shielded gate device is constructed by enlarging the end of the first trench structure 310 ( Figure 3The enlarged area is shown separately in the figure), so that the area (area B) between the MESA and the second trench structure 320 is reduced. Such a design can reduce area B while keeping the width of the MESA in the middle 316 of the first trench structure 310 unchanged. Since the voltage-resistant weak point of the device is located in area B, by reducing area B, it is equivalent to making the position near the center of area B closer to the first trench structure 310 and the second trench structure 320, and strengthening the depletion of area B under the inversion effect of the shielding gate 234 and other structures in the first trench structure 310 and the second trench structure 320, thereby improving the voltage-resistant capacity of the PN junction of area B. Since no contact hole 252 is set near the end head 312, increasing the end head 312 will not cause the process window to become smaller. There is a situation where the process margin is different when the trench end area is depleted and the chip center cell area is depleted. Therefore, by optimizing the MESA size of the trench end area, the depletion margin of the trench end area can be made consistent with the cell in the center area of the chip. There is no need to sacrifice the cell design margin to solve the problem of insufficient trench end depletion margin. This ensures that the device's cell area achieves an optimized process design combination without having to make large-scale changes to the device's design. Good results can be achieved by simply strengthening the ends of the grooves, thereby improving the product's market competitiveness.
[0045] Reference Figure 2 In one embodiment of the present application, the shielded gate device further includes a first conductive type region (in Figure 2 In the illustrated embodiment, the conductive structure of the contact hole 252 corresponds to the epitaxial layer 220), the body region 242 and the source region 244. The body region 242 is located between adjacent first trench structures 310 and between each first trench structure 310 and the second trench structure 320, and has the second conductivity type. The source region 244 is located in the body region 242 and has the first conductivity type. The conductive structure in the contact hole 252 is electrically connected to the source region 244. Specifically, the contact hole 252 extends downward from above the source region 244 and passes through the source region 244. The conductive structure in the contact hole 252 is in direct contact with the source region 244 to form an electrical connection. Each first trench structure 310 and the second trench structure 320 is located in the epitaxial layer 220. In Figure 2 In the illustrated embodiment, the first conductivity type is N-type, and the second conductivity type is P-type; in other embodiments, the first conductivity type may be P-type, and the second conductivity type may be N-type.
[0046] exist Figure 3In the illustrated embodiment, each first trench structure 310 further includes a transition portion 314. One end of the transition portion 314 is connected to the end portion 312, and the other end is connected to the middle portion 316. The width of the transition portion 314 gradually increases from the width of the middle portion of the first trench structure 310 where it is located to the width of the end portion 312 of the first trench structure 310 where it is located. In one embodiment of the present application, the length of the transition portion 314 in the first direction (Y-axis direction) is 0.5 microns; in other embodiments, the transition portion 314 of other sizes may also be set according to the actual structure of the device.
[0047] Under different process design combinations of area A, the size of area B to be adjusted is also different. In conventional layout design, Figure 1 x is consistent with y. In one embodiment of the present application, the spacing x1 between adjacent end portions 312 is 70% to 80% of x; further, x1 is 80% of x. In one embodiment of the present application, the spacing y1 between each end portion 312 and the second groove structure 320 is 70% to 80% of x (when x=y, y1 is 70% to 80% of y); further, y1 is 80% of x, that is, y1 is 80% of y. In one embodiment of the present application, x1 / x=80%, y1 / y=70%. In one embodiment of the present application, the expansion of the end portion 312 in the X-axis direction is to thicken the dielectric layer (i.e., the oxide layer 232) in the first groove structure 310; the expansion of the end portion 312 in the Y-axis direction is to lengthen the groove, and the end of the end portion 312 in the Y-axis direction can be an arc or a right angle. The expansion of the end portion 312 in the X-axis direction may be an overall expansion, and the expansion in the Y-axis direction may be an arc-shaped or right-angled expansion of a deep groove.
[0048] In one embodiment of the present application, the depth of the body region 242 is not greater than the depth of each trench gate 236 , and the depth of each shield gate 234 is greater than the depth of the trench gate 236 in the same first trench structure 310 / the same second trench structure 320 .
[0049] In one embodiment of the present application, the shielded gate device further includes a substrate 210 , and the epitaxial layer 220 is located on the substrate 210 .
[0050] On the other hand, the shape of the end of the groove is affected by the optical proximity effect (OPC) and will be slightly smaller than the actual size. At the same time, dry etching is also affected by the load effect, which will cause the etching morphology of the end groove to deviate from the ideal. The split gate uses the RESURF effect to improve the voltage resistance, and the spacing and depth of the grooves have a great influence on the voltage resistance. Therefore, if this part is not processed, the performance limit of the process structure that can be covered by the design will be reduced. The present application can compensate for the impact of the optical proximity effect on the end size by expanding the shape of the groove end, and can also reduce the impact of the corrosion load effect on the depth. Increasing the product process limit capability is equivalent to increasing the window tolerance of the existing process.
[0051] Figure 4 FIG. 1 is a cross-sectional schematic diagram of an SGT of an embodiment of the present application. In other embodiments of the present application, the trench structure of the shielded gate device may be Figure 2 and Figure 4 The formal combination is based on the groove structure shown.
[0052] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.
[0053] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0054] The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.
Claims
1. A shielded gate device, characterized in that: include: A plurality of first groove structures extending along a first direction; A second groove structure extending along a second direction; A conductive structure is located in the contact hole, wherein the bottom of the contact hole is located between adjacent first trench structures; Wherein, the first end of each of the first groove structures is arranged close to the second groove structure, each of the first groove structures includes a middle portion and an end portion located at the first end, the width of the end portion of each first groove structure is greater than the width of the middle portion of the same first groove structure, the spacing between the end portions of adjacent first groove structures is less than x, and the spacing between each end portion and the second groove structure is less than x, where x is the spacing between the middle portions of the adjacent first groove structures; The bottom of the contact hole extends along the first direction, and the bottom of the contact hole has a distance greater than zero from the end head closest to the contact hole in the first direction, so that the bottom of the contact hole and the end head closest to the contact hole do not overlap in the first direction after being translated along the second direction; the first direction is not parallel to the second direction.
2. The shielded gate device according to claim 1, characterized in that: Also includes: a first conductivity type region; a body region, located between adjacent first trench structures and between each of the first trench structures and the second trench structure, having a second conductivity type; the first conductivity type and the second conductivity type are opposite conductivity types; a source region, located in the body region and having a first conductivity type; The conductive structure is electrically connected to the source region, the multiple first trench structures and the second trench structure are located in the first conductive type region, and shielding gates and trench gates are formed in the multiple first trench structures and the second trench structure.
3. The shielded gate device according to claim 1, characterized in that: Each of the first groove structures also includes a transition portion, one end of which is connected to the end portion and the other end is connected to the middle portion, and the width of the transition portion gradually increases from the width of the middle portion of the first groove structure where it is located to the width of the end portion of the first groove structure where it is located.
4. The shielded gate device according to claim 1, characterized in that: The first direction is perpendicular to the second direction.
5. The shielded gate device according to claim 1, characterized in that: The distance between the end portions of adjacent first groove structures is 70% to 80% of x.
6. The shielded gate device according to claim 1, characterized in that: The distance between each end portion and the second groove structure is 70% to 80% of x.
7. The shielded gate device according to claim 1, characterized in that: In each of the first trench structure and the second trench structure, the shield gate and the trench gate are insulated and isolated by a dielectric layer.
8. The shielded gate device according to claim 3, characterized in that: The length of the transition portion in the first direction is 0.5 micrometers.
9. The shielded gate device according to claim 2, characterized in that: The depth of the body region is not greater than the depth of each of the trench gates, and the depth of each of the shield gates is greater than the depth of the trench gates in the same first trench structure or the depth of the trench gates in the same second trench structure.
10. The shielded gate device according to claim 1, characterized in that: The first conductivity type is N type, and the second conductivity type is P type.
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