A synchronous rectification circuit and method for bidirectional CLLC resonant converters

Abstract

The application relates to the field of DC / DC converters, and aims to provide a synchronous rectification circuit and method applied to a bidirectional CLLC resonant converter. The synchronous rectification circuit comprises a high-speed current sampling circuit, a zero-crossing point detection circuit, a timer circuit, a logic processing circuit and a driving circuit; the application detects the change state of the resonant current on the secondary side, guarantees the reliable action of the switch tube according to the delay signal of the timer, and can avoid the misoperation of the switch tube caused by the parasitic oscillation of the circuit. The application improves the accuracy and reliability of the synchronous rectification, does not need to perform complex calculation, has the characteristics of wide application range and good anti-interference performance. The application can realize the synchronous rectification in the same cycle through the real-time detection of the resonant current on the secondary side, and improves the conversion efficiency of the converter.

Description

Technical Field

[0001] This invention belongs to the field of power electronic converter technology, and relates to a synchronous rectification circuit and control strategy for a bidirectional CLLC resonant converter. Background Technology

[0002] In the application fields of new energy sources such as distributed energy storage, DC microgrids, and electric vehicles, the key issue of power conversion is how to construct a bidirectional power electronic converter that can meet the requirements of bidirectional energy flow, high efficiency, and high power density. Among various bidirectional isolated converters, the CLLC resonant converter, which is based on the improvement of the traditional unidirectional LLC resonant converter topology, is considered an ideal topology because it can achieve bidirectional energy flow, soft switching, and bidirectional operation.

[0003] In traditional bidirectional CLLC resonant converters, the secondary bridge is not driven by a signal and rectification is performed using its body diode. However, since the body diode often has a relatively high forward voltage drop, it results in high conduction losses, reducing the converter's efficiency. Employing a synchronous rectification strategy can effectively reduce the forward voltage drop during rectification, thereby reducing conduction losses on the rectifier side and improving converter efficiency.

[0004] For bidirectional CLLC resonant converters, traditional synchronous rectification strategies can be categorized into three types: theoretical calculation, voltage sensing, and current sensing. Theoretical calculation strategies directly calculate the turn-on and turn-off times of the synchronous rectifier diodes through prior modeling. This calculation requires accurate resonant parameters of the converter, relies heavily on the accuracy of the initial modeling, and places high demands on the performance of the digital controller. Furthermore, it is difficult to accurately calculate the resonant process during dynamic operation. Voltage sensing strategies determine the current polarity by detecting the drain-source voltage of the switching transistor, while current sensing strategies directly detect the secondary-side resonant current. Both strategies determine the conduction status of the secondary-side rectifier diodes based on the polarity of the secondary-side resonant current and generate the synchronous rectification drive signal accordingly. Both strategies are susceptible to parasitic oscillations in the circuit, causing malfunctions of the synchronous rectifier diodes and affecting the synchronous rectification effect.

[0005] It is evident that traditional synchronous rectification strategies for bidirectional CLLC resonant converters all have their own shortcomings, limiting their application in bidirectional CLLC resonant converters. Therefore, improvements to existing synchronous rectification techniques are necessary. Summary of the Invention

[0006] The purpose of this invention is to provide a synchronous rectification circuit for bidirectional CLLC resonant converters to overcome the shortcomings of the prior art.

[0007] The technical solution for achieving the objective of this invention is as follows: a synchronous rectification circuit applied to a bidirectional CLLC resonant converter, comprising a high-speed current sampling circuit, a zero-crossing detection circuit, a timer circuit, a logic processing circuit, and a drive circuit; wherein, the high-speed current sampling circuit includes a current transformer, a detection resistor, and a differential amplifier circuit; the primary side of the current transformer is connected in series with the secondary side of the CLLC resonant converter for detecting the resonant current on the secondary side of the converter; the detection resistor is connected in parallel with the secondary side of the current transformer for converting the detected resonant current signal into a voltage signal; the differential amplifier circuit is used to amplify and offset the voltage signal across the detection resistor; the zero-crossing detection circuit is connected to the output terminal of the differential amplifier circuit for generating a zero-crossing signal of the secondary resonant current; the timer circuit is connected to the output terminal of the zero-crossing detection circuit and starts working in response to the zero-crossing signal; the output terminal of the timer circuit is connected to the input terminal of the logic processing circuit and the input terminal of the drive circuit respectively, the output signal of the timer circuit serves as the enable signal of the drive circuit, and the logic processing circuit processes the output signal of the timer circuit to control the timer circuit to turn off.

[0008] This invention also proposes a synchronous rectification method for bidirectional CLLC resonant converters, the specific steps of which are as follows:

[0009] (1) Obtain the proportionally reduced secondary side resonant current through a current transformer;

[0010] (2) Convert the detected resonant current signal into a voltage signal and amplify and offset it;

[0011] (3) Compare the output of the differential operational amplifier circuit with the bias voltage to obtain the zero-crossing signal of the secondary side resonant current;

[0012] (4) Determine the start time of the timer based on the conduction information of the anti-parallel diode of the secondary-side switching transistor;

[0013] (5) Determine the turn-off time of the synchronous rectification signal of the secondary-side switch based on the timer signal;

[0014] (6) Determine the turn-on time of the synchronous rectification signal of the secondary-side switch and the turn-off time of the timer signal based on the primary-side switch drive signal;

[0015] (7) In each subsequent switching cycle, the controller determines the turn-on and turn-off times of the switching transistor in this cycle according to steps (1) to (6) based on the detected secondary side current polarity and the original drive signal information.

[0016] Preferably, the bidirectional CLLC resonant converter includes a full-bridge inverter circuit, a resonant circuit, and a full-bridge rectifier circuit connected in sequence. The full-bridge rectifier circuit includes a fifth secondary-side switch S5, a fifth anti-parallel diode D5 connected in parallel with the fifth secondary-side switch S5, and a fifth parasitic capacitance C5 on the secondary side; a sixth secondary-side switch S6, a sixth anti-parallel diode D6 connected in parallel with the sixth secondary-side switch S6, and a sixth parasitic capacitance C6 on the secondary side; the secondary-side... The seventh switch S7, the seventh anti-parallel diode D7 connected in parallel with the seventh switch S7 on the secondary side, and the seventh parasitic capacitor C7 on the secondary side; the eighth switch S8 on the secondary side, the eighth anti-parallel diode D8 connected in parallel with the eighth switch S8 on the secondary side, and the eighth parasitic capacitor C8 on the secondary side; the fifth switch S5 and the sixth switch S6 on the secondary side are connected in series to form the first bridge arm on the secondary side; the seventh switch S7 and the eighth switch S8 on the secondary side are connected in series to form the second bridge arm on the secondary side.

[0017] The full-bridge inverter circuit consists of a primary-side first switch S1, a primary-side first anti-parallel diode D1 connected in parallel with the primary-side first switch S1, and a primary-side first parasitic capacitor C1; a primary-side second switch S2, a primary-side second anti-parallel diode D2 connected in parallel with the primary-side second switch S2, and a primary-side second parasitic capacitor C2; a primary-side third switch S3, a primary-side third anti-parallel diode D3 connected in parallel with the primary-side third switch S3, and a primary-side third parasitic capacitor C3; a primary-side fourth switch S4, a primary-side fourth anti-parallel diode D4 connected in parallel with the primary-side fourth switch S4, and a primary-side fourth parasitic capacitor C4; the primary-side first switch S1 and the primary-side second switch S2 are connected in series to form the primary-side first bridge arm, and the primary-side third switch S3 and the primary-side fourth switch S4 are connected in series to form the primary-side second bridge arm.

[0018] Preferably, the output of the differential operational amplifier circuit is biased with a DC voltage V. ref The specific method for obtaining the zero-crossing signal of the secondary side resonant current through comparison is as follows:

[0019] The output of the differential operational amplifier current is compared with the bias voltage V. ref When comparing, when V c >V ref At that time, V c =1, at this time, the fifth anti-parallel diode D5 connected in parallel with the fifth switch S5 on the secondary side and the eighth anti-parallel diode D8 connected in parallel with the eighth switch S8 on the secondary side are in the on state; when V c <V ref At that time, V c =0, at this time the sixth anti-parallel diode D6 connected in parallel with the sixth switch S6 on the secondary side and the seventh anti-parallel diode D7 connected in parallel with the seventh switch S7 on the secondary side are in the conducting state.

[0020] Preferably, the specific method for determining the timer's start time based on the conduction information of the anti-parallel diode of the secondary-side switching transistor is as follows:

[0021] When the resonant current crosses zero, the signal is from V c =1 becomes V c When the resonant current on the secondary side changes from positive to zero at time t1, the timer t in the timer circuit is triggered. clk1 The zero-crossing signal of the resonant current is determined by V. c =0 becomes V c When the resonant current on the secondary side changes from negative to zero at time t2, the timer t in the timer circuit is triggered. clk2 .

[0022] Preferably, the specific method for determining the turn-off time of the synchronous rectification signal of the secondary-side switching transistor based on the timer signal is as follows:

[0023] The zero-crossing point t1 where the resonant current changes from positive to zero is the timer signal t. clk1 At the start time, the fifth and eighth switches on the secondary side are turned off, and the timer signal t is activated. clk1 During the timing period, the fifth and eighth switches on the secondary side remain in the off state; the zero-crossing point t2 where the resonant current changes from negative to zero is the timer signal t. clk2 At the start time, the sixth and seventh switches on the secondary side are turned off, and the timer signal t is activated. clk2 During the timing period, the sixth and seventh switches on the secondary side remain in the off state.

[0024] Preferably, the specific method for determining the turn-on time of the synchronous rectification signal of the secondary-side switching transistor and the turn-off time of the timer signal based on the primary-side switching transistor drive signal is as follows:

[0025] The original drive signals of the fifth switch S5 and the eighth switch S8 on the secondary side are consistent with the drive signals of the first switch S1 and the fourth switch S4 on the primary side; the original drive signals of the sixth switch S6 and the seventh switch S7 on the secondary side are consistent with the drive signals of the second switch S2 and the third switch S3 on the primary side; when the turn-on signal of the sixth and seventh switches on the secondary side arrives, i.e., at time t3, the timer t is turned off. clk1 When the turn-on signal of the fifth and eighth switches on the secondary side arrives, i.e., at time t4, the timer t is turned off. clk2 .

[0026] Compared with the prior art, the beneficial effects of the present invention are:

[0027] (1) The present invention is built using analog circuits, which has a rapid control response and can achieve synchronous rectification operation within the same cycle, thereby achieving a better synchronous rectification effect under various operating conditions.

[0028] (2) The present invention does not require complex calculations and can avoid the uncertainty caused by circuit parasitic oscillations, thus improving the ease of implementation and reliability of synchronous rectification.

[0029] (2) The present invention decouples the synchronous rectification current from the converter closed-loop control, and controls the synchronous rectification separately, without increasing the complexity of the converter closed-loop control. Attached Figure Description

[0030] The specific embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.

[0031] Figure 1 This is a circuit diagram of the controlled object bidirectional CLLC resonant converter of the present invention.

[0032] Figure 2 This is the second circuit diagram of the controlled object bidirectional CLLC resonant converter of the present invention.

[0033] Figure 3 This is the third circuit diagram of the controlled object bidirectional CLLC resonant converter of the present invention.

[0034] Figure 4 This is a basic schematic diagram of the synchronous rectification circuit of the bidirectional CLLC resonant converter proposed in this invention.

[0035] Figure 5 This is the theoretical waveform diagram of the synchronous rectification strategy of the bidirectional CLLC resonant converter proposed in this invention when the converter is operating in under-resonant mode. Detailed Implementation

[0036] The present invention will be further described below with reference to specific embodiments, but the scope of protection of the present invention is not limited thereto.

[0037] Figure 1 , Figure 2 , Figure 3The diagram shows a bidirectional CLLC resonant converter as the controlled object. The bidirectional CLLC resonant converter includes a full-bridge inverter circuit, a resonant circuit, and a full-bridge rectifier circuit connected in sequence. The full-bridge rectifier circuit includes a fifth secondary-side switch S5, a fifth secondary-side anti-parallel diode D5 connected in parallel with the fifth secondary-side switch S5, and a fifth secondary-side parasitic capacitor C5; a sixth secondary-side switch S6, a sixth secondary-side anti-parallel diode D6 connected in parallel with the sixth secondary-side switch S6, and a sixth secondary-side parasitic capacitor C5; and a sixth secondary-side switch S6, a sixth secondary-side anti-parallel diode D6 connected in parallel with the sixth secondary-side switch S6, and a sixth secondary-side parasitic capacitor C5. The secondary side has a parasitic capacitor C6; a seventh switch S7 on the secondary side, a seventh anti-parallel diode D7 connected in parallel with the seventh switch S7 on the secondary side, and a seventh parasitic capacitor C7 on the secondary side; a eighth switch S8 on the secondary side, a eighth anti-parallel diode D8 connected in parallel with the eighth switch S8 on the secondary side, and a eighth parasitic capacitor C8 on the secondary side; the fifth switch S5 and the sixth switch S6 on the secondary side are connected in series to form the first bridge arm on the secondary side; and the seventh switch S7 and the eighth switch S8 on the secondary side are connected in series to form the second bridge arm on the secondary side.

[0038] The full-bridge inverter circuit consists of a primary-side first switch S1, a primary-side first anti-parallel diode D1 connected in parallel with the primary-side first switch S1, and a primary-side first parasitic capacitor C1; a primary-side second switch S2, a primary-side second anti-parallel diode D2 connected in parallel with the primary-side second switch S2, and a primary-side second parasitic capacitor C2; a primary-side third switch S3, a primary-side third anti-parallel diode D3 connected in parallel with the primary-side third switch S3, and a primary-side third parasitic capacitor C3; a primary-side fourth switch S4, a primary-side fourth anti-parallel diode D4 connected in parallel with the primary-side fourth switch S4, and a primary-side fourth parasitic capacitor C4; the primary-side first switch S1 and the primary-side second switch S2 are connected in series to form the primary-side first bridge arm, and the primary-side third switch S3 and the primary-side fourth switch S4 are connected in series to form the primary-side second bridge arm.

[0039] The resonant circuit of the CLLC resonant converter has three structures: one symmetrical structure and two asymmetrical structures. Figure 1 The diagram shows a symmetrical structure of a resonant circuit, which includes a first resonant inductor L on the primary side. r1 The first resonant capacitor C on the original side r1 Second resonant inductor L on the secondary side r2 Second resonant capacitor C on the secondary side r2 And a transformer with a turns ratio of n:1; the first resonant inductor L on the primary side. r1 The first resonant capacitor C on the original side r1 The second resonant inductor L is connected in series on the primary side of the transformer; r2 With the second resonant capacitor C on the secondary side r2 Connected in series on the secondary side of the transformer; Figure 2 , Figure 3 The diagram shows the asymmetric structure of a resonant circuit. Figure 2In the asymmetric structure shown, the resonant circuit includes a first resonant inductor L on the primary side. r1 The first resonant capacitor C on the original side r1 Second resonant capacitor C on the secondary side r2 And a transformer with a turns ratio of n:1, and the first resonant inductor L on the primary side. r1 The first resonant capacitor C on the original side r1 The second resonant capacitor C is connected in series on the primary side of the transformer; r2 Connected in series on the secondary side of the transformer; Figure 3 In the asymmetric structure shown, the resonant circuit includes a first resonant capacitor C on the primary side. r1 Second resonant inductor L on the secondary side r2 Second resonant capacitor C on the secondary side r2 And a transformer with a turns ratio of n:1; the first resonant capacitor C on the primary side. r1 The second resonant inductor L is connected in series on the primary side of the transformer; r2 With the second resonant capacitor C on the secondary side r2 It is connected in series on the secondary side of the transformer.

[0040] Figure 4 This is a basic schematic diagram of the synchronous rectifier circuit for the bidirectional CLLC resonant converter proposed in this invention. Figure 4 The proposed bidirectional CLLC resonant converter synchronous rectification circuit consists of a high-speed current sampling circuit, a zero-crossing detection circuit, a timer circuit, a logic processing circuit, and a driving circuit. Its key feature is that a current transformer is connected in series on the secondary side of the CLLC resonant cavity. The secondary side of the current transformer is sequentially connected to a detection resistor, a differential amplifier circuit, a zero-crossing detection circuit, a timer circuit, and a logic processing circuit. The timer circuit is connected to the enable pin of the bidirectional CLLC resonant converter driving chip.

[0041] Figure 1 The resonant frequency f of the CLLC resonant converter shown is... r1 The calculation formula is as follows:

[0042]

[0043] When C r2 =n 2 C r1 n 2 L r2 =L r1 hour, Figure 1 The resonant frequency f of the CLLC resonant converter shown is... r1 The calculation formula is as follows:

[0044]

[0045] Figure 2The resonant frequency f of the asymmetric CLLC resonant converter shown is... r2 The calculation formula is as follows:

[0046]

[0047] Figure 3 The resonant frequency f of the asymmetric CLLC resonant converter shown is... r3 The calculation formula is as follows:

[0048]

[0049] When the converter operates at frequency f s <f r When the converter operates at a frequency f, it is in underresonant mode; when the converter operates at a frequency f... s =f r When the converter operates at a frequency f, it is in quasi-resonant mode; when the converter operates at a frequency f... s >f r At this time, the converter operates in overresonance mode. To ensure reliable synchronous rectification of the secondary-side switches, the timer's timing period is related to the converter's minimum operating frequency f. smin Maximum operating frequency f smax and the resonant frequency f of the converter r Regarding the timer's timing period T tclk The following conditions must be met:

[0050]

[0051] The converter needs to control the primary-side switches based on input and output voltage and current signals. Taking the forward operating mode as an example, the controller applies a square wave signal with a 50% duty cycle to the four primary-side switches. The drive signals for the first and second primary-side switches (S1 and S2) are completely complementary, as are the drive signals for the third and fourth primary-side switches (S3 and S4). Furthermore, the drive signals for the first and fourth primary-side switches (S1 and S4) are in phase. A symmetrical square wave voltage with a 50% duty cycle is applied to the resonant cavity at the primary-side bridge output. The controller adjusts the output voltage or current by changing the frequency of the primary-side bridge drive signal, thereby changing the resonant cavity impedance. Without synchronous rectification, the secondary-side bridge remains uncontrolled throughout this process, relying solely on its body diode for rectification. When synchronous rectification is applied, a suitable drive signal is applied to the secondary bridge, causing its channel to turn on when the body diode begins to conduct, allowing current to flow through the channel, and turning off when the channel current crosses zero. Synchronous rectification places relatively strict requirements on the turn-on and turn-off times of the switching transistors.

[0052] Taking the converter operating in underresonant mode as an example, combined with Figure 5 The specific synchronous rectification control strategy proposed in this invention is as follows:

[0053] Step 1: Obtain the proportionally reduced resonant current using a current transformer. Detect the resonant current on the secondary side using a current transformer connected in series with the secondary side; denoted as i. Lr2 The turns ratio of the primary and secondary windings of the current transformer is 1:N, and the detected current signal is...

[0054] Step 2: Convert the detected resonant current signal into a voltage signal and amplify and shift it. The detected current signal is converted into a voltage signal through a sensing resistor, and the voltage signal is amplified by a differential amplifier circuit. Let the sensing resistor be R. sense The amplifier circuit has a gain of k and a DC voltage bias of V. ref The processed voltage signal is V sense =kR sense i sense +V ref ;

[0055] Step 3: Compare the output of the differential operational amplifier circuit with the bias voltage to obtain the zero-crossing signal of the secondary-side resonant current, and acquire the conduction information of the anti-parallel diode of the secondary-side switching transistor. In a bidirectional CLLC resonant converter, the polarity of the secondary-side resonant current determines the conduction status of the anti-parallel diode of the secondary-side switching transistor. The output of the differential operational amplifier current is compared with the bias voltage V... ref Compare and output the zero-crossing signal V of the resonant current. c When V c >V ref At that time, V c =1, at this time, the fifth anti-parallel diode D5 connected in parallel with the fifth switch S5 on the secondary side and the eighth anti-parallel diode D8 connected in parallel with the eighth switch S8 on the secondary side are in the on state; when V c <V ref At that time, V c =0, at this time the sixth anti-parallel diode D6 connected in parallel with the sixth switch S6 on the secondary side and the seventh anti-parallel diode D7 connected in parallel with the seventh switch S7 on the secondary side are in the conducting state.

[0056] Step 4: Determine the timer's start time based on the conduction information of the anti-parallel diode on the secondary side of the switching transistor. The zero-crossing signal of the resonant current is determined by V. c =1 becomes V c At time t1, when the secondary-side resonant current changes from positive to zero, the timer t of the fifth and eighth switches on the secondary side is triggered. clk1 The zero-crossing signal of the resonant current is determined by V. c=0 becomes V c At time t2, when the secondary-side resonant current changes from negative to zero, the timer t of the sixth and seventh switches on the secondary side is triggered. clk2 .

[0057] Step 5: The drive circuit determines the turn-off time of the synchronous rectification signal of the secondary-side switching transistor based on the timer signal. Timer signal t clk1 With t clk2 The turn-on time is the same as the turn-off time of the anti-parallel diode on the secondary side. The zero-crossing point t1 where the resonant current changes from positive to zero is the timer signal t. clk1 At the time of generation, the fifth and eighth switches on the secondary side are turned off, and the timer signal t is activated. clk1 During the timing period, the fifth and eighth switches on the secondary side remain in the off state; the zero-crossing point t2 where the resonant current changes from negative to zero is the timer signal t. clk2 At the time of generation, the sixth and seventh switches on the secondary side are turned off, and the timer signal t is activated. clk2 During the timing period, the sixth and seventh switches on the secondary side remain in the off state.

[0058] Step 6: The logic circuit determines the turn-on time of the synchronous rectification signal and the turn-off time of the timer signal of the secondary-side switching transistors based on the primary-side switching transistor drive signal. The turn-on time of the fifth anti-parallel diode D5 connected in parallel with the fifth secondary-side switching transistor S5 and the eighth anti-parallel diode D8 connected in parallel with the eighth secondary-side switching transistor S8 are consistent with the turn-on time of the first primary-side switching transistor S1 and the fourth primary-side switching transistor S4; the turn-on time of the sixth anti-parallel diode D6 connected in parallel with the sixth secondary-side switching transistor S6 and the seventh anti-parallel diode D7 connected in parallel with the seventh secondary-side switching transistor S7 are consistent with the turn-on time of the second primary-side switching transistor S2 and the third primary-side switching transistor S3. The original drive signals of the fifth and eighth switches on the secondary side (S5 and S8) can be consistent with the drive signals of the first and fourth switches on the primary side (S1 and S4); the original drive signals of the sixth and seventh switches on the secondary side (S6 and S7) can be consistent with the drive signals of the second and third switches on the primary side (S2 and S3). When the turn-on signals of the sixth and seventh switches on the secondary side arrive (i.e., at time t3), the timer t is turned off. clk1 When the signals from the fifth and eighth switches on the secondary side arrive, i.e., at time t4, timer t is turned off. clk2 .

[0059] Step 7: In each subsequent switching cycle, the controller determines the turn-on and turn-off times of the switching transistor in this cycle based on the detected secondary side current polarity and the original drive signal information.

[0060] Finally, it should be noted that the above examples are merely some specific embodiments of the present invention. Obviously, the present invention is not limited to the above embodiments and can have many variations. For example, the strategy proposed according to the present invention can be used in synchronous rectification control of other types of resonant converters, and can also be applied to converter protection, closed-loop control, and other applications. All variations that can be directly derived or conceived by those skilled in the art from the disclosure of the present invention should be considered within the scope of protection of the present invention.

Claims

1. A method of synchronous rectification applied to a bidirectional CLLC resonant converter, characterized in that, The specific steps are: (1) obtaining a scaled-down secondary side resonant current through a current transformer; (2) converting the detected resonant current signal into a voltage signal and amplifying and offsetting the voltage signal by a differential operational amplifier circuit; (3) comparing the output of the differential operational amplifier circuit with a bias voltage to obtain a secondary side resonant current zero-crossing point signal; (4) determining the starting time of the timer according to the conduction information of the anti-parallel diode of the secondary side switch tube; (5) determining the off time of the secondary side switch tube synchronous rectification signal according to the timer signal; (6) determining the starting time of the secondary side switch tube synchronous rectification signal and the off time of the timer signal according to the primary side switch tube drive signal; (7) in each switching cycle thereafter, the switching-on time and the switching-off time of the switch tube in the current cycle are determined according to the detected secondary side current polarity and the original drive signal information according to steps (1)-(6).

2. The synchronous rectification method applied to a bidirectional CLLC resonant converter according to claim 1, characterized in that, The bidirectional CLLC resonant converter comprises a full-bridge inverter circuit, a resonant circuit and a full-bridge rectifier circuit connected in sequence, wherein the full-bridge rectifier circuit comprises a secondary side fifth switch tube S5, a secondary side fifth anti-parallel diode D5 connected in parallel with the secondary side fifth switch tube S5, a secondary side fifth parasitic capacitor C5, a secondary side sixth switch tube S6, a secondary side sixth anti-parallel diode D6 connected in parallel with the secondary side sixth switch tube S6, a secondary side sixth parasitic capacitor C6, a secondary side seventh switch tube S7, a secondary side seventh anti-parallel diode D7 connected in parallel with the secondary side seventh switch tube S7, a secondary side seventh parasitic capacitor C7, a secondary side eighth switch tube S8, a secondary side eighth anti-parallel diode D8 connected in parallel with the secondary side eighth switch tube S8, and a secondary side eighth parasitic capacitor C8, and the secondary side fifth switch tube S5 and the sixth switch tube S6 are connected in series to form a secondary side first bridge arm, and the seventh switch tube S7 and the eighth switch tube S8 are connected in series to form a secondary side second bridge arm. The full-bridge inverter circuit comprises a primary side first switch tube S1, a primary side first anti-parallel diode D1 connected in parallel with the primary side first switch tube S1, and a primary side first parasitic capacitor C1; a primary side second switch tube S2, a second anti-parallel diode D2 connected in parallel with the primary side second switch tube S2, and a primary side second parasitic capacitor C2; a primary side third switch tube S3, a primary side third anti-parallel diode D3 connected in parallel with the primary side third switch tube S3, and a primary side third parasitic capacitor C3; a primary side fourth switch tube S4, a primary side fourth anti-parallel diode D4 connected in parallel with the primary side fourth switch tube S4, and a primary side fourth parasitic capacitor C4; the primary side first switch tube S1 and the second switch tube S2 are connected in series to form a primary side first bridge arm, and the third switch tube S3 and the fourth switch tube S4 are connected in series to form a primary side second bridge arm.

3. The synchronous rectification method applied to a bidirectional CLLC resonant converter according to claim 2, characterized in that, The output of the differential operational amplifier circuit is compared with a DC voltage bias V ref The specific method for obtaining the secondary side resonant current zero-crossing point signal is that: The output of the differential operational amplifier current is compared with the bias voltage V ref When V c >V ref , V c =1, at which time the secondary side fifth anti-parallel diode D5 in parallel with the secondary side fifth switch S5 and the secondary side eighth anti-parallel diode D8 in parallel with the secondary side eighth switch S8 are in a conducting state; when V c <V ref , V c =0, at which time the secondary side sixth anti-parallel diode D6 in parallel with the secondary side sixth switch S6 and the secondary side seventh anti-parallel diode D7 in parallel with the secondary side seventh switch S7 are in a conducting state.

4. The method for synchronous rectification applied to bidirectional CLLC resonant converter according to claim 2, characterized in that, The specific method for determining the starting time of the timer according to the conduction information of the anti-parallel diode of the secondary side switch tube is: When the resonant current crosses zero, the signal is from V c =1 becomes V c When the resonant current on the secondary side changes from positive to zero at time t1, the timer t in the timer circuit is triggered. clk1 The zero-crossing signal of the resonant current is determined by V. c =0 becomes V c When the resonant current on the secondary side changes from negative to zero at time t2, the timer t in the timer circuit is triggered. clk2 .

5. The method for synchronous rectification applied to bidirectional CLLC resonant converter according to claim 4, characterized in that, The specific method for determining the off time of the secondary side switch tube synchronous rectification signal according to the timer signal is: The resonant current is zero-crossed from positive to zero at t1, which is the timer signal t clk1 At the opening moment, the fifth and eighth switches on the secondary side are turned off, and the timer signal t clk1 During the timing period, the fifth and eighth switches on the secondary side remain in the off state; the resonant current is zero-crossed from negative to zero at t2, which is the timer signal t clk2 At the opening moment, the sixth and seventh switches on the secondary side are turned off, and the timer signal t clk2 During the timing period, the sixth and seventh switches on the secondary side remain in the off state.

6. The method for synchronous rectification applied to bidirectional CLLC resonant converter according to claim 4, characterized in that, The specific method for determining the starting time of the secondary side switch tube synchronous rectification signal and the off time of the timer signal according to the primary side switch tube drive signal is: The original drive signals of the fifth switch tube S5 and the eighth switch tube S8 on the secondary side are consistent with the drive signals of the first switch tube S1 and the fourth switch tube S4 on the primary side; the original drive signals of the sixth switch tube S6 and the seventh switch tube S7 on the secondary side are consistent with the drive signals of the second switch tube S2 and the third switch tube S3 on the primary side; when the sixth and seventh switch tubes on the secondary side are turned on, that is, at the moment t3, the timer t is turned off clk1 ; when the fifth and eighth switch tubes on the secondary side are turned on, that is, at the moment t4, the timer t is turned off clk2 .

7. The method for synchronous rectification applied to bidirectional CLLC resonant converter according to claim 2, characterized in that, The resonant circuit is any one of the following three structures, and the three structures are respectively: The resonant circuit comprises a primary side first resonant inductor L r1 , a primary side first resonant capacitor C r1 , a secondary side second resonant inductor L r2 , a secondary side second resonant capacitor C r2 , and a transformer with a winding ratio of n:1; the primary side first resonant inductor L r1 and the primary side first resonant capacitor C r1 are connected in series at the primary side of the transformer; the secondary side second resonant inductor L r2 and the secondary side second resonant capacitor C r2 are connected in series at the secondary side of the transformer; Or, the resonance circuit includes a primary side first resonant inductor L r1 , a primary side first resonant capacitor C r1 , a secondary side second resonant capacitor C r2 , and a transformer with a turn ratio of n:1, the primary side first resonant inductor L r1 and the primary side first resonant capacitor C r1 are connected in series at the primary side of the transformer; the secondary side second resonant capacitor C r2 is connected in series at the secondary side of the transformer; Or, the resonance circuit comprises a primary side first resonance capacitor C r1 , a secondary side second resonance inductor L r2 , a secondary side second resonance capacitor C r2 , and a transformer with a turn ratio of n:1; the primary side first resonance capacitor C r1 is connected in series at the primary side of the transformer; the secondary side second resonance inductor L r2 is connected in series with the secondary side second resonance capacitor C r2 at the secondary side of the transformer.

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