Electronic device
By adopting the arrangement of three-layer substrate structure and conductive components, the problems of multi-layer circuit board production difficulty and component layout are solved, high-density interconnection is achieved and cost reduction is reduced, and application flexibility is increased.
Patent Information
- Application Number
- CN202410764844.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-06-16
- Filing Date
- 2024-06-14
- Publication Date
- 2024-12-17
AI Technical Summary
Multilayer circuit boards are not easy to make and are not easy to set up different electronic components between multilayer circuit layers, limiting their application.
A three-layer substrate structure is adopted, wherein the line width and line distance of the line layer of the second substrate are not greater than the corresponding parameters of the first and third substrates, and conductive elements and adhesive materials are provided between the substrates to connect the substrates. , supports the arrangement of multiple electronic components.
High density interconnection and reduced production costs, increase application flexibility, and support the arrangement of different types and sizes of electronic components between multilayer substrates.
Smart Images
Figure CN119155884A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to an electronic device, in particular to an electronic device having a multi-layer substrate and provided with a fine circuit. Background Art
[0002] A multilayer circuit board refers to a circuit board with multiple layers of circuits, which has the advantages of high assembly density, better information transmission rate and better control of electromagnetic interference; however, multilayer circuit boards are not easy to manufacture, and it is not easy to set different electronic components between the multiple circuit layers. Therefore, the application of multilayer circuit boards is still limited. Summary of the invention
[0003] An object of the present invention is to provide an electronic device.
[0004] The electronic device of the present invention comprises a first substrate, a second substrate and a third substrate stacked in sequence; each substrate defines its circuit layer, and the circuit layer defines a line width; wherein the second line width of the second circuit layer of the second substrate is not greater than the first line width of the first circuit layer arranged on the first substrate and the third line width of the third circuit layer arranged on the third substrate.
[0005] In addition, the present invention provides an electronic device having a similar structure to the aforementioned electronic device; in this example, each substrate defines its circuit layer, and the circuit layer defines a line spacing; wherein the second line spacing of the second circuit layer of the second substrate is not greater than the first line spacing of the first circuit layer arranged on the first substrate and the third line spacing of the third circuit layer arranged on the third substrate.
[0006] Furthermore, the present invention also provides an electronic device having a similar structure to the aforementioned electronic device; in this example, each substrate defines its circuit layer, and the circuit layer is defined with line width and line spacing; wherein the second line width and second line spacing of the second circuit layer of the second substrate are not greater than the first line width and first line spacing of the first circuit layer arranged on the first substrate, and are not greater than the third line width and third line spacing of the third circuit layer arranged on the third substrate.
[0007] In one embodiment, the second substrate is a flexible substrate.
[0008] In one embodiment, the second substrate includes at least one redistribution wiring structure, and the redistribution wiring structure includes a layer of wiring or multiple stacked wiring layers.
[0009] In one embodiment, the second substrate defines a thickness no greater than 150 μm.
[0010] In one embodiment, the second substrate defines a thickness no greater than 100 μm.
[0011] In one embodiment, the second substrate defines a thickness no greater than 50 μm.
[0012] In one embodiment, the portion of the second wiring layer defines a thickness no greater than 15 μm.
[0013] In one embodiment, the portion of the second wiring layer defines a thickness no greater than 10 μm.
[0014] In one embodiment, the portion of the second wiring layer defines a thickness no greater than 5 μm.
[0015] In one embodiment, the second circuit layer defines a bonding area and a non-bonding area, and a portion of the second circuit layer is located in the non-bonding area.
[0016] In one embodiment, the electronic device further includes a plurality of components disposed on at least one of the first surface and the second surface of the second substrate and electrically connected to the second circuit layer.
[0017] In one embodiment, at least one of the components is an active component.
[0018] In one embodiment, the active device is a thin film transistor.
[0019] In one embodiment, the electronic device further includes a plurality of conductive elements, and the conductive elements are formed between at least two substrates among the first substrate, the second substrate, and the third substrate.
[0020] In one embodiment, the conductive element is a conductive via or a conductive line.
[0021] In one embodiment, the electronic device includes an adhesive material to connect two adjacent substrates among the first substrate, the second substrate, and the third substrate.
[0022] In one embodiment, the area of the second substrate is not less than the area of at least one of the first substrate and the third substrate.
[0023] In one embodiment, the electronic device includes a plurality of second substrates, and the plurality of second substrates are disposed between the first substrate and the third substrate.
[0024] In one embodiment, at least one of the first substrate and the third substrate is a ceramic substrate.
[0025] In one embodiment, at least one of the first substrate, the second substrate and the third substrate is a multi-layer substrate or a composite substrate.
[0026] In one embodiment, at least one of the first substrate, the second substrate and the third substrate is a single-layer substrate.
[0027] Therefore, the electronic device of the present invention has at least three layers of substrates, and at least one component is arranged in the electronic device. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1 is a schematic diagram of an embodiment of an electronic device of the present invention;
[0029] Figure 2 FIG. 2 is a schematic diagram of another embodiment of the electronic device of the present invention. DETAILED DESCRIPTION
[0030] The electronic devices according to various embodiments of the present invention will be described below with reference to the relevant drawings, wherein the same elements will be described with the same reference numerals; the ratios between elements in the drawings are for understanding the structure, but not for limitation.
[0031] like Figure 1 FIG. 1 is an embodiment of an electronic device 100 of the present invention; the electronic device 100 comprises a first substrate 10, a second substrate 20 and a third substrate 30 stacked in sequence. Each substrate defines its circuit layer, and the circuit layer defines its line width and line spacing. At least one of the line width and line spacing of the second circuit layer of the second substrate 20 is not greater than at least one of the line width and line spacing of the first circuit layer of the first substrate 10, and is not greater than at least one of the line width and line spacing of the third circuit layer of the third substrate 30.
[0032] The first substrate 10 includes a first circuit layer 11 , and the first circuit layer 11 defines a first line width W1 , a first line spacing, and a first thickness H1 . In some embodiments, the first circuit layer 11 may be formed on a surface of the first substrate 10 facing the second substrate 20 .
[0033] The second substrate 20 is stacked below a surface of the first substrate 10 and defines a first surface S1 and a second surface S2 opposite to the first surface S1; the first surface S1 faces the surface of the first substrate 10. The second substrate 20 includes a second circuit layer 21 formed on one or both of the first surface S1 and the second surface S2; the second circuit layer 21 defines a second line width W2, a second line spacing, and a second thickness H2.
[0034] The third substrate 30 is stacked below the second substrate 20, and one surface of the third substrate 30 faces the second surface of the second substrate 20. The third substrate 30 includes a third circuit layer 31, and the third circuit layer 31 defines a third line width W3, a third line distance, and a third thickness H3. In some embodiments, the third circuit layer 31 may be formed on one surface of the third substrate 30 facing the second substrate 20.
[0035] In some embodiments, the second wiring layer 21 has line widths of unequal widths. In some embodiments, the second line width W2 has a minimum line width of no greater than 15 μm; in some embodiments, the second line width W2 has a minimum line width of no greater than 10 μm; in some embodiments, the second line width W2 has a minimum line width of no greater than 5 μm; in some embodiments, the second line width W2 has a minimum line width of no greater than 2 μm; and in some embodiments, the second line width W2 has a minimum line width of no greater than 1 μm.
[0036] In some embodiments, the second wiring layer 21 has line spacings of unequal widths. In some embodiments, the second line spacing has a minimum line spacing of no more than 15 μm; in some embodiments, the second line spacing has a minimum line spacing of no more than 10 μm; in some embodiments, the second line spacing has a minimum line spacing of no more than 5 μm; in some embodiments, the second line spacing has a minimum line spacing of no more than 2 μm; and in some embodiments, the second line spacing has a minimum line spacing of no more than 1 μm.
[0037] In some embodiments, at least one or both of the first substrate 10 and the third substrate 30 are hard substrates or flexible substrates, and these substrates can be made of polyester materials, polyethylene terephthalate (PET) materials, polyimide (PI) materials, glass materials, glass fiber materials (suitable for flame-retardant substrates), phenolic resin materials, ceramic materials, metal materials and similar materials, or these substrates include the above and similar materials.
[0038] In some embodiments, the first substrate 10 is a hard substrate, and the third substrate 30 is also a hard substrate.
[0039] In some embodiments, the second substrate 20 is a flexible substrate and can be made of polyester material, polyethylene terephthalate (PET) material, polyimide (PI) material, polyethylene naphthalate (PEN) material, liquid crystal polymer (LCP) and similar materials, or these substrates include the above and similar materials. The second substrate 20 can also be made of a material that is not PI, PET, PEN, or LCP, but still has sufficient elasticity, or include these materials.
[0040] In some embodiments, the first substrate 10 and the third substrate 30 are both double-sided printed circuit boards. In some embodiments, the second substrate 20 is a single-sided printed circuit board. In some embodiments, at least one of the first substrate 10, the second substrate 20, and the third substrate 30 is a multi-layer printed circuit board.
[0041] In some embodiments, the second substrate 20 has a thickness of no greater than 150 μm; in some embodiments, the second substrate 20 has a thickness of no greater than 100 μm; in some embodiments, the second substrate 20 has a thickness of no greater than 50 μm; in some embodiments, the second substrate 20 has a thickness of no greater than 38 μm; in some embodiments, the second substrate 20 has a thickness of no greater than 25 μm; in some embodiments, the second substrate 20 has a thickness of no greater than 15 μm. It should be noted that the thickness of the second substrate 20 referred to herein is equal thickness, average thickness, maximum thickness, or minimum thickness, but is not limited thereto.
[0042] In some embodiments, a portion of the thickness H2 of the second circuit layer 21 is not greater than 15 μm; in some embodiments, a portion of the thickness H2 of the second circuit layer 21 is not greater than 10 μm; further, in some embodiments, a portion of the thickness H2 of the second circuit layer 21 is not greater than 5 μm. It should be noted that the thickness H2 of the second circuit layer 21 referred to herein may be equal thickness, average thickness, maximum thickness or minimum thickness, but is not limited thereto.
[0043] In some embodiments, at least one adhesive layer 40 is further disposed between two adjacent substrates among the first substrate 10, the second substrate 20, and the third substrate 30 to combine the substrates. The adhesive layer 40 sandwiched between the first substrate 10 and the second substrate 20, or the adhesive layer 40 sandwiched between the second substrate 20 and the third substrate 30, can be made of the same material or different materials. The adhesive layer 40 sandwiched between the first substrate 10 and the second substrate 20 and the adhesive layer 40 sandwiched between the second substrate 20 and the third substrate 30 can also be adhered to each other or not.
[0044] In some embodiments, a plurality of conductive elements 50 are further disposed between at least two of the first substrate 10, the second substrate 20, and the third substrate 30; the conductive elements 50 may be conductive holes or conductive wires, but are not limited thereto. The conductive elements 50 may be as follows: Figure 1 or Figure 2 However, the configuration of the conductive member 50 is not limited thereto, and the conductive members 50 do not have to be identical. The conductive member 50 is used to electrically connect at least two of the first substrate 10 , the second substrate 20 , and the third substrate 30 .
[0045] It should be noted that the electronic device 100 of the present invention is further provided with a plurality of components 60; Figure 1 or Figure 2 As shown, a plurality of elements 60 are disposed on at least one or both of the first surface S1 and the second surface S2 of the second substrate 20. In some embodiments, at least some of the elements 60 are active elements or passive elements.
[0046] In some embodiments, the second circuit layer 21 defines a bonding area and a non-bonding area, wherein the bonding area is where the element 60 is arranged, and the non-bonding area is other areas outside the bonding area of the second circuit layer 21. The portion of the second circuit layer 21 with a thickness not greater than 10 μm is arranged in the non-bonding area, and the second thickness H2 of the other portion of the second circuit layer 21 arranged in the bonding area is not limited. Further, the circuit thickness of the second circuit layer 21 in the bonding area may include the thickness of the connection pad.
[0047] In some embodiments, the component 60 includes an active element, such as a mini-scale integrated circuit or / and a micro-scale integrated circuit 61 or a thin film transistor 62. The component 60 may further include a passive element 63 / 64.
[0048] In one embodiment, the second substrate 20 is a precision circuit substrate and is provided with a plurality of components 60 , so that a high-density interconnector printed circuitboard can be easily obtained.
[0049] In some embodiments, some of the components 60 are manufactured using a thin film process, and some of the components 60 are independently disposed on the second substrate 20 .
[0050] In one embodiment, the second substrate 20 is a single-layer substrate, and the element 60 is disposed only on a single surface of the second substrate 20 , which can meet budget requirements.
[0051] In one embodiment, the second substrate 20 is a flexible board, and the third substrate 30 is a hard board, and when the component 60 is only disposed on one side of the second substrate 20, the second substrate 20 or the electronic device 100 including it will be thinner and lighter; therefore, the flexible second substrate 20 can be first disposed on the hard third substrate 30, and then a plurality of components 60 are arranged on the surface of the second substrate 20 opposite to the third substrate 30, and finally the first substrate 10 is stacked on the plurality of components 60 and further electrically connected and other processes are performed. In this embodiment, the plurality of components 60 are arranged between the first substrate 10 and the second substrate 20.
[0052] In another embodiment, the second substrate 20 is a flexible board and the third substrate 30 is a hard board; the plurality of components 60 are first arranged on one surface of the flexible second substrate 20, and the second substrate 20 is then stacked on the third substrate 30 with the surface facing the third substrate 30; thereafter, the first substrate 10 is stacked on the second substrate 20 for further electrical connection and other processes. In this embodiment, the plurality of components 60 are arranged between the second substrate 20 and the third substrate 30.
[0053] In another embodiment, a plurality of components 60 are first arranged on one surface of the flexible second substrate 20, and the second substrate 20 is then stacked on the third substrate 30 with the surface facing the third substrate 30, and then other components 60 are arranged on the other surface of the second substrate 20, and finally the first substrate 10 is stacked on the second substrate 20 to further perform electrical connection and other processes.
[0054] In one embodiment, the second substrate 20 is a flexible board, and the first surface S1, the second surface S2, or the projection area of the two surfaces of the second substrate 20 in the vertical direction is not less than the projection area of the first substrate 10, the third substrate 30, or one of the two substrates in the vertical direction. In addition, the first surface S1, the second surface S2, or the area of the two surfaces of the second substrate 20 is also not less than the area of the first substrate 10, the third substrate 30, or the two substrates. In this embodiment, the extended surface of the second substrate 20 can be used to arrange more conductive members 50 or elements 60. However, in another embodiment, the projection area of at least one of the two surfaces of the second substrate 20 in the vertical direction can also be smaller than the projection area of the first substrate 10, the third substrate 30, or one of the two substrates in the vertical direction; or the area of the first and second surfaces S1 / S2 or the two surfaces of the second substrate 20 is smaller than the area of at least one of the first and third substrates 10 / 30.
[0055] In some embodiments, the second substrate 20 includes a redistribution wiring structure, which includes one or more stacked wiring layers, and an insulating layer is provided between two adjacent wiring layers; in one embodiment, the redistribution wiring structure can be formed on a mother substrate that is not the second substrate 20, and in another embodiment, the redistribution wiring structure is formed on the second substrate 20, that is, the second substrate 20 can serve as the mother substrate of the redistribution wiring structure.
[0056] In some embodiments, the electronic device 100 includes a plurality of second substrates 20 disposed between the first substrate 10 and the third substrate 30. The second substrates 20 may be disposed between the first substrate 10 and the third substrate 30 in a stacked manner; or the plurality of second substrates may be disposed between the first substrate 10 and the third substrate 30 in a coplanar manner; or the second substrates 20 may be disposed in a manner that includes both of the above.
[0057] In some embodiments, there are multiple first substrates 10, and the second line width, second line spacing, or at least a portion of the second circuit layer 21 of the second substrate 20 is not greater than the first line width, first line spacing, or both of the first circuit layer 11 of at least one first substrate 10.
[0058] In some embodiments, there are multiple third substrates 30, and the second line width, second line spacing, or at least a portion of the second circuit layer 21 of the second substrate 20 is not greater than the third line width, third line spacing, or both of the third circuit layer 31 of at least one third substrate 30.
[0059] In some embodiments, the first substrate 10 and the third substrate 30 are hard boards, and the second substrate 20 is a flexible board; in addition, the line width, line spacing, or line width and line spacing of the second circuit layer 21 of the second substrate 20 is not greater than the line width, line spacing, or line width and line spacing of the first circuit layer 11 / third circuit layer 31 of the first substrate 10 / third substrate 30.
[0060] In one embodiment, the second substrate 20 is a flexible single-layer board. The electronic device 100 including the second substrate 20 may have the advantages of high-density interconnection and reduced manufacturing cost.
[0061] In one embodiment, the second substrate 20 is a hard board, such as a glass substrate; the electronic device 100 having the second substrate 20 can have a larger area compared to an electronic device that does not use a glass substrate. This is because in the TFT-LCD process, an excellent ability to make circuits on larger glass substrates has been established, and therefore it can be applied to the manufacture of a multi-layer circuit board such as the present invention.
[0062] Thus, the present invention provides an electronic device formed by a multi-layer substrate, especially a multi-layer substrate with a fine circuit on the inner layer; in addition, electronic components of different types and sizes can also be arranged between the multi-layer substrates, increasing the application flexibility of the present invention.
[0063] The above description is for illustrative purposes only and is not intended to be limiting. Any equivalent modifications or changes made to the present invention without departing from the spirit and scope of the present invention should be included in the appended claims.
Claims
1. An electronic device, comprising: A first substrate, comprising a first circuit layer, wherein the first circuit layer defines a first line width; At least one second substrate, including a second circuit layer and stacked under the first substrate, wherein the second substrate defines a first surface connected to the first substrate and a second surface opposite to the first surface, wherein the second circuit layer is formed on at least one of the first surface and the second surface and defines a second line width; as well as A third substrate is stacked under the second substrate and connected to the second surface of the second substrate, wherein the third substrate includes a third circuit layer, and the third circuit layer defines a third line width; Wherein, at least a portion of the second line width of the second circuit layer is not greater than at least one of the first line width of the first circuit layer and the third line width of the third circuit layer. The electronic device as claimed in claim 1 , wherein the second substrate is a flexible substrate.
3. An electronic device as described in claim 1, wherein the second substrate includes at least one redistribution wiring structure, the redistribution wiring structure includes one or more stacked wiring layers, and the redistribution wiring structure is formed on at least one of the first surface and the second surface of the second substrate. 4 . The electronic device as claimed in claim 1 , wherein there are a plurality of the first substrates, and at least a portion of the second line width of the second substrate is not greater than the first line width of at least one of the first substrates. 5 . The electronic device as claimed in claim 1 , wherein there are a plurality of the third substrates, and at least a portion of the second line width of the second substrate is not greater than the third line width of at least one of the third substrates. 6 . The electronic device as claimed in claim 1 , further comprising a plurality of components disposed on at least one of the first surface or the second surface of the second substrate, and the plurality of components are electrically connected to the second circuit layer. The electronic device as claimed in claim 6 , wherein at least one of the components is an active component. 8 . The electronic device as claimed in claim 1 , further comprising a plurality of conductive elements disposed between at least two substrates of the first substrate, the second substrate, and the third substrate. 9 . The electronic device as claimed in claim 1 , further comprising an adhesive material bonding two adjacent substrates of the first substrate, the second substrate and the third substrate.
10. The electronic device as described in claim 1 comprises a plurality of the second substrates disposed between the first substrate and the third substrate, wherein the plurality of second substrates are stacked between the first substrate and the third substrate, or the plurality of second substrates are coplanarly arranged between the first substrate and the third substrate.
11. An electronic device comprising: A first substrate, comprising a first circuit layer, wherein the first circuit layer defines a first line distance; At least one second substrate, including a second circuit layer and stacked under the first substrate, wherein the second substrate defines a first surface connected to the first substrate and a second surface opposite to the first surface, wherein the second circuit layer is formed on at least one of the first surface and the second surface and defines a second line distance; as well as A third substrate is stacked under the second substrate and connected to the second surface of the second substrate, wherein the third substrate includes a third circuit layer, and the third circuit layer defines a third line distance; Wherein, at least a portion of the second line pitch of the second circuit layer is not greater than at least one of the first line pitch of the first circuit layer and the third line pitch of the third circuit layer.