1112results about "Conductive pattern layout details" patented technology

An antenna assembly includes a stack and an antenna structure. The stack includes at least one electrically conductive layer structure and at least one electrically insulating layer structure, and a component, at least partially embedded in the stack. At least a portion of the electrically conductive layer structure is provided at the external side of the stack and is configured to act at least as part of an electromagnetic wave coupling structure. The component is coupled to the electromagnetic wave coupling structure. The antenna structure provides an opening to a channel. The stack and the antenna structure are connected so that the electromagnetic wave coupling structure and the opening to the channel face each other.

A quasi-planar transformer can include a first winding comprising one or more turns of wire, a second winding comprising one or more turns of a conductive trace disposed on a printed circuit board, and a magnetic core positioned with respect to the first and second windings so as to provide a magnetic flux path coupling the first and second windings. The first winding can be a primary winding having a first half wound in a clockwise direction on a first side of the printed circuit board and a second half wound in a counterclockwise direction on a second side of the printed circuit board, wherein the first and second halves are formed of a single continuous wire. The single continuous wire can pass through an opening in the printed circuit board. The first and second halves of the primary winding can be secured to the printed circuit board.

A printed circuit board according to an embodiment comprises: an insulating layer; a circuit pattern disposed on the upper surface of the insulating layer; a support layer which is disposed on the upper surface of the insulating layer to expose the upper surface of the circuit pattern and is in contact with the sides of the circuit pattern; and a protective layer disposed on the upper surfaces of the support layer and the circuit pattern, wherein the upper region of the insulating layer comprises a first region and a second region, and the protective layer comprises an open region exposing the upper surfaces of the support layer and the circuit pattern that are disposed in the first region, and the support layer comprises a first upper surface positioned at the highest level among the upper surfaces of the support layer and a second upper surface positioned at the lowest level among the upper surfaces of the support layer, the second upper surface being lower than the first upper surface, and the protective layer comprises a first portion which contacts the upper surface of the circuit pattern of the first region and a second portion which contacts the upper surface of the support layer of the first region, and the second portion of the protective layer contacts the second upper surface of the support layer and includes a first lower surface which is lower than the upper surface of the circuit pattern.

A printed circuit board (PCB) includes a solder resist layer including at least one of an opening and a depression and a solder resist patch disposed in at least one of the opening and the depression to have an interface with the solder resist layer in at least one of the opening and the depression.

A semiconductor package according to an embodiment includes a first insulating layer; a first circuit pattern disposed on the first insulating layer and including a first pad; a first molding layer disposed on an upper surface of the first insulating layer; a through electrode including a first conductive coupling part disposed on the first pad and having a first width and a through part disposed on the first conductive coupling part and having a second width smaller than the first width, and passing through of the first molding layer; and a second conductive coupling part disposed on the through part of the through electrode; wherein the first width of the first conductive coupling part is smaller than a third width of the second conductive coupling part.

A wiring substrate according to one embodiment includes a plurality of wiring layers and a plurality of insulating layers alternately stacked in a stacking direction. The plurality of wiring layers include a first wiring layer closest to a surface on one side in the stacking direction of the wiring substrate and a second wiring layer second closest to the surface. A distance from the surface to the first wiring layer is larger than a distance from the first wiring layer to the second wiring layer.

The invention relates to a system and method for implementing a scalable system. A multi-chip system (100) and structure for modular extension is described. In some embodiments, bonding strips (150) are used to couple adjacent chips (102, 104). For example, a communication bar (150) may be used to couple a logic chip (104), and a memory bar (150) may be used to couple a plurality of memory chips (102) to the logic chip (104).

A voltage converting circuit comprises a multi-layer printed-circuit-board stack having an input terminal and a reference terminal, first and second switching elements connected to each other at an output terminal and a parallel-plate capacitor connected with the first and the second switching elements; the stack comprises a top conductive layer provided with said input, reference and output terminals and with a plurality of power-conducting traces, a first and a second metal plane forming said electrodes of the parallel-plate capacitor, a first and a second signal layer having first and second signal-routing traces, wherein the first and the second metal plane are arranged between the top conductive layer and two signal layers, and wherein the top conductive layer and the first metal plane are separated from each other by an insulating layer of the stack only.

A strain gauge includes a flexible substrate, a resistor, and electrodes. Each electrode includes first patterns juxtaposed at predetermined intervals and electrically connected to each other. Second patterns of which longitudinal directions are toward a same direction as a longitudinal direction of each of the first patterns are disposed between opposing electrodes. The second patterns are electrically floating dummy patterns. The second patterns of which the longitudinal directions are toward a same direction as the longitudinal direction of each first pattern are disposed, the second patterns being interposed between first patterns opposite each other that are among given first patterns that constitute one of the electrodes and given first patterns that constitute another electrode. The plurality of second patterns are interposed between first patterns opposite each other that are among given first patterns that constitute one of the electrodes and given first patterns that constitute another electrode.

A multilayer board structure includes a plurality of light emitting devices, each light emitting device of the plurality of light emitting devices having a plurality of electrodes formed on a terminal surface thereof, and a multilayer board including a plurality of stacked substrates and implemented with the plurality of light emitting devices. An uppermost substrate of the plurality of stacked substrates has a surface formed with metal layers coupling electrodes of the plurality of light emitting devices. Remaining substrates of the plurality of stacked substrates, other than the uppermost substrate, have surfaces formed with metal layers, respectively. A number of metal layers located directly below the electrodes of the plurality of light emitting devices is the same for each of the electrodes.

A phased array antenna system includes a flexible printed circuit board formed of a flexible material. The flexible printed circuit board includes a component layer, an antenna layer, and a phase matching layer between the component layer and the antenna layer. A control unit is coupled to the component layer. A plurality of antenna elements are coupled to the antenna layer. A plurality of signal paths extend through the component layer, the phase matching layer, and the antenna layer. Each of the plurality of signal paths connects the control unit to a respective one of the plurality of antenna elements. The control unit provides an independent phase controllable source, which allows beams emitted from the antenna elements to be steered.

The invention provides a high-frequency multilayer circuit board processing method and a high-frequency multilayer circuit board. The high-frequency multilayer circuit board processing method comprises the following steps: obtaining an inner-layer core board, a prepreg and a copper foil, and carrying out lamination treatment on the inner-layer core board, the prepreg and the copper foil to obtain a laminated board body; wherein the number of the inner-layer core plates is multiple; carrying out drilling treatment on the laminated plate body; carrying out riveting treatment on the laminated plate body after drilling; fusing the riveted laminated board body to obtain a semi-finished product of the high-frequency multilayer circuit board; performing film coating treatment on the semi-finished product of the high-frequency multilayer circuit board; laminating the semi-finished product of the high-frequency multi-layer circuit board coated with the film; and carrying out post-processing treatment on the laminated semi-finished product of the high-frequency multilayer circuit board. According to the processing method of the high-frequency multilayer circuit board, the high-frequency multilayer circuit board is relatively high in use reliability.

The invention provides a PCB optimization method for video analog signal transmission. The problems of signal integrity, electromagnetic interference and impedance matching of analog signals in traditional PCB design are solved. The method comprises the following steps: arranging analog signals and digital signals in a layered manner by adopting a four-layer plate design; arranging an independent grounding plane on the analog signal layer, and connecting the independent grounding plane to the main grounding layer through grounding via holes with the diameter of 0.3 mm and the spacing of not more than 5mm; a shielding layer is added to a key signal path; linear path layout is adopted according to the signal flow direction, and the distance between key components is controlled within 30 mm; uniform line width is kept, standard definition video signals are 8mil, high definition video signals are 10mil, and corners of signal lines are in 45-degree dip angle or circular arc transition. Compared with the traditional design, the PCB designed by the method has the advantages that the video signal noise is reduced by more than 15dB, the image quality is remarkably improved, the system stability is greatly enhanced, and the PCB is particularly suitable for application scenes such as medical imaging equipment, high-definition monitoring systems and professional video processing equipment.

A circuit board having one or more computer-based components comprises a ground plane, such as a copper sheet, and a dielectric layer overlaying the ground plane. An opening is defined in the dielectric layer such that an area of the ground plane is exposed. A heating device is mounted within the opening and thermally coupled to the ground plane such that energizing the heating device transfers heat to the ground plane.

A flexible printed circuit (FPC) for a hard disk drive includes a first preamplifier electrically connected to first read-write transducers and a second preamplifier electrically connected to second read-write transducers, where all transducers are driven via a single primary actuator, with a top FPC section including electrical traces between a fine actuator corresponding to one of the first transducers and a corresponding controller and a bottom FPC section including traces between a fine actuator corresponding to one of the second transducers and a corresponding controller. To inhibit potential crosstalk between the fine actuator traces and read traces and / or voice coil motor (VCM) traces, the fine actuator traces may be positioned not-adjacent to read traces, such as between write traces adjacent the read traces and serial input / output (SIO) traces adjacent VCM traces, and / or at least five trace-widths away from the VCM traces.

A wiring circuit board includes a metal supporting layer, a first metal thin film, an insulating layer including a through hole, a second metal thin film disposed on the first metal thin film in the through hole, and a conductive pattern electrically connected to the metal supporting layer through the first metal thin film and the second metal thin film in the through hole. The first metal thin film includes an oxide coating at least on a contact surface in contact with the insulating layer. In the central part of the through hole, the oxide coating has a thickness of 0 or a thickness smaller than a thickness of the oxide coating on the contact surface.

A printed circuit board and a method of manufacturing the same are disclosed. The printed circuit board includes: a first core layer including a first insulating layer and a first core; a second core layer including a second insulating layer and a second core; a first element embedded in the first core; a second element embedded in the second core; a first pad and a second pad disposed on the first core layer and connected to the first element; a third pad and a fourth pad disposed on the second core layer and connected to the second element; and first connection layers interposed between one surface of the first core layer and one surface of the second core layer. The first pad and the third pad contact each other, and the first connection layers include at least one material of SiO2, SiN, and SiCN.

The invention is directed to a printed circuit board comprising an insulating bulk layer having a proximal surface and a distal surface that is opposite to the proximal surface with one or more electrical connection elements accessible from the proximal surface of the insulating bulk layer. The electrical connection elements are configured to connect electrical components to be arranged on the proximal surface of the insulating bulk layer, wherein the distal surface is at least partially covered by a distal conductive layer that is electrically isolated from the electrical connection elements.

An antenna module implemented as a multi-layered package includes: a printed circuit board (PCB) having a plurality of layers; a radio frequency integrated circuit (RFIC) disposed on a first surface among outermost surfaces of the PCB; a first array antenna disposed on a second surface, perpendicular to the first surface, among the outermost surfaces of the PCB; a second array antenna disposed on a third surface, perpendicular to the first and second surfaces, among the outermost surfaces of the PCB; and a third array antenna disposed on a fourth surface, perpendicular to the second and third surfaces, among the outermost surfaces of the PCB. First to third signal lines connected to the first to third array antennas form first to third coplanar waveguide structures in which first to third ground regions are formed, respectively.

A printed circuit board includes a first build-up insulating layer; an interconnect structure buried in an upper side of the first build-up insulating layer and including one or more insulating layers, one or more wiring layers, and one or more via layers; an adhesive disposed between an upper surface of the first build-up insulating layer and an upper surface of the interconnect structure, and having an upper surface exposed from the upper surface of the first build-up insulating layer; and a metal bump including a via portion penetrating the adhesive and a protrusion protruding to the upper surface of the adhesive.

A resonant converter includes a first circuit board, a second circuit board, and a planar transformer. The planar transformer includes an iron core, a plurality of wirings, and a first conductive column. A first core column of the iron core penetrates through a first circuit board through hole of the first circuit board and a second circuit board through hole of the second circuit board respectively. The wirings are formed around the first circuit board through hole and the second circuit board through hole respectively, and the first conductive column electrically connects the wirings to form a winding of the planar transformer. A first via is used to electrically connect the winding and the power component embedded in any one sub-layer board of the first circuit board or the second circuit board, and the iron core is used to sleeve the winding to form the planar transformer.

A miniaturized high-voltage large-current SIP (Session Initiation Protocol) packaging three-phase bridge driving module relates to the technical field of integrated circuits, and comprises an SIP packaging multi-layer PCB (Printed Circuit Board) substrate and a three-phase bridge power circuit, and the three-phase bridge power circuit is arranged on a top-layer PCB substrate; a middle filling layer is arranged between two adjacent layers of PCB substrates; a plurality of metal through holes are formed below the power tubes on the top PCB substrate, and penetrate through the PCB substrates and the middle filling layers; all layers of PCB substrates, except the PCB substrate on the top layer, are provided with laid copper in the wiring area, the area of the laid copper covers the area where the metal through holes are located, and the laid copper is communicated with the metal through holes. The low-cost PCB substrate is adopted to replace a ceramic substrate, miniaturization of the high-power SIP driving module can be achieved, on the basis that the heat dissipation effect is guaranteed, the cycle cost and the material cost are reduced, applicability is high, and the SIP driving module can normally work under various working conditions.

A battery pack includes a battery module including battery cells and a bus bar configured to electrically connect the battery cells, and a circuit board connected to the battery module that includes a first portion extending in a longitudinal direction of the battery module, second portions extending from the first portion in a direction crossing the first portion that each include a circuit pattern, and a third portion connected to an end of each of the second portions and connected to the bus bar. Each second portion extends straight without being bent or folded.

Provided is a method for producing a wiring circuit board that includes the steps of forming a first metal layer on a metal supporting substrate; forming an insulating layer on the first metal layer; removing a portion of the first metal layer, the portion being exposed at the opening portion of the insulating layer, to expose the metal supporting substrate at the opening portion; forming a second metal layer on a portion of the metal supporting substrate exposed at the opening portion and on the insulating layer; and forming a conductive layer on the second metal layer. A wiring circuit board includes the metal supporting substrate, the first metal layer having a first opening portion, the insulating layer having a second opening portion having an opening along the first opening portion, the second metal layer connected to the metal supporting substrate, and the conductive layer on the second metal layer.

The present disclosure relates to the technical field of circuit boards, and provides a method for manufacturing a chip-embedded circuit board, and a chip-embedded circuit board. The method for manufacturing a chip-embedded circuit board includes: providing a mounting recess in a pre-manufactured circuit board; embedding a chip packaging unit in the mounting recess such that upper and lower surfaces of the chip packaging unit are flush with upper and lower surfaces of the pre-manufactured circuit board, respectively; and forming an electrode lead-out structure on the upper surface of the pre-manufactured circuit board by: stacking a dielectric layer and a conductive layer on the upper surface of the pre-manufactured circuit board, providing through holes in the dielectric layer and the conductive layer to expose electrodes of the chip packaging unit, and filling the through holes with a conductive material to form electrode leads of the chip packaging unit; and providing slots in a back surface of the chip packaging unit to form heat dissipation fins in such a way that the heat dissipation fins are flush with the lower surface of the pre-manufactured circuit board. The manufacturing method of the present disclosure can manufacture a chip-embedded circuit board with a robust structure that meets the operational performance and the heat dissipation performance.

The application provides a driving circuit board, a display module and a display device, relates to the technical field of display, and can increase the number of output channels of a driving chip, reduce the size of a binding area connected with the driving chip, and make the high-resolution requirement of a display substrate adapt to the narrow-frame requirement. The driving circuit board comprises a driving chip, a circuit board body, a plurality of driving pins and a signal circuit, the driving pins comprise first driving pins and second driving pins, the first driving pins are used for electrically connecting a display substrate, the second driving pins are electrically connected with the signal circuit, the driving chip is electrically connected with the circuit board body through the driving pins, the first driving pins are arranged in at least three rows along a first direction, the first driving pins are arranged in at least three rows along a second direction, the first direction intersects with the second direction, the circuit board body comprises at least two conductive layers, and the number of conductive layers electrically connected with the at least two rows of first driving pins arranged along the second direction is different.

Disclosed are a thin, stretchable and flexible printed circuit and a manufacturing method therefor. The manufacturing method comprise: attaching an adhesion-reducing carrier film to a first side of a flexible circuit board provided with a circuit layer and two protective films, wherein the adhesion-reducing carrier film has a large first preset adhesive force; and attaching a first elastomer composite film, and then performing an adhesion-reducing operation on the adhesion-reducing carrier film to allow the adhesion-reducing carrier film to have a small second preset adhesive force. The elastomer composite film is formed by two polymer films with different melting points. The invention can increase the product yield in mass production based on the adhesion-reducing carrier film and can wrap a serpentine circuit by means of the elasticity of a composite structure of the polymer films to realize thin and light design and miniaturization.

The present invention provides a wiring board, module, and image display device that suppress the generation of moiré patterns and flicker caused by reflected light. [Solution] The wiring board comprises a substrate and a mesh wiring layer 20, and has an electromagnetic wave transmission and reception function. The substrate is transparent. The mesh wiring layer is configured as an antenna and has wiring 21, 22. Two or more openings 23 are formed by being surrounded by the wiring, and the planar shape of the openings is a polygon with opposing sides parallel, and when the distance between sides extending in the first direction (Y direction) in each opening is d, and the average value of the distance between sides extending in the first direction in 100 consecutively adjacent openings or all openings is D, then 95% or more of the 100 openings or all openings are 0.70D ≤ d ≤ 0.98D Does it satisfy the following relationship? 1.02D ≤ d ≤ 1.30D This relationship is satisfied.

The application discloses a circuit trace, a circuit element and an electronic device. The circuit trace comprises a solid-state metal trace, a liquid-state metal trace and a connecting structure. The connecting structure is connected between the solid-state metal trace and the liquid-state metal trace to realize physical isolation and electrical connection between the solid-state metal trace and the liquid-state metal trace. The circuit trace provided by the application avoids corrosion of the liquid-state metal trace on the solid-state metal trace by arranging the connecting structure, improves the reliability of the circuit trace, and thus effectively enhances the integrity of signals transmitted through the circuit trace.