2303results about "Conductive pattern layout details" patented technology

The invention relates to the technical field of printed embedded PCBs, and discloses an embedded PCB and a manufacturing method thereof.The embedded PCB comprises a daughter board, a first dielectric layer and a first circuit layer which are sequentially arranged in a stacked mode in the first direction, a device is embedded in the daughter board, the device is located on the side, close to the first dielectric layer, of the daughter board, and the first dielectric layer is located on the first circuit layer. One side, close to the first dielectric layer, of the device is provided with a first part, and the first part is provided with a first protection part; a first connection hole is formed in the first dielectric layer, a first conductive part is filled in the first connection hole, the first protection part is connected and electrically conducted with the first conductive part, and the first conductive part is connected and electrically conducted with the first circuit layer. The embedded PCB and the manufacturing method thereof provided by the invention are used for improving the problem of poor hole filling in the electroplating hole filling process in the related technology.

The present disclosure relates to a high-precision multilayer PCB and a 3D printing preparation method thereof. The method includes: S1, forming a 3D circuit layer on an upper surface of a substrate; S2, forming a metal pillar at a preset position of the current 3D circuit layer by stacking; S3, forming an insulating layer on an upper surface of the current 3D circuit layer, and leading the corresponding metal pillar out of the formed insulating layer in advance by drilling a hole in the insulating layer and filling the drilled hole with the nanoscale metal slurry; S4, forming a pad layer on an upper surface of the current insulating layer and executing step S5 if the current insulating layer is a top layer; repeatedly executing steps S1 and S2 by using the current insulating layer as a new substrate and executing step S6 if not; S5, connecting the corresponding metal pillar or leading it out in advance and connecting to the pad layer, to complete the preparation of the multilayer PCB; and S6, connecting the corresponding metal pillar or leading it out in advance and connecting to the current 3D circuit layer, and returning to step S3. According to the present disclosure, the high-precision multilayer PCB with high interconnect precision can be prepared.

A network of Intermediate Device Structure (IDS) members communicatively coupled, mounted to elevated structure / s within urban settings, each configured to operate by a processor / controller with resident code, and in real time receive sensed environmental inputs from each IDS' vicinity, remote data / instruction / s processing the inputs with resident code parameters generating outputs that are configured to mitigate / avert intermittent environmental events harmful / hazardous to humans. The IDS's include a launch and charging pad that hosts a UAV, which patrols an area within communication range of at least one of the IDSs so the UAV, perhaps with AI-engine assistance, can detect events in the area patrolled by the UAV.

The invention discloses a structure and a manufacturing method of a circuit board with interconnection of any layers of through holes, two ends of an isolation strip which needs to be insulated between layers at the through holes of the circuit board are respectively provided with a concave etching position, the concave etching positions serve as isolation rings, and the concave etching positions are formed after an isolation disc arranged on an inner-layer core plate is etched in a concave mode; the manufacturing method comprises the following steps that a circuit board is provided, a drilling position is arranged on the circuit board, and the drilling position is a position needing to be drilled in subsequent processing; the two ends of the interlayer isolation strip needing insulation at the drilling position of the circuit board are each provided with an isolation disc with the outer diameter larger than the outer diameter of the drilling position. A through hole is drilled in the position, corresponding to the drilling position, of the circuit board, so that the isolation disc on the inner layer is exposed in the through hole, then the isolation disc in the hole is removed through concave etching, and a concave etching position serving as an isolation ring is formed; and after the circuit board is subjected to copper deposition and electroplating, a structure of interconnection of any layers of the through holes is formed. According to the method, a plurality of signals can be transmitted in the same hole, and the purpose of interconnection of any layer in the through hole can be achieved.

The invention relates to the technical field of circuit board manufacturing, and discloses a circuit board manufacturing method, an impedance compensation method and a circuit board, and the circuit board manufacturing method comprises the steps: obtaining an inner-layer circuit design drawing of the circuit board; dividing the inner-layer circuit design drawing into a preset number of areas; calculating the residual copper rate of each region; and according to a deviation value between the residual copper rate of each region and a preset standard residual copper rate, adjusting the line width of the line in the corresponding region of the inner-layer line design drawing so as to prepare the inner-layer line of the circuit board by using the adjusted inner-layer line design drawing. The problem of inconsistent impedance caused by dielectric thickness change is solved, and high-speed signal transmission of the circuit board is more stable and reliable.

A printed circuit board includes a substrate with first through-portion; a magnetic layer disposed in at least a portion of the first through-portion and having a second through-portion; an electronic component having at least a portion disposed in the second through-portion; a first wiring pattern disposed on an upper surface of the magnetic layer; a second wiring pattern disposed on a lower surface of the magnetic layer; and a first through-via having at least a portion surrounded by the magnetic layer, and including a first via pattern connecting the first and second wiring patterns to each other.

The invention provides a charge control electric field driven jet micro-nano 3D printing curved surface conformal multilayer circuit method and system. A high-precision conformal thin film dielectric layer is formed by utilizing charge injection electrowetting and contact electric field driving jet micro-nano 3D printing; and the high-resolution curved surface conformal circuit is manufactured by combining active residual charge elimination and non-contact electric field driving spray deposition micro-nano 3D printing. Through organic combination of active charge regulation and control and electric field driven jet micro-nano 3D printing, a high-precision conformal film dielectric layer and conductive layer conformal circuit and an interlayer interconnection circuit thereof are integrally printed. According to the curved surface conformal multilayer circuit manufacturing method, efficient, low-cost, high-precision and uniform manufacturing of the curved surface conformal multilayer circuit is achieved.

The present disclosure relates to a printed circuit board including: a first insulating layer; a first wiring layer disposed on the first insulating layer; a second wiring layer disposed on the first insulating layer; a second insulating layer disposed on the first insulating layer; a third wiring layer disposed on the second insulating layer; a first cavity penetrating through at least a portion of the first insulating layer; and a second cavity penetrating through at least a portion of the second insulating layer and connected to the first cavity. The first and second cavities have different wall surface inclinations, and a depth of the first cavity is smaller than a thickness of the first insulating layer and is greater than a thickness of each of the first and second wiring layers.

A circuit carrier includes a substrate, a first build-up circuit structure, a second build-up circuit structure, a fine redistribution structure and at least one conductive through hole. The substrate has a top surface and a bottom surface opposite to each other. The first build-up circuit structure is disposed on the top surface of the substrate and electrically connected to the substrate. The second build-up circuit structure is disposed on the bottom surface of the substrate and electrically connected to the substrate. The fine redistribution structure is directly attached on the first build-up circuit structure, wherein a line width and a line spacing of the fine redistribution structure are smaller than those of the first build-up circuit structure. The conductive through hole penetrates the fine redistribution structure and a portion of the first build-up circuit structure and is electrically connected to the fine redistribution structure and the first build-up circuit structure.

The present invention provides a semiconductor apparatus achieving interconnection by using an on-chip all-optical switching network module and a manufacturing method therefor. The semiconductor apparatus comprises: a circuit board, which has a plurality of electrical connection paths; an on-chip all-optical switching network module, which is disposed on the circuit board, the on-chip all-optical switching network module comprising a photonic chip and a plurality of analog electrical chips for transceiving which are arranged above the photonic chip, the photonic chip comprising a plurality of communication nodes, a plurality of optical connection paths, and at least one on-chip optical switch which are in corresponding communication connection with the plurality of analog electrical chips for transceiving, and the on-chip optical switch being configured to alter the connection topology among the plurality of communication nodes; and a plurality of computing modules, which are arranged on the circuit board and, by means of the electrical connection paths on the circuit board, are in corresponding communication connection with the plurality of analog electrical chips for transceiving of the on-chip all-optical switching network module, so that the connection topology among the plurality of computing modules can be altered by the on-chip optical switch.

An electronic device includes a substrate, a through hole, a buffer layer, a first circuit structure, and an electronic component. The substrate includes a first side and a second side opposite to the first side. The through hole penetrates the substrate. The buffer layer is disposed on the first side of the substrate, the second side of the substrate, and an inner wall of the through hole. The first circuit structure is disposed on the first side. The electronic component is disposed on the first circuit structure. The buffer layer includes a plurality of layers.

The invention discloses an integration and optimization method of a multilayer circuit board in a photovoltaic inverter, and the method comprises at least seven layers of functional stacked structures which are an electromagnetic shielding layer, a power device layer, a first insulating dielectric layer, a control circuit layer, a second insulating dielectric layer, a heat dissipation substrate layer and a mechanical strengthening layer from top to bottom in sequence. Wherein the power device layer adopts a three-dimensional embedded packaging technology to integrate an IGBT module and a SiC MOSFET module, and a gate drive circuit of the power device layer is embedded into a first insulating dielectric layer in a coplanar waveguide structure; the heat dissipation substrate layer is provided with a micro-channel array with gradient apertures, and the inner wall of each micro-channel is subjected to anodic oxidation treatment to form an Al2O3 ceramic layer with the thickness of 20-50 microns.

The invention discloses a broadband multi-level three-dimensional vertical interconnection structure based on an HTCC technology, and belongs to the field of radio frequency front-end system integration. The structure comprises a PCB mother board, a ball grid array and an SiP module which are sequentially arranged from bottom to top, in the SiP module, the chips are distributed among different levels, and a connection mode of the chips among the different levels is set; a radio frequency signal is transmitted upwards through the PCB mother board, and after flowing through the lower-layer bare chip, the radio frequency signal is orderly transmitted upwards through the strip line and the signal via hole in the HTCC and finally transmitted to the surface-layer chip, so that a complete and efficient vertical interconnection signal transmission system is formed. According to the invention, the layout flexibility of interconnection lines among the chips is improved, the wiring crosstalk among the chips is reduced, the three-dimensional integration scene of bare chips in the HTCC is greatly widened, high-density SiP packaging is realized, and the strict technical requirements on radio frequency signal transmission, processing and chip interconnection under a complex circuit architecture can be met.

A method of forming a heat spreader on a printed circuit board (PCB) having a power dissipating component operably coupled to the heat spreader, comprising attaching a thermally and electrically conductive structure to a first side of the PCB to define a first PCB region including the component and a second PCB region not including the component. The underside of the component is underfilled to electrically insulate its solder contacts. A first protective layer is applied to the second region of the PCB. A conductive plating film is deposited on the first region, the second region, and the structure. A second protective layer is applied over the portion of the conductive plating film covering the second region, leaving the remaining portion of the conductive plating film exposed. An electrically conductive and thermally conductive layer is electroplated onto the exposed region of the conductive plating film to form a heat exchanger in the first region.

The application discloses a POL integrated power supply module and a production process thereof. The POL integrated power supply module comprises an inductor assembly, a substrate, a switch unit and an input capacitor. The substrate comprises a first surface and a second surface which are opposite, the inductor assembly is arranged on the second surface of the substrate, and the switch unit and the input capacitor are arranged on the first surface of the substrate. According to the POL integrated power supply module, a structural layout is provided, and the ultrathin thickness of the POL integrated power supply module is achieved. According to the POL integrated power supply module with the structure, a corresponding production process is provided, the production process is simplified, and the reliability of the POL integrated power supply module is improved.

The invention relates to the field of printed circuit board manufacturing, and particularly discloses a method for removing a wet film in a selective process of a printed circuit board and the printed circuit board. The method comprises the following steps: S1, providing a printed circuit board with a wet film formed on the surface; s2, a primary bulking process; s3, a pressurized ultrasonic spraying and bulking process; s4, a preliminary film stripping process; s5, a first pressurized spraying film stripping process; s7, a multi-section type pressure difference pressurization spraying washing process; wherein a film stripping agent solution with the mass concentration of 10-20 kg / m < 3 > is adopted in the step S2, the step S3, the step S4 and the step S5; the film removing agent comprises the following components in percentage by mass: 15-55% of compound alkali, 1-10% of a polyether surfactant and the balance of water. The wet film on the surface of the printed current board can be rapidly and thoroughly removed, meanwhile, the oxidation blackening phenomenon cannot occur on the copper surface after film removal, the product quality is improved, factory benefits are improved, and the method has excellent application prospects.

An antenna assembly includes a stack and an antenna structure. The stack includes at least one electrically conductive layer structure and at least one electrically insulating layer structure, and a component, at least partially embedded in the stack. At least a portion of the electrically conductive layer structure is provided at the external side of the stack and is configured to act at least as part of an electromagnetic wave coupling structure. The component is coupled to the electromagnetic wave coupling structure. The antenna structure provides an opening to a channel. The stack and the antenna structure are connected so that the electromagnetic wave coupling structure and the opening to the channel face each other.

A quasi-planar transformer can include a first winding comprising one or more turns of wire, a second winding comprising one or more turns of a conductive trace disposed on a printed circuit board, and a magnetic core positioned with respect to the first and second windings so as to provide a magnetic flux path coupling the first and second windings. The first winding can be a primary winding having a first half wound in a clockwise direction on a first side of the printed circuit board and a second half wound in a counterclockwise direction on a second side of the printed circuit board, wherein the first and second halves are formed of a single continuous wire. The single continuous wire can pass through an opening in the printed circuit board. The first and second halves of the primary winding can be secured to the printed circuit board.

The invention provides a precise circuit packaging substrate and a manufacturing method thereof, and the method comprises the following steps: providing a substrate which comprises a core plate and a conductive metal layer at least disposed on the first surface of the core plate; forming a grain boundary buffer material layer on the surface, far away from the core plate, of the conductive metal layer, and pretreating the grain boundary buffer material layer to obtain a grain boundary buffer layer; providing an electroplating shielding layer, and forming a base circuit layer on the surface, away from the substrate, of the grain boundary buffer layer based on the electroplating shielding layer; at least one layer of wiring structure is formed on the surface, away from the substrate, of the base circuit layer, the wiring structure comprises a dielectric layer covering the exposed surface of the base circuit layer, a metal connecting layer penetrating through the dielectric layer and a conductive circuit layer located on the surface, away from the base circuit layer, of the dielectric layer, and the metal connecting layer is electrically connected with the base circuit layer and the conductive circuit layer. According to the precise circuit packaging substrate and the manufacturing method thereof, the problem of circuit separation in the process of manufacturing the precise circuit packaging substrate is avoided, and the yield of the packaging substrate is improved.

A display apparatus includes a display panel, a touch layer, and a flexible printed circuit (FPC) including a main FPC and a bridge FPC. A third soldering region and a fourth soldering region of the bridge FPC are respectively soldered to a first soldering region and a second soldering region of the main FPC. Ends of each first touch connection line are electrically connected to a touch chip and a first touch lead. Ends of each second touch connection line are electrically connected to a pad on the second soldering region and a second touch lead. Ends of each third touch connection line are electrically connected to a pad on the first soldering region and the touch chip. Ends of each touch transfer line are electrically connected to a pad on the third soldering region and a pad on the fourth soldering region.

The invention discloses an optimized high-speed differential via hole structure, which is characterized in that high-speed differential via holes are arranged in each wiring layer, each wiring layer is provided with a corresponding anti-pad, and corresponding wires are laid in the high-speed differential via holes; marking the part of the wire in each suspension area outside the corresponding anti-bonding pad close to the wiring layer as a suspension wire, marking the part of the wire in the high-speed differential via hole as a via hole wire, thickening the suspension wire, and controlling the suspension wire to be thicker than the via hole wire; and reducing the size of the anti-bonding pad in each non-adjacent wiring layer, and controlling the size of the anti-bonding pad in each non-adjacent wiring layer to be smaller than the size of the anti-bonding pad in each adjacent wiring layer. According to the invention, through combined use of the thickened suspension line, reduction of the non-adjacent wiring layer anti-bonding pad and increase of the adjacent wiring layer anti-bonding pad, the impedance of each part is effectively adjusted, and the impedance requirement of high-speed signal transmission is met; and the optimized mode is high in universality, simple and efficient.

A printed circuit board according to an embodiment comprises: an insulating layer; a circuit pattern disposed on the upper surface of the insulating layer; a support layer which is disposed on the upper surface of the insulating layer to expose the upper surface of the circuit pattern and is in contact with the sides of the circuit pattern; and a protective layer disposed on the upper surfaces of the support layer and the circuit pattern, wherein the upper region of the insulating layer comprises a first region and a second region, and the protective layer comprises an open region exposing the upper surfaces of the support layer and the circuit pattern that are disposed in the first region, and the support layer comprises a first upper surface positioned at the highest level among the upper surfaces of the support layer and a second upper surface positioned at the lowest level among the upper surfaces of the support layer, the second upper surface being lower than the first upper surface, and the protective layer comprises a first portion which contacts the upper surface of the circuit pattern of the first region and a second portion which contacts the upper surface of the support layer of the first region, and the second portion of the protective layer contacts the second upper surface of the support layer and includes a first lower surface which is lower than the upper surface of the circuit pattern.

The invention discloses a multilayer circuit board preparation method and system based on via hole filling optimization and a multilayer circuit board, and relates to the technical field of circuit board preparation, and the method comprises the steps: obtaining the size of a via hole, calculating the depth-to-width ratio, constructing a viscosity gradient function, taking a via hole filling quality evaluation index as a first optimization target, and solving an optimal ratio; designing a vacuum degree control strategy; the current capillary pressure is obtained, differential pressure driving force is calculated according to the current through hole gas pressure intensity, the time needed for filling and the preset ultrasonic vibration duration are calculated in combination with the through hole diameter, the hole depth and the viscosity gradient function, and ultrasonic auxiliary filling is carried out while through hole filling is carried out; filling the via hole, and controlling the vacuum degree according to the vacuum degree adjusting curve; and the real-time filling rate and the cavity volume are obtained, a second target function is constructed with the difference between the minimum target filling rate and the actual filling rate and the filling cost as a second optimization target, and the optimal filling step number and the optimal single injection material volume are solved.

The invention relates to the technical field of printed circuit board manufacturing, and discloses a manufacturing method of a printed circuit board and the printed circuit board, and the manufacturing method of the printed circuit board comprises the steps: providing a substrate which comprises a dielectric layer and a metal layer, and arranging a first region and a BGA region on one surface, deviating from the dielectric layer, of the metal layer, the metal layer corresponding to the first area is provided with a plurality of shunting grooves, and the metal layer corresponding to the BGA area is provided with a plurality of BGA holes; the substrate is electroplated, an electroplated layer is formed, the electroplated layer comprises a first electroplated part, a plurality of second electroplated parts and at least one third electroplated part, the first electroplated part is located on the inner wall of the BGA hole, and the diversion grooves are filled with the second electroplated parts; and carrying out thinning treatment on the third electroplating part. According to the manufacturing method of the printed circuit board and the printed circuit board provided by the invention, the problem that the plated copper in the BGA area is not easy to remove when the surface copper thickness of the BGA area is increased by adopting a local thickening process in the related technology can be improved.

A circuit board according to an embodiment comprises a first insulating layer; a first pattern layer disposed on an upper surface of the first insulating layer; a second insulating layer disposed on the upper surface of the first insulating layer and including a cavity; and a barrier layer disposed on a first pattern layer vertically overlapping with the cavity among the first pattern layers, wherein the upper surface of the first insulating layer includes: a first upper surface vertically overlapping a lower surface of the cavity, and a second upper surface that does not vertically overlap the lower surface of the cavity, wherein the first pattern layer includes: a first pattern part disposed on the first upper surface of the first insulating layer, and a second pattern part disposed on the second upper surface of the first insulating layer, wherein an upper surface of the first pattern part is exposed through the cavity without contacting the first and second insulating layers, and wherein the barrier layer is disposed on the upper surface of the first pattern part.

The invention discloses a multi-layer circuit board structure based on an AMB technology and a preparation technology, and relates to the field of circuit board preparation, and the preparation technology comprises the following steps: providing a plurality of substrates with coating surfaces, and scanning the coating surfaces through a second laser beam to preheat the substrates, spraying welding flux on the coating surface through a spray head with a first ultrasonic generation module to form a welding flux layer; the surface of the solder layer is scanned through a third laser beam, so that the surface of the solder layer is softened, the solder layer is automatically spread and leveled, and a semi-solid solder layer is formed after cooling; and a plurality of substrates are stacked and fixed through a positioning clamp, then each solder layer is scanned through a fourth laser beam, the solder layers are vibrated by a second ultrasonic generation module, and after the solder layers are cooled and solidified to form welding spots, the multilayer circuit board structure is obtained. Through combination of laser and ultrasonic waves, the thickness of the solder layer is uniform, and the surface is smooth; bubbles and impurities in the solder layer are eliminated through laser and ultrasonic combined melting, and the problems of uneven coating and accumulation and bubbling are avoided.

A battery wiring module includes a plurality of connecting members to be connected to electrode terminals and a flexible printed circuit board having a plurality of voltage detection lines for detecting the voltages of a plurality of power storage elements via the plurality of connecting members, at least one of the plurality of voltage detection lines being constituted to include a front surface wiring and a back surface wiring respectively formed on a front surface and a back surface of the flexible printed circuit board, and a front-back conduction part passing through the flexible printed circuit board in the plate thickness direction and connecting the front surface wiring and the back surface wiring, and the resistance value per unit length of the front-back conduction part being less than or equal to the maximum resistance value per unit length of the front surface wiring and the back surface wiring.

A single circuit board assembly for forming a vehicle-motor interface, the single circuit board assembly includes a first side of a board with logic modules located thereon. The single circuit board assembly also includes a second side of the board with power modules located thereon. The board comprises a plurality of layers, the plurality of layers having at least one through via and at least one buried via defined therein, wherein the at least one through via extends through all of the plurality of layers, the at least one buried via extending through less than all of the plurality of layers.

A printed circuit board (PCB) includes a solder resist layer including at least one of an opening and a depression and a solder resist patch disposed in at least one of the opening and the depression to have an interface with the solder resist layer in at least one of the opening and the depression.

The invention discloses a multi-layer high-frequency PCB board and a preparation method thereof, belonging to the technical field of PCB board preparation. The multi-layer high-frequency PCB board is composed of an inner layer board, a heat dissipation layer and an outer layer board, and the inner layer board, the heat dissipation layer and the outer layer board are arranged in sequence from the inside to the outside, the surface of the inner layer board is covered with a layer of composite film, the heat dissipation layer is composed of a composite aerogel material, and the layers are fixed by hot pressing technology. The multi-layer high-frequency PCB board prepared by the method has excellent high frequency and heat dissipation.