Semiconductor apparatus and manufacturing method therefor

Abstract

The present invention provides a semiconductor apparatus achieving interconnection by using an on-chip all-optical switching network module and a manufacturing method therefor. The semiconductor apparatus comprises: a circuit board, which has a plurality of electrical connection paths; an on-chip all-optical switching network module, which is disposed on the circuit board, the on-chip all-optical switching network module comprising a photonic chip and a plurality of analog electrical chips for transceiving which are arranged above the photonic chip, the photonic chip comprising a plurality of communication nodes, a plurality of optical connection paths, and at least one on-chip optical switch which are in corresponding communication connection with the plurality of analog electrical chips for transceiving, and the on-chip optical switch being configured to alter the connection topology among the plurality of communication nodes; and a plurality of computing modules, which are arranged on the circuit board and, by means of the electrical connection paths on the circuit board, are in corresponding communication connection with the plurality of analog electrical chips for transceiving of the on-chip all-optical switching network module, so that the connection topology among the plurality of computing modules can be altered by the on-chip optical switch.

Description

Semiconductor device and method for manufacturing the same

[0001] This application claims priority and other related rights and interests of the Chinese patent application with an application date of November 30, 2023, application number 202311628850.1, and name “Semiconductor device and manufacturing method thereof”, and the entire content of the Chinese patent application is incorporated herein by reference. Technical Field

[0002] The present invention relates to the field of computer technology, and more particularly, to a semiconductor device and a method for manufacturing the same. Background Art

[0003] According to OpenAI data, the computational load of artificial intelligence (AI) models is growing at a rate far exceeding the growth of computing hardware power. AI accelerators are continuously achieving computing power improvements through process iterations and chip architecture innovations, and the interconnection bandwidth between AI accelerators is also increasing. AI accelerator interconnection networks have become critical to improving overall computing power. The Open Compute Project (OCP) has launched a universal form factor OCP Accelerator Module (OAM), which has been adopted by leading GPU (Graphics Processing Unit) vendors. The current mainstream universal form factor OCP AI accelerator module typically communicates point-to-point via traces 105 on a printed circuit board (PCB) 700, as shown in Figure 1. Due to the high losses in PCB traces, high-speed interfaces typically come at the cost of latency and power consumption. In addition, due to the need to use longer PCB traces, computing modules generally need to adopt long-range (LR) SerDes interfaces similar to CEI. For the fully connected structure in Figure 1, each SerDes interface needs to access a specific single computing module, which further reduces the bandwidth between each pair of computing modules.

[0004] Furthermore, because the response of electrical channels attenuates as signal rates increase, higher-speed interfaces often involve more complex architectures and circuit designs, introducing latency penalties, consuming more power, and occupying a larger chip area, thus limiting the chip's I / O (input / output) bandwidth. Furthermore, longer metal wiring distances further exacerbate circuit loss characteristics, limiting the interconnect distance between AI accelerators. Summary of the Invention

[0005] In view of the above-mentioned deficiencies in the prior art, the present invention provides a semiconductor device and a method for manufacturing the same that realizes interconnection using an on-chip all-optical switching network module.

[0006] According to one embodiment of the present invention, a semiconductor device is provided, comprising:

[0007] a circuit board having a plurality of electrical connection paths;

[0008] An on-chip all-optical switching network module, disposed on the circuit board, comprising a photonic chip and a plurality of analog electrical chips for transceiver use disposed above the photonic chip, the photonic chip comprising a plurality of communication nodes communicatively connected to the plurality of analog electrical chips for transceiver use, a plurality of optical connection paths, and at least one on-chip optical switch, the on-chip optical switch being configured to change the connection topology between the plurality of communication nodes;

[0009] Multiple computing modules are arranged on the circuit board and are communicatively connected to the multiple transceiver analog electrical chips of the on-chip all-optical switching network module through electrical connection paths on the circuit board, so that the connection topology between the multiple computing modules can be changed by the on-chip optical switch.

[0010] Compared to electrical interconnects, optical interconnect channel losses remain constant across frequencies and are significantly lower, enabling them to support longer transmission distances. The on-chip all-optical switching network module of this invention combines optical interconnect modules with optical switching technology, resulting in more uniform bandwidth within and between nodes, facilitating the large-scale expansion of computing modules.

[0011] In some embodiments of the present invention, the circuit board has a first plug-in interface, and the on-chip all-optical switching network module is removably plugged into the first plug-in interface.

[0012] In some embodiments of the present invention, the circuit board has a plurality of mounting areas, the plurality of computing modules are respectively mounted in the plurality of mounting areas, and the plurality of computing modules are communicatively connected to the first plug-in interface via the plurality of electrical connection paths.

[0013] In some embodiments of the present invention, the multiple computing modules include a first computing module and a second computing module, wherein the communication path between the first computing module and the second computing module includes: a first electrical connection path connecting the first computing module and the first plug interface, a second electrical connection path connecting the first plug interface and the first analog electrical chip for transceiver, a third electrical connection path connecting the first analog electrical chip for transceiver and the first communication node, a first optical connection path connecting the first communication node and the on-chip switch, a second optical connection path connecting the on-chip optical switch and the second communication node, a fourth electrical connection path connecting the second communication node and the second analog electrical chip for transceiver, a fifth electrical connection path connecting the second analog electrical chip for transceiver and the first plug interface, and a sixth electrical connection path connecting the first plug interface and the second computing module.

[0014] In some embodiments of the present invention, the photonic chip comprises at least two photonic integrated circuit sub-chips, and adjacent photonic integrated circuit sub-chips are optically interconnected with each other;

[0015] Each of the photonic integrated circuit sub-chips has at least two of the communication nodes, a plurality of the optical connection paths, and at least one on-chip optical switch.

[0016] On the photonic chip, any two communication nodes communicate with each other via at least one on-chip optical switch and the optical connection path.

[0017] In some embodiments of the present invention, the on-chip all-optical switching network module further includes at least one optical switching control analog electrical chip, which is correspondingly disposed above at least one of the on-chip optical switches to control the corresponding on-chip optical switch. Each on-chip optical switch on the photonic chip and the corresponding optical switching control analog electrical chip constitute an on-chip optical switching module. Accordingly, the on-chip all-optical switching network comprises multiple on-chip optical switching modules.

[0018] In some embodiments of the present invention, each of the communication nodes includes:

[0019] an electro-optical conversion unit, configured to convert information to be transmitted carried by the electrical signal into an optical signal; and

[0020] The photoelectric conversion unit is used to convert the received optical signal into an electrical signal carrying the received information.

[0021] In some embodiments of the present invention, the multiple analog electrical chips for transmission and reception are installed on the photonic chip and are respectively arranged corresponding to the multiple communication nodes, and are configured so that any two of the analog electrical chips can communicate through the corresponding communication nodes in the photonic chip and at least one on-chip optical switch.

[0022] In some embodiments of the present invention, the electro-optical conversion unit includes a modulator or a modulator array; and / or the photoelectric conversion unit includes a detector or a detector array.

[0023] In some embodiments of the present invention, the modulator comprises a microring modulator, a Mach-Zehnder modulator, or an electro-absorption modulator; and / or the detector comprises a microring detector or a photodiode.

[0024] In some embodiments of the present invention, each of the photonic integrated circuit sub-chips further has: an optical input coupler and an optical power splitter, wherein, in the photonic chip, the optical input coupler on one of the photonic integrated circuit sub-chips is configured to couple light from an off-chip light source into the photonic chip; and the optical power splitter is optically connected to the optical input coupler configured to couple light from an off-chip light source into the photonic chip, and is configured to separate the light from the optical input coupler into multiple optical outputs, wherein each of the multiple optical outputs has substantially the same power, and the multiple optical outputs are transmitted to each modulator.

[0025] In some embodiments of the present invention, in the photonic chip, the optical connection path includes a first type optical waveguide, wherein two adjacent photonic integrated circuit sub-chips are optically interconnected via the first type optical waveguide.

[0026] In some embodiments of the present invention, the first type optical waveguides facing each other at the junction of two adjacent photonic integrated circuit sub-chips are configured as a structure with a waveguide cross section gradually increasing from one photonic integrated circuit sub-chip toward another photonic integrated circuit sub-chip.

[0027] In some embodiments of the present invention, the optical connection path further includes a second type of optical waveguide, wherein, in each of the photonic integrated circuit sub-chips, the second type of optical waveguide and the first type of optical waveguide are located in different layers; in each of the photonic integrated circuit sub-chips, one or more of the on-chip optical switch, electro-optical conversion unit, optoelectronic conversion unit, optical input coupler, and optical power splitter are optically connected to the corresponding first type of optical waveguide through different second type optical waveguides; and the second type of optical waveguide and the first type of optical waveguide are optically connected through an evanescent wave coupler.

[0028] In some embodiments of the present invention, the on-chip optical switch is a silicon photonic switch comprising a plurality of optical switching units, wherein the optical switching control analog electronic chip is configured to control the plurality of optical switching units to orchestrate and switch data transmitted in the silicon photonic switch, thereby enabling the connection topology between the plurality of communication nodes to be changed.

[0029] In some embodiments of the present invention, the optical switching unit has a Mach-Zehnder interferometer structure.

[0030] In some embodiments of the present invention, the photonic integrated circuit sub-chip is manufactured by exposure using a full mask.

[0031] In some embodiments of the present invention, each of the computing modules includes a digital electronic chip and a memory, and the digital electronic chip and the memory are integrally packaged on a packaging substrate.

[0032] In addition, one embodiment of the present invention further provides a method for manufacturing the semiconductor device, which includes:

[0033] providing a circuit board having a plurality of electrical connection paths;

[0034] An on-chip all-optical switching network module is provided, the on-chip all-optical switching network module comprising a photonic chip and a plurality of analog electrical chips for transceiver disposed above the photonic chip, the photonic chip comprising a plurality of communication nodes communicatively connected to the plurality of analog electrical chips for transceiver, a plurality of optical connection paths, and at least one on-chip optical switch, the on-chip optical switch being configured to change a connection topology between the plurality of communication nodes;

[0035] Provide multiple computing modules;

[0036] The all-optical switching network module and the multiple computing modules are arranged on the circuit board, wherein the multiple computing modules are communicatively connected with the multiple transceiver analog electrical chips of the on-chip all-optical switching network module through electrical connection paths on the circuit board, so that the connection topology between the multiple computing modules can be changed by the on-chip optical switch.

[0037] In some embodiments of the present invention, the circuit board has a first plug-in interface, and arranging the all-optical switching network module on the circuit board includes: removably plugging the on-chip all-optical switching network module into the first plug-in interface.

[0038] In some embodiments of the present invention, the photonic chip includes at least two photonic integrated circuit sub-chips, adjacent photonic integrated circuit sub-chips are optically interconnected with each other, and the photonic integrated circuit sub-chips are manufactured by exposure using a full mask.

[0039] The application of the present invention can achieve the following beneficial effects:

[0040] The connection topology between each communication node (and its corresponding analog electronic chip for transceiver) in the on-chip all-optical switching network module of the present invention can be reconfigured and adjusted via the on-chip optical switch, making the interconnection between the computing modules (including digital electronic chips) of the semiconductor device no longer static but reconfigurable in the field. This offers many benefits, the most important of which is the ability to change the topology between computing modules based on the specific artificial intelligence model. From a topological perspective, the data flow requirements of different artificial intelligence models can be roughly divided into three categories: data parallelism, where each chip loads the entire model, and different chips process different data in the data set; model parallelism, where some layers in the model are particularly large, so each chip is only responsible for computing a portion of such a large layer; and pipeline parallelism, where different layers in the model are assigned to different chips for computing, and different data flows correspond to different computing interconnection topologies. Using the reconfigurable optical interconnect of the present invention, different chip interconnection topologies can be quickly switched, effectively improving bandwidth utilization and enhancing the scalability of artificial intelligence computing systems. This allows multiple computing modules to efficiently and reliably work together to accelerate such large models. In addition, the on-chip all-optical switching network module consumes only a few hundred milliwatts of power, which is several orders of magnitude lower than the power consumption of electrical switches. The reconstruction delay is generally in the microsecond or even nanosecond level, which can realize real-time optical path reconstruction during artificial intelligence model training.

[0041] In the semiconductor device of this invention, the photonic chips of the on-chip all-optical switching network module are interconnected via fully masked photonic integrated circuit sub-chips. With the exception of the silicon nitride exposure mask connecting the optical coupler for the input laser to the communication node, the exposure mask for all other components on the photonic integrated circuit sub-chips is identical, saving chip tape-out costs. Furthermore, the on-chip all-optical switching network architecture reuses multiple analog electronic chips for transmission and reception, improving system energy efficiency while overcoming the limitations of chip mask size and increasing the system's total computing throughput.

[0042] Furthermore, commercial silicon photonic switches often face issues with fiber coupling and polarization dependence. However, the present invention utilizes an optical switch directly on-chip (i.e., an on-chip optical switch), thus circumventing these issues. Traditional optical switches typically use optical fiber as input and output interfaces, with the spacing between arrayed optical fibers typically being 250 μm or 127 μm. For optical switches with dozens of input and output optical ports, this not only consumes a significant amount of chip area but also reduces the fiber-to-chip coupling yield, exacerbating the optical coupling loss problem. The present invention overcomes this optical coupling loss problem by utilizing an optical switch directly on-chip. Furthermore, because conventional sub-micron silicon-on-insulator waveguides exhibit strong birefringence, the effective refractive index differs significantly between transverse electric and transverse magnetic polarizations. Consequently, couplers and phase shifters based on these waveguides also exhibit polarization dependence. For optical switches with fiber input and output, reducing device polarization dependence has always been a challenge in silicon-based optical switch design. However, the present invention utilizes an optical switch directly on-chip, with fixed waveguide input and output polarizations, cleverly avoiding the polarization dependence challenges of silicon photonic switches and providing improved waveguide input and output stability. The on-chip optical switch is compatible with the silicon photonic process of the photonic chip, which simplifies the process flow and saves costs.

[0043] Furthermore, the on-chip all-optical switching network module of the present invention is mounted or plugged into a circuit board, and is therefore also referred to as an on-board all-optical switching network module. The on-chip all-optical switching network module or on-chip optical switch and computing module or digital electronic chip do not need to be packaged together; instead, they can be separately mounted on the circuit board, providing convenience, flexibility, good scalability, and strong controllability.

[0044] The various aspects, features, advantages, etc. of the present invention will be described in detail below in conjunction with the accompanying drawings. According to the following detailed description in conjunction with the accompanying drawings, the above-mentioned various aspects, features, advantages, etc. of the present invention will become more clear. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] FIG1 is a schematic diagram showing point-to-point full interconnection between eight computing modules in a conventional semiconductor device through circuit board traces.

[0046] FIG. 2 is a schematic diagram illustrating a planar layout of a semiconductor device according to an embodiment of the present invention.

[0047] 3A to 3C illustrate variations in the connection topology between eight computing modules in the semiconductor device shown in FIG. 2 .

[0048] FIG. 4 is a schematic diagram illustrating a planar layout of an on-chip all-optical switching network module in the semiconductor device shown in FIG. 2 .

[0049] FIG. 5 is a schematic diagram illustrating a packaging structure of the semiconductor device shown in FIG. 2 .

[0050] FIG6 is a schematic diagram showing the structure of an on-chip optical switch composed of a plurality of optical switching units.

[0051] FIG. 7 is a schematic diagram showing the structure of the optical switching unit in FIG. 6 .

[0052] FIG8 is a schematic diagram illustrating a spliced ​​coupler for interconnecting optical waveguides of adjacent photonic integrated circuit sub-chips in the on-chip all-optical switching network module shown in FIG4 .

[0053] 9 is a schematic diagram illustrating evanescent wave couplers interconnecting optical waveguides of different layers in the photonic integrated circuit sub-chip of the on-chip all-optical switching network module shown in FIG. 4 . DETAILED DESCRIPTION

[0054] Exemplary embodiments will be described in more detail below with reference to the accompanying drawings. Certain terms may be used in the description for reference purposes only and are not intended to limit the scope of protection. For example, terms such as "top," "bottom," "upper," "lower," "above," and "below" may be used to refer to directions in the accompanying drawings to which reference is made. Terms such as "front," "back," "rear," "side," "outside," and "inside" may be used to describe the orientation and / or position of parts of a component within a consistent but arbitrary reference frame, which can be clearly understood by reference to the text describing the component in question and the associated drawings. Unless the context clearly indicates, "first," "second," and other similar numerical terms do not imply a sequence or order.

[0055] It should be understood that when an element or feature is referred to as being "on," "connected to," or "coupled to" another element or layer, it can be directly on, connected to, or coupled to the other element or feature, or one or more intervening elements or features may be present. Additionally, it should be further understood that when an element or feature is referred to as being "between" two elements or features, it can be the only element or feature between the two elements or features, or one or more intervening elements or features may also be present.

[0056] The terms used herein are for the purpose of describing specific embodiments, but are not intended to limit the present invention. Such terms may include the words specifically mentioned herein, their derivative words and words of similar meaning. As used herein, the singular form "one" is intended to also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "comprise", "include" and "have" specify the existence of stated features, integral bodies, steps, operations, elements and / or parts in this article, but do not exclude the existence or addition of one or more other features, integral bodies, steps, operations, elements, parts and / or their sets. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. Expressions such as "at least one of ... " modify the entire list of elements when they are before a list of elements, rather than modifying the separate elements of the list.

[0057] As used herein, "substantially," "about," and similar terms are used as terms of approximation rather than as terms of degree, and are intended to take into account the inherent variations in measured or calculated values ​​that one of ordinary skill in the art will recognize. As used herein, the terms "use," "using," and "used" may be considered synonymous with the terms "utilize," "utilizing," and "utilized," respectively.

[0058] FIG2 illustrates an exemplary embodiment of a semiconductor device according to the present invention. As shown in FIG2 , the semiconductor device includes a circuit board 500, an on-chip all-optical switching network module 600, and multiple computing modules 100. The circuit board 500, such as a PCB, is configured with multiple electrical connection paths 106. The on-chip all-optical switching network module 600 and computing modules 100 are disposed on the circuit board 500. In this exemplary embodiment, eight computing modules 100 and one on-chip all-optical switching network module 600 are disposed on the circuit board 500. Each computing module 100 is electrically connected to the on-chip all-optical switching network module 600 via an electrical connection path 106 and communicates with each other. The electrical connection path 106 comprises traces on the circuit board 500.

[0059] In conjunction with Figure 4, the on-chip all-optical switching network module 600 includes a photonic chip 200 and multiple analog electrical chips for transceivers 203 arranged above the photonic chip. The photonic chip includes multiple communication nodes (TX / RX) 201, multiple optical connection paths, and at least one on-chip optical switch 202. The on-chip optical switch is configured to change the connection topology between the multiple communication nodes. Multiple computing modules 100 are correspondingly connected to the multiple analog electrical chips for transceivers 203 of the on-chip all-optical switching network module 600 through the electrical connection paths on the circuit board 500. For example, the computing modules 100 arranged on the circuit board are electrically connected to the analog electrical chips for transceivers above the photonic chip through electrical traces on the circuit board using a long-distance SerDes interface. As a result, the connection topology between the multiple computing modules 100 can be changed by the on-chip optical switch. Figures 3A to 3C are partial schematic diagrams showing the optional connection topology structures between the eight computing modules 100 in Figure 2. The on-chip all-optical switching network module 600 can reconfigure the connection topology between the eight computing modules 100. On-chip optical switches typically change the transmission path of optical signals based on thermo-optical and electro-optical principles, with reconstruction delays typically in the microsecond or even nanosecond range. Therefore, the on-chip optical network can change the paths connecting inputs and outputs in real time. By controlling the optical switching network, the connection topology between the computing modules 100 can be changed in real time to full interconnection (Figure 3A), ring (Figure 3B), point-to-point (Figure 3C), or any other optional form. As shown in Figures 3A to 3C, the eight computing modules 100 are numbered 0 to 7, respectively. The communication bandwidth between computing module 0 and computing module 1 can be switched in real time between bandwidth B (full interconnection), bandwidth 4B (ring), bandwidth 8B (point-to-point), or other optional forms. This can match the bandwidth requirements of different communication algorithms, improve bandwidth utilization, and thus improve the overall operating efficiency of the artificial intelligence computing system.

[0060] In some embodiments of the present invention, the computing module 100 includes a digital electronic chip 101 and a memory 102, wherein the digital electronic chip 101 and a series of high-bandwidth memories (HBMs) are packaged on a silicon interposer 103, so that the computing module 100 is entirely packaged on a packaging substrate 104. The circuit board 500 has multiple mounting areas, and the multiple computing modules 100 are respectively mounted in the multiple mounting areas.

[0061] In some embodiments of the present invention, the circuit board 500 has a first plug-in interface, into which the on-chip all-optical switching network module 600 is removably inserted. The multiple computing modules 100 are communicatively connected to the first plug-in interface via the multiple electrical connection paths. Thus, high-speed electrical signals on the digital electronic chip 101 are transmitted to the edge of the on-chip all-optical switching network module 600 via the traces of the packaging substrate 104 and the traces 106 of the circuit board 500. Signal amplification and electro-optical / photoelectrical conversion are performed by the components in the on-chip optical network module 600. The on-chip optical switch then reconfigures the optical network, changing the interconnection topology between the computing modules 100 or their digital electronic chips 101.

[0062] In some embodiments of the present invention, the multiple computing modules 100 include a first computing module and a second computing module, wherein the communication path between the first computing module and the second computing module includes: a first electrical connection path connecting the first computing module and the first plug interface, a second electrical connection path connecting the first plug interface and the first analog electrical chip for transceiver, a third electrical connection path connecting the first analog electrical chip for transceiver and the first communication node, a first optical connection path connecting the first communication node and the on-chip switch, a second optical connection path connecting the on-chip optical switch and the second communication node, a fourth electrical connection path connecting the second communication node and the second analog electrical chip for transceiver, a fifth electrical connection path connecting the second analog electrical chip for transceiver and the first plug interface, and a sixth electrical connection path connecting the first plug interface and the second computing module. In some embodiments of the present invention, the electrical connection path includes metal traces, conductive vias, etc., and the optical connection path includes optical waveguides, etc.

[0063] In an exemplary embodiment, as shown in FIG4 , the on-chip all-optical switching network module includes a photonic chip 200, an analog electronic chip 203 for transmitting and receiving, and an analog electronic chip 204 for optical switching control. The photonic chip 200 includes an on-chip optical switch 202, and the on-chip optical switch 202 and the analog electronic chip 204 for optical switching control are arranged in a one-to-one correspondence to form an on-chip optical switch module. The on-chip all-optical switching network module includes multiple on-chip optical switch modules. In some embodiments of the present invention, a photonic chip 200 is packaged on a packaging substrate 206. The photonic chip 200 is composed of at least two photonic integrated circuit sub-chips spliced ​​together by waveguides, that is, adjacent photonic integrated circuit sub-chips are optically interconnected with each other. FIG4 shows a photonic chip 200 formed by four photonic integrated circuit sub-chips of full mask size. The full mask size photonic integrated circuit sub-chip means that the photonic integrated circuit sub-chip is made by exposure using a full mask mask. In some embodiments, the photonic chip includes more than four photonic integrated circuit sub-chips.

[0064] Each photonic integrated circuit sub-chip has at least two communication nodes (TX / RX) 201 and multiple optical connection paths, each of which includes an optical waveguide. For clarity, the silicon nitride waveguide wiring used to connect the input and output ports is omitted in Figure 4. On the photonic chip 200, any two communication nodes 201 communicate with each other via at least one on-chip optical switch 202 and the optical connection path. Two identical analog electronic chips 203 for transceiver and at least one analog electronic chip 204 for optical switching control are integrated above each photonic integrated circuit sub-chip. The analog electronic chips 203 for transceiver and corresponding to the corresponding communication nodes 201 are arranged above the photonic integrated circuit sub-chip. The on-chip optical switch 202 is formed as an optical element in the photonic integrated circuit sub-chip, and the analog electronic chip 204 for optical switching control is arranged one-to-one with the on-chip optical switch above the photonic integrated circuit sub-chip. Any two analog electronic chips 203 for transceiver can communicate with each other through the corresponding communication nodes and at least one on-chip optical switch in the photonic chip.

[0065] In some embodiments of the present invention, each of the communication nodes includes an electro-optical conversion unit and a photoelectric conversion unit. The electro-optical conversion unit is configured to convert information to be transmitted, carried by an electrical signal, into an optical signal. For example, the electro-optical conversion unit includes a modulator or a modulator array. The photoelectric conversion unit is configured to convert a received optical signal into an electrical signal carrying the received information. For example, the photoelectric conversion unit includes a detector or a detector array. In some embodiments of the present invention, the modulator includes a microring modulator, a Mach-Zehnder modulator, or an electro-absorption modulator. The detector includes a microring detector or a photodiode.

[0066] In some embodiments of the present invention, each of the photonic integrated circuit sub-chips further has: an optical input coupler and an optical power splitter, wherein, in the photonic chip 200, the optical input coupler on one of the photonic integrated circuit sub-chips is configured to couple light from an off-chip light source into the photonic chip; and the optical power splitter is optically connected to the optical input coupler configured to couple light from an off-chip light source into the photonic chip, and is configured to separate the light from the optical input coupler into multiple optical outputs, wherein each of the multiple optical outputs has substantially the same power, and the multiple optical outputs are transmitted to each modulator.

[0067] In some embodiments of the present invention, in the photonic chip 200, the optical connection path includes a first type of optical waveguide, such as a silicon nitride waveguide, wherein the first type of optical waveguides of two adjacent photonic integrated circuit sub-chips are optically interconnected. In some embodiments of the present invention, as shown in FIG8 , the first type of optical waveguides 401 facing each other at the junction 403 of two adjacent photonic integrated circuit sub-chips are configured to have a waveguide cross-section that gradually increases from one photonic integrated circuit sub-chip toward the other (e.g., a trumpet-shaped, tapered structure), thereby increasing the coupling surface, increasing the alignment tolerance of adjacent first type optical waveguides 401 at the junction of the photonic integrated circuit sub-chips, and improving the coupling efficiency. In some embodiments of the present invention, the optical connection path also includes a second type of optical waveguide, such as a silicon waveguide, wherein in each of the photonic integrated circuit sub-chips, the second type of optical waveguide and the first type of optical waveguide are located in different layers. In each of the photonic integrated circuit sub-chips, one or more of the on-chip optical switch, electro-optical conversion unit, optoelectronic conversion unit, optical input coupler, and optical power splitter are optically connected to the corresponding first-type optical waveguide through different second-type optical waveguides. As shown in Figure 9, the second-type optical waveguide 400 is optically connected to the first-type optical waveguide 401 through an evanescent wave coupler 402.

[0068] In some embodiments of the present invention, the on-chip optical switch 202 may be a silicon photonic switch, as shown in FIG6 , and may include multiple optical switching units 405 . The optical switching control analog electronic chip 204 is configured to control the multiple optical switching units 405 to orchestrate and switch data transmitted within the on-chip optical switch, enabling the connection topology between multiple communication nodes 201 to be changed. FIG6 illustrates an exemplary structure of an 8x8 strictly non-blocking optical switch, comprising 64 optical switching units 405. By controlling the signal output ports of each switching unit, any combination of paths between the eight input channels (input ports 0 to 7) and eight output channels (output ports 0 to 7) can be achieved, with the insertion loss on each path being independent of the path. For example, input port 0 can be connected or disconnected with any of output ports 0 to 7, thereby reconfiguring the optical path and configuring the connection topology in real time. In specific applications, the 8x8 silicon photonic switch can be further replicated horizontally, with two or more optical switches installed on the same photonic integrated circuit chip to meet even greater bandwidth switching requirements. Furthermore, since the on-chip all-optical switching network module of the present invention is connected to the circuit board in a plug-in manner, the bandwidth of the semiconductor device can be expanded conveniently and quickly as needed.

[0069] In some embodiments of the present invention, the optical switching unit 405 has a Mach-Zehnder interferometer structure. As shown in Figure 7, the optical switching unit is composed of an electro-optical or thermo-optical phase shifter 406 and a 2x2 beam splitter 407. By controlling the upper and lower arms of the electro-optical or thermo-optical phase shifter 406, the phase can be changed and the position of the output port can be changed by utilizing the interference effect, thereby achieving the technical effect of reconstructing the optical path and configuring the connection topology in real time. Furthermore, the connection topology between the various computing modules in the semiconductor device shown in Figure 2 can be changed from the fully interconnected topology shown in Figure 3A to the ring topology shown in Figure 3B or the point-to-point topology shown in Figure 3C, or any other feasible interconnection topology.

[0070] Returning to Figure 5, it shows the packaging structure of the semiconductor device shown in Figure 2. On the substrate 500, an on-chip all-optical switching network module 600 connects a series of computing modules 100. The high-speed, long-distance SerDes signal on each computing module 100 is transmitted through the metal traces on the packaging substrate 104, the circuit board 500, and the packaging substrate 206, and then through the silicon via 205 to the corresponding analog electronic chip 203 for transceiver. The modulator or modulator array included in the communication node 201 corresponding to the analog electronic chip 203 for transceiver on the photonic chip 200 can be composed of a microring modulator, a Mach-Zehnder modulator, or an electro-absorption modulator. The detector or detector array can be equipped with or without a wavelength division multiplexing device depending on whether the input laser is multi-wavelength or single-wavelength.

[0071] Referring to Figure 4 , light waves emitted by an off-chip single-wavelength or multi-wavelength laser module 300 are transmitted through an optical fiber array 301 to an optical input coupler 405, such as an on-chip grating coupler or end-face coupler. The single-wavelength or multi-wavelength laser light is coupled into the photonic chip 200 via the optical input coupler 405. On the photonic chip 200, a series of optical power splitters, such as wide-band beam splitters, evenly distribute the laser energy to the input ports of the modulators or modulator arrays located below different analog electronic chips 203. The modulators or modulator arrays then load the signals from the transceiver analog electronic chips 203 onto the light waves. The data is then orchestrated and exchanged via the on-chip optical switch 202 and optical switching control analog electronic chip 204. The signals are then transmitted via optical waveguides to detectors or detector arrays located below other transceiver analog electronic chips 203. The modulated optical signals are received and converted into analog electrical signals. The analog electrical signals are then transmitted via the circuit board 500 to the receiving computing module 100, thereby completing information transmission between different computing modules 100.

[0072] Specifically, in one exemplary embodiment, referring to Figures 2, 4, and 5, the low-speed parallel signal (i.e., digital information) from the transmitting digital electronic chip 101 is converted to a high-speed serial signal via a long-haul SerDes interface and transmitted via metal traces on the packaging substrate 104, circuit board 500, and packaging substrate 206, as well as through-silicon vias 205, to the corresponding transceiver analog electronic chip 203 on the photonic chip 200. The transceiver analog electronic chip 203 generates an electrical signal for modulating light based on the received high-speed serial signal. A modulator or modulator array at the communication node 201 corresponding to the transmitting analog electronic chip 203 modulates the light input from the laser module 300 based on the electrical signal from the transceiver analog electronic chip to generate a modulated optical signal, thereby adding the information carried by the electrical signal to the modulated optical signal. The modulated optical signal, modulated by the modulator or modulator array, is transmitted via an optical waveguide to the input port of the corresponding on-chip optical switch 202. Under the control of the optical switching control analog electronic chip 204, the on-chip optical switch 202 determines the output port and reconstructs the optical path. The modulated optical signal is output from the determined output port of the on-chip optical switch 202 and transmitted via an optical waveguide optically connected to the output port to a detector or detector array located below the analog electronic chip 203 for transceiver use at the receiving end. The detector or detector array converts the received modulated optical signal into an analog electrical signal through photoelectric conversion and transmits it to the corresponding analog electronic chip 203 at the receiving end. The analog electronic chip 203 at the receiving end processes the received electrical signal and transmits it via the through-silicon via 205 of the photonic chip 200 and metal traces on the packaging substrate 206, circuit board 500, and packaging substrate 104 to the long-haul SerDes interface on the corresponding digital electronic chip 101 at the receiving end. The long-haul SerDes interface converts the serial signal into a parallel signal, thereby enabling communication between the digital electronic chip 101 at the transmitting end and the digital electronic chip 101 at the receiving end.

[0073] Compared to conventional electrical interconnect structures, the present invention eliminates the need for electrical switches, allowing high-speed electrical signals from one computing module to reach other computing modules with minimal latency. In the conventional semiconductor device shown in FIG1 , computing module 100 containing digital electronic chip 101 and other computing modules 100 on circuit board 700 are interconnected point-to-point via traces 105. Due to the length of circuit board traces 105, high-speed interface design is typically complex, requiring specialized circuit board 500 design to maintain a sufficient link budget. High-speed interfaces often incur latency and power consumption penalties.

[0074] The present invention uses a photonic chip formed by splicing multiple full-mask-sized photonic integrated circuit sub-chips through waveguides as an intermediary layer, and integrates a series of analog electronic chips for transmission and reception and analog electronic chips for optical switching control to form an on-chip all-optical switching network module. A series of computing modules are connected to the on-chip all-optical switching network module via a long-distance SerDes interface. The high-speed electrical signals of the computing modules are transmitted to the edge of the on-chip all-optical switching network module via circuit board traces. The high-speed electrical signals of the computing modules are loaded onto light waves through the analog electronic chips for transmission and reception. The optical signals are then shuttled at high speed in the optical intermediary layer, and data is arranged and exchanged through a series of on-chip optical switches and analog electronic chips for optical switching control on the photonic chip. The optical path connection is reconstructed through on-chip optical switching, thereby realizing reconfigurable optical interconnection between different computing modules, and the high-speed electrical signals of the computing modules can reach other computing modules with the lowest delay.

[0075] Furthermore, in one exemplary embodiment, a method of manufacturing a semiconductor device includes:

[0076] providing a circuit board having a plurality of electrical connection paths;

[0077] An on-chip all-optical switching network module is provided, the on-chip all-optical switching network module comprising a photonic chip and a plurality of analog electrical chips for transceiver disposed above the photonic chip, the photonic chip comprising a plurality of communication nodes communicatively connected to the plurality of analog electrical chips for transceiver, a plurality of optical connection paths, and at least one on-chip optical switch, the on-chip optical switch being configured to change a connection topology between the plurality of communication nodes;

[0078] Provide multiple computing modules;

[0079] The all-optical switching network module and the multiple computing modules are arranged on the circuit board, wherein the multiple computing modules are communicatively connected with the multiple transceiver analog electrical chips of the on-chip all-optical switching network module through electrical connection paths on the circuit board, so that the connection topology between the multiple computing modules can be changed by the on-chip optical switch.

[0080] In some embodiments of the present invention, the circuit board has a first plug-in interface, wherein arranging the all-optical switching network module on the circuit board includes: removably plugging the on-chip all-optical switching network module into the first plug-in interface.

[0081] In some embodiments of the present invention, the photonic chip includes at least two photonic integrated circuit sub-chips, adjacent photonic integrated circuit sub-chips are optically interconnected with each other, and the photonic integrated circuit sub-chips are manufactured by exposure using a full mask.

[0082] Those skilled in the art should understand that what is disclosed above is merely an embodiment of the present invention, and it certainly cannot be used to limit the scope of rights for which the present application requests patent protection. Equivalent changes made based on the embodiments of the present invention still fall within the scope covered by the claims of the present application. For example, the technical solution of the present invention is not limited to use in semiconductor devices comprising the 8 computing modules shown in the figure, but can also be applied to semiconductor devices comprising less than 8 or more than 8 computing modules. In addition, the present invention is not limited to use for communication between computing modules, but can be used for communication between any communication devices. In other words, the computing module of the present invention can be replaced by any module, unit or device having the function of sending and receiving information. Those skilled in the art should understand that these variations also fall within the scope of patent protection of the present application.

Claims

1. A semiconductor device comprising: A circuit board having a plurality of electrical connection paths; An on-chip all-optical switching network module, which is arranged on the circuit board, the on-chip all-optical switching network module comprises a photonic chip and a plurality of analog electrical chips for transceiving arranged above the photonic chip, the photonic chip comprises a plurality of communication nodes correspondingly connected to the plurality of analog electrical chips for transceiving, a plurality of optical connection paths and at least one on-chip optical switch, the on-chip optical switch being configured to be able to change the connection topology between the plurality of communication nodes; A plurality of computing modules are arranged on the circuit board and are communicatively connected with a plurality of analog electrical chips for transmitting and receiving of the on-chip all-optical switching network module through electrical connection paths on the circuit board, so that the connection topology between the plurality of computing modules can be changed by the on-chip optical switch.

2. The semiconductor device according to claim 1, wherein: The circuit board has a first plug-in interface. The on-chip all-optical switching network module is removably plugged into the first plug-in interface.

3. The semiconductor device according to claim 2, wherein: The circuit board has a plurality of mounting areas, The plurality of computing modules are installed in the plurality of installation areas respectively. The plurality of computing modules are communicatively connected to the first plug interface via the plurality of electrical connection paths.

4. The semiconductor device according to claim 3, wherein: The plurality of computing modules include a first computing module and a second computing module, The communication path between the first computing module and the second computing module includes: a first electrical connection path connecting the first computing module and the first plug interface, a second electrical connection path connecting the first plug interface and the first analog electrical chip for transceiver, a third electrical connection path connecting the first analog electrical chip for transceiver and the first communication node, a first optical connection path connecting the first communication node and the on-chip switch, a second optical connection path connecting the on-chip optical switch and the second communication node, a fourth electrical connection path connecting the second communication node and the second analog electrical chip for transceiver, a fifth electrical connection path connecting the second analog electrical chip for transceiver and the first plug interface, and a sixth electrical connection path connecting the first plug interface and the second computing module.

5. The semiconductor device according to claim 1, wherein: The photonic chip comprises at least two photonic integrated circuit sub-chips, and adjacent photonic integrated circuit sub-chips are optically interconnected with each other; Each of the photonic integrated circuit sub-chips has at least two of the communication nodes, a plurality of the optical connection paths, and at least one on-chip optical switch. On the photonic chip, any two communication nodes communicate with each other via at least one on-chip optical switch and the optical connection path.

6. The semiconductor device according to claim 5, wherein: The on-chip all-optical switching network module also includes at least one optical switching control analog electrical chip, The at least one optical switching control analog electrical chip is correspondingly arranged above at least one of the on-chip optical switches so as to control the corresponding on-chip optical switch.

7. The semiconductor device according to claim 5, wherein: Each of the communication nodes comprises: an electro-optical conversion unit, used for converting the information to be sent carried by the electrical signal into an optical signal; and The photoelectric conversion unit is used to convert the received optical signal into an electrical signal carrying the received information.

8. The semiconductor device according to claim 7, wherein: The electro-optical conversion unit includes a modulator or a modulator array; And / or, the photoelectric conversion unit includes a detector or a detector array.

9. The semiconductor device according to claim 8, wherein: The modulator includes a micro-ring modulator, a Mach-Zehnder modulator, or an electro-absorption modulator; And / or, the detector comprises a micro-ring detector or a photodiode.

10. The semiconductor device according to claim 8, wherein: Each of the photonic integrated circuit sub-chips also has: an optical input coupler and an optical power separator, wherein: In the photonic chip, an optical input coupler on one of the photonic integrated circuit sub-chips is configured to couple light from an off-chip light source into the photonic chip; and The optical power splitter is optically connected to the optical input coupler configured to couple light from an off-chip light source into the photonic chip, and is configured to split the light from the optical input coupler into multiple optical outputs, wherein each of the multiple optical outputs has substantially the same power, and the multiple optical outputs are transmitted to each modulator.

11. The semiconductor device according to claim 10, wherein: In the photonic chip, the optical connection path includes a first type optical waveguide, Two adjacent photonic integrated circuit sub-chips are optically interconnected via a first type optical waveguide.

12. The semiconductor device according to claim 11, wherein: The first type of optical waveguides facing each other at the junction of two adjacent photonic integrated circuit sub-chips are constructed as a structure in which the waveguide cross section gradually increases from one photonic integrated circuit sub-chip toward another photonic integrated circuit sub-chip.

13. The semiconductor device according to claim 10, wherein: The optical connection path also includes a second type of optical waveguide, Wherein, in each of the photonic integrated circuit sub-chips, the second type of optical waveguide and the first type of optical waveguide are located in different layers; Wherein, in each of the photonic integrated circuit sub-chips, one or more of the on-chip optical switch, the electro-optical conversion unit, the photoelectric conversion unit, the optical input coupler, and the optical power splitter are optically connected to the corresponding first-type optical waveguide through different second-type optical waveguides; The second type optical waveguide is optically connected to the first type optical waveguide via an evanescent wave coupler.

14. The semiconductor device according to claim 5, wherein: The on-chip optical switch is a silicon optical switch, which includes a plurality of optical switching units; The optical switching control analog electrical chip is configured to control the multiple optical switching units to arrange and switch the data transmitted in the silicon optical switch, so that the connection topology between the multiple communication nodes can be changed.

15. The semiconductor device according to claim 14, wherein: The optical switching unit has a Mach-Zehnder interferometer structure.

16. The semiconductor device according to any one of claims 5 to 15, characterized in that: The photonic integrated circuit sub-chip is manufactured by exposure using a full-mask mask.

17. The semiconductor device according to claim 1, wherein: Each of the computing modules includes a digital electronic chip and a memory.

18. A method for manufacturing the semiconductor device according to any one of claims 1 to 17, comprising: Providing a circuit board having a plurality of electrical connection paths; An on-chip all-optical switching network module is provided, the on-chip all-optical switching network module comprising a photonic chip and a plurality of analog electrical chips for transceiving arranged above the photonic chip, the photonic chip comprising a plurality of communication nodes correspondingly connected to the plurality of analog electrical chips for transceiving, a plurality of optical connection paths and at least one on-chip optical switch, the on-chip optical switch being configured to be able to change the connection topology between the plurality of communication nodes; Provide multiple computing modules; The all-optical switching network module and the multiple computing modules are arranged on the circuit board, wherein the multiple computing modules are communicatively connected with the multiple transceiver analog electrical chips of the on-chip all-optical switching network module via electrical connection paths on the circuit board, so that the connection topology between the multiple computing modules can be changed by the on-chip optical switch.

19. The method according to claim 18, characterized in that The circuit board has a first plug-in interface. The step of arranging the all-optical switching network module on the circuit board comprises: removably inserting the on-chip all-optical switching network module into the first insertion interface.

20. The method according to claim 18, characterized in that The photonic chip comprises at least two photonic integrated circuit sub-chips, adjacent photonic integrated circuit sub-chips are optically interconnected with each other, and the photonic integrated circuit sub-chips are manufactured by exposure using a full mask mask.

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