Radiation resistant detector structure for charged particle detection

Abstract

A detector for a scanning electron microscope (SEM) system includes a semiconductor substrate, and a switching network formed on the semiconductor substrate, the switching network including a radiation resistant NMOS transistor including a first source / drain diffusion region, a second source / drain diffusion region, and a third source / drain diffusion region. And a gate patterned on the semiconductor substrate and surrounding one of the first and second source / drain diffusion regions.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to U.S. application No. 63 / 338,758, filed on May 5, 2022, and the entire contents of which are incorporated herein by reference. Technical Field

[0003] The description herein relates to detectors, and more particularly to detectors suitable for charged particle detection. Background Art

[0004] During the manufacture of integrated circuits (ICs), unfinished or completed circuit components are inspected to ensure that they are manufactured as designed and are free of defects. Inspection systems utilizing optical microscopes or charged particle (e.g., electron) beam microscopes, such as scanning electron microscopes (SEMs), may be employed. The SEM may include a detector that receives charged particles projected from a sample and outputs a detection signal. The detection signal may be used to reconstruct an image of the structure of the sample being inspected, and may be used, for example, to reveal defects in the sample.

[0005] With the continuous miniaturization of semiconductor devices, inspection systems may use lower and lower beam currents in charged particle beam tools. At the same time, the detector may need flexibility in order to detect multiple beams that may land on the detector with unknown sizes and unknown positions. The detector array can be pixelated in an array of sensing elements that can adapt to different shapes and sizes of beams. Therefore, the detector can be implemented to include a switching element to activate or deactivate a certain sensing element or connect pixelated sensing elements grouped together according to the (multiple) beams landing on the detector. However, recent studies have found that the switching elements included in the detector are easily damaged after a period of electron beam exposure, which limits the life of the detector and the SEM tool, not to mention the switching elements themselves. Summary of the invention

[0006] Some embodiments provide a detector for a scanning electron microscope (SEM) system. The detector includes a semiconductor substrate and a switch network formed on the semiconductor substrate and including a radiation-hardened NMOS transistor, the NMOS transistor including a first source / drain diffusion region, a second source / drain diffusion region, and a gate patterned on the semiconductor substrate and surrounding one of the first and second source / drain diffusion regions.

[0007] Some embodiments provide a charged particle inspection system, the system including a charged particle beam source, the charged particle beam source is configured to generate a primary charged particle beam for sample scanning; and a detector, the detector is configured to receive a secondary charged particle beam that leaves the sample from an incident point of the primary charged particle beam at the sample. The detector includes a semiconductor substrate and a switch network formed on the semiconductor substrate and including a radiation-resistant NMOS transistor, the NMOS transistor including a first source / drain diffusion region, a second source / drain diffusion region, and a gate patterned on the semiconductor substrate and surrounding one of the first and second source / drain diffusion regions.

[0008] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosed embodiments, as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The above and other aspects of the present disclosure will become more apparent from the description of exemplary embodiments with reference to the accompanying drawings.

[0010] Figure 1 is a schematic diagram illustrating an exemplary charged particle beam inspection system consistent with embodiments of the present disclosure.

[0011] Figure 2 is a schematic diagram showing an exemplary multi-beam tool consistent with an embodiment of the present disclosure, which may be Figure 1 A portion of an exemplary charged particle beam inspection system.

[0012] Figure 3A is a schematic diagram of an exemplary structure of a detector consistent with an embodiment of the present disclosure.

[0013] Figure 3B is a diagram illustrating an exemplary surface of a detector array consistent with embodiments of the present disclosure.

[0014] Figure 4 is a diagram illustrating an exemplary detector array with a switching network consistent with embodiments of the present disclosure.

[0015] Figure 5A is a diagram showing a cross-sectional view of a detector structure consistent with an embodiment of the present disclosure.

[0016] Figure 5B is a diagram illustrating a cross-sectional view of a sensing element of a detector consistent with an embodiment of the present disclosure.

[0017] Fig. 6A is a diagram showing a cross-sectional view of a dual die detector configuration consistent with an embodiment of the present disclosure.

[0018] Figure 6Bis a diagram illustrating a detector array having a dual die configuration consistent with an embodiment of the present disclosure.

[0019] Figure 7 is a diagram illustrating a top view of an example radiation-hardened NMOS transistor consistent with embodiments of the present disclosure.

[0020] Fig. 8A is a diagram illustrating an exemplary detector architecture consistent with embodiments of the present disclosure.

[0021] Figure 8B is a diagram illustrating another exemplary detector architecture consistent with embodiments of the present disclosure. DETAILED DESCRIPTION

[0022] Reference will now be made in detail to exemplary embodiments, examples of which are shown in the accompanying drawings. The following description refers to the accompanying drawings, wherein, unless otherwise indicated, the same numbers in different figures represent the same or similar elements. The implementations set forth in the following description of exemplary embodiments do not represent all implementations consistent with the present disclosure. On the contrary, they are merely examples of devices and methods consistent with aspects related to the subject matter described in the appended claims. For example, although some embodiments are described in the context of utilizing charged particle beams (e.g., electron beams), the present disclosure is not limited thereto. Other types of charged particle beams may be applied similarly. In addition, other imaging systems such as optical imaging, photoelectric detection, x-ray detection, etc. may be used.

[0023] Electronic devices consist of circuits formed on a semiconductor material called a substrate. The semiconductor material may include, for example, silicon, gallium arsenide, indium phosphide, or silicon germanium. Many circuits can be formed together on the same piece of silicon and are called integrated circuits, or ICs. The size of these circuits has been greatly reduced so that more circuits can fit on a substrate. For example, the IC chip in a smartphone can be as small as a thumbnail but may contain more than 2 billion transistors, each less than one thousandth the size of a human hair.

[0024] Manufacturing these ICs, which have extremely small structures or components, is a complex, time-consuming, and expensive process that typically involves hundreds of individual steps. An error in even one step can cause a defect in the finished IC, rendering it unusable. Therefore, one goal of the manufacturing process is to avoid such defects in order to maximize the number of functional ICs manufactured in the process; that is, to increase the overall yield of the process.

[0025] One element of improving yield is monitoring the chip manufacturing process to ensure that a sufficient number of functional integrated circuits are produced. One way to monitor the process is to inspect the chip circuit structures at various stages of their formation. Inspection can be performed using a scanning charged particle microscope ("SCPM"). For example, the SCPM can be a scanning electron microscope (SEM). The SCPM can be used to image these extremely small structures, in effect taking a "photograph" of the wafer structure. This image can be used to determine if the structure is formed correctly in the correct location. If the structure is defective, the process can be adjusted so the defect is less likely to occur again.

[0026] The working principle of SEM is similar to that of a camera. A camera takes a picture by receiving and recording the intensity of light reflected or emitted from a person or object. SEM takes a "picture" by receiving and recording the energy or number of electrons reflected or emitted from a wafer structure. Before taking such a "picture", an electron beam can be projected onto the structure, and when the electrons are reflected or emitted ("leave") from the structure (e.g., from the wafer surface, from the structure below the wafer surface, or both), the detector of the SEM can receive and record the energy or number of these electrons to generate an inspection image. In order to take such a "picture", the electron beam can scan the wafer (e.g., in a row-by-row or zigzag manner), and the detector can receive the leaving electrons from the area (called a "beam spot") under the projection of the electron beam. The detector can receive and record the leaving electrons from each beam spot at a time, and merge the information recorded for all beam spots to generate an inspection image. Some SEMs use a single electron beam (called a "single-beam SEM") to take a single "photo" to generate an inspection image, while some SEMs use multiple electron beams (called a "multi-beam SEM") to take multiple "sub-photos" of the wafer in parallel and stitch them together to generate an inspection image. By using multiple electron beams, the SEM can provide more electron beams to the structure to obtain these multiple "sub-photos", resulting in more electrons leaving the structure. Therefore, the detector can receive more leaving electrons at the same time and generate an inspection image of the wafer structure with higher efficiency and faster speed.

[0027] The electrons ejected from the wafer are received by the detector of the SEM, which causes the detector to generate an electrical signal (e.g., a current signal or a voltage signal) that is comparable to the energy of the electrons that left and the intensity of the electron beam. For example, the amplitude of the electrical signal can be comparable to the charge of the electrons that left. The detector can output the electrical signal to an image processor, and the image processor can process the electrical signal to form an image of the wafer structure. A multi-beam SEM system uses multiple electron beams for inspection, and the detector of the multi-beam SEM system can have multiple sections to receive them. Each section can have multiple sensing elements and can be used to form a "photo" of a sub-area of ​​the wafer. The "photos" generated based on the signals from each section of the detector can be combined to form a complete photo of the inspected wafer.

[0028] The detector array may be pixelated into an array of sensing elements that can accommodate beams of different shapes and sizes. Thus, the detector may be implemented to include a switching element to activate or deactivate a certain sensing element or to connect pixelated sensing elements grouped together, depending on the beam(s) landing on the detector. Recent studies have found that the switching elements included in the detector are susceptible to damage after a period of electron beam exposure, limiting the life of the detector and the SEM tool, not to mention the switching elements themselves. However, prior to these studies, the root cause had not been discovered.

[0029] Since SEM tools do not operate in commonly known X-ray radiation environments, such as space, military applications, or nuclear environments, no one expected that X-ray exposure would cause damage to switching elements. However, it has been found that X-rays generated during the interaction of electrons with detectors, particularly sensing elements (e.g., PIN diodes), may cause damage to switching elements of the detectors of SEM tools. That is, X-ray damage to switching elements can shorten the useful life of the detectors and reduce the overall throughput of the SEM tool. X-ray exposure of switching elements, such as transistors (e.g., MOS transistors), can also increase the resistance of the transistors in the on state, resulting in a decrease in the operating speed of the detector, thereby reducing the bandwidth of the detector. In addition, when transistors are exposed to X-rays, the threshold current leakage of the transistors in the off state increases.

[0030] According to some embodiments of the present disclosure, radiation-hardened design techniques may be used in a detector in which a switching element is positioned near a sensing element. In some embodiments, a detector of a SEM tool may be formed using only radiation-hardened transistors as switching elements. According to some embodiments of the present disclosure, a detector may be provided that includes a switching element located on a different chip from the sensing element. According to some embodiments of the present disclosure, a detector that does not utilize a switching element may be provided.

[0031] For the sake of clarity, the relative sizes of the components in the figures may be exaggerated. In the following description of the figures, the same or similar reference numerals denote the same or similar components or entities, and only the differences with respect to the various embodiments are described.

[0032] The objects and advantages of the present invention can be achieved by the elements and combinations thereof described in the embodiments described herein. However, the embodiments of the present invention do not necessarily need to achieve these exemplary objects or advantages, and some embodiments may not achieve any of the objects or advantages.

[0033] Without limiting the scope of the present disclosure, some embodiments may be described in the context of providing detection systems and detection methods in systems utilizing electron beams ("e-beams"). However, the present disclosure is not limited thereto. Other types of charged particle beams may be similarly applied. In addition, the detection systems and methods may be used in other imaging systems, such as optical imaging, photon detection, x-ray detection, ion detection, and the like.

[0034] As used herein, unless otherwise expressly stated, the term "or" encompasses all possible combinations unless not feasible. For example, if a component is stated to include A or B, then, unless otherwise expressly stated or not feasible, the component may include A, or B, or A and B. As a second example, if a component is stated to include A, B, or C, then, unless otherwise expressly stated or not feasible, the component may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C. Expressions such as "at least one" do not necessarily modify the entire contents of the following list, nor do they necessarily modify each member of the list, so "at least one of A, B, and C" should be understood to include only one of A, only one of B, only one of C, or any combination of A, B, and C. The phrase "one of A and B" or "any one of A and B" should be interpreted in the broadest sense to include one of A or one of B.

[0035] Figure 1 An exemplary electron beam inspection (EBI) system 100 consistent with embodiments of the present disclosure is shown. The EBI system 100 may be used for imaging. Figure 1As shown, the EBI system 100 includes a main chamber 101, a load / lock chamber 102, a beam tool 104, and an equipment front end module (EFEM) 106. The beam tool 104 is located in the main chamber 101. The EFEM 106 includes a first load port 106a and a second load port 106b. The EFEM 106 may include additional load ports. The first load port 106a and the second load port 106b receive a wafer front opening transport box (FOUP) containing wafers (e.g., semiconductor wafers or wafers made of other materials) or samples to be inspected (wafers and samples can be used interchangeably). A "batch" is a plurality of wafers that can be loaded as a batch for processing.

[0036] One or more robots (not shown) in the EFEM 106 can transfer the wafer to the load / lock chamber 102. The load / lock chamber 102 is connected to a load / lock vacuum pump system (not shown), which removes gas molecules in the load / lock chamber 102 to reach a first pressure below atmospheric pressure. After reaching the first pressure, one or more robots (not shown) can transfer the wafer from the load / lock chamber 102 to the main chamber 101. The main chamber 101 is connected to a main chamber vacuum pump system (not shown), which removes gas molecules in the main chamber 101 to reach a second pressure below the first pressure. After reaching the second pressure, the wafer will be inspected by the beam tool 104. The beam tool 104 can be a single beam system or a multi-beam system.

[0037] The controller 109 is electronically connected to the beam tool 104. The controller 109 may be a computer configured to perform various controls of the EBI system 100. Figure 1 The controller 109 is shown in FIG. 1 as being external to the structure including the main chamber 101 , the load / lock chamber 102 , and the EFEM 106 , but it will be appreciated that the controller 109 may be part of the structure.

[0038] In some embodiments, the controller 109 may include one or more processors (not shown). The processor may be a general or special electronic device capable of manipulating or processing information. For example, the processor may include any number of any combination of the following: a central processing unit (or "CPU"), a graphics processing unit (or "GPU"), an optical processor, a programmable logic controller, a microcontroller, a microprocessor, a digital signal processor, an intellectual property (IP) core, a programmable logic array (PLA), a programmable array logic (PAL), a general array logic (GAL), a complex programmable logic device (CPLD), a field programmable gate array (FPGA), a system on a chip (SoC), an application-specific integrated circuit (ASIC), and any type of circuit capable of data processing. The processor may also be a virtual processor, which includes one or more processors distributed on multiple machines or devices connected via a network.

[0039] In some embodiments, the controller 109 may also include one or more memories (not shown). The memory may be a general or specific electronic device capable of storing processor-accessible code and data (e.g., via a bus). For example, the memory may include any number of any combination of the following: random access memory (RAM), read-only memory (ROM), optical disk, magnetic disk, hard disk, solid-state drive, flash drive, secure digital (SD) card, memory stick, compact flash (CF) card, or any type of storage device. The code and data may include an operating system (OS) and one or more applications (or "apps") for a specific task. The memory may also be a virtual memory, which includes one or more memories distributed on multiple machines or devices connected via a network.

[0040] Figure 2 An exemplary multi-beam beam tool 104 (also referred to herein as apparatus 104) and a plurality of beam tools 104 and apparatus 104 that may be configured for use with an EBI system 100 ( Figure 1 ) is a schematic diagram of an image processing system 290.

[0041] The beam tool 104 includes a charged particle source 202, a gun aperture 204, a converging lens 206, a primary charged particle beam 210 emitted from the charged particle source 202, a source conversion unit 212, a plurality of sub-beams 214, 216, and 218 of the primary charged particle beam 210, a primary projection optical system 220, a motorized wafer stage 280, a wafer holder 282, a plurality of secondary charged particle beams 236, 238, and 240, a secondary optical system 242, and a charged particle detection device 244. The primary projection optical system 220 may include a beam splitter 222, a deflection scanning unit 226, and an objective lens 228. The charged particle detection device 244 may include detection sub-areas 246, 248, and 250.

[0042] Charged particle source 202, gun aperture 204, focusing lens 206, source conversion unit 212, beam splitter 222, deflection scanning unit 226, and objective lens 228 may be aligned with a primary optical axis 260 of apparatus 104. Secondary optical system 242 and charged particle detection device 244 may be aligned with a secondary optical axis 252 of apparatus 104.

[0043] The charged particle source 202 can emit one or more charged particles, such as electrons, protons, ions, muons, or any other particles carrying a charge. In some embodiments, the charged particle source 202 can be an electron source. For example, the charged particle source 202 can include a cathode, an extractor, or an anode, wherein primary electrons can be emitted from the cathode, and primary electrons can be extracted or accelerated to form a primary charged particle beam 210 (in this case, a primary electron beam) having an intersection (virtual or real) 208. For ease of explanation and without ambiguity, electrons are used as examples in some descriptions herein. However, it should be noted that any charged particles can be used in any embodiment of the present disclosure, not limited to electrons. It is conceivable that the primary charged particle beam 210 is emitted from the intersection 208. The gun aperture 204 can block the peripheral charged particles of the primary charged particle beam 210 to reduce the Coulomb effect. The Coulomb effect may cause the detection point size to increase.

[0044] The source conversion unit 212 may include an image forming element array and a beam limiting aperture array. The image forming element array may include a micro deflector or a micro lens array. The image forming element array may form multiple parallel images (virtual or real) of the intersection 208 with the multiple sub-beams 214, 216, and 218 of the primary charged particle beam 210. The beam limiting aperture array may limit the multiple sub-beams 214, 216, and 218. Although Figure 2 , three sub-beams 214, 216, and 218 are shown, but embodiments of the present disclosure are not limited thereto. For example, in some embodiments, the apparatus 104 may be configured to generate a first number of sub-beams. In some embodiments, the first number of sub-beams may be in the range of 1 to 1000. In some embodiments, the first number of sub-beams may be in the range of 200-500. In an exemplary embodiment, the apparatus 104 may generate 400 sub-beams.

[0045] The converging lens 206 can focus the primary charged particle beam 210. By adjusting the optical power of the converging lens 206 or changing the radial size of the corresponding beam limiting aperture in the beam limiting aperture array, the current of the sub-beams 214, 216 and 218 downstream of the source conversion unit 212 can be changed. The objective lens 228 can focus the sub-beams 214, 216 and 218 onto the wafer 230 for imaging, and can form a plurality of detection points 270, 272 and 274 on the surface of the wafer 230.

[0046] The beam splitter 222 can be a Wien filter type beam splitter that generates an electrostatic dipole field and a magnetic dipole field. In some embodiments, if they are applied, the force exerted by the electrostatic dipole field on the charged particles (e.g., electrons) of the sub-beams 214, 216, and 218 can be substantially equal in magnitude and opposite in direction to the force exerted by the magnetic dipole field on the charged particles. Therefore, the sub-beams 214, 216, and 218 can pass directly through the beam splitter 222 at a zero deflection angle. However, the total dispersion of the sub-beams 214, 216, and 218 generated by the beam splitter 222 can also be non-zero. The beam splitter 222 can separate the secondary charged particle beams 236, 238, and 240 from the sub-beams 214, 216, and 218 and direct the secondary charged particle beams 236, 238, and 240 to the secondary optical system 242.

[0047] The deflection scanning unit 226 can deflect the beamlets 214, 216, and 218 to scan the detection points 270, 272, and 274 on the surface area of ​​the wafer 230. In response to the incidence of the beamlets 214, 216, and 218 at the detection points 270, 272, and 274, secondary charged particle beams 236, 238, and 240 can be emitted from the wafer 230. The secondary charged particle beams 236, 238, and 240 may include charged particles (e.g., electrons) having an energy distribution. For example, the secondary charged particle beams 236, 238, and 240 may be secondary electron beams, including secondary electrons (with an energy of less than or equal to 50 eV) and backscattered electrons (with an energy between 50 eV and the landing energy of the beamlets 214, 216, and 218). The secondary optical system 242 can focus the secondary charged particle beams 236, 238, and 240 onto detection sub-regions 246, 248, and 250 of the charged particle detection device 244. The detection sub-regions 246, 248, and 250 can be configured to detect the corresponding secondary charged particle beams 236, 238, and 240 and generate corresponding signals (e.g., voltage, current, etc.) for reconstructing the SCPM image of the structure on or below the surface area of ​​the wafer 230.

[0048] The generated signals may represent the intensities of the secondary charged particle beams 236, 238, and 240, and may be provided to an image processing system 290 in communication with the charged particle detection device 244, the primary projection optical system 220, and the motorized wafer stage 280. The movement speed of the motorized wafer stage 280 may be synchronized and coordinated with the beam deflection controlled by the deflection scanning unit 226, so that the movement of the scanning detection points (e.g., scanning detection points 270, 272, and 274) may orderly cover the region of interest on the wafer 230. The parameters of such synchronization and coordination may be adjusted to accommodate different materials of the wafer 230. For example, different materials of the wafer 230 may have different resistance-capacitance characteristics, which may result in different signal sensitivities to the movement of the scanning detection points.

[0049] The intensity of the secondary charged particle beams 236, 238, and 240 may vary depending on the external or internal structure of the wafer 230, and thus may indicate whether the wafer 230 contains defects. In addition, as described above, the sub-beams 214, 216, and 218 may be projected onto different locations on the top surface of the wafer 230 or different sides of the local structure of the wafer 230 to generate secondary charged particle beams 236, 238, and 240 that may have different intensities. Therefore, by mapping the intensities of the secondary charged particle beams 236, 238, and 240 to the regions of the wafer 230, the image processing system 290 may reconstruct an image reflecting the internal or external structural features of the wafer 230.

[0050] In some embodiments, the image processing system 290 may include an image acquirer 292, a memory 294, and a controller 296. The image acquirer 292 may include one or more processors. For example, the image acquirer 292 may include a computer, a server, a mainframe, a terminal, a personal computer, any type of mobile computing device, etc., or a combination thereof. The image acquirer 292 may be communicatively coupled to the charged particle detection device 244 of the beam tool 104 through a medium such as an electrical conductor, a fiber optic cable, a portable storage medium, IR, Bluetooth, the Internet, a wireless network, radio, or a combination thereof. In some embodiments, the image acquirer 292 may receive a signal from the charged particle detection device 244 and may construct an image. Thus, the image acquirer 292 may acquire an SCPM image of the wafer 230. The image acquirer 292 may also perform various post-processing functions, such as generating contours, superimposing indicators on the acquired image, etc. The image acquirer 292 may be configured to perform brightness and contrast adjustments of the acquired image. In some embodiments, the memory 294 may be a storage medium such as a hard disk, a flash drive, a cloud storage, a random access memory (RAM), other types of computer-readable memory, etc. The memory 294 may be coupled to the image acquirer 292 and may be used to save the scanned raw image data as raw images and post-processed images. The image acquirer 292 and the memory 294 may be connected to the controller 296. In some embodiments, the image acquirer 292, the memory 294 and the controller 296 may be integrated together as a control unit.

[0051] In some embodiments, the image acquirer 292 may acquire one or more SCPM images of the wafer based on the imaging signal received from the charged particle detection device 244. The imaging signal may correspond to a scanning operation for performing charged particle imaging. The acquired image may be a single image including multiple imaging regions. The single image may be stored in the memory 294. The single image may be an original image that can be divided into multiple regions. Each region may include an imaging region that includes a feature of the wafer 230. The acquired image may include multiple images of a single imaging region of the wafer 230 sampled multiple times in a time series. The multiple images may be stored in the memory 294. In some embodiments, the image processing system 290 may be configured to perform image processing steps on multiple images of the same position of the wafer 230.

[0052] In some embodiments, the image processing system 290 may include measurement circuitry (e.g., an analog-to-digital converter) to obtain a distribution of the detected secondary charged particles (e.g., secondary electrons). The charged particle distribution data collected during the detection time window combined with the corresponding scan path data of the beamlets 214, 216, and 218 incident on the wafer surface can be used to reconstruct an image of the inspected wafer structure. The reconstructed image can be used to reveal various features of the internal or external structure of the wafer 230, and thus can be used to reveal any defects that may be present in the wafer.

[0053] In some embodiments, the charged particles may be electrons. When the electrons of the primary charged particle beam 210 are projected onto the surface of the wafer 230 (e.g., detection points 270, 272, and 274), the electrons of the primary charged particle beam 210 may penetrate the surface of the wafer 230 to a certain depth and interact with the particles of the wafer 230. Some electrons of the primary charged particle beam 210 may elastically interact with the material of the wafer 230 (e.g., in the form of elastic scattering or collision), and may be reflected or rebounded from the surface of the wafer 230. Elastic interactions preserve the total kinetic energy of the interacting subject (e.g., the electrons of the primary charged particle beam 210), wherein the kinetic energy of the interacting subject is not converted into other forms of energy (e.g., thermal energy, electromagnetic energy, etc.). Such reflected electrons generated by elastic interactions may be referred to as backscattered electrons (BSE). Some electrons of the primary charged particle beam 210 may inelastically interact with the material of the wafer 230 (e.g., in the form of inelastic scattering or collision). Inelastic interactions cannot conserve the total kinetic energy of the interacting subject, wherein part or all of the kinetic energy of the interacting subject is converted into other forms of energy. For example, through inelastic interactions, the kinetic energy of some of the electrons of the primary charged particle beam 210 can cause electronic excitation and transition of material atoms. Such inelastic interactions can also generate electrons that leave the surface of the wafer 230, which can be referred to as secondary electrons (SE). The yield or emission rate of BSE and SE depends on, for example, the material being inspected and the landing energy of the electrons of the primary charged particle beam 210 landing on the material surface. The energy of the electrons of the primary charged particle beam 210 can be determined in part by its accelerating voltage (e.g., Figure 2 The number of BSEs and SEs may be more or less (or even the same) than the injected electrons of the primary charged particle beam 210.

[0054] The images generated by the SEM can be used for defect inspection. For example, a generated image capturing a test device area of ​​a wafer can be compared with a reference image capturing the same test device area. The reference image can be predetermined (e.g., by simulation) and does not include known defects. If the difference between the generated image and the reference image exceeds the tolerance level, potential defects can be identified. For another example, the SEM can scan multiple areas of a wafer, each area including a test device area designed to be the same, and generate multiple images capturing these test device areas during manufacturing. Multiple images can be compared to each other. If the difference between the multiple images exceeds the tolerance level, potential defects can be identified.

[0055] Figure 3A Schematic diagram showing an exemplary structure of a detector 300A consistent with an embodiment of the present disclosure. The detector 300A can be configured as a charged particle detection device 244. Figure 3AIn the embodiment, the detector 300A includes a sensor layer 301, a switch layer 302, and a readout layer 303. The sensor layer 301 may include a sensor die composed of a plurality of sensing elements, including sensing elements 311, 312, 313, and 314. In some embodiments, a plurality of sensing elements may be arranged in a sensing element array, and each sensing element may have a uniform size, shape, and arrangement. The detector 300A may have an arrangement relative to a coordinate axis reference system. The sensor layer 301 may be arranged along an xy plane. The sensing elements in the sensor layer 301 may be arranged along the x-axis and y-axis directions. The x-axis direction may also be referred to as the "horizontal" direction herein. The y-axis direction may also be referred to as the "vertical" direction herein. The detector 300A may have a layer structure in which the sensor layer 301, the switch layer 302, and the readout layer 303 are stacked in the z-axis direction. The z-axis direction may also be referred to as the "thickness" direction herein. The z-axis direction may be aligned with the incident direction of the charged particles toward the detector 300A. Although reference Figure 3A The sensing elements are described as being arranged in an orthogonal grid, but it should be understood that Figure 3A Provided by way of example only, the present disclosure is applicable to sensing elements arranged in any form, such as a non-orthogonal grid.

[0056] Switching layer 302 may include multiple portions, including portions 321, 322, 323, and 324. The portions may include interconnects (e.g., wiring paths) configured to communicatively couple multiple sensing elements. The portions may also include switching elements that may control the communicative coupling between the sensing elements. The portions may also include connection mechanisms (e.g., wiring paths and switching elements) between the sensing elements and one or more common nodes in switching layer 302. For example, Figure 3A As shown, portion 323 may be configured to be communicatively coupled to the output ends of sensing elements 311, 312, 313, and 314, as shown by the four dashed lines between sensor layer 301 and switch layer 302. In some embodiments, portion 323 may be configured to output the combined signals collected from sensing elements 311, 312, 313, and 314 as a common output. In some embodiments, a portion (e.g., portion 323) may be communicatively coupled to a sensing element (e.g., sensing elements 311, 312, 313, and 314) placed directly above the portion. For example, portion 323 may have a terminal grid configured to be connected to the output ends of sensing elements 311, 312, 313, and 314. In some embodiments, portions 321, 322, 323, and 324 may be provided in an array structure so that they have uniform size and shape and uniform arrangement. For example, portions 321, 322, 323, and 324 may be square. In some embodiments, an isolation region may be provided between adjacent portions to electrically insulate them from each other. In some embodiments, the portions may be arranged in an offset pattern, such as a tiled layout.

[0057] The readout layer 303 may include a signal processing circuit for processing the output of the sensing element. In some embodiments, a signal processing circuit may be provided, which may correspond to each portion of the switch layer 302. In some embodiments, a plurality of separate signal processing circuit system portions may be provided, including signal processing circuit system portions 331, 332, 333, and 334. In some embodiments, the signal processing circuit system portions may be provided in the form of an array of portions having uniform size and shape and uniform arrangement. In some embodiments, the signal processing circuit system portions may be configured to be connected to the output of the corresponding portion of the switch layer 302. For example, as Figure 3A As shown, signal processing circuit system portion 333 can be configured to be communicatively coupled to the output of portion 323, as shown by the dashed line between switch layer 302 and readout layer 303. In some embodiments, the signal processing circuit system portion can be configured to constitute a corresponding readout channel of a corresponding portion of switch layer 302. For example, Figure 3A As shown, the signal processing circuitry portion 333 may constitute a readout channel for the portion 323 of the switching layer.

[0058] In some embodiments, the readout layer 303 may include input and output terminals. The output terminal(s) of the readout layer 303 may be connected to components for reading and interpreting the output of the detector 300A. For example, the readout layer 303 may be directly connected to a digital multiplexer, a digital logic block, a controller, a computer, etc.

[0059] The size of each section and the number of sensing elements associated with the section may vary. Figure 3A Four sensing elements are shown in one section, but embodiments of the present disclosure are not limited thereto.

[0060] In some embodiments, the arrangement of sensor layer 301, switch layer 302, and readout layer 303 may correspond to each other in a stacked relationship. For example, switch layer 302 may be mounted directly on top of readout layer 303, and sensor layer 301 may be mounted directly on top of switch layer 302. These layers may be stacked so that a portion within switch layer 302 is aligned with a signal processing circuit system portion (e.g., portions 331, 332, 333, and 334) of readout layer 303. In addition, these layers may be stacked so that one or more sensing elements within sensor layer 301 are aligned with corresponding portions in switch layer 302. In some embodiments, a sensing element associated with a portion may be contained within the portion. For example, in a plan view of detector 300A, sensing elements (e.g., sensing elements 311, 312, 313, and 314) of a portion (e.g., portion 323) may be mounted within the boundaries of the portion. In addition, portions of switch layer 302 may overlap with corresponding signal processing circuit systems of readout layer 303. In this way, predefined areas may be established to associate sensing elements with portions and signal processing circuitry.

[0061] Figure 3B FIG. 2 shows an exemplary structure of a sensor surface 300B consistent with an embodiment of the present disclosure, which may form the surface of a charged particle detection device 244. The sensor surface 300B may be provided with portions of a plurality of sensing elements, including portions 340, 350, 360, and 370, which are indicated by dashed lines. For example, the sensor surface 300B may be Figure 3A Each portion may be capable of receiving at least a portion of a beam spot emitted from a specific location of the wafer 230, such as Figure 2 One of the secondary charged particle beams 236, 238, and 240 is shown.

[0062] Sensor surface 300B may include an array of sensing elements, including sensing elements 315, 316, and 317. In some embodiments, each of portions 340, 350, 360, and 370 may include one or more sensing elements. For example, portion 340 may include a plurality of first sensing elements, and portion 350 may include a plurality of second sensing elements, and so on. A plurality of first sensing elements and a plurality of second sensing elements may be mutually exclusive. In some embodiments, the sensing element may be a diode or any diode-like element that can convert incident energy into a measurable signal. For example, the sensing element may include a PIN diode, an avalanche diode, an electron multiplier tube (EMT), or other components.

[0063] exist Figure 3BIn some embodiments, region 380 may be provided between adjacent sensing elements. Region 380 may be an isolation region for isolating the sides or corners of adjacent sensing elements from each other. In some embodiments, region 380 may include an insulating material different from the insulating material of the sensing elements of sensor surface 300B. In some embodiments, region 380 may be provided in a square shape. In some embodiments, region 380 may not be provided between adjacent sides of the sensing elements.

[0064] In some embodiments, a field programmable detector array may be provided with sensing elements having switch regions integrated between the sensing elements. For example, a detector may be provided, such as some of the examples discussed in PCT Application No. PCT / EP2018 / 074833 filed on September 14, 2018, the contents of which are incorporated herein by reference in their entirety. In some embodiments, switch regions may be provided between the sensing elements so that some or more sensing elements may be grouped when covered by the same charged particle beam spot. Circuitry for controlling the switch regions may be included in a readout layer (e.g., Figure 3A In the signal processing circuit of the readout layer 303 in the detector. As used in the present disclosure, the expression "a group of sensing elements" shall mean a group of sensing elements of a first quantity. A first group of sensing elements in a group of sensing elements may refer to a subset of sensing elements in the group. A second group of sensing elements may refer to another subset of sensing elements within the group. The first group and the second group may or may not be mutually exclusive. A "group" of sensing elements may refer to sensing elements associated with one beam spot projected on the detector surface (e.g., within the boundaries of the beam spot). The first group and the second group of sensing elements may refer to different groups of sensing elements associated with different beam spots. A group of sensing elements need not be limited to a particular "portion" of the detector.

[0065] Figure 4 is a diagram showing an exemplary detector array 400 with a switch network consistent with an embodiment of the present disclosure. The detector array 400 may be Figure 3A For example, the detector array 400 may include a sensor layer (e.g., similar to Figure 3A Sensor layer 301 in, switch layer (e.g., similar to Figure 3A ) and a readout layer (e.g., similar to Figure 3AThe sensor layer of the detector array 400 may include a plurality of sensing elements, including sensing elements 311, 312, 313, and 314. In some embodiments, each sensing element of the detector array 400 may have a uniform size, shape, and arrangement. The sensing elements of the detector array 400 may generate a current signal equivalent to a charged particle (e.g., an emitted electron) received in an active region of the sensing element. The "active region" herein may refer to a region of the sensing element having a radiation sensitivity above a predetermined threshold.

[0066] The switch layer 302 of the detector array 400 may include one or more wiring paths 402. The wiring paths 402 may be configured to communicatively couple the sensing elements of the detector array 400. Figure 4 As shown, detector array 400 includes a portion 321 having 4x4 sensing elements, including sensing elements 311, 312, 313, and 314. Figure 4 In the embodiment, the switch layer 402 of the detector array 400 may include inter-element switch elements (not shown) between any two adjacent sensing elements. The switch layer 302 of the detector array 400 may also include inter-element switch elements that are communicatively coupled to edges of adjacent sensing elements. The wiring path 402 may be configured to be communicatively coupled to output ends of the sensing elements (e.g., sensing elements 311, 312, 313, and 314) in portion 321. For example, the wiring path 402 may have a terminal grid (shown as circular black dots at the center of the sensing elements) that is configured to connect to the output ends of the sensing elements 311, 312, 313, and 314. In some embodiments, the wiring path 402 may be disposed in the switch layer 302 of the detector array 400. In Figure 4 In the embodiment, the wiring path 402 is communicatively coupled to the above-mentioned sensing elements (e.g., sensing elements 311, 312, 313, and 314). In some embodiments, the wiring path 402 may include a conductive material line, a flexible line, a bonding wire, etc. printed on a base substrate. Figure 4 , but the wiring path 402 may include conductive material lines, flexible lines, bonding wires, etc. printed on the base substrate. Figure 4 , portion 321 has 4x4 sensing elements, but it should be understood that Figure 4 This is provided by way of example only, and the present disclosure is applicable to detector arrays having any number of sensing element portions.

[0067] exist Figure 4In the embodiment of the present invention, a switch element 401 may be provided between the output of the sensing element and the wiring path 402. In some embodiments, the switch element 401 may be provided in the switch layer 402 of the detector array 400. In some embodiments, each sensing element (e.g., sensing element 313) is provided with its corresponding switch element 401, which is configured to communicatively couple the output of the sensing element to a common node 403 of a portion (e.g., portion 321) including the sensing element. In some embodiments, the output of the sensing element in a portion may be provided to its readout channel 404 via the common node 403, which is a common readout channel for the sensing elements of the portion. In some embodiments, the switch element 401 may be provided so that the output of each sensing element may be connected or disconnected from the common output of the portion 321 (e.g., at the common node 403). In some embodiments, the switch layer 302 of the detector array 400 may also include corresponding circuits for controlling the switch elements. In some embodiments, the switch elements may be arranged in a separate switch element matrix, which may itself contain circuits for controlling the switch elements.

[0068] The readout layer of the detector array 400 may include a signal conditioning circuit for processing the output of the sensing element. In some embodiments, the signal conditioning circuit may convert the generated current signal into a voltage that may represent the intensity of the received beam spot, or may amplify the generated current signal into an amplified current signal. The signal conditioning circuit may include, for example, an amplifier 404 and one or more analog switching elements ( Figure 4 (not shown). The amplifier 404 may be a high-speed transimpedance amplifier, a current amplifier, etc. Figure 4 In the embodiment, amplifier 404 can be communicatively coupled to the common output terminal of portion 321 to amplify the output signal of the sensing element of portion 321. In some embodiments, amplifier 404 can be a single-stage or multi-stage amplifier. For example, if amplifier 404 is a multi-stage amplifier, it can include a pre-amplifier and a post-amplifier, or include a pre-stage and a post-stage, etc. In some embodiments, amplifier 404 can be a variable gain amplifier, such as a variable gain transimpedance amplifier (VGTIA), a variable gain charge transfer amplifier (VGCTA), etc. The conditioning circuit can be coupled to a signal path, which can include, for example, an analog-to-digital converter (ADC) 406. In the embodiment, amplifier 404 can be a single-stage or multi-stage amplifier. Figure 4, ADC 406 can be communicatively coupled to the output of a conditioning circuit (e.g., including amplifier 404) to convert the analog output signal of the sensing element of portion 321 into a digital signal. The readout layer of the detector array 400 can also include other circuits for other functions. For example, the readout layer of the detector array 400 can include a switch element actuation circuit that can control the switch elements in the switch layer. For ease of explanation and without ambiguity, the signal path between the sensing element and ADC 406 can be referred to as an "analog signal path", which constitutes a readout channel 405 of the sensing element. For example, Figure 4 The analog signal path in includes the above-mentioned signal conditioning circuit (eg, including amplifier 404 ). The input of the analog signal path is communicatively coupled to the sensing element, and the output of the analog signal path is communicatively coupled to ADC 406 .

[0069] In some embodiments, ADC 406 may include output terminals that are communicatively coupled to components (e.g., components internal or external to a readout layer of detector array 400) for reading and interpreting digital signals converted by ADC 406. Figure 4 4, ADC 406 is communicatively coupled to digital multiplexer 408. In some embodiments, digital multiplexer 408 can be arranged in a readout layer of detector array 400. Digital multiplexer 408 can receive multiple input signals and convert them into output signals. The output signal of digital multiplexer 408 can be converted back into multiple input signals. The output signal of digital multiplexer 408 can also be transmitted to a data processing stage (e.g., Figure 2 Image processing system 290 in.

[0070] Figure 5A 5 is a diagram showing a cross-sectional view of a detector structure consistent with an embodiment of the present disclosure. The detector 500 may be configured as a charged particle detection device 244 in a charged particle beam tool 104, such as Figure 2 As shown. The detector 500 may be configured to have a plurality of layers stacked in a thickness direction, the thickness direction being substantially parallel to the incident direction of the charged particle beam. In some embodiments, the detector 500 may be configured as some of the examples discussed in PCT Application No. PCT / EP2018 / 074833 filed on September 14, 2018, the contents of which are incorporated herein by reference in their entirety.

[0071] exist Figure 5A In the embodiment, the detector 500 may include a sensor layer 510 and a circuit layer 520. In some embodiments, the sensor layer 510 may represent Figure 3A The sensor layer 301 in FIG. 5 , and the circuit layer 520 may represent Figure 3AIn some embodiments, the circuit layer 520 may include a processing system. The circuit layer 520 may also be configured to receive an output current detected in the sensor layer 510 via a switch network including switch elements 521, 522, or 523. In some embodiments, the switch layer may be incorporated into the sensor layer 510 or the circuit layer 520. In some embodiments, the detector 500 may include an additional layer for a switch network between the sensor layer 510 and the circuit layer 520. For example, the sensor layer 510 may represent Figure 3A The sensor layer 301 and the switch 302 in FIG. The circuit layer 520 may represent Figure 3A In some embodiments, the detector 500 may include additional layers in addition to the sensor layer 301 , the switch layer 302 , and the readout layer 303 .

[0072] In some embodiments, the sensor layer 510 may be provided with a sensor surface 501 for receiving incident charged particles. Sensing elements may be provided in the sensor layer 510, including sensing elements 511, 512, and 513 (distinguished by dashed lines). For example, the sensor surface 501 may be similar to Figure 3B In some embodiments, the sensing elements 511, 512 and 513 may be located at Figure 4 Among the sensing elements (e.g., sensing elements 311, 312, 313, and 314) of the detector array 400 in FIG. Figure 5A As shown, a switch element may be provided for each sensing element, including switch elements 521, 522, and 523. Switch elements 521, 522, and 523 may be embedded in sensor layer 510. In some embodiments, switch elements 521, 522, and 523 may be located Figure 4 In some embodiments, the sensor layer 510 or the circuit layer 520 may include interconnects (eg, metal wires) and various electronic circuit components. In some embodiments, the sensor layer 510 may also include switch elements that connect adjacent sensing elements.

[0073] In some embodiments, the sensing elements 511, 512, and 513 may be separated by an isolation region (indicated by a dotted line) extending in the thickness direction. For example, the side surfaces of the sensing elements 511, 512, and 513 parallel to the thickness direction may be separated by an isolation region (e.g., Figure 3B The regions 380) in are isolated from each other.

[0074] In some embodiments, sensor layer 510 can be configured as one or more diodes, where sensing elements 511, 512, and 513 are similar to Figure 3BThe sensing elements 315, 316 and 317 of the sensor layer 510 are shown in Figure 1. The switch elements 521, 522 and 523 can be configured as transistors (e.g., MOSFETs). Each of the sensing elements 511, 512, 513 may include an output terminal for electrically connecting to the circuit layer 520. For example, the output terminal may be integrated with the switch elements 521, 522 and 523, or may be provided separately. In some embodiments, the output terminal may be integrated in the bottom layer (e.g., metal layer) of the sensor layer 510.

[0075] although Figure 5A Sensing elements 511, 512, and 513 are depicted as discrete units in cross-section, but such division may not actually be physical. For example, the sensing elements of detector 500 may be formed from semiconductor devices that constitute a PIN diode device, which may be manufactured as a substrate having multiple layers, including a P-type region, an intrinsic region, and an N-type region. In such an example, sensing elements 511, 512, 513 may be continuous in the cross-sectional view. In some embodiments, switching elements (e.g., switching elements 521, 522, and 523) may be integrated with the sensing elements. Although detector 500 is shown as reference Figure 5A 5. The sensor layer is implemented as a monolithic layer, but it is understood that the description of the detector 500 that is not limited to a monolithic structure can also be applied to other types of detector structures, such as a detector structure with a dual-die configuration. In some embodiments, the switch element can be integrated into the sensor layer, integrated into other layers, or can be partially or completely disposed in an existing layer. In some embodiments, for example, the sensor layer can include a well, a groove or other structure, wherein the switch element is formed in these structures.

[0076] Figure 5B is a cross-sectional view illustrating a sensing element 512 of a detector 500 consistent with an embodiment of the present disclosure. Figure 5B A sensing element 512 is shown, in which a switching element 522 is incorporated as an example. Figure 5B In the embodiment, the sensing element 512 may include a P-well and an N-well for forming a switching element and other active or passive elements that may be communicatively coupled to other components of the sensor layer 510 or the circuit layer 520. Figure 5B Only one complete sensing element 512 is shown, but it is understood that the sensor layer 510 may be composed of multiple sensing elements similar to the sensing element 512 (eg, sensing elements 511 and 513 ), which may be continuous in the cross-sectional view.

[0077] In some embodiments, the sensing element 512 may include a diode device having a surface layer 501, a P-type region 502, a P-epitaxial region 503, an N-type region 504, and other components. The surface layer 501 may form a detection surface (e.g., an active region) of the detector that receives incident charged particles. For example, the surface layer 501 may be a metal layer (e.g., formed of aluminum or other conductive materials). On the opposite side of the surface layer 501, an electrode 505 may be provided as a charge collector. The electrode 505 may be configured to output a current signal representing the number of charged particles received in the active region of the sensing element 512.

[0078] In some embodiments, the switch element 522 may be formed of a metal oxide semiconductor (MOS) device. Figure 5B A plurality of MOS devices are formed on the back side of the N-type region 504, and the back side of the N-type region 504 can be connected to Figure 5A In some embodiments, the MOS device may include various types of MOS devices, including PMOS devices, NMOS devices, or CMOS devices. As an example of a MOS device, a P well 506, an N well 507, and a P well 508 may be provided. A PMOS (P-channel MOS) transistor 509_1 and an NMOS (N-channel MOS) transistor 509_2 may be formed. In some embodiments, the PMOS transistor 509_1 and the NMOS transistor 509_2 may form a CMOS (complementary MOS) transistor. In some embodiments, the MOS device may be manufactured by etching, patterning, and other processes and techniques. It will be appreciated that various other devices, such as bipolar semiconductor devices, etc., may be used, and the device may be manufactured by various processes.

[0079] In the operation of the sensing element 512, when a charged particle (e.g. Figure 2 When the secondary charged particle beam 236, 238 and 240 in the sensing element 512 strikes the surface layer 501, the body of the sensing element 512 (including, for example, the depletion region) may be filled with charge carriers generated by the striking charged particles. Such a depletion region may extend through at least a portion of the volume of the sensing element. For example, the charged particles may be electrons, and the striking electrons may create and excite electron-hole pairs in the depletion region of the sensing element. The excited electrons in the electron-hole pairs may have additional energy so that they can also generate new electron-hole pairs. The electrons generated by the striking charged particles may contribute to the signal generated in each sensing element.

[0080] refer to Figure 5B, the depletion region in the sensing element 512 may include an electric field between the P-type region 502 and the N-type region 504, and the electrons and holes may be attracted by the P-type region 502 and the N-type region 504, respectively. When the electrons reach the P-type region 502 or when the holes reach the N-type region 504, a detection signal may be generated. Therefore, when the charged particle beam is incident on the sensing element 512, the sensing element 512 may generate an output signal, such as a current. A plurality of sensing elements may be connected, and a group of sensing elements may be used to detect the intensity of the charged particle beam spot. When the charged particle beam spot covers a plurality of adjacent sensing elements (e.g., sensing elements 511, 512, and 513), the sensing elements may be grouped together ("merged") to collect current. For example, the outputs of the sensing elements may be merged by turning on the switch elements corresponding to the sensing elements (e.g., switch elements 519 and 521). Signals from the sensing elements in the group may be collected and sent to a signal conditioning circuit connected to the group. The number of sensing elements in the group may be any number related to the size and shape of the beam spot. This number can be 1 or greater than 1.

[0081] In some embodiments, the detector can be configured so that individual sensing elements can communicate with external components via, for example, signal or data lines and address signals. The detector can be configured to control a switching element so that the output current or voltage of two or more sensing elements can be combined. Thus, when sensing element 512 is activated, all areas under surface layer 601 can become active.

[0082] Fig. 6A is a diagram showing a cross-sectional view of a dual-die detector configuration consistent with an embodiment of the present disclosure. In some embodiments, the detector may be formed by bonding together two separate chips, one of which includes the sensing element and the other of which includes the circuitry. Fig. 6A As shown, the detector 600A may include a first chip 610 and a second chip 620. Each chip may be formed on its own semiconductor substrate, which is very thin. In some embodiments, the first chip 610 and the second chip 620 may be connected via a chip-to-chip connection 630. In some embodiments, the first chip 610 and the second chip 620 may be connected via solder bumps as a chip-to-chip connection 630. In some embodiments, the first chip 610 and the second chip 620 may be connected via direct bonding as a chip-to-chip connection 630. Since the first chip 610 includes a sensing element such as a diode, the first chip 610 may be referred to as a diode chip in the present disclosure. Since the second chip 620 includes a readout integrated circuit (ROIC) formed therein, the second chip 620 may be referred to as a ROIC chip in the present disclosure. In some embodiments, the readout integrated circuit may include a signal conditioning circuit for processing the output of the sensing element.

[0083] Establishing connections between separate chips may introduce complexity, such as the need to precisely align and reliably bond all connections between chips. In addition, losses may occur at various connections between chips, such as chip-to-chip connections between chips. Losses may result in a reduced signal-to-noise ratio (SNR). In addition, chip-to-chip connections, such as solder bumps, may have a large number of parasitic components, for example, for electrostatic discharge (ESD) protection circuit systems. Therefore, reducing the number of chip-to-chip connections to be included in detector 600A is beneficial in terms of introducing fewer complications and fewer parasitic components.

[0084] According to some embodiments of the present disclosure, a switch network and a sensing element may be formed in the first chip 610, such as Figure 6B , which shows an exemplary detector architecture 600B. Figure 6B In the embodiment, the first chip 610 may include a switch network in addition to the sensing element, and the switch network includes the switch element 401. The second chip 620 may include a readout channel 621. Figure 4 As shown, the switch network is configured to connect the output terminals of the grouped sensing elements to a readout channel. Similarly, Figure 6B A group of sensing elements (e.g., sensing elements 311, 312, 313, and 314) sharing one readout channel (e.g., readout channel 621) are shown. Figure 6B As shown, the outputs of the grouped sense elements are combined by a switch network including switch element 401 , and the combined output is provided to a corresponding readout channel 621 via a common chip-to-chip connection 630 .

[0085] Therefore, according to Figure 6B The detector architecture 600B can reduce the number of chip-to-chip connections between the first chip 610 and the second chip 620, which in turn can reduce the complexity introduced by the chip-to-chip connections. Figure 6B In the detector architecture 600B, as the number of chip-to-chip connections is reduced, the parasitic resistance or capacitance introduced into the detector can be reduced. Therefore, the performance of the detector can be improved because the parasitic resistance or capacitance has a negative impact on the bandwidth of the detector, which is one of the factors that determine the performance of the detector. The bandwidth of the detector is related to the operating speed of the detector and can indicate the speed at which the detector responds to incident electrons, for example, including receiving the electrons, generating a current equivalent to the received electrons, and transmitting the generated current to a readout circuit to detect or measure the current. Since the parasitic resistance or capacitance will cause an RC delay of the detector, thereby reducing the operating speed of the detector, the bandwidth of the detector will be reduced when the parasitic resistance or capacitance is present. In addition, due to Figure 6BIn the detector architecture 600B, the wiring path between the sensing element and the switching element can be shortened, so the parasitic resistance or capacitance can be further suppressed.

[0086] As technology advances, chip sizes are getting smaller, while the number of sensing elements mounted on a chip is increasing. Therefore, it becomes more advantageous to reduce the number of chip-to-chip connections between the first chip and the second chip. For example, a typical chip size is 10mm x 10mm, and at least 1000 PIN diodes are integrated on the chip. However, some chip-to-chip connection technologies (e.g., solder bumps) require an interconnect pitch of about 100μm, which limits the number of chip-to-chip connections that can be implemented in a small chip of the detector. Although Figure 6B Only one group of sensing elements sharing one readout channel 621 is shown, but it is understood that the detector 600B may include multiple groups of sensing elements, and the second chip 620 includes multiple readout channels 621, each readout channel 621 receiving the output from its corresponding group.

[0087] As about Figure 5B As discussed, during operation of the charged particle beam inspection device, a primary electron beam can be projected onto a sample, and secondary particles including secondary electrons or backscattered electrons can be directed from the sample to a sensing element 512. The sensing element 512 can be configured so that incoming electrons generate carriers including electron-hole pairs in the P epitaxial region 503. A large number of electron-hole pairs can be generated due to mechanisms (such as impact ionization) triggered by the arrival of incoming electrons. During this interaction between electrons and the sensing element 512, X-rays are generated. The inventors have found that such X-rays may damage the switching elements of the detector.

[0088] Although recent studies have found that the detector's switching elements are susceptible to damage after a period of electron beam exposure, and that this damage can shorten the life of the detector and reduce the overall throughput of the SEM tool, the root cause has not yet been discovered. Since SEM tools do not operate in commonly known X-ray radiation environments, such as space, military use, or nuclear environments, no one expected that X-ray exposure would cause damage to the switching elements. In addition, detectors do not usually include electronic circuit systems close to the sensing elements, so damage to the detector caused by X-ray exposure is not a serious problem. However, as Figure 4 , Figure 5A , Figure 5B and Figure 6B As shown, the detector of the SEM tool may be formed to include switching elements close to the sensing elements, and these switching elements may be damaged by X-ray exposure, thereby seriously affecting the performance of the detector and the SEM tool itself.

[0089] In addition, exposure of switching elements, such as transistors (e.g., MOS transistors), to X-rays can also increase the resistance of the transistor in the on-state, resulting in a reduction in the operating speed of the detector, thereby reducing the bandwidth of the detector. As a result, the overall throughput of the SEM tool may be reduced. When a transistor is off, ideally no current passes through the transistor. In practice, current leakage may occur even when the transistor is off. When a transistor is exposed to X-rays, threshold current leakage increases when the transistor is in the off state. This threshold current leakage may cause errors in generating SEM images because pixels are not isolated due to the threshold current leakage. For example, when acquiring a SEM image, a shadow image or an adjacent image may appear due to the threshold current leakage of a turned-off transistor coupled to the corresponding pixelated sensing element.

[0090] As described above, many sensing elements are squeezed onto a small chip. According to some embodiments of the present disclosure, the switching element is also integrated on the same chip as the sensing element. For example, a typical chip has a size of 10 mm × 10 mm, and at least 1,000 PIN diodes are integrated onto the chip. Therefore, it is difficult to maintain a sufficient distance between the switching element and the sensing element as an X-ray source, so that damage to the switching element caused by X-ray exposure can be suppressed.

[0091] According to some embodiments of the present disclosure, radiation-hardened design techniques may be used in detectors in which the switching element is positioned near the sensing element. Figure 5A or Figure 6B In the detector architecture shown, radiation-hardened design techniques can be used. In some embodiments, a detector (e.g., Figure 5A or Figure 6B The detector architecture can include a switch element that uses only radiation-tolerant devices (e.g., PMOS transistors or bipolar transistors). For example, NMOS transistors (e.g., Figure 5B Instead of using an NMOS transistor 509_2) of the detector, a PMOS transistor (eg, PMOS transistor 509_1) or a bipolar transistor is used to form a switch element (eg, Figure 5B In some embodiments, the detector may be formed using NMOS transistors with radiation-resistant design. For example, the detector's switch element (e.g., Figure 5B The switch element 522) can be formed to include an NMOS transistor with a radiation-resistant design, for example, to replace Figure 5B NMOS transistor 509_2 in.

[0092] Figure 7 is a diagram showing a top view of an example radiation-hardened NMOS transistor consistent with an embodiment of the present disclosure. Figure 7As shown, the radiation-hardened NMOS transistor 700 may have a gate-enclosed layout. The radiation-hardened NMOS transistor 700 may have a first N-type source / drain diffusion region 710, a second N-type source / drain region 720, and a gate 730 that encloses one of the first and second N-type source / drain diffusion regions 710 and 720. The radiation-hardened NMOS transistor 700 may be formed in a P-type well 740. The enclosed layout of the radiation-hardened NMOS transistor 700 may prevent leakage current through oxide between the source and the drain due to X-ray exposure. Although the enclosed layout of the radiation-hardened NMOS transistor has been shown as a radiation-hardened NMOS transistor configuration, it is understood that other radiation-hardened designs or techniques may also be applied.

[0093] As described above, radiation-induced damage to the detector and SEM of the SEM can be improved by using only radiation-resistant devices as switching elements of the detector. However, when the radiation energy is high or the exposure time is long, the detector using the radiation-resistant device is still susceptible to X-ray exposure. For example, even a PMOS transistor that is more resistant to X-rays than an NMOS transistor may be damaged if the PMOS transistor is exposed to X-rays with high energy or exposed to X-rays for a longer period of time. In addition, the radiation-resistant NMOS transistor adds additional parasitic components, which can reduce the performance of the detector / SEM. Therefore, according to some embodiments of the present disclosure, the detector architecture has a switching element in the ROIC chip (e.g., the second chip 620) instead of the diode chip (e.g., the first chip 610).

[0094] Fig. 8A is a diagram illustrating an exemplary detector architecture consistent with an embodiment of the present disclosure. Fig. 8A As shown, the detector 800A can be configured as a dual-die configuration, including a first chip 810 and a second chip 820. The first chip 810 may include sensing elements 311, 312, 313, and 314. The second chip 820 includes a switch network including a switch element 401, and a readout integrated circuit including a readout channel 821. In some embodiments, the readout integrated circuit can be formed to include a switch network including a switch element. Fig. 8A As shown, the outputs of the grouped sensing elements are combined by a switch network including switch elements 401, and the combined output is provided to a corresponding readout channel 821. Here, since the switch network including switch elements 401 is integrated with the readout channel 821, the output of each sensing element is provided to the input terminal of the corresponding switch element 401 via a chip-to-chip connection 830. Therefore, Fig. 8A The detector 800A may be configured to have the same number of chip-to-chip connections 830 as sensing elements.

[0095] Although Fig. 8AThe connections between the sensing elements and the switching elements of the first row are shown for clarity, but it should be noted that Fig. 8A All sensing elements in the can form such a connection. In addition, although Fig. 8A Only one set of sensing elements sharing one readout channel 821 is shown, but it should be understood that the detector 800A may include multiple sets of sensing elements and the second chip 820 may include multiple readout channels 821, each readout channel 821 receiving outputs from its corresponding set of sensing elements.

[0096] Since a certain interconnect pitch is required between chip-to-chip connections 830, the number of chip-to-chip connections 830 that can be formed within a certain chip area may be limited. As technology advances, the interconnect pitch required for chip-to-chip connections may decrease. For example, the interconnect pitch of a directly bonded chip-to-chip connection is much smaller than the interconnect pitch of a solder bump chip-to-chip connection (e.g., up to the single-digit μm level). Therefore, according to Fig. 8A The detector architecture shown can further improve radiation damage to switching elements, detectors, and SEM tools without placing severe restrictions on the number of sensing elements to be included in the SEM detector.

[0097] according to Fig. 8A The detector architecture shown can significantly reduce radiation-induced damage to the detector of the SEM tool and the SEM tool because the switch element is located on a chip (e.g., ROIC chip) different from the X-ray radiation source (i.e., the sensing element). However, the X-rays can still reach the switch element, thereby affecting the performance of the SEM detector and the SEM tool itself in the long term. Moreover, as technology advances, the distance between the two independent chips (i.e., the sensing element chip and the ROIC chip) can become shorter. Some embodiments of the present disclosure provide a detector architecture without a switch element. Figure 8B is a diagram showing another exemplary detector architecture consistent with an embodiment of the present disclosure. Fig. 8A Similar to the embodiment shown in , the detector 800B can be configured as a dual-die configuration including a first chip 810 and a second chip 820. The first chip 810 includes sensing elements 311, 312, 313 and 314, and the second chip 820 includes a readout channel (e.g., readout channel 821). Here, since the detector 800B is formed without a switching element, the multiple output ends of the multiple sensing elements are connected to their corresponding readout channels 821 via chip-to-chip connections (e.g., chip-to-chip connections 830). For example, each output end of the sensing element is provided to an input terminal of the corresponding readout channel 821 via the chip-to-chip connection 830. Therefore, Figure 8BThe detector 800B can be configured to have the same number of chip-to-chip connections 830 as sensing elements. This detector architecture without switching elements can still be used in multi-beam inspection systems, depending on the concentration within a single electron beam SEM tool or the pitch between different electron beams. Figure 8B The detector architecture shown does not include switching elements that are damaged by X-ray exposure, thus avoiding X-ray-induced damage to the detector 800B and the SEM tool. Figure 8B For clarity, the connections between the sensing elements and the switching elements of the first row are shown, but it should be noted that the connections between the sensing elements and the switching elements of the first row can be Figure 8B All sensing elements in form this connection.

[0098] The embodiments may be further described using the following terms:

[0099] 1. A detector for a scanning electron microscope (SEM) system, comprising:

[0100] a semiconductor substrate; and

[0101] A switch network is formed on the semiconductor substrate and includes a radiation-resistant NMOS transistor, wherein the NMOS transistor includes a first source / drain diffusion region, a second source / drain diffusion region, and a gate patterned on the semiconductor substrate and surrounding one of the first source / drain diffusion region and the second source / drain diffusion region.

[0102] 2. The detector according to clause 1, further comprising a plurality of sensing elements formed on the semiconductor substrate.

[0103] 3. The detector of clause 2, wherein the switch network has a plurality of input terminals connected to different ones of the plurality of sensing elements.

[0104] 4. A detector according to clause 2 or 3, wherein the switch network has a common node, which is communicatively coupled to a group of sensing elements among the plurality of sensing elements and is configured to be connected to a readout channel of a readout substrate via a chip-to-chip connection.

[0105] 5. A detector according to claim 4, wherein each of the plurality of sensing elements is configured to generate an electrical signal in response to electrons incident on each sensing element, and the switching network is configured to combine the electrical signals generated from the group of sensing elements and transmit the combined electrical signals to the readout channel via the common node.

[0106] 6. A detector according to clause 2 or 3, wherein the switching network is configured to transmit electrical signals from each of the multiple groups of the multiple sensing elements to corresponding readout channels of a readout substrate having multiple readout channels corresponding to the multiple groups via chip-to-chip connections.

[0107] 7. The detector of clause 6, wherein each of the plurality of groups is associated with a different secondary electron beam of a plurality of secondary electron beams of the SEM system.

[0108] 8. The detector according to any of clauses 2-7, wherein the plurality of sensing elements comprises at least 1000 PIN diodes.

[0109] 9. A detector for a scanning electron microscope (SEM) system, comprising:

[0110] Semiconductor substrate;

[0111] a plurality of transistors formed on the semiconductor substrate and configured to form a switch network having a plurality of input terminals, each input terminal configured to be connected to a different one of a plurality of sensing elements of another substrate via a chip-to-chip connection, and the switch network having a common node communicatively coupled to a group of the plurality of sensing elements; and

[0112] Readout circuitry is formed on the semiconductor substrate and includes a readout channel communicatively coupled to the common node.

[0113] 10. A detector according to claim 9, wherein each of the plurality of sensing elements is configured to generate an electrical signal in response to particles incident on each sensing element, and the switching network is configured to combine the electrical signals generated from the group of sensing elements and transmit the combined electrical signal to the readout channel via the common node.

[0114] 11. A detector according to clause 10, wherein the switch network is configured to transmit an electrical signal from each of a plurality of groups of the plurality of sensing elements to a corresponding readout channel of the readout circuit system having a plurality of readout channels corresponding to the plurality of groups.

[0115] 12. The detector of clause 11, wherein each of the plurality of groups is associated with a different secondary electron beam of a plurality of secondary electron beams of the SEM system.

[0116] 13. The detector of any of clauses 9 to 12, wherein the plurality of sensing elements comprises at least 1000 PIN diodes.

[0117] 14. A detector for a scanning electron microscope (SEM) system, comprising:

[0118] a first semiconductor substrate;

[0119] a plurality of sensing elements formed on the first semiconductor substrate;

[0120] a second semiconductor substrate; and

[0121] A readout circuit system is formed on the second semiconductor substrate and includes a plurality of readout channels, each readout channel corresponding to a different one of the plurality of sensing elements and configured to receive an electrical signal from the corresponding sensing element via a chip-to-chip connection.

[0122] 15. The detector of clause 14, wherein each sensing element of the plurality of sensing elements is configured to be connected to a corresponding readout channel via a chip-to-chip connection.

[0123] 16. The detector of clause 14, wherein each sensing element of the plurality of sensing elements is configured to generate an electrical signal in response to electrons incident on the each sensing element.

[0124] 17. The detector of any of clauses 14 to 16, wherein the plurality of sensing elements comprises at least 1000 PIN diodes.

[0125] 18. A readout integrated circuit for a scanning electron microscope (SEM) system, comprising: a semiconductor substrate; and

[0126] A plurality of transistors are formed on the semiconductor substrate and are configured to form a switch network, the switch network having a plurality of input terminals, each input terminal being configured to be connected to a different one of a plurality of sensing elements of another substrate via a chip-to-chip connection, and the switch network having a common node communicatively coupled to a group of the plurality of sensing elements.

[0127] 19. The readout integrated circuit according to clause 18, further comprising a readout channel formed on the semiconductor substrate,

[0128] Each of the plurality of sensing elements is configured to generate an electrical signal in response to particles incident on the each sensing element, and the switching network is configured to combine the electrical signals generated from the group of sensing elements and transmit the combined electrical signal to the readout channel via the common node.

[0129] 20. The readout integrated circuit of clause 18, further comprising a plurality of readout channels corresponding to the plurality of groups,

[0130] The switching network is configured to transmit an electrical signal from each of the plurality of groups of the plurality of sensing elements to a corresponding readout channel of the plurality of readout channels.

[0131] 21. The readout integrated circuit of clause 20, wherein each of the plurality of groups is associated with a different secondary electron beam of a plurality of secondary electron beams of the SEM system.

[0132] 22. A readout integrated circuit according to any of clauses 18-21, wherein the plurality of sensing elements comprises at least 1000 PIN diodes.

[0133] 23. A charged particle inspection system comprising:

[0134] a charged particle beam source configured to generate a primary charged particle beam for sample scanning; and

[0135] a detector configured to receive a secondary charged particle beam exiting the sample from a point of incidence of the primary charged particle beam at the sample, the detector comprising:

[0136] a semiconductor substrate; and

[0137] A switch network is formed on the semiconductor substrate and includes a radiation-resistant NMOS transistor, wherein the NMOS transistor includes a first source / drain diffusion region, a second source / drain diffusion region, and a gate patterned on the semiconductor substrate and surrounding one of the first source / drain diffusion region and the second source / drain diffusion region.

[0138] 24. The charged particle inspection system of clause 23, wherein the detector further comprises a plurality of sensing elements formed on the semiconductor substrate.

[0139] 25. A charged particle inspection system according to clause 24, wherein the switch network has a plurality of input terminals connected to different ones of the plurality of sensing elements.

[0140] 26. A charged particle inspection system according to clause 24 or 25, wherein the switch network has a common node, which is communicatively coupled to a group of sensing elements among the plurality of sensing elements and is configured to be connected to a readout channel of a readout substrate via a chip-to-chip connection.

[0141] 27. A charged particle inspection system according to claim 26, wherein each of the plurality of sensing elements is configured to generate an electrical signal in response to electrons incident on each sensing element, and the switching network is configured to combine the electrical signals generated from the group of sensing elements and transmit the combined electrical signals to the readout channel via the common node.

[0142] 28. A charged particle inspection system according to clause 24 or 25, wherein the switching network is configured to transmit electrical signals from each of multiple groups of multiple sensing elements to corresponding readout channels of a readout substrate having multiple readout channels corresponding to the multiple groups via chip-to-chip connections.

[0143] 29. The charged particle inspection system of clause 28, wherein each of the plurality of groups is associated with a different secondary electron beam of a plurality of secondary electron beams of the SEM system.

[0144] 30. A charged particle inspection system according to any of clauses 24-29, wherein the plurality of sensing elements comprises at least 1000 PIN diodes.

[0145] 31. A charged particle inspection system comprising:

[0146] a charged particle beam source configured to generate a primary charged particle beam for sample scanning; and

[0147] a detector configured to receive a secondary charged particle beam exiting the sample from a point of incidence of the primary charged particle beam at the sample, the detector comprising:

[0148] Semiconductor substrate;

[0149] a plurality of transistors formed on the semiconductor substrate and configured to form a switch network having a plurality of input terminals, each input terminal configured to be connected to a different one of a plurality of sense elements of another substrate via a chip-to-chip connection, and the switch network having a common node communicatively coupled to a group of the plurality of sense elements; and

[0150] Readout circuitry is formed on the semiconductor substrate and includes a readout channel communicatively coupled to the common node.

[0151] 32. A charged particle inspection system according to claim 31, wherein each of the plurality of sensing elements is configured to generate an electrical signal in response to particles incident on each sensing element, and the switching network is configured to combine the electrical signals generated from the group of sensing elements and transmit the combined electrical signals to the readout channel via the common node.

[0152] 33. A charged particle inspection system according to claim 32, wherein the switching network is configured to transmit an electrical signal from each of a plurality of groups of the plurality of sensing elements to a corresponding readout channel of the readout circuit system having a plurality of readout channels corresponding to the plurality of groups.

[0153] 34. A charged particle inspection system according to clause 33, wherein each group of the plurality of groups is associated with a different secondary electron beam of a plurality of secondary electron beams of the SEM system.

[0154] 35. A charged particle inspection system according to any of clauses 31-34, wherein the plurality of sensing elements comprises at least 1000 PIN diodes.

[0155] 36. A charged particle inspection system comprising:

[0156] a charged particle beam source configured to generate a primary charged particle beam for sample scanning; and

[0157] a detector configured to receive a secondary charged particle beam exiting the sample from a point of incidence of the primary charged particle beam at the sample, the detector comprising:

[0158] a first semiconductor substrate;

[0159] a plurality of sensing elements formed on the first semiconductor substrate;

[0160] a second semiconductor substrate; and

[0161] A readout circuit system is formed on the second semiconductor substrate and includes a plurality of readout channels, each readout channel corresponding to a different one of the plurality of sensing elements and configured to receive an electrical signal from the corresponding sensing element via a chip-to-chip connection.

[0162] 37. A charged particle inspection system according to clause 36, wherein each sensing element of the plurality of sensing elements is configured to be connected to a corresponding readout channel via a chip-to-chip connection.

[0163] 38. A charged particle inspection system according to clause 36, wherein each sensing element of the plurality of sensing elements is configured to generate an electrical signal in response to electrons incident on each sensing element.

[0164] 39. A charged particle inspection system according to any of clauses 36-38, wherein the plurality of sensing elements comprises at least 1000 PIN diodes.

[0165] The block diagram in the figure shows the possible architecture, function and operation of the system, method and computer hardware or software product according to various example embodiments of the present disclosure. In this regard, each box in the flow chart or block diagram can represent a part of a module, segment or code, which includes one or more executable instructions for implementing a specified logical function. It should be understood that in some alternative implementations, the functions indicated in the box may not occur in the order shown in the figure. For example, two boxes displayed continuously can be executed or implemented substantially at the same time, or two boxes can sometimes be executed in reverse order, depending on the functions involved. Some boxes can also be omitted. It should also be understood that each box in the block diagram and the combination of boxes can be implemented by a special hardware system that performs a specified function or action, or by a combination of special hardware and computer instructions.

[0166] It should be understood that the embodiments of the present disclosure are not limited to the exact constructions described above and shown in the drawings, and various modifications and changes may be made without departing from the scope thereof.

Claims

1. A detector for a scanning electron microscope (SEM) system, comprising: Semiconductor substrate; as well as A switch network is formed on the semiconductor substrate and includes a radiation-resistant NMOS transistor, wherein the NMOS transistor includes a first source / drain diffusion region, a second source / drain diffusion region, and a gate, wherein the gate is patterned on the semiconductor substrate and surrounds one of the first source / drain diffusion region and the second source / drain diffusion region. 2 . The detector of claim 1 , further comprising a plurality of sensing elements formed on the semiconductor substrate. 3 . The detector of claim 2 , wherein the switch network has a plurality of input terminals, the plurality of input terminals being connected to different sensing elements among the plurality of sensing elements.

4. The detector of claim 2, wherein the switch network has a common node that is communicatively coupled to a group of the plurality of sensing elements and is configured to be connected to a readout channel of a readout substrate via a chip-to-chip connection.

5. A detector according to claim 4, wherein each of the plurality of sensing elements is configured to generate an electrical signal in response to electrons incident on each sensing element, and the switching network is configured to combine the electrical signals generated from the group of sensing elements and transmit the combined electrical signal to the readout channel via the common node.

6. A detector according to claim 2, wherein the switching network is configured to transmit the electrical signal from each of the multiple groups of the multiple sensing elements to the corresponding readout channel of the readout substrate via a chip-to-chip connection, and the readout substrate has multiple readout channels corresponding to the multiple groups.

7. The detector of claim 6, wherein each of the plurality of groups is associated with a different secondary electron beam of a plurality of secondary electron beams of the SEM system.

8. The detector of claim 2, wherein the plurality of sensing elements comprises at least 1000 PIN diodes.

9. A charged particle inspection system comprising: a charged particle beam source configured to generate a primary charged particle beam for sample scanning; as well as a detector configured to receive a secondary charged particle beam exiting the sample from a point of incidence of the primary charged particle beam at the sample, the detector comprising: Semiconductor substrate; as well as A switch network is formed on the semiconductor substrate and includes a radiation-resistant NMOS transistor, wherein the NMOS transistor includes a first source / drain diffusion region, a second source / drain diffusion region, and a gate, wherein the gate is patterned on the semiconductor substrate and surrounds one of the first source / drain diffusion region and the second source / drain diffusion region.

10. The charged particle inspection system of claim 9, wherein the detector further comprises a plurality of sensing elements formed on the semiconductor substrate.

11. The charged particle inspection system of claim 10, wherein the switch network has a plurality of input terminals connected to different ones of the plurality of sensing elements.

12. The charged particle inspection system of claim 10, wherein the switch network has a common node that is communicatively coupled to a group of the plurality of sensing elements and is configured to be connected to a readout channel of a readout substrate via a chip-to-chip connection.

13. A charged particle inspection system according to claim 12, wherein each of the plurality of sensing elements is configured to generate an electrical signal in response to electrons incident on each sensing element, and the switching network is configured to combine the electrical signals generated from the group of sensing elements and transmit the combined electrical signal to the readout channel via the common node.

14. A charged particle inspection system according to claim 10, wherein the switching network is configured to transmit the electrical signal from each of the multiple groups of the multiple sensing elements to the corresponding readout channel of the readout substrate via a chip-to-chip connection, and the readout substrate has multiple readout channels corresponding to the multiple groups.

15. The charged particle inspection system of claim 14, wherein each of the plurality of groups is associated with a different secondary electron beam of a plurality of secondary electron beams of the SEM system.

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