Electronic device and floating point computing unit resource management method thereof

Abstract

The invention discloses an electronic device and a floating point computing unit resource management method thereof, and relates to the technical field of electronic devices. A floating point computing unit resource management method is applied to an electronic device. The electronic device comprises a computing circuit and a memory. The memory stores a first variable and a second variable. The calculation circuit comprises a floating point calculation unit. The floating point calculation unit comprises a floating point calculation unit register. The computing circuit is operated in one of a first state, a second state and a third state. The management method comprises the following steps: (A) when the computing circuit is switched from the first state to the second state and the first variable is an initial state, pointing the first variable to an address where the second variable is located; (B) filling the floating point computing unit resource content of the second variable into the floating point computing unit register; and (C) controlling the computing circuit to switch to the second state.

Description

Technical Field

[0001] The present application relates to the technical field of electronic devices, and in particular to an electronic device and a method for managing floating-point computing unit resources thereof. Background Art

[0002] Figure 1 Display the hardware resources of existing electronic devices. Existing electronic devices usually include a central processing unit (CPU) and a memory (volatile memory and / or nonvolatile memory). The CPU includes a floating point unit (FPU) and multiple CPU registers (e.g., control registers, general registers, and status registers). The FPU is used to perform floating point operations and includes multiple FPU registers. Therefore, if Figure 1 As shown, the hardware resources 100 of the electronic device include CPU resources 110 (eg, content of CPU registers), memory resources 120 (eg, memory pointers), and FPU resources 130 (eg, content of FPU registers).

[0003] Current operating systems are usually capable of multitasking. During the process of switching tasks, the operating system must properly preserve the hardware resources 100 to maintain the correct operation of the electronic device. Preservation of the hardware resources 100 is also important for a multi-state CPU, especially when the multi-state corresponds to different multi-systems. Otherwise, data processing errors may occur during the process of switching states, or even cause the system to crash. Summary of the invention

[0004] One of the purposes of the present application is to provide an electronic device and a method for managing floating-point computing unit resources thereof to improve the deficiencies of the prior art.

[0005] One embodiment of the present application provides an electronic device, comprising: a computing circuit and a memory. The computing circuit includes a floating-point computing unit. The floating-point computing unit includes a floating-point computing unit register. The computing circuit operates in one of a first state, a second state, and a third state. The memory is used to store a first variable and a second variable. When the computing circuit switches from the first state to the second state, and the first variable is an initial state, the computing circuit performs the following steps: (A) points the first variable to the address of the second variable; and, (B) fills a floating-point computing unit resource content of the second variable into the floating-point computing unit register.

[0006] Another embodiment of the present application provides a method for managing floating-point computing unit resources, which is applied to an electronic device. The electronic device includes a computing circuit and a memory. The memory stores a first variable and a second variable. The computing circuit includes a floating-point computing unit. The floating-point computing unit includes a floating-point computing unit register. The computing circuit operates in one of a first state, a second state, and a third state. The management method includes: (A) when the computing circuit switches from the first state to the second state and the first variable is an initial state, the first variable is pointed to the address of the second variable; (B) a floating-point computing unit resource content of the second variable is filled into the floating-point computing unit register; and (C) controlling the computing circuit to switch to the second state.

[0007] Another embodiment of the present application provides a method for managing floating-point computing unit resources, which is applied to an electronic device. The electronic device includes a computing circuit and a memory. The memory stores a first variable and a second variable. The computing circuit includes a floating-point computing unit. The floating-point computing unit includes a floating-point computing unit register. The computing circuit operates in one of a first state, a second state, and a third state. The management method includes: when the first variable is not an initial state and the first variable does not point to the address of the second variable, saving the content of the floating-point computing unit register to a task control block of a task pointed to by the first variable. The task belongs to the first state, and the task control block is stored in the memory.

[0008] The technical means embodied in the embodiments of the present application can improve at least one of the shortcomings of the prior art, so the present application can improve the security and stability of the system compared to the prior art.

[0009] The features, implementation and effects of the present application are described in detail below with reference to the accompanying drawings as preferred embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 Display the hardware resources of the existing electronic device;

[0011] Figure 2 is a functional block diagram of an embodiment of the electronic device of the present application;

[0012] Figure 3 Displays a task's task control block;

[0013] Figure 4 is a schematic diagram of the computing circuit of the present application switching between multiple states;

[0014] Figure 5 It is a schematic diagram of the context exchange of this application;

[0015] Figure 6 is a flow chart of an embodiment of task switching within the state of the present application;

[0016] Figure 7 is a flow chart of an embodiment of the FPU resource management method of the present application;

[0017] Figure 8 is a flowchart of an embodiment of switching between states of the present application; and

[0018] Fig. 9 It is a flowchart of another embodiment of the FPU resource management method of the present application.

[0019] Reference numerals:

[0020] 100: hardware resources;

[0021] 110: CPU resources;

[0022] 120: memory resources;

[0023] 130: FPU resources;

[0024] 200: electronic devices;

[0025] 210: Computational circuits;

[0026] 215: FPU (floating point unit);

[0027] 220: memory;

[0028] 230: external memory;

[0029] 300: task control block;

[0030] 310: identification code;

[0031] 320: priority;

[0032] 330: name;

[0033] 340: FPU resource content;

[0034] 410: first state;

[0035] 420: second state;

[0036] 430: third state;

[0037] 500C, 500P: hardware resource content;

[0038] 510: CPU register;

[0039] 520: FPU registers;

[0040] 530: memory index;

[0041] S610, S620, S630, S710, S720, S730, S740, S750, S760, S770, S780, S810, S820, S830, S910, S920, S930, S940, S950, S960: steps. DETAILED DESCRIPTION

[0042] The technical terms used in the following descriptions are based on customary terms in the technical field. If some of the terms are explained or defined in this specification, the interpretation of the terms shall be based on the explanation or definition in this specification.

[0043] The disclosure of the present application includes an electronic device and a method for managing floating-point computing unit resources thereof. Since some of the components included in the electronic device of the present application may be known components individually, the details of the known components will be omitted in the following description without affecting the full disclosure and feasibility of the device invention. In addition, part or all of the process of the floating-point computing unit resource management method of the present application may be in the form of software and / or firmware, and may be executed by the electronic device of the present application or its equivalent device. Without affecting the full disclosure and feasibility of the method invention, the following description of the method invention will focus on the step content rather than the hardware.

[0044] See also Figure 2 , Figure 2 2 is a functional block diagram of an embodiment of the electronic device of the present application. The electronic device 200 includes a computing circuit 210 and a memory 220 (including but not limited to a volatile memory and / or a non-volatile memory) coupled to each other. The computing circuit 210 includes an FPU 215 and is also coupled to an external memory 230 (including but not limited to a volatile memory and / or a non-volatile memory). The memory 220 stores program codes and / or program instructions. The computing circuit 210 can be a circuit or electronic component with program execution capability, such as a CPU, a microprocessor, a microprocessing unit, a digital signal processor, an application specific integrated circuit (ASIC), or an equivalent circuit thereof. The computing circuit 210 executes the operating system and / or application program of the electronic device 200 by executing the multiple program codes and / or program instructions. In the following description, it is assumed that the computing circuit 210 is implemented by a CPU, but the present application is not limited thereto.

[0045] The computing circuit 210 can execute at least one operating system and can process multiple tasks. Figure 3The task control block (TCB) of a task is shown. The task control block 300 is a memory space (e.g., it can be a part of the memory 220) used to store the relevant status and information of the task when it is running. The task control block 300 includes information such as the task identification code 310, priority 320, name 330 and FPU resource content (context) 340. The FPU resource content 340 is used to store the value of the register of the FPU 215.

[0046] The computing circuit 210 can operate in multiple states to implement multiple systems. Figure 4 , Figure 4 It is a schematic diagram of the computing circuit of the present application switching between multiple states. The computing circuit 210 executes the first operating system in the first state 410, and executes the second operating system in the second state 420. When the computing circuit 210 is to switch from the first state 410 to the second state 420, or from the second state 420 to the first state 410, the computing circuit 210 first enters the third state 430. The third state 430 is an ultra-high privilege temporary state (or called monitor mode). The privileges of the third state 430 are higher than the privileges of the first state 410 and the privileges of the second state 420. In the third state 430, the computing circuit 210 has the privilege to switch states, and performs context switching (context switch, also called environment switching) between operating systems (or between states) by executing monitor firmware (to be discussed below). Figure 8 and Fig. 9 In some embodiments, the first state 410 is a security state, and the second state 420 is a non-security state, and the permissions of the first state 410 are higher than the permissions of the second state 420. In some embodiments, the first operating system is a simple operating system (simple OS), and the second operating system is a complex operating system (Rich OS).

[0047] See also Figure 5 , Figure 5 is a schematic diagram of context exchange in this application. Figure 5In the example, the computing circuit 210 switches from the previous task TAp (corresponding to the hardware resource content 500P) to the current task TAc (corresponding to the hardware resource content 500C). More specifically, when performing task switching, the operating system of the computing circuit 210 first saves the hardware resources used by the previous task TAp (including the content of the CPU register 510, the content of the FPU register 520, and the memory pointer 530) to the hardware resource content 500P of the previous task TAp, and then restores the hardware resource content 500C of the current task TAc (i.e., the hardware resource content 500C is stored in the CPU register 510, the FPU register 520, and the memory pointer 530). Then, the computing circuit 210 can execute the current task TAc. The FPU register 520 is included in the FPU 215. In some embodiments, the content of the FPU register 520 is saved to the task control block 300 of the previous task TAp (more specifically, saved to the FPU resource content 340).

[0048] See also Figure 6 , Figure 6 1 is a flowchart of an embodiment of task switching within the state of the present application. When the computing circuit 210 switches from the previous task TAp to the current task TAc, the computing circuit 210 (or the operating system executed by it) performs context switching (step S610, see Figure 5 ) and turn off FPU 215 (step S620), and then execute the current task TAc (step S630). When the current task TAc will use FPU 215, because FPU 215 is in the off state, the computing circuit 210 generates an exception signal. After the operating system captures the exception signal, the operating system executes the corresponding exception handling process. In the exception handling process, the operating system will turn on FPU 215 and save and / or restore FPU resources as appropriate (to be discussed below). Figure 7 When the computing circuit 210 performs task switching again (ie, Figure 6 ), the FPU 215 will be turned off again (step S620).

[0049] In some embodiments, the computing circuit 210 (or the operating system executed by it) enables or disables the FPU 215 by changing a temporary value of a control register.

[0050] See also Figure 7 , Figure 7 It is a flow chart of an embodiment of the FPU resource management method of the present application. In the following description, it is assumed that the computing circuit 210 operates in the first state 410 or the second state 420 and switches from the previous task TAp to the current task TAc. Figure 7The process is part of the operating system and includes the following steps.

[0051] Step S710 : The operating system receives an exception signal, indicating that the current task TAc includes floating-point instructions, and the floating-point instructions will use the FPU 215 .

[0052] Step S720: The computing circuit 210 determines whether the variable A points to the current task TAc (i.e., the task currently being executed by the computing circuit 210). More specifically, the variable A points to the task control block 300 of a certain task or the FPU resource content 340 of the task control block 300. The variable A may be stored in the memory 220. The result of step S720 indicates that the current task TAc has undergone several context switches since the last use of the FPU 215, and the tasks that have been running during the process have not used the FPU 215.

[0053] Step S730: The computing circuit 210 does not change the content of the FPU register 520, nor does it save the content of the FPU register 520. As described in the previous step, since the content of the FPU register 520 has not changed since the last time the FPU 215 was used, the computing circuit 210 (more specifically, the FPU 215) can now continue to execute the floating-point instructions of the current task TAc based on the current content of the FPU register 520 (step S740).

[0054] Step S750: The calculation circuit 210 determines whether the variable A is in an initial state. The initial state may be that the variable A is not assigned a value or that the variable A is a preset value. When the electronic device 200 is just started, the variable A is in the initial state (ie, not assigned a value or equal to the preset value).

[0055] When variable A is in the initial state (step S750 is yes, indicating that the FPU 215 has not been used since the electronic device 200 was turned on), the operating system restores the FPU resource content 340 of the current task TAc, that is, fills the FPU resource content 340 of the current task TAc into the FPU register 520 (step S770). It should be noted that when the current task TAc has not used the FPU 215, the FPU resource content 340 of the current task TAc is the initialized FPU resource content.

[0056] When variable A is not in the initial state (step S750 is No, indicating that FPU 215 has been used after electronic device 200 is powered on), the operating system saves the content of FPU register 520 to FPU resource content 340 of the previous task TAp (step S760), and then executes step S770.

[0057] Step S780: The operating system points the variable A to the current task TAc (used to indicate that the task that most recently used the FPU 215 is the current task TAc), and then executes the current task TAc (step S740).

[0058] In some embodiments, the first state 410 and the second state 420 are based on Figure 7 In different embodiments, the first state 410 is based on Figure 7 The FPU resource management is performed based on the process of FIG. 4 , while the second state 420 performs FPU resource management based on other methods (for example, the existing eager loading method).

[0059] See also Figure 8 , Figure 8 4 is a flowchart of an embodiment of the state switching of the present application. When the computing circuit 210 switches from the second state 420 to the first state 410, the operating system of the second state 420 controls the computing circuit 210 to enter the third state 430 (step S810), and then the monitoring firmware of the third state 430 shuts down the FPU 215 (step S820), and then controls the computing circuit 210 to switch to the first state 410 (step S830).

[0060] See also Fig. 9 , Fig. 9 4 is a flow chart of another embodiment of the FPU resource management method of the present application. In this embodiment, variable A and variable B are stored in a shared memory (e.g., a portion of memory 220) of the electronic device 200, and are shared by the operating system in the first state 410 and the monitoring firmware in the third state 430. Variable B is used to store the content of the FPU register 520 when the computing circuit 210 is about to switch from the second state 420 to the first state 410. Variable A points to the address where variable B is located, or a task in the first state 410. In the following description, it is assumed that the computing circuit 210 will switch from the first state 410 to the second state 420, and the operating system in the second state 420 may use the FPU 215. Fig. 9 The process is executed in the third state 430 (ie, part of the monitoring firmware) and includes the following steps.

[0061] Step S910: The calculation circuit 210 determines whether the variable A is in the initial state. Please refer to the description of step S750.

[0062] When variable A is in the initial state (step S910 is yes, indicating that the operating system in the first state 410 has not used the FPU 215 so far), the computing circuit 210 points variable A to the address of variable B (for example, an address in the memory 220) (step S920), and then fills the FPU resource content of variable B into the FPU register 520 (step S930), and then controls the computing circuit 210 to switch to the second state 420 (step S960). It should be noted that when the operating system in the second state 420 has not used the FPU 215, the FPU resource content of variable B is the initialized FPU resource content.

[0063] When variable A is not in the initial state (No in step S910 , indicating that the FPU 215 has been used), the calculation circuit 210 determines whether variable A points to the address where variable B is located (step S940 ).

[0064] When variable A points to the address of variable B (step S940 is yes, indicating that during the most recent operation of the operating system in the first state 410, all tasks did not use the FPU 215), the monitoring firmware in the third state 430 controls the computing circuit 210 to switch to the second state 420 (step S960).

[0065] When variable A does not point to the address where variable B is located (step S940 is no, indicating that during the most recent operation of the operating system in the first state 410, a task TAX used FPU 215), the monitoring firmware in the third state 430 saves the content of FPU register 520 to the task control block 300 (more specifically, to the FPU resource content 340) of the task pointed to by variable A (i.e., the task TAX belonging to the first state 410) (step S950). Then, after executing steps S920 and S930, the monitoring firmware controls the computing circuit 210 to switch to the second state 420 (step S960).

[0066] In summary, the present application provides a complete FPU resource management method (i.e., register preservation and / or restoration strategy) so that the computing circuit 210 is in the state (corresponding to Figures 6-7 of processes) and between states (corresponding to Figures 8-9 The FPU resources can be properly managed by the computing circuit 210 supporting multiple systems, which greatly reduces the time and space overhead of saving and / or restoring FPU resources when switching between states, and takes into account safety and stability. In addition, when the computing circuit 210 switches from the second state 420 to the first state 410, no cost of saving FPU resources is required (only the FPU 215 needs to be turned off, see Figure 8); and when the computing circuit 210 switches from the first state 410 to the second state 420, the frequency of saving and / or restoring the FPU resources is also much lower than the existing active loading method. Therefore, the present application can not only take into account the security and stability before and after the state transition, but also greatly reduce the time overhead of saving and / or restoring the resources caused by the use of the FPU by the program code, making the transition between states faster and more time-saving.

[0067] Although the embodiments of the present application are described above, these embodiments are not intended to limit the present application. Technicians in this technical field may change the technical features of the present application based on the explicit or implicit contents of the present application. All these changes may fall within the scope of patent protection sought by the present application. The scope of patent protection of the present application shall be based on the scope of the patent application of this specification.

Claims

1. An electronic device, characterized in that: include: a computing circuit, wherein the computing circuit comprises a floating point computing unit, the floating point computing unit comprises a floating point computing unit register, and the computing circuit operates in one of a first state, a second state and a third state; and A memory for storing a first variable and a second variable; When the computing circuit switches from the first state to the second state and the first variable is in an initial state, the computing circuit performs the following steps: (A) pointing the first variable to the address of the second variable; and (B) Filling a floating point calculation unit resource content of the second variable into the floating point calculation unit register.

2. The electronic device according to claim 1, wherein: When the first variable is not in the initial state and the first variable does not point to the address of the second variable, the calculation circuit saves the content of the floating-point calculation unit register to a task control block of a task pointed to by the first variable, the task belongs to the first state, and the task control block is stored in the memory.

3. The electronic device according to claim 1, wherein: When the computing circuit switches from the second state to the first state, the computing circuit turns off the floating point computing unit.

4. The electronic device according to claim 1, wherein: When the computing circuit operates in the first state and a current task uses the floating-point computing unit, the computing circuit points the first variable to the current task.

5. The electronic device as claimed in claim 4, characterized in that: The floating-point calculation unit resource content is a first floating-point calculation unit resource content. The calculation circuit executes a previous task before executing the current task. The calculation circuit also saves the content of the floating-point calculation unit register to a first task control block of the previous task, and fills a second floating-point calculation unit resource content of a second task control block of the current task into the floating-point calculation unit register.

6. The electronic device as claimed in claim 4, characterized in that: The computing circuit executes a previous task before executing the current task, and when the computing circuit switches from the previous task to the current task, the computing circuit turns off the floating point computing unit.

7. The electronic device as claimed in claim 1, characterized in that: Step (A) and step (B) are performed in the third state, and a third permission of the third state is higher than a first permission of the first state and a second permission of the second state.

8. A method for managing floating point computing unit resources, characterized in that: Applied to an electronic device, the electronic device includes a computing circuit and a memory, the memory stores a first variable and a second variable, the computing circuit includes a floating-point computing unit, the floating-point computing unit includes a floating-point computing unit register, the computing circuit operates in one of a first state, a second state and a third state, the management method includes: (A) when the computing circuit switches from the first state to the second state and the first variable is in an initial state, the first variable is pointed to the address of the second variable; (B) filling a floating point computing unit resource content of the second variable into the floating point computing unit register; and (C) Controlling the calculation circuit to switch to the second state.

9. The management method according to claim 8, characterized in that: Also includes: (D) when the first variable is not in the initial state and the first variable does not point to the address of the second variable, saving the content of the floating-point calculation unit register to a task control block of a task pointed to by the first variable; The task belongs to the first state, and the task control block is stored in the memory.

10. The management method according to claim 8, characterized in that: Also includes: (D) When the computing circuit switches from the second state to the first state, turning off the floating-point computing unit.

11. The management method according to claim 8, characterized in that: Also includes: (D) When the computing circuit operates in the first state and a current task uses the floating-point computing unit, the first variable is pointed to the current task.

12. The management method according to claim 11, characterized in that: The floating point computing unit resource content is a first floating point computing unit resource content, the computing circuit executes a previous task before executing the current task, and the management method further includes: (E) saving the content of the floating point calculation unit register to a first task control block of the previous task; and (F) Filling the floating-point computing unit register with the content of a second floating-point computing unit resource of a second task control block of the current task.

13. The management method according to claim 11, characterized in that: The computing circuit executes a previous task before executing the current task, and the management method further includes: (E) When the computing circuit switches from the previous task to the current task, turning off the floating-point computing unit.

14. The management method according to claim 8, characterized in that: Step (A), step (B) and step (C) are performed in the third state, and a third permission of the third state is higher than a first permission of the first state and a second permission of the second state.

15. A method for managing floating point computing unit resources, characterized in that: Applied to an electronic device, the electronic device includes a computing circuit and a memory, the memory stores a first variable and a second variable, the computing circuit includes a floating-point computing unit, the floating-point computing unit includes a floating-point computing unit register, the computing circuit operates in one of a first state, a second state and a third state, the management method includes: (A) when the first variable is not in an initial state and the first variable does not point to the address of the second variable, saving the content of the floating-point calculation unit register to a task control block of a task pointed to by the first variable; The task belongs to the first state, and the task control block is stored in the memory.

16. The management method according to claim 15, characterized in that: Also includes: (B) When the calculation circuit switches from the second state to the first state, turning off the floating-point calculation unit.

17. The management method according to claim 15, characterized in that: Also includes: (B) When the computing circuit operates in the first state and a current task uses the floating-point computing unit, the first variable is pointed to the current task.

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