Chip testing method and device and storage medium

Abstract

The embodiment of the invention discloses a chip testing method and device and a storage medium, and relates to the field of chip testing. According to the application, the functions of on-line debugging, upper computer communication, burning and the like of the chip are integrated in one tool, different hardware does not need to be switched in the processes of upper computer communication, on-line debugging and burning of the chip, and wiring does not need to be carried out every time; the development cost is reduced, the development difficulty is reduced, the development convenience is improved, and the scheme development time is shortened.

Description

Technical Field

[0001] The present application relates to the field of chip testing, and in particular to a chip testing method, device and storage medium. Background Art

[0002] Before the chip is shipped, the chip manufacturer will perform the debugging and burning process. Currently, chip manufacturers will purchase burners, debuggers and converters separately, and different devices need to be switched during the debugging and burning process. Each device needs to be purchased separately, resulting in higher cost of the use plan; each device must be learned how to use it before use, such as how to wire, what to pay attention to, etc., and the learning cost is high; the chip needs to switch back and forth during testing, such as from the debugging stage to the mass production stage, or after mass production, if there is a problem, it needs to be re-debugged and positioned, and different switching devices are required, which increases the development time cost. Summary of the invention

[0003] The embodiments of the present application provide a chip testing method, device and storage medium, which can solve the problems of the chip testing process being relatively complicated and the hardware cost being high in the prior art. The technical solution is as follows:

[0004] In a first aspect, an embodiment of the present application provides a chip testing method, the method comprising:

[0005] Applied to an IC fusion test tool, the IC fusion test tool is provided with a USB interface, a UART interface, an SPI interface and a burning interface, the IC fusion test tool is connected to a host computer via the USB interface, the IC fusion test tool is connected to the target chip via the UART interface, the IC fusion test tool is connected to the target chip via the SPI interface, and the IC fusion test tool is connected to a burning machine via the burning interface;

[0006] Determine the current working mode;

[0007] If the working mode is the communication mode, receiving downstream USB data from the host computer through the USB interface, converting the downstream USB data into downstream UART data, and sending the downstream UART data to the target chip through the UART interface; receiving upstream UART data from the target chip through the UART interface, converting the upstream UART data into upstream USB data, and sending the upstream USB data to the host computer through the USB interface;

[0008] If the working mode is the debugging mode, a debug command from a host computer is received through a USB interface, the debug command is sent to a target chip through an SPI interface, and debugging data returned by the target chip is received through the SPI interface;

[0009] If the working mode is the burning mode, the solution firmware is received from the host computer through the USB interface, the solution firmware is stored in the internal flash memory, the burning start instruction from the burning machine is received from the burning interface, the solution firmware is sent to the target chip through the SPI interface, and after detecting that the burning of the target chip is successful, the burning success message is sent to the burning machine through the burning interface.

[0010] In a second aspect, an embodiment of the present application provides an IC fusion testing device, including:

[0011] A determination unit, used to determine the current working mode;

[0012] A communication unit, for, if the working mode is the communication mode, receiving downstream USB data from a host computer through a USB interface, converting the downstream USB data into downstream UART data, and sending the downstream UART data to the target chip through the UART interface; receiving upstream UART data from the target chip through a UART interface, converting the upstream UART data into upstream USB data, and sending the upstream USB data to the host computer through the USB interface;

[0013] A debugging unit, for receiving a debug command from a host computer through a USB interface if the working mode is a debugging mode, sending the debug command to a target chip through an SPI interface, and receiving debugging data returned by the target chip through the SPI interface;

[0014] The burning unit is used for receiving the solution firmware from the host computer through the USB interface if the working mode is the burning mode, storing the solution firmware in the internal flash memory, receiving the burning start instruction from the burning machine through the burning interface, sending the solution firmware to the target chip through the SPI interface, and sending the burning success message to the burning machine through the burning interface after detecting that the burning of the target chip is successful.

[0015] In a third aspect, an embodiment of the present application provides a computer storage medium, wherein the computer storage medium stores a plurality of instructions, wherein the instructions are suitable for being loaded by a processor and executing the above-mentioned method steps.

[0016] In a fourth aspect, an embodiment of the present application provides an IC fusion testing device, which may include: a processor and a memory; wherein the memory stores a computer program, and the computer program is suitable for being loaded by the processor and executing the above-mentioned method steps.

[0017] The beneficial effects brought about by the technical solutions provided by some embodiments of the present application include at least:

[0018] By integrating the chip's online debugging, host computer communication, burning and other functions into one tool, there is no need to switch different hardware or connect wires every time during the chip's host computer communication, online debugging and burning, thus reducing development costs, reducing development difficulty, improving development convenience and shortening solution development time. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0020] Figure 1 It is a schematic diagram of the network architecture provided by the embodiment of the present application;

[0021] Figure 2 It is a flowchart of a chip testing method provided in an embodiment of the present application;

[0022] Figure 3 It is a structural schematic diagram of an IC fusion test device provided by the present application;

[0023] Figure 4 It is a structural schematic diagram of an IC fusion testing device provided by this application. DETAILED DESCRIPTION

[0024] In order to make the objectives, technical solutions and advantages of the present application more clear, the embodiments of the present application will be further described in detail below with reference to the accompanying drawings.

[0025] It should be noted that the chip testing method provided in the present application is generally performed by an IC fusion testing device, and accordingly, the IC fusion testing device is generally arranged in an IC fusion testing device.

[0026] Figure 1 An exemplary system architecture of a chip testing method or an IC fusion testing device that can be applied to the present application is shown.

[0027] like Figure 1As shown, the system architecture may include: a host computer 101, an IC fusion test device 102, a burner 103, and a PCB board 104 provided with a target chip. The IC fusion test device 102 is connected to the host computer 101 via a USB interface, the IC fusion test device 103 is connected to the target IC in the PCB board 104 via an SPI interface, the IC fusion test device 103 is connected to the target IC in the PCB board 104 via a UART interface, and the IC fusion test device 103 is connected to the burner via a burn interface. In addition to the target chip, the PCB board 103 also includes the peripheral circuit of the target chip.

[0028] It should be understood that Figure 1 The number of target chips in is only illustrative and can be any number of target chips according to implementation requirements.

[0029] The following will be combined with the attached Figure 2 , the chip testing method provided in the embodiment of the present application is described in detail. Among them, the IC fusion testing device in the embodiment of the present application can be Figure 1 The IC fusion test setup is shown.

[0030] See also Figure 2 , is a flow chart of a chip testing method provided in an embodiment of the present application. Figure 2 As shown, the method of the embodiment of the present application may include the following steps:

[0031] S201. Determine the current working mode.

[0032] After the IC fusion test device is started, the system is initialized first, including interface configuration, internal register setting, software module loading, etc. According to the preset configuration, external instructions (such as commands from the host computer) or physical inputs on the device (such as buttons, switches), the current working mode (communication mode, debugging mode, burning mode) is determined. The internal state variables or flags are set to confirm the current working mode and prepare corresponding resources and services.

[0033] In some embodiments of the present application, a dip switch is provided on the IC fusion test device, and the current working mode is determined by reading the toggle position of the dip switch.

[0034] Among them, for situations where multiple working mode selections are required, dip switches are a common choice, which can provide multiple positions (each position represents a mode), or multiple slide switches or button combinations can be used to represent different modes. Determine the number of switches and the position of each switch according to the number of working modes that need to be supported. For example, if there are three working modes (communication mode, debugging mode, burning mode), a three-position dip switch can be used, and each position represents a mode. Mark the corresponding mode on each switch or each position of the switch for easy identification and operation. Connect the pins of the switch to the corresponding pins of the microcontroller (MCU) or other processing unit of the IC fusion device. These pins are configured as input pins for reading the state of the switch. Design the circuit to ensure that the switch signal can be correctly transmitted to the processing unit and that the processing unit can accurately read these signals. Pull-up resistors or pull-down resistors may be required to ensure the default state of the switch when it is not operated.

[0035] When the IC fusion tester is started, it initializes the input pins connected to the switches and reads the toggle state of the dip switches. Based on the read fluctuation position, the currently selected operating mode will be identified, usually by checking the specific position (or combination) of each switch. Once the current operating mode is identified, the software will set the corresponding internal state variables or flags and prepare the corresponding resources and services to support the mode. In order to provide a better user experience, the currently selected operating mode can be displayed through an LED indicator, LCD display or other output device.

[0036] S202. If the working mode is the communication mode, receive the downstream USB data from the host computer through the USB interface, convert the downstream USB data into downstream UART data, and send the downstream UART data to the target chip through the UART interface; receive the upstream UART data from the target chip through the UART interface, convert the upstream UART data into upstream USB data, and send the upstream USB data to the host computer through the USB interface.

[0037] Among them, it is confirmed that the host computer has been connected to the IC fusion test device through the USB interface, and the IC fusion test device has been connected to the target chip through the UART interface. Downlink data processing: The IC fusion test device receives the downstream USB data packet from the host computer through the USB interface. Parse the USB data packet and extract the data content to be sent to the target chip. Convert the extracted data into the downstream UART data format according to the requirements of the UART protocol. Send the converted downstream UART data to the target chip through the UART interface. Uplink data processing: The IC fusion test device receives the upstream UART data from the target chip through the UART interface. Parse the received UART data and extract the data content returned by the target chip. Convert the extracted data into the upstream USB data packet format according to the requirements of the USB protocol. Send the converted upstream USB data packet to the host computer through the USB interface.

[0038] In some embodiments of the present application, the USB interface provided on the IC fusion test device is a type-C interface. One of the greatest features of the Type-C interface is its reversible pluggable design, which greatly improves the user's convenience of use, and there is no need to worry about damage or inconvenience caused by reverse plugging. The Type-C interface supports USB 3.1 and above, and can achieve high-speed data transmission, which is especially important for IC fusion devices that need to frequently transmit large amounts of data. The Type-C interface supports USB Power Delivery (USB PD) technology, which can provide up to 100W of power transmission to meet the charging and power supply needs of various devices. The Type-C interface can not only be used for data transmission and power transmission, but also supports multiple functions such as video output and audio transmission, providing more application scenarios for IC fusion devices.

[0039] S203: If the working mode is the debugging mode, a debug command from the host computer is received through the USB interface, the debug command is sent to the target chip through the SPI interface, and the debugging data returned by the target chip is received through the SPI interface.

[0040] Among them, confirm that the host computer has been connected to the IC fusion test device through the USB interface, and the IC fusion test device has been connected to the target chip through the SPI interface. The IC fusion test device receives the debug command from the host computer through the USB interface. Parse the received debug command to determine the specific debugging operation or parameter. Send the parsed debug command to the target chip through the SPI interface. During the sending process, the timing and format requirements of the SPI protocol must be followed.

[0041] The IC fusion test device receives the debugging data returned by the target chip through the SPI interface. During the receiving process, it needs to be synchronized with the clock signal of the SPI interface. The received debugging data is parsed to extract useful debugging information. As needed, the debugging information is fed back to the host computer through the USB interface.

[0042] In some embodiments of the present application, a debug command from a host computer is received in a synchronous manner, and debug data from a target chip is received in an asynchronous manner.

[0043] Among them, the synchronous mode receives debug commands from the host computer. In this mode, the IC fusion test device will wait for the host computer to send a complete debug command before proceeding to the next step. Usually, this involves a handshake protocol, in which the device sends a signal to the host computer that it is ready to receive data (such as a request to send signal RTS), and the host computer starts sending data after receiving the signal, and sends an end signal (such as a transmission end signal EOT) after the data is sent. After receiving the end signal, the device confirms that the data is received completely, and then starts to process the debug command. During the synchronous communication process, the device may enter a blocking state, that is, it will not respond to other requests or operations until the command processing is completed. This helps to ensure the integrity of the command and the order of processing. The synchronous mode is very useful when it is necessary to ensure the integrity and order of the debug command. In debugging scenarios where real-time requirements are not particularly high, the synchronous mode can simplify the implementation of communication protocols and devices.

[0044] Debug data from the target chip is received asynchronously. In this mode, the IC fusion test device does not wait for the target chip to send data, but continuously listens to the data on the SPI interface. Once a valid data frame is detected, the device immediately starts to receive and process the data. Since the target chip may send data at any time, this method is called asynchronous. The device uses an interrupt mechanism to process the asynchronously received data. When data is received, the SPI interface triggers an interrupt, and the device's interrupt service routine (ISR) responds to this interrupt and reads the data from the UART interface. This method ensures that the device does not miss the received data while processing other tasks. The asynchronous method is very suitable when the target chip needs to send debug data at any time and this data has high real-time requirements. In scenarios where multiple communication tasks need to be processed simultaneously (such as receiving debug data and performing other communication tasks at the same time), the asynchronous method can improve the efficiency and response speed of the device.

[0045] By combining synchronous and asynchronous methods, the IC fusion test device can flexibly process data from different sources and select the most appropriate communication method based on the characteristics of the data and application scenarios. This design not only improves the flexibility and efficiency of the device, but also ensures the integrity and real-time nature of the data.

[0046] S204, if the working mode is the burning mode, the solution firmware is received from the host computer through the USB interface, the solution firmware is stored in the internal flash memory, the burning start instruction from the burning machine is received from the burning interface, the solution firmware is sent to the target chip through the SPI interface, and after detecting that the target chip is burned successfully, the burning success message is sent to the burning machine through the burning interface.

[0047] Among them, it is confirmed that the host computer has been connected to the IC fusion test device through the USB interface, the IC fusion test device has been connected to the burning machine through the burning interface, and the IC fusion test device has been connected to the target chip through the SPI interface.

[0048] The IC fusion test device receives the solution firmware file from the host computer through the USB interface. The received solution firmware file is stored in the flash memory inside the IC fusion test device. During the storage process, the file integrity check is required. The burn start command from the burner is received from the burn interface. The stored solution firmware is read from the flash memory and prepared for the burn operation. The solution firmware data is sent to the target chip through the SPI interface according to the requirements of the burn protocol. During the sending process, the clock frequency, data transmission rate and other parameters of the SPI interface need to be controlled. During the burning process, the state of the target chip is continuously monitored to determine whether the burning is successful. This may involve reading specific registers of the target chip or executing specific detection commands. After detecting that the target chip is burned successfully, the internal state or flag bit is set to confirm that the burning is successful. The burning success message is sent to the burner through the burning interface, which may include sending a specific confirmation code or status flag bit. If an error occurs during the burning process (such as data verification failure, no response from the target chip, etc.), the error information is recorded and fed back to the host computer or the burner through the corresponding interface (such as the USB interface or the burning interface).

[0049] In some embodiments of the present application, the IC fusion test device performs integrity verification on the solution firmware from the host computer, and after the verification passes, stores the solution firmware in the internal flash memory.

[0050] Among them, the IC fusion test device first receives the solution firmware data from the host computer through the USB interface. This data may be transmitted in the form of a file or sent block by block through a specific communication protocol. At the same time (or before) receiving the firmware data, the device needs to know the algorithm used for verification and any necessary checksum, hash value or digital signature information. This information may be sent with the firmware data or pre-defined as part of the firmware file. After receiving all the firmware data, the device starts to perform integrity verification. The specific algorithm for verification depends on the prior agreement. Common algorithms include CRC (cyclic redundancy check), MD5, SHA-1, SHA-256, etc. If CRC verification is used, the device will calculate a CRC value based on the received firmware data and compare it with the CRC value provided by the host computer. If a hash function (such as MD5, SHA series) is used, the device will calculate the hash value of the firmware data and compare it with the hash value provided by the host computer. If a digital signature is used, the device will verify the validity of the signature, which usually involves decrypting the signature with a public key and verifying the integrity of the firmware data.

[0051] If the verification passes, it means that the firmware data has not been tampered with during the transmission process, and the device will perform the next operation, that is, store the firmware data in the internal flash memory. If the verification fails, it means that the firmware data may have been damaged or tampered with. The device will refuse to store the firmware and send an error message to the host computer through the USB interface or other communication methods, indicating that the firmware data is incomplete or invalid. After the verification passes, the device will write the firmware data to the internal flash memory. The writing process may require additional error detection and correction mechanisms to ensure that the data will not be wrong during the storage process. After the writing is completed, the device may read the stored firmware data again and verify it to verify whether the data has been successfully and correctly stored in the flash memory. Integrity verification is an important part of ensuring the security of the firmware, but relying solely on verification cannot completely prevent malware attacks. Therefore, in actual applications, other security measures (such as encryption, digital signature verification, etc.) need to be combined to improve the security of the firmware. When updating or burning the firmware, be sure to ensure that the communication link between the IC fusion test device and the host computer is secure and reliable to prevent the data from being intercepted or tampered with during transmission. Information such as checksums, hash values, or digital signatures of firmware data should be provided by a trustworthy source and maintain confidentiality and integrity during the firmware distribution process.

[0052] In some embodiments of the present application, the IC fusion testing device displays the burning progress information and the burning status information through a display screen.

[0053] Among them, the IC fusion test device is usually equipped with a liquid crystal display (LCD) or LED display to display various information. The choice of display depends on factors such as cost, size, resolution and viewing angle. The display needs to be connected to the device's microcontroller (MCU) or other processing unit to receive and display information. During the burning process, the device will continuously receive the progress information of the burning from the SPI interface (if the target chip supports this function). This information may include the amount of data burned, the total amount of data, the remaining time, etc. The device converts this progress information into a human-readable format and displays it in real time through the display. For example, a progress bar can be displayed to indicate the completed burning work in percentage or specific data volume. In addition to the progress information, the device will also display the current burning status, such as "burning", "verifying", "burning success", "burning failure", etc. This status information is determined by the internal logic of the device according to the different stages and results of the burning process, and displayed through the display. The display is not only used to display information, but also as an interface for user interaction. For example, the device can provide a simple menu system that allows users to select different operating modes, view detailed log information, or perform other related operations through buttons or touch screens. If the display supports touch screen function, users can also directly control the device by touching the screen, which will further enhance the user experience. At the software level, the device needs to implement a display driver module to communicate with the display and control its display content. At the same time, a burning management module is also required to track the burning process, collect progress and status information, and pass this information to the display driver module for display.

[0054] In some embodiments of the present application, the IC fusion test device encrypts the solution firmware using a key provided by a host computer, and burns the encrypted solution firmware into a target chip.

[0055] Among them, the host computer is responsible for generating or providing the keys required for encryption. These keys should have a high degree of confidentiality and security to prevent unauthorized access or tampering. The generation and management of keys should follow strict security standards and processes, such as the use of secure random number generators, key storage and distribution mechanisms, etc. It is crucial to select a suitable encryption algorithm to encrypt the solution firmware. Common encryption algorithms include AES (Advanced Encryption Standard), DES (Data Encryption Standard), SM4 (National Secret Algorithm), etc. The selection of encryption algorithms should take into account factors such as their strength, efficiency, and compatibility. For example, AES has become the first choice for many application scenarios due to its high security and wide support. The host computer uses the provided key and the selected encryption algorithm to encrypt the solution firmware. The encryption process may involve splitting the firmware data into multiple blocks and performing encryption operations on each block. The encrypted firmware data will become difficult to understand and tamper with unless the correct key and decryption algorithm are available. The encrypted solution firmware will be transmitted from the host computer to the IC fusion test device through some communication interface (such as USB, serial port, Ethernet, etc.). During the transmission process, the integrity and security of the encrypted firmware data should be ensured to prevent the data from being intercepted or tampered with during transmission.

[0056] The IC fusion test device receives the encrypted solution firmware and prepares to burn it into the target chip. The device may need to initialize or erase the target chip first to ensure that the chip is in a burnable state. Use an appropriate burning tool or software to burn the encrypted solution firmware into the designated storage area of ​​the target chip. The correctness and integrity of the data should be ensured during the burning process, while following the burning specifications and timing requirements of the target chip. After the burning is completed, the IC fusion test device should perform a burning verification operation to check whether the firmware has been successfully burned into the chip and is not damaged. The verification operation may include operations such as reading the firmware data in the chip and performing a checksum or hash value comparison.

[0057] The IC fusion test device uses the key provided by the host computer to encrypt the solution firmware and burn the encrypted firmware into the target chip. This is a process involving multiple steps and technical elements. By strictly following security standards and specifications, the security and reliability of firmware data during encryption, transmission and burning can be ensured.

[0058] The embodiments of the present application have the following beneficial effects when testing a chip:

[0059] The traditional chip development process may require multiple independent tools or devices to complete tasks such as online debugging, host computer communication and burning respectively. This not only increases the purchase cost of hardware equipment, but may also lead to additional expenses such as software licensing, training and maintenance. The IC fusion test device of the present application integrates these functions into one tool, reducing the repeated investment of hardware and software resources, thereby effectively reducing the overall development cost. When the present application uses multiple tools for chip development, developers need to be familiar with and master the operation methods and interface specifications of different tools, which undoubtedly increases the learning curve and development difficulty. The IC fusion test device in the present embodiment simplifies the operation complexity of developers through a unified user interface and operation process, reduces the learning threshold, and enables developers to master and use the tool for chip development more quickly. The integration of functions such as online debugging, host computer communication and burning enables developers to develop chips without frequently switching tools or equipment, thereby improving development efficiency. In addition, the device may also provide automated test processes and data recording functions, further simplifying the cumbersome steps in the development process and improving development convenience. Due to the combined effect of the above-mentioned technical effects, the use of the IC fusion test device in the present embodiment for chip development can significantly shorten the solution development time. Developers can locate problems, verify functionality, and optimize performance faster, accelerating time to market and gaining a head start in the market.

[0060] The following is an embodiment of the device of the present application, which can be used to execute the embodiment of the method of the present application. For details not disclosed in the embodiment of the device of the present application, please refer to the embodiment of the method of the present application.

[0061] See also Figure 3 , which shows a schematic diagram of the structure of an IC fusion test device provided by an exemplary embodiment of the present application, hereinafter referred to as device 3. The device 3 can be implemented as all or part of the IC fusion test device through software, hardware or a combination of both. The device 3 includes: a determination unit 301, a communication unit 302, a debugging unit 303, and a burning unit 304.

[0062] A determination unit 301, used to determine a current working mode;

[0063] The communication unit 302 is used for, if the working mode is the communication mode, receiving downstream USB data from the host computer through the USB interface, converting the downstream USB data into downstream UART data, and sending the downstream UART data to the target chip through the UART interface; receiving upstream UART data from the target chip through the UART interface, converting the upstream UART data into upstream USB data, and sending the upstream USB data to the host computer through the USB interface;

[0064] The debugging unit 303 is used for receiving a debug command from a host computer through a USB interface if the working mode is a debugging mode, sending the debug command to a target chip through an SPI interface, and receiving debugging data returned by the target chip through the SPI interface;

[0065] The burning unit 304 is used for receiving the solution firmware from the host computer through the USB interface if the working mode is the burning mode, storing the solution firmware in the internal flash memory, receiving the burning start instruction from the burning machine through the burning interface, sending the solution firmware to the target chip through the SPI interface, and sending the burning success message to the burning machine through the burning interface after detecting that the burning of the target chip is successful.

[0066] In one or more possible embodiments, determining the current working mode includes:

[0067] The current working mode is determined by the setting position of the DIP switch.

[0068] In one or more possible embodiments, the debug command is sent in a synchronous manner, and the debug data is received in an asynchronous manner.

[0069] In one or more possible embodiments, it further includes:

[0070] The verification unit is used to perform integrity verification on the solution firmware from the host computer. After the verification passes, the solution firmware is stored in the internal flash memory.

[0071] In one or more possible embodiments, the burning unit 304 is further configured to:

[0072] The display shows the burning progress information and burning status information.

[0073] In one or more possible embodiments, sending the solution firmware to the target chip through the SPI interface further includes:

[0074] The solution firmware is encrypted using a key provided by the host computer, and the encrypted solution firmware is burned into the target chip.

[0075] In one or more possible embodiments, the USB interface is a type-C interface.

[0076] It should be noted that the device 3 provided in the above embodiment only uses the division of the above functional modules as an example when executing the chip test method. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device is divided into different functional modules to complete all or part of the above functions. In addition, the IC fusion test device provided in the above embodiment and the chip test method embodiment belong to the same concept, and the implementation process thereof is detailed in the method embodiment, which will not be repeated here.

[0077] The serial numbers of the above-mentioned embodiments of the present application are for description only and do not represent the advantages or disadvantages of the embodiments.

[0078] The present application also provides a computer storage medium, which can store multiple instructions, and the instructions are suitable for being loaded and executed by a processor as described above. Figure 2 The method steps of the embodiment shown in the figure can be found in the specific implementation process. Figure 2 The specific description of the illustrated embodiment will not be repeated here.

[0079] The present application also provides a computer program product, which stores at least one instruction, and the at least one instruction is loaded and executed by the processor to implement the chip testing method described in the above embodiments.

[0080] See also Figure 4 , is a schematic diagram of the structure of an IC fusion test device provided in an embodiment of the present application. Figure 4 As shown, the IC fusion testing device 400 is referred to as device 400 , and includes: at least one processor 401 , at least one network interface 404 , a user interface 403 , a memory 405 , and at least one communication bus 402 .

[0081] The communication bus 402 is used to realize the connection and communication between these components.

[0082] The user interface 403 may include a display screen (Display) and a touch screen.

[0083] The network interface 404 may optionally include a standard wired interface or a wireless interface (such as a WI-FI interface).

[0084] Among them, the processor 401 may include one or more processing cores. The processor 401 uses various interfaces and lines to connect the various parts of the entire IC fusion test device 400, and executes various functions and processes data of the IC fusion test device 400 by running or executing instructions, programs, code sets or instruction sets stored in the memory 405, and calling data stored in the memory 405. Optionally, the processor 401 can be implemented in at least one hardware form of digital signal processing (Digital Signal Processing, DSP), field programmable gate array (Field-Programmable Gate Array, FPGA), and programmable logic array (Programmable Logic Array, PLA). The processor 401 can integrate one or a combination of a central processing unit (Central Processing Unit, CPU), a graphics processing unit (Graphics Processing Unit, GPU) and a modem. Among them, the CPU mainly processes the operating system, user interface and application programs; the GPU is responsible for rendering and drawing the content to be displayed on the display screen; the modem is used to process wireless communication. It can be understood that the above-mentioned modem may not be integrated into the processor 401, and it can be implemented separately through a chip.

[0085] Among them, the memory 405 may include a random access memory (Random Access Memory, RAM) and may also include a read-only memory (Read-Only Memory). Optionally, the memory 405 includes a non-transitory computer-readable storage medium. The memory 405 can be used to store instructions, programs, codes, code sets or instruction sets. The memory 405 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as a touch function, a sound playback function, an image playback function, etc.), instructions for implementing the above-mentioned method embodiments, etc.; the data storage area may store data involved in the above-mentioned method embodiments, etc. The memory 405 may optionally be at least one storage device located away from the aforementioned processor 401. As Figure 4 As shown, the memory 405 as a computer storage medium may include an operating system, a network communication module, a user interface module, and an application program.

[0086] exist Figure 4In the IC fusion test device 400 shown in FIG. 1 , the user interface 403 is mainly used to provide an input interface for the user and obtain the data input by the user; and the processor 401 can be used to call the application stored in the memory 405 and specifically execute the following steps: Figure 2 The specific process can be referred to Figure 2 As shown, no further description is given here.

[0087] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiments can be implemented by instructing related hardware through a computer program, and the program can be stored in a computer-readable storage medium, and when the program is executed, it can include the processes of the embodiments of the above-mentioned methods. The storage medium can be a disk, an optical disk, a read-only storage memory, or a random access memory, etc.

[0088] The above disclosure is only the preferred embodiment of the present application, which certainly cannot be used to limit the scope of rights of the present application. Therefore, equivalent changes made according to the claims of the present application are still within the scope covered by the present application.

Claims

1. A chip testing method, characterized in that: Applied to an IC fusion test tool, the IC fusion test tool is provided with a USB interface, a UART interface, an SPI interface and a burning interface, the IC fusion test tool is connected to a host computer via the USB interface, the IC fusion test tool is connected to the target chip via the UART interface, the IC fusion test tool is connected to the target chip via the SPI interface, and the IC fusion test tool is connected to a burning machine via the burning interface; Determine the current working mode; If the working mode is the communication mode, receiving downstream USB data from the host computer through the USB interface, converting the downstream USB data into downstream UART data, and sending the downstream UART data to the target chip through the UART interface; Receiving uplink UART data from the target chip through the UART interface, converting the uplink UART data into uplink USB data, and sending the uplink USB data to the host computer through the USB interface; If the working mode is the debugging mode, a debug command from a host computer is received through a USB interface, the debug command is sent to a target chip through an SPI interface, and debugging data returned by the target chip is received through the SPI interface; If the working mode is the burning mode, the solution firmware is received from the host computer through the USB interface, the solution firmware is stored in the internal flash memory, the burning start instruction from the burning machine is received from the burning interface, the solution firmware is sent to the target chip through the SPI interface, and after detecting that the burning of the target chip is successful, the burning success message is sent to the burning machine through the burning interface.

2. The method according to claim 1, characterized in that Determining the current working mode includes: The current working mode is determined by the setting position of the DIP switch.

3. The method according to claim 1, characterized in that Send debug commands synchronously and receive debug data asynchronously.

4. The method according to claim 1, characterized in that Also includes: Perform integrity check on the solution firmware from the host computer. After passing the check, store the solution firmware in the internal flash memory.

5. The method according to claim 1, characterized in that Also includes: The display shows the burning progress information and burning status information.

6. The method according to claim 1, characterized in that The step of sending the solution firmware to the target chip via the SPI interface further includes: The solution firmware is encrypted using a key provided by the host computer, and the encrypted solution firmware is burned into the target chip.

7. The method according to claim 1, characterized in that The USB interface is a type-C interface.

8. An IC fusion testing device, characterized in that: include: A determination unit, used to determine the current working mode; A communication unit, for receiving downstream USB data from a host computer through a USB interface, converting the downstream USB data into downstream UART data, and sending the downstream UART data to the target chip through the UART interface if the working mode is a communication mode; Receiving uplink UART data from the target chip through the UART interface, converting the uplink UART data into uplink USB data, and sending the uplink USB data to the host computer through the USB interface; A debugging unit, for receiving a debug command from a host computer through a USB interface if the working mode is a debugging mode, sending the debug command to a target chip through an SPI interface, and receiving debugging data returned by the target chip through the SPI interface; The burning unit is used for receiving the solution firmware from the host computer through the USB interface if the working mode is the burning mode, storing the solution firmware in the internal flash memory, receiving the burning start instruction from the burning machine through the burning interface, sending the solution firmware to the target chip through the SPI interface, and sending the burning success message to the burning machine through the burning interface after detecting that the burning of the target chip is successful.

9. A computer storage medium, characterized in that The computer storage medium stores a plurality of instructions, and the instructions are suitable for being loaded by a processor and executing the method steps according to any one of claims 1 to 7.

10. An IC fusion testing device, characterized in that: include: A processor and a memory; wherein the memory stores a computer program, and the computer program is suitable for being loaded by the processor and executing the method steps as claimed in any one of claims 1 to 7.

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