Daisy-chain based SPI system

Abstract

The present invention provides a daisy chain-based SPI system, which includes: a microcontroller; a plurality of slave devices, the microcontroller and the slave devices form a daisy chain structure, the slave devices are arranged in order from near to far from the microcontroller; the DIN data input pin of the last slave device in the arrangement is connected to the MOSI pin of the microcontroller, for receiving a data signal sent by the microcontroller; the DOUT data output pin of each current slave device in the arrangement is connected to the DIN data input pin of the previous slave device, the DIN data input pin of the previous slave device is used to receive a data signal output by the DOUT data output pin of the current slave device; the DOUT data output pin of the first slave device in the arrangement is connected to the MISO pin of the microcontroller, and the microcontroller is used to read the data signal output by the DOUT data output pin of the first slave device. The present invention realizes normal low-power SPI data reading and writing.

Description

Technical Field

[0001] The present invention relates to the technical field of SPI systems, and in particular to a daisy chain-based SPI system. Background Art

[0002] In a typical SPI (Serial Peripheral Interface) system with a host and multiple slave devices, a dedicated chip select signal is usually used to address the slave device. As the number of slave devices increases, the number of chip select lines also increases. This situation will bring great challenges to the circuit board layout, and a daisy chain structure is usually used.

[0003] In the topology of the SPI daisy chain, all slave devices are arranged according to the position of the daisy chain. The slave device closest to the microcontroller is marked as slave device 1, the slave device next closest to the microcontroller is marked as slave device 2, and the slave device farthest from the microcontroller is marked as slave device N. The data output MOSI pin of the microcontroller is connected to the DI pin of slave device 1, and the DO pin of slave device N is connected to the MISO pin of the microcontroller. Therefore, the wiring from the DO pin of slave device N to the MISO pin of the microcontroller is very long. When using a low-power slave device, the driving capability of the DO pin is designed to be relatively weak due to the focus on optimizing the power consumption of the device. After a long distance of wiring, due to the increase in equivalent capacitive load, it is easy to cause the setup time and hold time of the DO pin data to fail to meet the requirements of the chip when the SPI clock rate is high, resulting in the microcontroller being unable to read the data of the slave device normally. Summary of the invention

[0004] The present invention provides an SPI system based on a daisy chain, which is used to solve the defect in the prior art that the DO pin driving capability of a low-power designed slave device is weak, resulting in abnormal data readback of a long daisy chain, and shortens the physical distance between the last slave device and a microcontroller, so that the microcontroller can normally read the data of the slave device.

[0005] The present invention provides a daisy chain-based SPI system, comprising:

[0006] Microcontroller;

[0007] A plurality of slave devices, wherein the microcontroller and the plurality of slave devices form a daisy chain structure, and the plurality of slave devices are arranged in order from near to far from the microcontroller;

[0008] The DIN data input pin of the last slave device in the sequence is connected to the MOSI pin of the microcontroller, and the DIN data input pin of the last slave device is used to receive the data signal output by the MOSI pin of the microcontroller;

[0009] The DOUT data output pin of each current slave device in the sorting is connected to the DIN data input pin of the previous slave device, and the DIN data input pin of the previous slave device is used to receive the data signal output by the DOUT data output pin of the current slave device;

[0010] The DOUT data output pin of the first slave device in the sequence is connected to the MISO pin of the microcontroller, and the microcontroller is used to read the data signal output by the DOUT data output pin of the first slave device.

[0011] According to a daisy chain-based SPI system provided by the present invention, the CS pin of the microcontroller is connected to the CS chip select input pin of each slave device, and the CS chip select input pin of the slave device is used to receive the chip select signal output by the microcontroller;

[0012] During the process of writing the data signal to the slave device, the chip select signal output by the microcontroller is at a low level, and the microcontroller sends the data signal to the DIN data input pin of the last slave device.

[0013] According to a daisy chain-based SPI system provided by the present invention, the SCK clock pin of the microcontroller is connected to each slave device, and the slave device is used to receive the clock signal output by the microcontroller;

[0014] For the current slave device receiving the data signal, the data signal enters the internal shift register of the current slave device at the rising edge of the clock signal, is output through the DOUT data output pin of the current slave device at the falling edge of the clock signal, and is transmitted to the previous slave device through the DIN data input pin of the previous slave device.

[0015] According to a daisy chain-based SPI system provided by the present invention, while a slave device preceding the last slave device receives a data signal sent by the last slave device, the microcontroller simultaneously sends a new data signal to the last slave device.

[0016] According to a daisy chain-based SPI system provided by the present invention, the microcontroller is used to update the mounted quantity of the slave devices according to the sequence number of each slave device and the remaining capacity of the internal shift register.

[0017] According to a daisy chain-based SPI system provided by the present invention, the larger the serial number of the slave device and the smaller the remaining capacity of the internal shift register, the more the slave devices can be mounted.

[0018] According to a daisy chain-based SPI system provided by the present invention, the microcontroller is used to use the reciprocal of the serial number of each slave device as the weight of the remaining capacity of the internal shift register of each slave device, perform weighted summation on the remaining capacity of the internal shift register according to the weight, and update the mounted quantity of the slave device according to the weighted summation result of the remaining capacity.

[0019] According to a daisy chain-based SPI system provided by the present invention, the microcontroller is used to update the mounted quantity of the slave device according to the weighted sum result of the remaining capacity through the following steps:

[0020] Taking the reciprocal of the serial number of each slave device as the weight of the actual capacity of the internal shift register of each slave device, and performing weighted summation on the actual capacity of the internal shift register according to the weight to obtain a weighted summation result of the actual capacity;

[0021] Determining a ratio between a weighted sum of the remaining capacity and a weighted sum of the actual capacity;

[0022] When the ratio is less than a first preset threshold, increasing the number of mounts of the slave device;

[0023] When the ratio is greater than a second preset threshold, the number of mounts of the slave device is reduced.

[0024] According to a daisy chain-based SPI system provided by the present invention, the microcontroller is used to mount the added slave device after one or more slave devices whose product of the weight of the remaining capacity and the remaining capacity is the smallest.

[0025] According to a daisy chain-based SPI system provided by the present invention, the microcontroller is used to unmount one or more slave devices having the largest product of the weight of the remaining capacity and the remaining capacity.

[0026] The SPI system based on daisy chain provided by the present invention, by following a new daisy chain routing scheme, the data of the microcontroller will be first sent to the slave device farthest from the physical position of the microcontroller, the physical distance between the data output pin of the last slave device in the daisy chain and the microcontroller is the shortest, compared with the physical distance between the last slave device in the traditional daisy chain and the microcontroller is greatly shortened, the load capacitance of the PCB routing is reduced, and the setup time and the hold time can still meet the requirements of the low-power slave device under the condition of ensuring that all slave devices meet the highest operating clock frequency. Through innovative circuit layout and wiring, under the condition of weak driving capability caused by the slave device using the low-power design process, it can still ensure that the data reading and writing of multiple slave devices in the daisy chain interconnection topology structure are normal, thereby realizing low-power SPI chip control and improving the application range of the SPI chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0028] Figure 1 It is a structural schematic diagram of the daisy chain-based SPI system provided by the present invention. DETAILED DESCRIPTION

[0029] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0030] It should be understood by those skilled in the art that, in the application documents of the present invention, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device including the element.

[0031] Combine the following Figure 1 A daisy chain-based SPI system of the present invention is described, comprising:

[0032] Microcontroller;

[0033] A plurality of slave devices, wherein the microcontroller and the plurality of slave devices form a daisy chain structure, and the plurality of slave devices are arranged in order from near to far from the microcontroller;

[0034] The DIN data input pin of the last slave device in the sequence is connected to the MOSI pin of the microcontroller, and the DIN data input pin of the last slave device is used to receive the data signal output by the MOSI pin of the microcontroller;

[0035] The DOUT data output pin of each current slave device in the sorting is connected to the DIN data input pin of the previous slave device, and the DIN data input pin of the previous slave device is used to receive the data signal output by the DOUT data output pin of the current slave device;

[0036] The DOUT data output pin of the first slave device in the sequence is connected to the MISO pin of the microcontroller, and the microcontroller is used to read the data signal output by the DOUT data output pin of the first slave device.

[0037] To ensure versatility, the microcontroller's IO (Input and Output) drive capability is designed to be strong, so it can easily pass through long-distance PCB (Printed Circuit Board) routing without causing signal integrity issues.

[0038] DIN (Data Input) is a data input pin, which is used to receive data from other devices, sensors or internal processing units. During data transmission, the DIN data input pin acts as the receiving end, responsible for capturing and processing the input data signal.

[0039] The main function of the DIN pin is to receive data. In serial communication, parallel communication or other data transmission protocols, the DIN pin is responsible for capturing and identifying the input data stream. The DIN pin can also be a signal converter, for example, converting an analog signal into a digital signal, or converting a signal of different level standards into a signal recognizable by the system. The DIN pin may also need to cooperate with a clock signal (such as the CLK pin) to ensure the correct reception and synchronous processing of data.

[0040] The MOSI (Master Output, Slave Input) pin is a signal line used to transmit data from the master to the slave in SPI communication. The master's data is output through this signal line, and the slave reads the data sent by the master through this signal line. SPI communication uses the SCK (Serial Clock) signal line for data synchronization. The MOSI and MISO data lines transmit one bit of data in each clock cycle of SCK, and data input and output are performed simultaneously.

[0041] At the beginning of communication, the SCK clock starts running. MOSI transmits the data in the transmit buffer one bit at a time, while MISO stores the data in the receive buffer one bit at a time. When a frame of data is sent, the corresponding flag bit in the status register will be set, indicating that the transmission is completed.

[0042] DOUT data output pin is Digital Output, which represents a pin or interface that is capable of transmitting digital signals from internal circuits to external circuits.

[0043] The main function of the DOUT pin is to output data. It can send the data processed by the internal processing unit (such as microcontroller, processor, etc.) to the external device in the form of digital signals. These data may include calculation results, sensor readings, control instructions, etc.

[0044] In digital circuits, the DOUT pin is also responsible for controlling the level state of the output signal. It can output a high or low level signal according to internal logic or external instructions to control the state of external devices or perform specific operations.

[0045] In systems that require synchronous transmission, the DOUT pin may also need to cooperate with a clock signal (such as the SCK pin) to ensure correct data output and synchronous processing. The clock signal provides a timing reference for data output on the DOUT pin, allowing data to be transmitted in a predetermined time sequence.

[0046] In order to solve the problem of abnormal data readback in long daisy chain caused by weak driving capability of DOUT pin of low-power slave device, a new daisy chain routing scheme is proposed. Figure 1 shown.

[0047] All slave devices are arranged in a daisy chain. The slave device closest to the microcontroller on the PCB layout is marked as slave device 1, the slave device next to the microcontroller is marked as slave device 2, and the slave device farthest from the microcontroller is marked as slave device N. The data output MOSI pin of the microcontroller is connected to the DIN pin of slave device N, and the DOUT pin of slave device 1 is connected to the MISO pin of the microcontroller.

[0048] Figure 1 21 represents the microcontroller, which is responsible for controlling all slave devices, writing data to all slave devices, and reading data. 213 represents the MISO pin of the microcontroller, which is responsible for reading the data signal of the last slave device in the daisy chain. 214 represents the MOSI pin of the microcontroller, which is responsible for outputting the data signal to the first slave device in the daisy chain.

[0049] 24 represents the slave device that is physically farthest from the microcontroller, named slave device N, which is responsible for receiving the clock, chip select and data signals of the microcontroller and outputting the data signal of the internal shift register.

[0050] 23 represents the slave device that is physically the next closest to the microcontroller, named slave device 2, which is responsible for receiving the clock and chip select signals from the microcontroller, receiving the data output signal from slave device N, and outputting the data signal of the internal shift register.

[0051] 22 represents the slave device that is physically closest to the microcontroller, named slave device one, which is responsible for receiving the clock and chip select signals of the microcontroller, receiving the data output signal of slave device two, and outputting the data signal of the internal shift register.

[0052] 243 represents the DIN data input pin of slave device N, which is responsible for receiving the data signal output by the microcontroller. 244 represents the DOUT data output pin of slave device N, which is responsible for outputting the data signal of the internal shift register of slave device N.

[0053] 233 represents the DIN data input pin of slave device 2, which is responsible for receiving the data signal output from slave device N. 234 represents the DOUT data output pin of slave device 2, which is responsible for outputting the data signal of the internal shift register of slave device 2.

[0054] 223 represents the DIN data input pin of slave device 1, which is responsible for receiving the data signal output from slave device 2. 224 represents the DOUT data output pin of slave device 1, which is responsible for outputting the data signal of the internal shift register of slave device 1.

[0055] In this embodiment, according to the new daisy chain routing scheme, the data of the microcontroller will first be sent to the slave device farthest from the physical position of the microcontroller, and the physical distance between the data output pin of the last slave device in the daisy chain and the microcontroller is the shortest. Compared with the traditional daisy chain, the physical distance between the last slave device and the microcontroller is greatly shortened, and the load capacitance of the PCB routing is reduced. Under the condition that all slave devices meet the highest operating clock frequency, the setup time and the hold time can still meet the requirements of low-power slave devices. Through innovative circuit layout and wiring, even if the driving capability is weak due to the slave device using the low-power design process, the data reading and writing of multiple slave devices in the daisy chain interconnection topology can still be guaranteed to be normal, thereby realizing low-power SPI chip control and improving the application scope of SPI chips.

[0056] On the basis of the above embodiment, the CS pin of the microcontroller in this embodiment is connected to the CS chip select input pin of each slave device, and the CS chip select input pin of the slave device is used to receive the chip select signal output by the microcontroller;

[0057] During the process of writing the data signal to the slave device, the chip select signal output by the microcontroller is at a low level, and the microcontroller sends the data signal to the DIN data input pin of the last slave device.

[0058] The SPI daisy chain topology uses a CS signal to control the CS input of all slave devices. During the data writing process in the daisy chain, the microcontroller keeps the CS signal low and sends data directly to the DIN pin of slave device N.

[0059] Figure 1 The 211 in the figure represents the CS pin of the microcontroller, which is responsible for controlling the chip select signal pins of all slave devices.

[0060] 241 represents the CS chip select input pin of the slave device N, which is responsible for receiving the chip select signal output by the microcontroller.

[0061] 231 represents the CS chip select input pin of slave device 2, which is responsible for receiving the chip select signal output by the microcontroller.

[0062] 221 represents the CS chip select input pin of slave device 1, which is responsible for receiving the chip select signal output by the microcontroller.

[0063] On the basis of the above embodiment, the SCK clock pin of the microcontroller in this embodiment is connected to each slave device, and the slave device is used to receive the clock signal output by the microcontroller;

[0064] For the current slave device receiving the data signal, the data signal enters the internal shift register of the current slave device at the rising edge of the clock signal, is output through the DOUT data output pin of the current slave device at the falling edge of the clock signal, and is transmitted to the previous slave device through the DIN data input pin of the previous slave device.

[0065] The SPI daisy chain topology uses a CLK signal to control the CLK input of all slave devices. Data enters the internal shift register of slave device N at the rising edge of the clock. Data is output through the DOUT pin of slave device N at the falling edge of the clock. The DOUT pin of slave device N is connected to the DNI pin of slave device N-1 and is shifted into the internal shift register of slave device N-2 at the next rising edge of the clock.

[0066] Figure 1 212 represents the SCK clock pin of the microcontroller, which is responsible for controlling the clock pins of all slave devices. 242 represents the SCK clock input pin of slave device N, which is responsible for receiving the clock signal output by the microcontroller. 232 represents the SCK clock input pin of slave device 2, which is responsible for receiving the clock signal output by the microcontroller. 222 represents the SCK clock input pin of slave device 1, which is responsible for receiving the clock signal output by the microcontroller.

[0067] On the basis of the above embodiment, in this embodiment, while the previous slave device of the last slave device receives the data signal sent by the last slave device, the microcontroller simultaneously sends a new data signal to the last slave device.

[0068] When slave N-1 receives data from slave N, the microcontroller can simultaneously send new data to slave N. The new data enters the shift register of slave N, and the data is passed along the entire daisy chain until each slave device receives the corresponding data. The data stored in each slave device shift register is executed on the rising edge of the CS signal.

[0069] At the same time, the DO pin of slave device one in the daisy chain is connected to the MISO pin of the microcontroller. By writing a read command to the daisy chain, the register data of all slave devices can be read back.

[0070] On the basis of the above embodiment, the microcontroller in this embodiment is used to update the mounted quantity of the slave device according to the serial number of each slave device and the remaining capacity of the internal shift register.

[0071] The serial number of the slave device is related to the distance of the slave device from the microcontroller. For example, the serial number of the slave device closest to the microcontroller is one, the serial number of the slave device next closest to the microcontroller is two, and so on. The slave devices are numbered in sequence according to the order from the closest to the microcontroller to the farthest.

[0072] When the remaining capacity of the internal shift register of the slave device is insufficient, the new data signal will overwrite the previous data signal, thereby affecting the integrity of the data, and the number of mounted slave devices needs to be increased.

[0073] The distance between the slave device and the microcontroller and the remaining capacity of the internal shift register of the slave device are related to the number of mounted slave devices. When the transmission distance of the slave device is long, even if the remaining capacity of the internal shift register of the slave device is insufficient, it takes a certain amount of time for the new data signal to be transmitted to the slave device. Before the new data signal is transmitted to the slave device, the data signal in the internal shift register of the slave device may have been read out.

[0074] On the basis of the above embodiment, in this embodiment, the larger the serial number of the slave device is and the smaller the remaining capacity of the internal shift register is, the more the number of mounted slave devices is.

[0075] Since data is transmitted starting from slave device N, the larger the serial number of the slave device, the closer the transmission distance of the slave device, the shorter the time it takes for the data signal to be transmitted to the slave device, the smaller the possibility of the data signal being read out, and the more likely the data signal stored in the internal shift register of the slave device will be overwritten. Therefore, increasing the number of mounted slave devices increases the remaining capacity of the internal shift register of the slave device, reduces the possibility of the data signal being overwritten, and ensures the integrity of the data.

[0076] Based on the above embodiment, the microcontroller in this embodiment is used to use the inverse of the serial number of each slave device as the weight of the remaining capacity of the internal shift register of each slave device, perform weighted summation of the remaining capacity of the internal shift register according to the weight, and update the mounted quantity of the slave device according to the weighted summation result of the remaining capacity.

[0077] The weighted sum of the remaining capacity of the internal shift register is calculated using the following formula:

[0078] )

[0079] Wherein, f is the weighted sum of the remaining capacity, N is the total number of the slave devices, i is the serial number of the slave device, C i is the remaining capacity of the i-th slave device.

[0080] On the basis of the above embodiment, in this embodiment, the number of mounted slave devices is updated according to the weighted summation result. When the weighted summation result is less than a certain value, the number of mounted slave devices can be increased. The increase in the number of mounted slave devices can be a preset value or a calculated value obtained according to the weighted summation result. The smaller the weighted summation result, the greater the increase in the number of mounted slave devices.

[0081] On the basis of the above embodiment, the microcontroller in this embodiment is used to update the mount quantity of the slave device according to the remaining total capacity through the following steps:

[0082] Taking the reciprocal of the serial number of each slave device as the weight of the actual capacity of the internal shift register of each slave device, and performing weighted summation on the actual capacity of the internal shift register according to the weight to obtain a weighted summation result of the actual capacity;

[0083] Determining a ratio between a weighted sum of the remaining capacity and a weighted sum of the actual capacity;

[0084] When the ratio is less than a first preset threshold, increasing the number of mounts of the slave device;

[0085] When the ratio is greater than a second preset threshold, the number of mounts of the slave device is reduced.

[0086] The weighted sum of the actual capacity of the internal shift register is calculated using the following formula:

[0087] )

[0088] Wherein, f1 is the weighted sum of the actual capacity, N is the total number of the slave devices, i is the serial number of the slave device, C i is the remaining capacity of the i-th slave device.

[0089] Determine the ratio between the weighted sum result f of the remaining capacity and the weighted sum result f1 of the actual capacity. When the ratio is less than the first preset threshold, it means that the remaining capacity is too small, and the number of mountings from the device is increased so that the data is not easily overwritten, thereby ensuring the integrity of the data. When the ratio is greater than the second preset threshold, it means that the internal shift register is not fully utilized, and the number of mountings from the device is reduced, thereby improving resource utilization. The second preset threshold is lower than the first preset threshold.

[0090] On the basis of the above embodiment, the microcontroller in this embodiment is used to mount the added slave device after one or more slave devices whose product of the weight of the remaining capacity and the remaining capacity is the smallest.

[0091] For example, five slave devices are arranged in order from near to far from the microcontroller, and the corresponding remaining capacities are 20, 40, 30, 60 and 70 respectively. The products of the weights of the remaining capacities and the remaining capacities are 20, 20, 10, 15 and 14 respectively. The slave device with the smallest product is slave device three, and the product is 10. The additional slave devices can be mounted between slave device three and slave device four, or between slave device four and slave device five, or after slave device five, so that the internal shift register data of slave device three is not easily overwritten, thereby ensuring the integrity of the data.

[0092] Alternatively, if the two slave devices with the smallest product are slave device 3 and slave device 5, the added slave device is mounted after slave device 5, so that the internal shift register data of slave device 3 and device 5 are not easily overwritten, thereby ensuring data integrity.

[0093] On the basis of the above embodiment, the microcontroller in this embodiment is used to unmount one or more slave devices having the largest product of the weight of the remaining capacity and the remaining capacity.

[0094] For example, five slave devices are arranged in descending order from the nearest to the microcontroller, and the corresponding remaining capacities are 40, 60, 60, 80, and 120, respectively. The products of the weights of the remaining capacities and the remaining capacities are 40, 30, 20, 20, and 24, respectively. The slave device with the largest product is slave device 1, and the product is 40. Slave device 1 can be unmounted, so that other slave devices can be fully utilized.

[0095] Alternatively, the two slave devices with the largest product are slave device 1 and slave device 2, and slave device 1 and slave device 2 may be unmounted, so that other slave devices can be fully utilized.

[0096] The SPI system based on daisy chain provided by the present invention, by following a new daisy chain routing scheme, the data of the microcontroller will be first sent to the slave device farthest from the physical position of the microcontroller, the physical distance between the data output pin of the last slave device in the daisy chain and the microcontroller is the shortest, compared with the physical distance between the last slave device in the traditional daisy chain and the microcontroller is greatly shortened, the load capacitance of the PCB routing is reduced, and the setup time and the hold time can still meet the requirements of the low-power slave device under the condition of ensuring that all slave devices meet the highest operating clock frequency. Through innovative circuit layout and wiring, under the condition of weak driving capability caused by the slave device using the low-power design process, it can still ensure that the data reading and writing of multiple slave devices in the daisy chain interconnection topology structure are normal, thereby realizing low-power SPI chip control and improving the application range of the SPI chip.

[0097] The system embodiment described above is merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art may understand and implement it without creative work.

[0098] In the specification of the present invention, a large number of specific details are described. However, it should be understood that embodiments of the present invention can be practiced without these specific details. In some examples, known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this specification. Similarly, it should be understood that in order to simplify the disclosure of the present invention and help understand one or more of the various inventive aspects, in the above description of exemplary embodiments of the present invention, various features of the present invention are sometimes grouped together into a single embodiment, figure or description thereof.

[0099] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A daisy chain-based SPI system, characterized in that: include: Microcontroller; A plurality of slave devices, wherein the microcontroller and the plurality of slave devices form a daisy chain structure, and the plurality of slave devices are arranged in order from near to far from the microcontroller; The DIN data input pin of the last slave device in the sequence is connected to the MOSI pin of the microcontroller, and the DIN data input pin of the last slave device is used to receive the data signal output by the MOSI pin of the microcontroller; The DOUT data output pin of each current slave device in the sorting is connected to the DIN data input pin of the previous slave device, and the DIN data input pin of the previous slave device is used to receive the data signal output by the DOUT data output pin of the current slave device; The DOUT data output pin of the first slave device in the sequence is connected to the MISO pin of the microcontroller, and the microcontroller is used to read the data signal output by the DOUT data output pin of the first slave device; The microcontroller is used to update the mounted quantity of the slave device according to the sequence number of each slave device and the remaining capacity of the internal shift register; The microcontroller is used to use the reciprocal of the serial number of each slave device as the weight of the remaining capacity of the internal shift register of each slave device, perform weighted summation on the remaining capacity of the internal shift register according to the weight, and update the mounted quantity of the slave device according to the weighted summation result of the remaining capacity; The microcontroller is used to update the mount quantity of the slave device according to the remaining capacity through the following steps: Taking the reciprocal of the serial number of each slave device as the weight of the actual capacity of the internal shift register of each slave device, and performing weighted summation on the actual capacity of the internal shift register according to the weight to obtain a weighted summation result of the actual capacity; Determining a ratio between a weighted sum of the remaining capacity and a weighted sum of the actual capacity; When the ratio is less than a first preset threshold, increasing the number of mounts of the slave device; When the ratio is greater than a second preset threshold, reducing the number of mounts of the slave device; The microcontroller is used for mounting the added slave device after one or more slave devices whose product of the weight of the remaining capacity and the remaining capacity is the smallest; The microcontroller is used to unmount one or more slave devices whose product of the weight of the remaining capacity and the remaining capacity is the largest.

2. The daisy chain-based SPI system according to claim 1, characterized in that: The CS pin of the microcontroller is connected to the CS chip select input pin of each slave device, and the CS chip select input pin of the slave device is used to receive the chip select signal output by the microcontroller; During the process of writing the data signal to the slave device, the chip select signal output by the microcontroller is at a low level, and the microcontroller sends the data signal to the DIN data input pin of the last slave device.

3. The daisy chain-based SPI system according to claim 1, characterized in that: The SCK clock pin of the microcontroller is connected to each slave device, and the slave device is used to receive the clock signal output by the microcontroller; For the current slave device receiving the data signal, the data signal enters the internal shift register of the current slave device at the rising edge of the clock signal, is output through the DOUT data output pin of the current slave device at the falling edge of the clock signal, and is transmitted to the previous slave device through the DIN data input pin of the previous slave device.

4. The daisy chain-based SPI system according to claim 1, characterized in that: While a slave device preceding the last slave device receives the data signal sent by the last slave device, the microcontroller simultaneously sends a new data signal to the last slave device.

5. The daisy chain-based SPI system according to claim 1, characterized in that: The larger the serial number of the slave device is and the smaller the remaining capacity of the internal shift register is, the more the slave devices are mounted.

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