A distributed FPGA reconstruction management method and system

Abstract

The invention discloses a distributed FPGA reconstruction management method and system, and relates to the field of computer embedded technology. A connection is established between an external microsystem and an agent FPGA, and configuration data in a memory is remotely read and encrypted, and a RapidIO interface is used for efficient data transmission. Data security and transmission efficiency are ensured, and reconstruction delay is reduced. According to configuration data and external task requirements, the dynamic performance and resource allocation characteristics of each FPGA are analyzed through a dynamic priority scheduling algorithm, the priority reconstruction index is evaluated, the reconstruction order is determined, and resource utilization is optimized. During the FPGA reconstruction process, the operating environment and configuration status data are obtained, and a data fusion algorithm is used for comprehensive analysis to obtain the operating health index of each FPGA, monitor the FPGA health status in real time, and improve system reliability. According to the operating health index, the abnormal state in the reconstruction process is analyzed to help operation and maintenance personnel to promptly discover potential problems in the FPGA reconstruction process, and improve the overall operating efficiency and management level of the FPGA.

Description

Technical Field

[0001] The present invention relates to the field of computer embedded technology, and in particular to a distributed FPGA reconstruction management method and system. Background Art

[0002] With the rapid development of information technology and the continuous pursuit of computing performance, distributed systems, especially in the field of high-performance computing, are becoming more and more widely used. Field Programmable Gate Array (FPGA) has become an important platform for achieving efficient computing with its high flexibility and parallel processing capabilities. In many fields such as artificial intelligence, data processing and network communication, the application demand of FPGA is increasing. In order to better cope with the ever-changing task requirements and improve resource utilization, the dynamic reconstruction technology of FPGA has become one of the research hotspots. However, the existing FPGA reconstruction management methods have certain shortcomings in dynamic performance optimization and real-time monitoring.

[0003] Existing FPGA reconfiguration management methods usually adopt static configuration schemes, which cannot effectively adapt to changes in dynamic task requirements, resulting in inefficient resource utilization. In addition, these methods do not adequately monitor the operating environment and configuration status of the FPGA, making it difficult to make timely adjustments when anomalies occur, which in turn affects the stability and reliability of the system. At the same time, existing methods are not effective in integrating the task requirements of external microsystems with the FPGA resource allocation characteristics, making it difficult to achieve the optimal reconfiguration order, thereby increasing the system's reconfiguration time and computational cost. Summary of the invention

[0004] In view of the deficiencies in the prior art, the present invention provides a distributed FPGA reconstruction management method and system, which solves the problems of the above-mentioned background technology.

[0005] To achieve the above objectives, the present invention is implemented through the following technical solutions: a distributed FPGA reconstruction management method, comprising the following steps: S1. Establishing a connection with an external microsystem through a proxy FPGA, remotely reading and encrypting configuration data in a memory, and transmitting the encrypted configuration data to the FPGA through a RapidIO interface; S2. According to the configuration data and the task requirements of the external microsystem, the dynamic performance characteristics and resource allocation characteristics of each FPGA are analyzed through a dynamic priority scheduling algorithm, the priority reconstruction index of each FPGA is evaluated, and the reconstruction order of each FPGA is determined; S3. During the FPGA reconstruction process, the FPGA operating environment data and configuration status data are obtained through sensors, and a comprehensive analysis is performed through a data fusion algorithm to obtain the operating health index of each FPGA; S4. Based on the operating health index of each FPGA, the abnormal state of the FPGA reconstruction process is analyzed, and an FPGA reconstruction health report is generated.

[0006] Furthermore, according to the configuration data and the task requirements of the external microsystem, the specific process of analyzing the dynamic performance characteristics and resource allocation characteristics of each FPGA through the dynamic priority scheduling algorithm is as follows: the configuration data includes FPGA logic unit configuration information, clock frequency settings, task allocation table, interface communication parameters, and memory mapping information; the task requirements of the external microsystem include computing resource requirements, data transmission bandwidth, task execution delay and power consumption limit; according to the configuration data and the task requirements of the external microsystem, the operating status of the FPGA is analyzed through the dynamic priority scheduling algorithm to obtain the load index of each FPGA; the resource utilization and computing pressure of each FPGA are evaluated to obtain the resource allocation index of each FPGA.

[0007] Furthermore, the specific process of evaluating each FPGA priority reconstruction index and determining the reconstruction order of each FPGA is as follows: comprehensively analyzing each FPGA load index and each FPGA resource allocation index to obtain each FPGA priority reconstruction index; according to each FPGA priority reconstruction index, determining the reconstruction priority of each FPGA in order from high to low.

[0008] Furthermore, the FPGA operating environment data includes: temperature, humidity, voltage, current, power consumption, and heat dissipation status; the configuration status data includes: the number of logic units used, clock frequency, occupancy rate of allocated resources, and percentage of task completion.

[0009] Furthermore, a comprehensive analysis is performed through a data fusion algorithm to obtain the operation health index of each FPGA. The specific process is as follows: analyzing the operation environment data through a data fusion algorithm to obtain the operation environment abnormality index; analyzing the configuration status data to obtain the configuration status abnormality index; and performing comprehensive analysis and processing on the operation environment abnormality index and the configuration status health index to obtain the operation health index of each FPGA.

[0010] Furthermore, the specific process of obtaining the operating environment anomaly index is as follows: based on the FPGA operating environment data, the anomaly threshold of the FPGA operating environment data is set; the FPGA operating environment data and the set anomaly threshold of the FPGA operating environment data are comprehensively calculated through the weighted average method of the data fusion algorithm to obtain the operating environment anomaly index.

[0011] Furthermore, the specific process of obtaining the configuration status abnormality index is as follows: based on the configuration status data, the configuration status data and the set standard data are comprehensively processed to obtain the configuration status abnormality index.

[0012] Furthermore, based on the operation health index of each FPGA, the specific process of analyzing the abnormal state of the FPGA reconstruction process is as follows: based on the operation health index of each FPGA, the operation health index of each FPGA is compared with the set health index threshold. When the operation health index of the FPGA is less than the set health index threshold, it indicates that an abnormal state has occurred in the FPGA reconstruction process.

[0013] A distributed FPGA reconstruction management method and system, comprising the following modules: a secure transmission module, a dynamic priority scheduling module, an operation health monitoring module, and an abnormality analysis module; the secure transmission module is used to establish a connection with an external microsystem through a proxy FPGA, remotely read and encrypt configuration data in a memory, and transmit the encrypted configuration data to the FPGA through a RapidIO interface; the dynamic priority scheduling module is used to analyze the dynamic performance characteristics and resource allocation characteristics of each FPGA through a dynamic priority scheduling algorithm according to the configuration data and the task demand of the external microsystem, evaluate the priority reconstruction index of each FPGA, and determine the reconstruction order of each FPGA; the operation health monitoring module is used to obtain FPGA operation environment data and configuration status data through sensors during the FPGA reconstruction process, and perform comprehensive analysis through a data fusion algorithm to obtain the operation health index of each FPGA; the abnormality analysis module is used to analyze the abnormal state of the FPGA reconstruction process based on the operation health index of each FPGA, and generate an FPGA reconstruction health report.

[0014] The present invention has the following beneficial effects:

[0015] (1) A distributed FPGA reconstruction management method establishes a connection with an external microsystem through a proxy FPGA, remotely reads and encrypts the configuration data in the memory, and transmits the encrypted configuration data to the FPGA through a RapidIO interface, thereby avoiding the risk of unauthorized access or tampering of the configuration data. Through the fast RapidIO interface transmission, the efficiency of data transmission can be improved and the preparation time required for FPGA reconstruction can be shortened. Through the dynamic priority scheduling algorithm, it can adapt to changes in external task requirements in real time and optimize the resource allocation of the FPGA. This flexibility helps to improve the overall computing efficiency of the system, ensure that key tasks are given priority resource support, and effectively reduce the reconstruction time.

[0016] (2) This distributed FPGA reconstruction management system monitors the operating status and environmental conditions of the FPGA in real time during the FPGA reconstruction process by setting up a secure transmission module, a dynamic priority scheduling module, an operation health monitoring module, and an abnormality analysis module, and can identify potential faults and abnormalities in advance. A comprehensive analysis is performed through a data fusion algorithm to obtain the operation health index of each FPGA. The application of the data fusion algorithm enables the information of different data sources to be effectively integrated, providing an accurate operation health index, which helps to maintain the stability and reliability of the FPGA. By analyzing the operation health index, abnormal situations in the reconstruction process can be discovered and handled in a timely manner to ensure the continuous availability of the system. The generated health report provides valuable data support for subsequent maintenance and optimization, helping operation and maintenance personnel to adjust strategies in a timely manner and improve the overall operation efficiency and management level of the FPGA.

[0017] Of course, any product implementing the present invention does not necessarily need to achieve all of the advantages described above at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 This is a flow chart of a distributed FPGA reconstruction management method of the present invention.

[0019] Figure 2 This is a flow chart of a distributed FPGA reconstruction management system of the present invention. DETAILED DESCRIPTION

[0020] The embodiment of the present application provides a distributed FPGA reconstruction management method and system, aiming to improve the flexibility, reliability and resource utilization of the system through efficient and secure configuration data management and dynamic reconstruction to meet the needs of multi-tasking in complex embedded environments.

[0021] The overall idea of ​​the problem in the embodiment of this application is as follows:

[0022] The proxy FPGA establishes a connection with the external microsystem, remotely reads and encrypts the configuration data in the memory, and transmits the encrypted configuration data to the FPGA through the RapidIO interface.

[0023] According to the configuration data and the task requirements of the external microsystem, the dynamic performance characteristics and resource allocation characteristics of each FPGA are analyzed through the dynamic priority scheduling algorithm, the priority reconstruction index of each FPGA is evaluated, and the reconstruction order of each FPGA is determined.

[0024] During the FPGA reconstruction process, the FPGA operating environment data and configuration status data are obtained through sensors, and a comprehensive analysis is performed through the data fusion algorithm to obtain the operating health index of each FPGA.

[0025] Based on the operation health index of each FPGA, the abnormal status of the FPGA reconstruction process is analyzed and an FPGA reconstruction health report is generated.

[0026] See also Figure 1 The embodiment of the present invention provides a technical solution: a distributed FPGA reconstruction management method, comprising the following steps: S1. Establishing a connection with an external microsystem through a proxy FPGA, remotely reading and encrypting configuration data in a memory, and transmitting the encrypted configuration data to the FPGA through a RapidIO interface; S2. According to the configuration data and the task requirements of the external microsystem, analyzing the dynamic performance characteristics and resource allocation characteristics of each FPGA through a dynamic priority scheduling algorithm, evaluating the priority reconstruction index of each FPGA, and determining the reconstruction order of each FPGA; S3. During the FPGA reconstruction process, obtaining FPGA operating environment data and configuration status data through sensors, and performing comprehensive analysis through a data fusion algorithm to obtain the operating health index of each FPGA; S4. Based on the operating health index of each FPGA, analyzing the abnormal state of the FPGA reconstruction process, and generating an FPGA reconstruction health report.

[0027] In this implementation scheme, a proxy FPGA is used to establish a connection with an external microsystem, remotely read and encrypt the configuration data in the memory, and transmit the encrypted configuration data to the FPGA through the RapidIO interface. Ensure that the FPGA can obtain the required configuration data safely and efficiently for subsequent reconstruction operations. According to the configuration data and the task requirements of the external microsystem, the dynamic performance characteristics and resource allocation characteristics of each FPGA are analyzed through a dynamic priority scheduling algorithm, the priority reconstruction index of each FPGA is evaluated, and the reconstruction order of each FPGA is determined. The system will intelligently determine the priority of reconstruction based on real-time requirements and FPGA capabilities, thereby optimizing resource utilization. During the FPGA reconstruction process, the FPGA operating environment data and configuration status data are obtained through sensors, and a comprehensive analysis is performed through a data fusion algorithm to obtain the operating health index of each FPGA. This step ensures that the device operates under optimal conditions by monitoring the operating status of the FPGA in real time, which helps prevent potential failures. Based on the operating health index of each FPGA, the abnormal state during the reconstruction process is analyzed, and an FPGA reconstruction health report is generated. Through the analysis of the health index, the system can identify problems in a timely manner and generate detailed reports to support subsequent maintenance and optimization decisions. FPGA (Field-Programmable Gate Array): A programmable integrated circuit that users can reconfigure at its hardware level to adapt to specific computing tasks and application scenarios. Proxy FPGA: In the present invention, the proxy FPGA is used as an interface to establish a connection with an external microsystem and handle the reading and transmission of data. RapidIO interface: A high-performance serial data transmission protocol suitable for multi-processor systems, with the characteristics of low latency and high bandwidth, and is often used for real-time data exchange. Dynamic priority scheduling algorithm: A calculation method that dynamically adjusts the priority of tasks based on real-time data and resource conditions to optimize system performance. Data fusion algorithm: A technology that integrates and analyzes data from multiple sources to generate more accurate information and decision support. The operating health index of each FPGA: An evaluation indicator obtained through a comprehensive analysis of the FPGA operating environment and configuration status, which is used to reflect the health status of the FPGA. Reconfiguration health report: A detailed document on the FPGA reconstruction process and its health status, including abnormal analysis and maintenance recommendations.

[0028] Specifically, according to the configuration data and the task requirements of the external microsystem, the specific process of analyzing the dynamic performance characteristics and resource allocation characteristics of each FPGA through the dynamic priority scheduling algorithm is as follows: the configuration data includes FPGA logic unit configuration information, clock frequency settings, task allocation table, interface communication parameters, and memory mapping information; the task requirements of the external microsystem include computing resource requirements, data transmission bandwidth, task execution delay, and power consumption limit; according to the configuration data and the task requirements of the external microsystem, the dynamic priority scheduling algorithm is used to analyze the operating status of the FPGA and obtain the load index of each FPGA; the resource utilization and computing pressure of each FPGA are evaluated to obtain the resource allocation index of each FPGA.

[0029] In this implementation scheme, configuration data refers to basic information that affects the performance of the FPGA, including: FPGA logic unit configuration information: describes the allocation and configuration status of the logic units within the FPGA. Clock frequency setting: defines the clock frequency when the FPGA is running, affecting its computing speed. Task allocation table: indicates the allocation of the current task among the FPGAs. Interface communication parameters: describes the parameters of the data transmission interface between the FPGA and the external system, such as bandwidth and delay. Memory mapping information: defines the layout and access method of the FPGA's internal memory. Task requirements of external microsystems The requirements of external microsystems for FPGAs generally include: Computing resource requirements: the computing power required to perform specific tasks. Data transmission bandwidth: the data transmission rate required for the task. Task execution delay: the time limit for task completion. Power consumption limit: the maximum power consumption during task execution. Dynamic priority scheduling algorithm This algorithm analyzes the operating status of the FPGA through the above configuration data and task requirements, and finally obtains the load index and resource allocation index of each FPGA. The calculation formula for the load index of each FPGA is as follows, ; Parameter explanation, FPGA load index, indicating the current load condition of FPGA. :No. The actual computing resources occupied by each task (including the number of logical units and data bandwidth). :No. The weight of a task reflects the importance or priority of the task. The number of tasks currently executed on the FPGA, and the FPGA resource allocation index are calculated as follows, ; ; Parameter explanation, :FPGA resource allocation index, used to evaluate whether the FPGA resource allocation meets the task requirements. : Resource utilization, indicating the efficiency of using FPGA resources. :No. The amount of resources that a task has been assigned, usually in logical units or data bandwidth, :No. The total resource requirement of a task, based on the configuration data of the task. CP: Computational Pressure, represents the task requirements of the external microsystem (including computing resource requirements, task execution delay and power consumption limit).

[0030] Specifically, the specific process of evaluating each FPGA priority reconstruction index and determining the reconstruction order of each FPGA is as follows: comprehensively analyzing each FPGA load index and each FPGA resource allocation index to obtain each FPGA priority reconstruction index; according to each FPGA priority reconstruction index, determining the reconstruction priority of each FPGA in order from high to low.

[0031] In this implementation scheme, the evaluation process of the priority reconstruction index is to comprehensively analyze the load index and resource allocation index formula as follows: ; Parameter explanation: :FPGA priority reconfiguration index, used to evaluate the reconfiguration priority of FPGA. : Load index (see the above calculation formula), reflecting the current load condition of FPGA. : Resource allocation index (see the above calculation formula), used to evaluate whether the FPGA resource allocation meets the task requirements. : The weight coefficient of the load index, indicating the importance of the load index in the calculation of the priority reconstruction index. : The weight coefficient of the resource allocation index, which indicates the importance of the resource allocation index in the calculation of the priority reconstruction index.

[0032] Specifically, the FPGA operating environment data includes: temperature, humidity, voltage, current, power consumption, and heat dissipation status; the configuration status data includes: the number of logic units used, clock frequency, occupancy rate of allocated resources, and percentage of task completion.

[0033] In this implementation scheme, FPGA generates heat when working, and a good heat dissipation status ensures that it operates within a safe temperature range. Monitoring the heat dissipation status can help design an appropriate heat dissipation solution to prevent heat accumulation. Number of logic units used: refers to the number of logic units that have been configured and used in the FPGA, reflecting the current resource utilization of the FPGA. Understanding the number of logic units used helps to evaluate the load capacity of the FPGA. The clock frequency determines the speed at which the FPGA processes tasks. The appropriate clock frequency is critical to meeting task execution requirements. Monitoring the clock frequency helps optimize performance. Allocated resource occupancy rate: refers to the occupancy ratio of allocated resources (such as logic units, memory, etc.) in the FPGA. By monitoring the occupancy rate, the rational use of resources can be evaluated to avoid resource waste. Task completion percentage: indicates the completion progress of the currently executed task, which helps to judge the work efficiency and task execution of the FPGA. Understanding the task completion percentage can adjust the scheduling strategy in time.

[0034] Specifically, the specific process of performing comprehensive analysis through data fusion algorithm to obtain the operation health index of each FPGA is as follows: analyzing the operation environment data through the data fusion algorithm to obtain the operation environment abnormality index; analyzing the configuration status data to obtain the configuration status abnormality index; performing comprehensive analysis and processing on the operation environment abnormality index and the configuration status health index to obtain the operation health index of each FPGA.

[0035] In this implementation scheme, a data fusion algorithm is used to process the operating environment data of the FPGA (such as temperature, humidity, voltage, etc.). The goal of this step is to identify the impact of environmental factors on FPGA performance, thereby generating an operating environment anomaly index (REAI). REAI reflects the health status of the FPGA under the current environmental conditions. A higher anomaly index indicates that environmental factors may cause failures. The configuration status data (such as the number of logic units used, clock frequency, etc.) is analyzed to obtain the configuration state anomaly index (CSAI). CSAI evaluates the rationality of the FPGA configuration and the efficiency of resource utilization, and helps identify the risks of configuration errors or insufficient resources. Comprehensive analysis: The operating environment anomaly index (REAI) and the configuration state anomaly index (CSAI) are comprehensively analyzed to obtain the operational health index (RHI) of each FPGA. RHI is a comprehensive indicator that can comprehensively reflect the health status of the FPGA and guide reconstruction decisions. The calculation formula for the operational health index of the FPGA is ;in, It is the operational health index of FPGA. Indicates the abnormality index of the operating environment. Indicates the configuration status abnormality index. Indicates the weight coefficient of the operating environment abnormality index, Represents the weight coefficient of the configuration status abnormality index and satisfies .

[0036] Specifically, the specific process of obtaining the operating environment anomaly index is as follows: based on the FPGA operating environment data, the anomaly threshold of the FPGA operating environment data is set; the FPGA operating environment data and the set anomaly threshold of the FPGA operating environment data are comprehensively calculated through the weighted average method of the data fusion algorithm to obtain the operating environment anomaly index.

[0037] In this implementation, the process of obtaining the abnormal index of the operating environment is as follows: Setting abnormal thresholds: According to the operating environment data of the FPGA (such as temperature, humidity, voltage, etc.), set the abnormal threshold of each parameter to identify potential risks. Calculating the abnormal index of the operating environment: Using the weighted average method, the operating environment data of the FPGA ( ) and abnormal threshold ( ) for comprehensive calculation. The specific calculation formula is: ;in, is the operating environment abnormality index, For the Items of environmental data; For the Item abnormality threshold; For the The weight corresponding to each environmental data item reflects the importance of each parameter to abnormal judgment; is the total number of environmental parameters.

[0038] Specifically, the specific process of obtaining the configuration status abnormality index is as follows: based on the configuration status data, the configuration status data and the set standard data are comprehensively processed to obtain the configuration status abnormality index.

[0039] In this embodiment, the method can be used to quantify the degree of FPGA environmental anomaly so that preventive measures can be taken in time. The process of obtaining the configuration status anomaly index is as follows: Based on the configuration status data (such as the usage of the logic unit, the clock frequency, etc.), set the corresponding standard data to establish a benchmark. Calculate the configuration status anomaly index: The configuration status data ( Compared with standard data ( ) is used for calculation. The specific calculation formula is: ;in: To configure the status anomaly index, For the Item configuration status data For the Item standard data; is the total number of configuration parameters.

[0040] Specifically, based on the operation health index of each FPGA, the specific process of analyzing the abnormal state of the FPGA reconstruction process is as follows: based on the operation health index of each FPGA, the operation health index of each FPGA is compared with the set health index threshold. When the operation health index of the FPGA is less than the set health index threshold, it indicates that an abnormal state has occurred in the FPGA reconstruction process.

[0041] In this implementation, the system sets a health index threshold to determine whether the FPGA is operating normally. Then, the operation health index of each FPGA is compared with this threshold. When the operation health index of an FPGA is lower than the set threshold, the system will determine that the FPGA is in an abnormal state during the reconstruction process. It can identify and respond to potential FPGA failures in a timely manner to ensure the stability and reliability of the system during the reconstruction process. At the same time, by monitoring the operation health index, resource allocation can be optimized, risks in the reconstruction process can be reduced, and overall system performance can be improved.

[0042] See also Figure 2 A distributed FPGA reconstruction management method and system, including the following modules: a secure transmission module, a dynamic priority scheduling module, an operation health monitoring module, and an abnormality analysis module; the secure transmission module is used to establish a connection with an external microsystem through an agent FPGA, remotely read and encrypt configuration data in a memory, and transmit the encrypted configuration data to the FPGA through a RapidIO interface; the dynamic priority scheduling module is used to analyze the dynamic performance characteristics and resource allocation characteristics of each FPGA through a dynamic priority scheduling algorithm according to the configuration data and the task requirements of the external microsystem, evaluate the priority reconstruction index of each FPGA, and determine the reconstruction order of each FPGA; the operation health monitoring module is used to obtain FPGA operating environment data and configuration status data through sensors during the FPGA reconstruction process, and perform comprehensive analysis through a data fusion algorithm to obtain the operation health index of each FPGA; the abnormality analysis module is used to analyze the abnormal state of the FPGA reconstruction process based on the operation health index of each FPGA, and generate an FPGA reconstruction health report.

[0043] In this implementation scheme, the secure transmission module: establishes a secure connection with the external microsystem through the proxy FPGA, remotely reads and encrypts the configuration data in the memory. The encrypted configuration data is transmitted to the FPGA through the RapidIO interface to ensure the security and integrity of data transmission. The configuration data is protected from malicious tampering to ensure information security during the reconstruction process. The dynamic priority scheduling module: according to the configuration data and the task requirements of the external microsystem, the dynamic performance characteristics and resource allocation characteristics of each FPGA are analyzed using the dynamic priority scheduling algorithm. The priority reconstruction index of each FPGA is evaluated to determine the order of reconstruction.

[0044] Optimize the use of FPGA resources, improve the overall efficiency of the system, and ensure that key tasks are executed first. Operation health monitoring module: During the FPGA reconstruction process, the FPGA's operating environment data and configuration status data are obtained in real time through sensors. Use data fusion algorithms to comprehensively analyze these data to obtain the operation health index of each FPGA. Monitor the operating status of the FPGA in a timely manner to ensure that the system remains healthy during the reconstruction process and prevent failures. Abnormal analysis module: Based on the operation health index of each FPGA, analyze the abnormal status during the FPGA reconstruction process and generate an FPGA reconstruction health report. Quickly identify and handle potential problems in the reconstruction process, provide feasible improvement suggestions, and ensure system reliability.

[0045] In summary, this application has at least the following effects:

[0046] A distributed FPGA reconstruction management method and system establishes a connection with an external microsystem through a proxy FPGA, remotely reads and encrypts the configuration data in the memory, and uses the RapidIO interface for efficient data transmission. Ensure data security and transmission efficiency, and reduce reconstruction delay. According to the configuration data and external task requirements, the dynamic performance and resource allocation characteristics of each FPGA are analyzed through a dynamic priority scheduling algorithm, the priority reconstruction index is evaluated, the reconstruction order is determined, and resource utilization is optimized. During the FPGA reconstruction process, the operating environment and configuration status data are obtained, and the data fusion algorithm is used for comprehensive analysis to obtain the operating health index of each FPGA, monitor the FPGA health status in real time, and improve system reliability. According to the abnormal state of the reconstruction process, the operation and maintenance personnel are helped to promptly discover potential problems in the FPGA reconstruction process, thereby improving the overall operation efficiency and management level of the FPGA.

[0047] It will be appreciated by those skilled in the art that embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0048] The present invention is described with reference to flowcharts and / or block diagrams of systems, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0049] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0050] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0051] Although the preferred embodiments of the present invention have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention.

[0052] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A distributed FPGA reconstruction management method, characterized in that: The following steps are involved: S1. Establish a connection with the external microsystem through the proxy FPGA, remotely read and encrypt the configuration data in the memory, and transmit the encrypted configuration data to the FPGA through the RapidIO interface; S2. According to the configuration data and the task requirements of the external microsystem, the dynamic performance characteristics and resource allocation characteristics of each FPGA are analyzed through the dynamic priority scheduling algorithm, the priority reconstruction index of each FPGA is evaluated, and the reconstruction order of each FPGA is determined; S3. During the FPGA reconstruction process, the FPGA operating environment data and configuration status data are obtained through sensors, and a comprehensive analysis is performed through a data fusion algorithm to obtain the operating health index of each FPGA; S4. Based on the operation health index of each FPGA, analyze the abnormal state of the FPGA reconstruction process and generate an FPGA reconstruction health report; The specific process of analyzing the dynamic performance characteristics and resource allocation characteristics of each FPGA through a dynamic priority scheduling algorithm according to the configuration data and the task requirements of the external microsystem is as follows: The configuration data includes FPGA logic unit configuration information, clock frequency settings, task allocation table, interface communication parameters, and memory mapping information; The task requirements of the external microsystem include computing resource requirements, data transmission bandwidth, task execution delay and power consumption limit; According to the configuration data and the task requirements of the external microsystem, the operating status of the FPGA is analyzed through a dynamic priority scheduling algorithm to obtain the load index of each FPGA; Evaluate the resource utilization and computing pressure of each FPGA and obtain the resource allocation index of each FPGA; The specific process of evaluating the priority reconstruction index of each FPGA and determining the reconstruction order of each FPGA is as follows: Comprehensively analyze each FPGA load index and each FPGA resource allocation index to obtain each FPGA priority reconstruction index; According to the priority reconstruction index of each FPGA, the reconstruction priority of each FPGA is determined in descending order; The specific process of performing comprehensive analysis through the data fusion algorithm to obtain the operation health index of each FPGA is as follows: Analyze the operating environment data through data fusion algorithm to obtain the operating environment abnormality index; Analyze configuration status data and obtain configuration status abnormality index; Comprehensively analyze and process the operating environment abnormality index and configuration status health index to obtain the operating health index of each FPGA; The specific process of obtaining the operating environment abnormality index is as follows: Based on the FPGA operating environment data, set the abnormal threshold of the FPGA operating environment data; The FPGA operating environment data and the abnormal threshold of the set FPGA operating environment data are comprehensively calculated through the weighted average method of the data fusion algorithm to obtain the operating environment abnormality index.

2. The distributed FPGA reconfiguration management method according to claim 1, characterized in that: The FPGA operating environment data includes: temperature, humidity, voltage, current, power consumption, and heat dissipation status; The configuration status data includes: the number of used logic units, clock frequency, occupancy rate of allocated resources, and task completion percentage.

3. The distributed FPGA reconstruction management method according to claim 2, characterized in that: The specific process of obtaining the configuration status abnormality index is as follows: Based on the configuration status data, the configuration status data and the set standard data are comprehensively processed to obtain the configuration status abnormality index.

4. The distributed FPGA reconfiguration management method according to claim 3, characterized in that: Based on the operational health index of each FPGA, the specific process of analyzing the abnormal state of the FPGA reconstruction process is as follows: Based on the operation health index of each FPGA, the operation health index of each FPGA is compared with a set health index threshold. When the operation health index of the FPGA is less than the set health index threshold, it indicates that an abnormal state occurs in the FPGA reconstruction process.

5. A distributed FPGA reconstruction management method and system, applied to a distributed FPGA reconstruction management method according to any one of claims 1 to 4, characterized in that: It includes the following modules: secure transmission module, dynamic priority scheduling module, operation health monitoring module, and abnormal analysis module; The secure transmission module is used to establish a connection with an external microsystem through a proxy FPGA, remotely read and encrypt configuration data in a memory, and transmit the encrypted configuration data to the FPGA through a RapidIO interface; The dynamic priority scheduling module is used to analyze the dynamic performance characteristics and resource allocation characteristics of each FPGA through a dynamic priority scheduling algorithm according to the configuration data and the task requirements of the external microsystem, evaluate the priority reconstruction index of each FPGA, and determine the reconstruction order of each FPGA; The operation health monitoring module is used to obtain the FPGA operation environment data and configuration status data through sensors during the FPGA reconstruction process, and perform comprehensive analysis through a data fusion algorithm to obtain the operation health index of each FPGA; The abnormality analysis module is used to analyze the abnormal state of the FPGA reconstruction process based on the operation health index of each FPGA and generate an FPGA reconstruction health report.

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