Signal processing method and device based on heterogeneous computing platform

Abstract

The invention discloses a signal processing method and device based on a heterogeneous computing platform, and the method comprises the steps: carrying out the function division of a signal processing digital prototype, and obtaining an atomic module set; the atomic module set comprises N atomic modules; processing the atomic module set to obtain an optimized signal processing digital prototype; and performing signal processing by using a master processing device, a slave processing device, an external device and the optimized signal processing digital prototype to obtain a signal processing result. When a complex signal processing digital prototype is decoupled, the high-speed signal processing capability of a processor is utilized to the maximum extent; meanwhile, the construction difficulty of the signal processing digital prototype is remarkably reduced, and the operation speed of the processing digital prototype is remarkably improved. The construction of the signal processing digital prototype under the heterogeneous computing platform is realized, the data interaction technical means of the heterogeneous model is improved, and the construction method and device of the signal processing digital prototype are provided.

Description

Technical Field

[0001] The present invention relates to the field of signal processing technology, and in particular to a signal processing method and device based on a heterogeneous computing platform. Background Art

[0002] During the operation of the large-scale joint simulation platform system, the signal processing digital prototype construction mode will directly affect indicators such as system operation speed, data credibility, platform stability, simulation verification and system scalability.

[0003] At present, the industry usually uses dynamic library loading to build digital prototypes. The advantages are that the prototype construction is convenient and fast, but the disadvantages are that the construction method is single, the model source is fixed, and other platform resources cannot be shared. Based on the heterogeneous computing platform, the signal processing digital prototype construction method is realized. At the same time, the signal processing digital prototype device is developed and constructed, which solves the problem of sharing resources with other platforms, improves the speed of digital prototype construction, ensures the stability of signal digital prototypes, opens the precedent in the signal processing digital prototype industry, and provides new ideas for the development of simulation computing. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide a signal processing method and device based on a heterogeneous computing platform, which is compatible with the latest master processor, slave processor and external equipment, builds a ring data buffer exchanger, adapts to the mainstream parallel system architecture, establishes a data asynchronous interaction mechanism, realizes concurrent asynchronous interaction of radiation signal data, solves the problem of concurrent asynchronous interaction of data between joint simulation models, ensures that the joint simulation data is authentic and reliable, and provides a signal processing digital prototype construction method and implementation means for equipment performance verification, equipment iterative transformation, tactical and combat theory research and equipment confrontation strategy verification.

[0005] In order to solve the above technical problems, a first aspect of an embodiment of the present invention discloses a signal processing method based on a heterogeneous computing platform, the method comprising:

[0006] S1, functionally dividing the signal processing digital prototype to obtain an atomic module set; the atomic module set includes N atomic modules;

[0007] S2, processing the set of atomic modules to obtain an optimized signal processing digital prototype;

[0008] S3, using the main processing device, the slave processing device, the external device and the optimized signal processing digital prototype to perform signal processing to obtain a signal processing result.

[0009] As an optional implementation manner, in the first aspect of the embodiment of the present invention, the processing of the atomic module set to obtain an optimized signal processing digital prototype includes:

[0010] S21, generating an algorithm integration template of any atomic module according to the function of the atomic module, and obtaining algorithm integration templates of N atomic modules;

[0011] The algorithm integration template includes algorithm codes adapted to run on different processing devices;

[0012] S22, obtaining signal processing requirement information;

[0013] S23, acquiring K atomic modules from the atomic module set according to the signal processing requirement information, where K is a positive integer;

[0014] S24, performing dual directed acyclic graph assembly on the K atomic modules to obtain an optimized signal processing digital prototype.

[0015] As an optional implementation manner, in the first aspect of the embodiment of the present invention, the use of the master processing device, the slave processing device, the external device and the optimized signal processing digital prototype to perform signal processing to obtain a signal processing result includes:

[0016] S31, using the main processing device to generate a signal description word; the signal description word includes an inter-pulse carrier frequency component, an inter-pulse amplitude component and a frequency modulation slope;

[0017] S32, using the slave processing device to process the signal description word to obtain a reconstructed signal, and sending the reconstructed signal to the master processing device;

[0018] S33, the main processing device sends the reconstructed signal to the optimized signal processing digital prototype;

[0019] S34, using the optimized signal processing digital prototype to process the reconstructed signal to obtain a signal processing result, and displaying the signal processing result on the external device.

[0020] As an optional implementation manner, in the first aspect of the embodiment of the present invention, the processing the signal description word by a slave processing device to obtain a reconstructed signal includes:

[0021] S321, using a slave processing device to process the signal description word to obtain a synthesized signal;

[0022] S322, using a reconstruction model, processing the synthesized signal to obtain a reconstructed signal;

[0023] The reconstruction model expression is:

[0024] s(t)=p(t)x(t)

[0025] Where s(t) is the reconstructed signal and p(t) is the synthesized signal. rect() represents the rectangular function, δ(t) is the unit impulse signal, T s is the preset sampling period, T p is the time length of each step, and t is the time variable;

[0026] As an optional implementation manner, in the first aspect of the embodiment of the present invention, the using the optimized signal processing digital prototype to process the reconstructed signal to obtain a signal processing result includes:

[0027] S341, segmenting the reconstructed signal to obtain a first reconstructed signal, a second reconstructed signal and a third reconstructed signal;

[0028] S342, performing feature extraction on the first reconstructed signal to obtain first feature information;

[0029] S343, performing feature extraction on the second reconstructed signal to obtain second feature information;

[0030] S344, performing feature extraction on the third reconstructed signal to obtain third feature information;

[0031] S345, fusing the first feature information, the second feature information, and the third feature information to obtain fused feature information;

[0032] S346, using the fused feature information, training a preset signal recognition model to obtain an optimized signal recognition model;

[0033] S347, using the optimized signal recognition model, processing the reconstructed signal to be processed to obtain a signal processing result.

[0034] As an optional implementation manner, in the first aspect of the embodiment of the present invention, the extracting features of the first reconstructed signal to obtain first feature information includes:

[0035] Using a first feature extraction model, processing the first reconstructed signal to obtain first feature information;

[0036] The first feature extraction model expression is:

[0037]

[0038] In the formula, C1(i,j) is the first characteristic information, i=1,2,…,M, j=1,2,…,M, x1(n) is the first reconstructed signal, and M is the length of the first reconstructed signal.

[0039] As an optional implementation manner, in the first aspect of the embodiment of the present invention, the fusing the first feature information, the second feature information, and the third feature information to obtain the fused feature information includes:

[0040] S3451, using an information synthesis model, fusing the first feature information, the second feature information, and the third feature information to obtain comprehensive feature information;

[0041] The information integration model expression is:

[0042]

[0043] Where C(i,j) is the comprehensive feature information, i = 1, 2, ..., M, j = 1, 2, ..., M, C i (i,j) is the i-th feature information;

[0044] S3452, using a spectral decomposition model, processing the comprehensive feature information to obtain fused feature information;

[0045] The spectrum decomposition model expression is:

[0046]

[0047] Where F(u,v) is the fused feature information, u,v are frequency variables, H(i,j) is the preset two-dimensional lag function, and M is the reconstructed signal length.

[0048] A second aspect of an embodiment of the present invention discloses a signal processing device based on a heterogeneous computing platform, the device comprising:

[0049] A function division module is used to divide the functions of the signal processing digital prototype to obtain an atomic module set; the atomic module set includes N atomic modules;

[0050] A signal processing digital prototype building module is used to process the set of atomic modules to obtain an optimized signal processing digital prototype;

[0051] The signal processing module is used to perform signal processing using the main processing device, the slave processing device, the external device and the optimized signal processing digital prototype to obtain a signal processing result.

[0052] As an optional implementation manner, in the second aspect of the embodiment of the present invention, the processing of the set of atomic modules to obtain an optimized signal processing digital prototype includes:

[0053] S21, generating an algorithm integration template of any atomic module according to the function of the atomic module, and obtaining algorithm integration templates of N atomic modules;

[0054] The algorithm integration template includes algorithm codes adapted to run on different processing devices;

[0055] S22, obtaining signal processing requirement information;

[0056] S23, acquiring K atomic modules from the atomic module set according to the signal processing requirement information, where K is a positive integer;

[0057] S24, performing dual directed acyclic graph assembly on the K atomic modules to obtain an optimized signal processing digital prototype.

[0058] As an optional implementation manner, in the second aspect of the embodiment of the present invention, the use of the main processing device, the slave processing device, the external device and the optimized signal processing digital prototype to perform signal processing to obtain a signal processing result includes:

[0059] S31, using the main processing device to generate a signal description word; the signal description word includes an inter-pulse carrier frequency component, an inter-pulse amplitude component and a frequency modulation slope;

[0060] S32, using the slave processing device to process the signal description word to obtain a reconstructed signal, and sending the reconstructed signal to the master processing device;

[0061] S33, the main processing device sends the reconstructed signal to the optimized signal processing digital prototype;

[0062] S34, using the optimized signal processing digital prototype to process the reconstructed signal to obtain a signal processing result, and displaying the signal processing result on the external device.

[0063] As an optional implementation manner, in the second aspect of the embodiment of the present invention, the using of a slave processing device to process the signal description word to obtain a reconstructed signal includes:

[0064] S321, using a slave processing device to process the signal description word to obtain a synthesized signal;

[0065] S322, using a reconstruction model, processing the synthesized signal to obtain a reconstructed signal;

[0066] The reconstruction model expression is:

[0067] s(t)=p(t)x(t)

[0068] Where s(t) is the reconstructed signal and p(t) is the synthesized signal. rect() represents the rectangular function, δ(t) is the unit impulse signal, T s is the preset sampling period, Tp is the time length of each step, and t is the time variable;

[0069] As an optional implementation manner, in the second aspect of the embodiment of the present invention, the using the optimized signal processing digital prototype to process the reconstructed signal to obtain a signal processing result includes:

[0070] S341, segmenting the reconstructed signal to obtain a first reconstructed signal, a second reconstructed signal and a third reconstructed signal;

[0071] S342, performing feature extraction on the first reconstructed signal to obtain first feature information;

[0072] S343, performing feature extraction on the second reconstructed signal to obtain second feature information;

[0073] S344, performing feature extraction on the third reconstructed signal to obtain third feature information;

[0074] S345, fusing the first feature information, the second feature information, and the third feature information to obtain fused feature information;

[0075] S346, using the fused feature information, training a preset signal recognition model to obtain an optimized signal recognition model;

[0076] S347, using the optimized signal recognition model, processing the reconstructed signal to be processed to obtain a signal processing result.

[0077] As an optional implementation manner, in the second aspect of the embodiment of the present invention, the extracting features of the first reconstructed signal to obtain first feature information includes:

[0078] Using a first feature extraction model, processing the first reconstructed signal to obtain first feature information;

[0079] The first feature extraction model expression is:

[0080]

[0081] In the formula, C1(i,j) is the first characteristic information, i=1,2,…,M, j=1,2,…,M, x1(n) is the first reconstructed signal, and M is the length of the first reconstructed signal.

[0082] As an optional implementation manner, in the second aspect of the embodiment of the present invention, the fusing the first feature information, the second feature information and the third feature information to obtain the fused feature information includes:

[0083] S3451, using an information synthesis model, fusing the first feature information, the second feature information, and the third feature information to obtain comprehensive feature information;

[0084] The information integration model expression is:

[0085]

[0086] Where C(i,j) is the comprehensive feature information, i = 1, 2, ..., M, j = 1, 2, ..., M, C i (i,j) is the i-th feature information;

[0087] S3452, using a spectral decomposition model, processing the comprehensive feature information to obtain fused feature information;

[0088] The spectrum decomposition model expression is:

[0089]

[0090] Where F(u,v) is the fused feature information, u,v are frequency variables, H(i,j) is the preset two-dimensional lag function, and M is the reconstructed signal length.

[0091] The third aspect of the present invention discloses another signal processing device based on a heterogeneous computing platform, the device comprising:

[0092] A memory storing executable program code;

[0093] a processor coupled to the memory;

[0094] The processor calls the executable program code stored in the memory to execute part or all of the steps in the signal processing method based on a heterogeneous computing platform disclosed in the first aspect of the embodiment of the present invention.

[0095] The fourth aspect of the present invention discloses a computer-storable medium, which stores computer instructions. When the computer instructions are called, they are used to execute part or all of the steps in the signal processing method based on a heterogeneous computing platform disclosed in the first aspect of an embodiment of the present invention.

[0096] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0097] The method of the present invention maximizes the use of the high-speed signal processing capability of the processor when decoupling the complex signal processing digital prototype; at the same time, while significantly reducing the difficulty of building the signal processing digital prototype, the running speed of the processing digital prototype is significantly improved. The main processor, slave processor and external equipment cover the current mainstream technical equipment, and the data ring buffer memory is used to ensure the data exchange between the simulation signal data prototypes. The construction of the signal processing digital prototype under the heterogeneous computing platform is realized, the heterogeneous model data interaction technical means are improved, and a signal processing digital prototype construction method and device are provided. The signal processing is realized by using the signal processing digital prototype, which is flexible and convenient. BRIEF DESCRIPTION OF THE DRAWINGS

[0098] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0099] Figure 1 It is a flowchart of a signal processing method based on a heterogeneous computing platform disclosed in an embodiment of the present invention;

[0100] Figure 2 It is a flowchart of another signal processing method based on a heterogeneous computing platform disclosed in an embodiment of the present invention;

[0101] Figure 3 It is a flow chart of the operation of building a digital prototype for signal processing based on a heterogeneous computing platform disclosed in an embodiment of the present invention;

[0102] Figure 4 It is a structural schematic diagram of a signal processing device based on a heterogeneous computing platform disclosed in an embodiment of the present invention;

[0103] Figure 5 It is a structural schematic diagram of another signal processing device based on a heterogeneous computing platform disclosed in an embodiment of the present invention. DETAILED DESCRIPTION

[0104] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0105] The terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, device, product or equipment that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units that are not listed, or may optionally include other steps or units that are inherent to these processes, methods, products or equipment.

[0106] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present invention. The appearance of the phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0107] The present invention discloses a signal processing method and device based on a heterogeneous computing platform, the method comprising: functionally dividing a signal processing digital prototype to obtain an atomic module set; the atomic module set comprises N atomic modules; processing the atomic module set to obtain an optimized signal processing digital prototype; using a master processing device, a slave processing device, an external device and the optimized signal processing digital prototype to perform signal processing to obtain a signal processing result. The present invention maximizes the use of the high-speed signal processing capability of the processor when decoupling a complex signal processing digital prototype; at the same time, while significantly reducing the difficulty of building a signal processing digital prototype, the running speed of the processing digital prototype is significantly improved. The construction of a signal processing digital prototype under a heterogeneous computing platform is realized, the heterogeneous model data interaction technical means is improved, and a signal processing digital prototype construction method and device are provided. The following are detailed descriptions respectively.

[0108] Embodiment 1

[0109] See also Figure 1 , Figure 1 : is a flow chart of a signal processing method based on a heterogeneous computing platform disclosed in an embodiment of the present invention. Figure 1 The described signal processing method based on heterogeneous computing platform is applied to the field of signal processing technology, significantly reducing the difficulty of building a signal processing digital prototype and significantly improving the running speed of the processing digital prototype, which is not limited in the embodiments of the present invention. Figure 1 As shown, the signal processing method based on the heterogeneous computing platform may include the following operations:

[0110] S1, functionally dividing the signal processing digital prototype to obtain an atomic module set; the atomic module set includes N atomic modules;

[0111] S2, processing the set of atomic modules to obtain an optimized signal processing digital prototype;

[0112] S3, using the main processing device, the slave processing device, the external device and the optimized signal processing digital prototype to perform signal processing to obtain a signal processing result.

[0113] The atomic module is a functional module obtained by functionally dividing the signal processing digital prototype;

[0114] Optionally, the processing of the atomic module set to obtain an optimized signal processing digital prototype includes:

[0115] S21, generating an algorithm integration template of any atomic module according to the function of the atomic module, and obtaining algorithm integration templates of N atomic modules;

[0116] The algorithm integration template includes algorithm codes adapted to run on different processing devices;

[0117] S22, obtaining signal processing requirement information;

[0118] S23, acquiring K atomic modules from the atomic module set according to the signal processing requirement information, where K is a positive integer;

[0119] S24, performing dual directed acyclic graph assembly on the K atomic modules to obtain an optimized signal processing digital prototype.

[0120] The structure of the dual directed acyclic graph in this embodiment is as follows Figure 2 shown.

[0121] Optionally, the using the master processing device, the slave processing device, the external device and the optimized signal processing digital prototype to perform signal processing to obtain a signal processing result includes:

[0122] S31, using the main processing device to generate a signal description word; the signal description word includes an inter-pulse carrier frequency component, an inter-pulse amplitude component and a frequency modulation slope;

[0123] S32, using the slave processing device to process the signal description word to obtain a reconstructed signal, and sending the reconstructed signal to the master processing device;

[0124] S33, the main processing device sends the reconstructed signal to the optimized signal processing digital prototype;

[0125] S34, using the optimized signal processing digital prototype to process the reconstructed signal to obtain a signal processing result, and displaying the signal processing result on the external device.

[0126] Optionally, the processing the signal description word by a slave processing device to obtain a reconstructed signal includes:

[0127] S321, using a slave processing device to process the signal description word to obtain a synthesized signal;

[0128] Optionally, the composite signal is:

[0129]

[0130] Where p(t) is the synthetic signal, f i is the pulse-to-pulse carrier frequency component of the radiation signal description word within the i-th step, A i is the pulse-to-pulse amplitude component of the radiation signal description word within the i-th step, r i The frequency modulation slope of the radiation signal description word within the i-th step, t represents time;

[0131] S322, using a reconstruction model, processing the synthesized signal to obtain a reconstructed signal;

[0132] The reconstruction model expression is:

[0133] s(t)=p(t)x(t)

[0134] Where s(t) is the reconstructed signal and p(t) is the synthesized signal. rect() represents the rectangular function, δ(t) is the unit impulse signal, T s is the preset sampling period, T p is the time length of each step, and t is the time variable;

[0135] Optionally, the using the optimized signal processing digital prototype to process the reconstructed signal to obtain a signal processing result includes:

[0136] S341, segmenting the reconstructed signal to obtain a first reconstructed signal, a second reconstructed signal and a third reconstructed signal;

[0137] The reconstructed signal is divided into a first reconstructed signal, a second reconstructed signal and a third reconstructed signal. The length of each reconstructed signal is equal to M. If the length cannot be divided by 3, it can be achieved by padding with zeros.

[0138] S342, performing feature extraction on the first reconstructed signal to obtain first feature information;

[0139] S343, performing feature extraction on the second reconstructed signal to obtain second feature information;

[0140] S344, performing feature extraction on the third reconstructed signal to obtain third feature information;

[0141] S345, fusing the first feature information, the second feature information, and the third feature information to obtain fused feature information;

[0142] S346, using the fused feature information, training a preset signal recognition model to obtain an optimized signal recognition model;

[0143] S347, using the optimized signal recognition model, processing the reconstructed signal to be processed to obtain a signal processing result.

[0144] Optionally, the extracting features from the first reconstructed signal to obtain first feature information includes:

[0145] Using a first feature extraction model, processing the first reconstructed signal to obtain first feature information;

[0146] The first feature extraction model expression is:

[0147]

[0148] In the formula, C1(i,j) is the first characteristic information, i=1,2,…,M, j=1,2,…,M, x1(n) is the first reconstructed signal, and M is the length of the first reconstructed signal.

[0149] The second feature extraction model expression is:

[0150]

[0151] In the formula, C2(i,j) is the second characteristic information, i=1,2,…,M, j=1,2,…,M, x2(n) is the second reconstructed signal, and M is the length of the second reconstructed signal.

[0152] The third feature extraction model expression is:

[0153]

[0154] In the formula, C3(i,j) is the third characteristic information, i=1,2,…,M, j=1,2,…,M, x3(n) is the third reconstructed signal, and M is the length of the third reconstructed signal.

[0155] Optionally, the fusing the first feature information, the second feature information, and the third feature information to obtain fused feature information includes:

[0156] S3451, using an information synthesis model, fusing the first feature information, the second feature information, and the third feature information to obtain comprehensive feature information;

[0157] The information integration model expression is:

[0158]

[0159] Where C(i,j) is the comprehensive feature information, i = 1, 2, ..., M, j = 1, 2, ..., M, C k (i,j) is the kth feature information, k = 1, 2, 3;

[0160] S3452, using a spectral decomposition model, processing the comprehensive feature information to obtain fused feature information;

[0161] The spectrum decomposition model expression is:

[0162]

[0163] Where F(u,v) is the fused feature information, u,v are frequency variables, H(i,j) is the preset two-dimensional lag function, and M is the reconstructed signal length.

[0164] Optionally, the method of fusing the first feature information, the second feature information and the third feature information to obtain the fused feature information is:

[0165] Fusing the first feature information and the second feature information to obtain fourth feature information;

[0166] fusing the fourth feature information and the third feature information to obtain fused feature information;

[0167] The two fusions use the same method, specifically (taking the fusion of the first feature information and the second feature information as an example):

[0168] Processing the first feature information to obtain a first covariance matrix;

[0169] The first feature information is X, and the first covariance matrix is ​​S XX ;

[0170] S XX =cov(X,X)

[0171] cov means covariance calculation;

[0172] Processing the second feature information to obtain a second covariance matrix;

[0173] The second feature information is Y, and the second covariance matrix is ​​S YY ;

[0174] S YY =cov(Y,Y)

[0175] Processing the first characteristic information and the second characteristic information to obtain a first cross-covariance matrix and a second cross-covariance matrix;

[0176] The first cross-covariance matrix is ​​S XY ;

[0177] S XY =cov(X,Y)

[0178] The second cross-covariance matrix is ​​S YX ;

[0179] S YX =cov(Y,X)

[0180] S XY =S YX T ;

[0181] T stands for transpose;

[0182] Processing the first covariance matrix, the second covariance matrix, the first cross-covariance matrix, and the second cross-covariance matrix to obtain a feature fusion matrix;

[0183]

[0184] M1 is the feature fusion matrix;

[0185] Processing the feature fusion matrix to obtain a first singular vector and a second singular vector;

[0186] Solve the singular values ​​of M1, and obtain the largest singular value and its preceding and following singular vectors as the first singular vector u1 and the second singular vector v1;

[0187] Processing the first singular vector and the second singular vector to obtain a first projection vector and a second projection vector;

[0188]

[0189] Wherein, a is the first projection vector, b is the second projection vector;

[0190] The first projection vector and the second projection vector are processed to obtain fourth feature information.

[0191]

[0192] Among them, Z is the fourth characteristic information.

[0193] It can be seen that the method of the present invention maximizes the use of the high-speed signal processing capability of the processor when decoupling the complex signal processing digital prototype; at the same time, while significantly reducing the difficulty of building the signal processing digital prototype, it significantly improves the running speed of the processing digital prototype. The main processor, slave processor and external equipment cover the current mainstream technical equipment, and the data ring buffer memory is used to ensure the data exchange between the simulation signal data prototypes. The construction of the signal processing digital prototype under the heterogeneous computing platform is realized, the heterogeneous model data interaction technical means are improved, and a signal processing digital prototype construction method and device are provided. The signal processing is realized by using the signal processing digital prototype, which is flexible and convenient.

[0194] Embodiment 2

[0195] See also Figure 2 , Figure 2 is a flow chart of another signal processing method based on a heterogeneous computing platform disclosed in an embodiment of the present invention. Figure 2 The described signal processing method based on heterogeneous computing platform is applied to the field of signal processing technology, significantly reducing the difficulty of building a signal processing digital prototype and significantly improving the running speed of the processing digital prototype, which is not limited in the embodiments of the present invention. Figure 2 As shown, the signal processing method based on the heterogeneous computing platform may include the following operations:

[0196] The slave processing device + master processing device is used to realize the construction of signal digital prototype. The main principle is: use the ring buffer memory to realize the lock-free concurrent asynchronous data replication of the slave processing device, the master processing device and the external device, and build, store and call the signal processing digital prototype through the external device and the master-slave processing device to realize the data prototype construction of the heterogeneous computing platform, such as Figure 2 shown.

[0197] Main processing equipment

[0198] The main processing devices cover the current mainstream processing devices, including X86 / AMD64 architecture processing devices, ARM architecture processing devices, LongArch architecture processing devices, RISC-V architecture processing devices, and artificial (AI) intelligent processing devices.

[0199] From the processing equipment

[0200] From the processing devices, it covers the current mainstream processing devices, including: graphics processing unit (GPU) devices, general-purpose computing graphics processing unit (GPGPU) devices, neural network processor (NPU) devices, digital signal processor (DSP) devices, field programmable array (FPGA) devices, and co-processing unit (PPU).

[0201] External devices

[0202] External devices include mechanical hard disks (HD) and arrays or devices composed of them, solid-state drives (SD) and arrays or devices composed of them, Ethernet cards or devices, Infiniband (IB) network cards or devices, sampled signal playback and / or digital-to-analog conversion (DAC) cards or devices, fiber optic reflection memory cards or devices, general purpose interface bus (GPIB) cards or devices, and data acquisition and recording equipment.

[0203] Multi-dimensional computing platform integration.

[0204] This simulation platform is not limited to this platform framework, but also realizes the integration capabilities of OpenMP, MPI, thread pool, and other parallel frameworks.

[0205] Simulation Application Integration Interface

[0206] The simulation platform is not limited to executable programs of the platform, but can also integrate computer programming language codes, codes developed based on the processing device programming interface (API), dynamic / static link libraries, scripts or other forms of description.

[0207] Method for constructing digital prototype of signal processing based on heterogeneous computing platform

[0208] Divide the atomic modules of the signal processing digital prototype; generate an algorithm integration template for the atomic modules, and integrate the signal processing algorithm code of the atomic modules to adapt to the environment running on different processing devices; script or graphically assemble multiple atomic modules into a dual directed acyclic graph of execution flow / data flow to form a signal processing digital prototype; schedule the execution of the atomic modules of the signal processing digital prototype according to the dual directed acyclic graph; record the simulation results in a concurrent asynchronous manner, display the waveform and spectrum; and output the signal processing results to an external device.

[0209] Covering signal processing digital prototype types

[0210] Radar signal processing digital prototypes, electronic reconnaissance signal processing digital prototypes, communication signal processing digital prototypes, infrared / photoelectric image signal processing digital prototypes, and other signal processing digital prototypes.

[0211] The operation process of building a signal processing digital prototype based on a heterogeneous computing platform is as follows: Figure 3 As shown:

[0212] (1) Divide the atomic modules of the signal processing digital prototype;

[0213] (2) generating an algorithm integration template of the atomic module and integrating the signal processing algorithm code of the atomic module to adapt to the environment running on different processing devices;

[0214] (3) Scripting or graphically assembling multiple atomic modules to assemble a dual directed acyclic graph of execution flow / data flow to form a signal processing digital prototype;

[0215] (4) scheduling and executing atomic modules of the signal processing digital prototype according to the dual directed acyclic graph;

[0216] (5) Record simulation results in a concurrent asynchronous manner and display waveforms and spectra;

[0217] (6) Output signal processing results to external devices.

[0218] Embodiment 3

[0219] See also Figure 4 , Figure 4 1 is a schematic diagram of the structure flow of a signal processing device based on a heterogeneous computing platform disclosed in an embodiment of the present invention. Figure 4 The described signal processing device based on a heterogeneous computing platform is applied to the field of signal processing technology, significantly reducing the difficulty of building a signal processing digital prototype and significantly improving the running speed of the processing digital prototype, which is not limited in the embodiments of the present invention. Figure 4 As shown, the signal processing device based on the heterogeneous computing platform may include the following operations:

[0220] S301, a function division module, used to perform function division on the signal processing digital prototype to obtain an atomic module set; the atomic module set includes N atomic modules;

[0221] S302, a signal processing digital prototype building module is used to process the atomic module set to obtain an optimized signal processing digital prototype;

[0222] S303, a signal processing module is used to perform signal processing using the main processing device, the slave processing device, the external device and the optimized signal processing digital prototype to obtain a signal processing result.

[0223] Embodiment 4

[0224] See also Figure 5 , Figure 5 1 is a schematic diagram of the structure flow of another signal processing device based on a heterogeneous computing platform disclosed in an embodiment of the present invention. Figure 5 The described signal processing device based on a heterogeneous computing platform is applied to the field of signal processing technology, significantly reducing the difficulty of building a signal processing digital prototype and significantly improving the running speed of the processing digital prototype, which is not limited in the embodiments of the present invention. Figure 5 As shown, the signal processing device based on the heterogeneous computing platform may include the following operations:

[0225] A memory 401 storing executable program codes;

[0226] a processor 402 coupled to the memory 401;

[0227] The processor 402 calls the executable program code stored in the memory 401 to execute the steps in the signal processing method based on the heterogeneous computing platform described in the first and second embodiments.

[0228] Embodiment 5

[0229] An embodiment of the present invention discloses a computer-readable storage medium storing a computer program for electronic data exchange, wherein the computer program enables a computer to execute the steps of the signal processing method based on a heterogeneous computing platform described in Embodiment 1 and Embodiment 2.

[0230] The device embodiments described above are only illustrative, wherein the modules described as separate components may or may not be physically separated, and the components displayed as modules may or may not be physical modules, i.e., they may be located in one place, or they may be distributed on multiple network modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Those of ordinary skill in the art may understand and implement it without creative work.

[0231] Through the specific description of the above embodiments, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course, it can also be implemented by hardware. Based on such an understanding, the above technical solution can be essentially or partly contributed to the prior art in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, and the storage medium includes a read-only memory (ROM), a random access memory (RAM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), a one-time programmable read-only memory (OTPROM), an electronically erasable rewritable read-only memory (EEPROM), a compact disc (CD-ROM) or other optical disc storage, magnetic disk storage, magnetic tape storage, or any other computer-readable medium that can be used to carry or store data.

[0232] Finally, it should be noted that the signal processing method and device based on a heterogeneous computing platform disclosed in the embodiments of the present invention are only preferred embodiments of the present invention, which are only used to illustrate the technical solution of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, it should be understood by those skilled in the art that the technical solutions described in the aforementioned embodiments can still be modified, or some of the technical features therein can be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A signal processing method based on a heterogeneous computing platform, characterized in that: The method comprises: S1, functionally dividing the signal processing digital prototype to obtain an atomic module set; the atomic module set includes N atomic modules, where N is a positive integer; S2, processing the set of atomic modules to obtain an optimized signal processing digital prototype; S3, using the main processing device, the slave processing device, the external device and the optimized signal processing digital prototype to perform signal processing to obtain a signal processing result.

2. The signal processing method based on a heterogeneous computing platform according to claim 1, characterized in that: The step of processing the set of atomic modules to obtain an optimized signal processing digital prototype includes: S21, generating an algorithm integration template of any atomic module according to the function of the atomic module, and obtaining algorithm integration templates of N atomic modules; The algorithm integration template includes algorithm codes adapted to run on different processing devices; S22, obtaining signal processing requirement information; S23, acquiring K atomic modules from the atomic module set according to the signal processing requirement information, where K is a positive integer; S24, performing dual directed acyclic graph assembly on the K atomic modules to obtain an optimized signal processing digital prototype.

3. The signal processing method based on a heterogeneous computing platform according to claim 1, characterized in that: The method of using the master processing device, the slave processing device, the external device and the optimized signal processing digital prototype to perform signal processing to obtain a signal processing result includes: S31, using the main processing device to generate a signal description word; the signal description word includes an inter-pulse carrier frequency component, an inter-pulse amplitude component and a frequency modulation slope; S32, using the slave processing device to process the signal description word to obtain a reconstructed signal, and sending the reconstructed signal to the master processing device; S33, the main processing device sends the reconstructed signal to the optimized signal processing digital prototype; S34, using the optimized signal processing digital prototype to process the reconstructed signal to obtain a signal processing result, and displaying the signal processing result on the external device.

4. The signal processing method based on a heterogeneous computing platform according to claim 3, characterized in that: The step of processing the signal description word by a slave processing device to obtain a reconstructed signal includes: S321, using a slave processing device to process the signal description word to obtain a synthesized signal; S322, using a reconstruction model, processing the synthesized signal to obtain a reconstructed signal; The reconstruction model expression is: s(t)=p(t)x(t) Where s(t) is the reconstructed signal and p(t) is the synthesized signal. rect() represents the rectangular function, δ(t) is the unit impulse signal, T s is the preset sampling period, T p is the time length of each step, and t is the time variable.

5. The signal processing method based on a heterogeneous computing platform according to claim 1, characterized in that: The step of processing the reconstructed signal using the optimized signal processing digital prototype to obtain a signal processing result includes: S341, segmenting the reconstructed signal to obtain a first reconstructed signal, a second reconstructed signal and a third reconstructed signal; S342, performing feature extraction on the first reconstructed signal to obtain first feature information; S343, performing feature extraction on the second reconstructed signal to obtain second feature information; S344, performing feature extraction on the third reconstructed signal to obtain third feature information; S345, fusing the first feature information, the second feature information, and the third feature information to obtain fused feature information; S346, using the fused feature information, training a preset signal recognition model to obtain an optimized signal recognition model; S347, using the optimized signal recognition model, processing the reconstructed signal to be processed to obtain a signal processing result.

6. The signal processing method based on a heterogeneous computing platform according to claim 5, characterized in that: The extracting features of the first reconstructed signal to obtain first feature information includes: Using a first feature extraction model, processing the first reconstructed signal to obtain first feature information; The first feature extraction model expression is: In the formula, C1(i,j) is the first characteristic information, i=1,2,…,M, j=1,2,…,M, x1(n) is the first reconstructed signal, and M is the length of the first reconstructed signal.

7. The signal processing method based on a heterogeneous computing platform according to claim 5, characterized in that: The fusing the first feature information, the second feature information and the third feature information to obtain fused feature information includes: S3451, using an information synthesis model, fusing the first feature information, the second feature information, and the third feature information to obtain comprehensive feature information; The information integration model expression is: Where C(i,j) is the comprehensive feature information, i = 1, 2, ..., M, j = 1, 2, ..., M, C i (i,j) is the i-th feature information; S3452, using a spectral decomposition model, processing the comprehensive feature information to obtain fused feature information; The spectrum decomposition model expression is: Where F(u,v) is the fused feature information, u,v are frequency variables, H(i,j) is the preset two-dimensional lag function, and M is the reconstructed signal length.

8. A signal processing device based on a heterogeneous computing platform, characterized in that: The device comprises: A function division module is used to divide the functions of the signal processing digital prototype to obtain an atomic module set; the atomic module set includes N atomic modules; A signal processing digital prototype building module is used to process the set of atomic modules to obtain an optimized signal processing digital prototype; The signal processing module is used to perform signal processing using the main processing device, the slave processing device, the external device and the optimized signal processing digital prototype to obtain a signal processing result.

9. A signal processing device based on a heterogeneous computing platform, characterized in that: The device comprises: A memory storing executable program code; a processor coupled to the memory; The processor calls the executable program code stored in the memory to execute the signal processing method based on a heterogeneous computing platform as described in any one of claims 1 to 7.

10. A computer storable medium, characterized in that: The computer storable medium stores computer instructions, and when the computer instructions are called, they are used to execute the signal processing method based on a heterogeneous computing platform as described in any one of claims 1 to 7.

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