A chip testing system

By designing a chip test system, the inner conductor and outer buffer body structures ensure stable contact between the pin contact column and the pin contacts, and the cross-connection is achieved through the joint control driver, the existing pin chips are solved during the test process, and the poor contact problems caused by easy damage and cracking of the packaging layer are achieved, achieving the reliability of chip wiring and signal connection effect.

CN119170590BActive Publication Date: 2025-04-25EESON TECH CO LTD
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Patent Information

Application Number
CN202411668548.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-11-21
Publication Date
2025-04-25
Estimated Expiration
2044-11-21

AI Technical Summary

Technical Problem

Existing pin chips require multiple tests before use, resulting in easy damage and failure of the pins, and when the packaging layer cracks in extreme environments, it is prone to poor pin contact.

Method used

A chip testing system is designed, including a chip body and a test seat. The chip body is combined with a chip package, a pin wire body and a chip core body. The pin wire body adopts an inner conductor and an outer buffer body structure to ensure stable contact between the pin contact column and the pin contacts, and to achieve transverse connection through the joint control drive member to reduce wear.

Benefits of technology

It effectively avoids pin wear, ensures the wiring reliability and signal switching effect of the chip, and also ensures the normal use of the chip in extreme environments.

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Abstract

The present invention discloses a chip testing system, which belongs to the field of chip technology, and includes a chip body, wherein the chip body includes a chip package, a pin wire body and a chip core body, wherein the chip core body includes a chip module, wherein pin contact posts are evenly arranged at the bottom of the chip module, wherein the pin wire body includes an inner conductor and an outer buffer body, and wherein the chip package includes a package base, a package chip seat and a package cover body connected to the package chip seat, wherein the package cover body is connected to the package chip seat through a combination body. The present invention is designed for chips, wherein the chips are carried and combined through the chip package, and the pin contact posts are contacted with the pin contacts through the inner conductor through the pin wire body to ensure the signal connection effect, and the outer buffer body for insulation arranged outside can also realize the setting of independent spaces for different pin contact posts, thereby avoiding the occurrence of misconnection of pin contact posts under the action of conductive foreign matter, and ensuring the reliability of chip wiring.
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Description

Technical Field

[0001] The present invention relates to the field of chip technology, and in particular to a chip testing system. Background Art

[0002] The manufacturing process of integrated chips can usually be divided into wafer processing, wafer testing, packaging and final testing. Before chip packaging, it is usually necessary to conduct an electrical performance test on the integrated circuit on the wafer to determine whether the integrated circuit is good. After the integrated circuit is packaged, it is necessary to conduct another electrical performance test to screen out defective products caused by poor packaging technology, so as to further improve the yield of the final product.

[0003] The current pin chip needs to be tested multiple times before use. The pins are easily damaged when they come into contact with the test contacts, causing pin failure. In addition, the current pin chip is connected to the circuit board mainly through the packaging glue layer between the chips. In extreme environments, when the packaging layer cracks, poor pin contact is likely to occur. Based on this, a chip testing system is proposed. Summary of the invention

[0004] The purpose of the present invention is to solve the problem that the existing pin chip needs to be tested multiple times before use, and the pins are easily damaged when contacting with the test contacts, causing pin failure. In addition, when the current pin chip is connected to the circuit board, it is mainly connected through the packaging glue layer between the chips. In extreme environments, when the packaging layer cracks, poor pin contact is likely to occur. A chip testing system is proposed.

[0005] In order to achieve the above object, the present invention adopts the following technical solutions:

[0006] A chip testing system comprises a chip body and a test seat arranged on a test bench, wherein the chip body comprises a chip package, a pin wire body and a chip core body, the chip core body comprises a chip module, the bottom of the chip module is evenly provided with pin contact columns, the pin wire body comprises an inner conductor and an outer buffer body, the chip package comprises a package base, a package chip seat and a package cover body connected to the package chip seat, and the package cover body is connected to the package chip seat through a combination body;

[0007] A detection body matching the number of pin contact posts is arranged above the test seat, and an electric push rod is arranged on one side of the test seat. The output end of the electric push rod drives the detection body to contact the pin contact posts through a joint control driving member.

[0008] The detection body includes a detection plate and an arc-shaped conductive metal body arranged around the detection plate;

[0009] A cavity is provided inside the test seat, and the detection disc is connected to a rotating gear via a rotating shaft penetrating into the cavity.

[0010] The joint control driving member comprises a joint control push plate fixedly connected to the output end of the electric push rod, the joint control push plate is fixedly connected to a plurality of driving gear rods, and the driving gear rods are respectively meshed and connected with the rotating gears on both sides.

[0011] Preferably, a plurality of positioning plug-in bases are arranged on the packaging base, and a positioning plug-in adapted to the positioning plug-in base is arranged at the bottom of the chip core body;

[0012] The packaging base is provided with a positioning frame body adapted to the chip core body.

[0013] Preferably, pin contacts are evenly arranged on the package chip seat, and metal contact seats are arranged at the pin contacts.

[0014] Preferably, the inner conductor and the outer buffer body are both arranged in a hexagonal shape, the outer buffer body is sleeved outside the inner conductor and connected to the inner conductor through an insulating contact column, and the bottom of the outer buffer body is provided with isolation feet to improve the heat dissipation effect.

[0015] Preferably, the packaging base is arranged in a "rectangular frame" shape, adjacent outer buffer bodies are connected to each other, and the outermost outer buffer body is connected to the inner wall of the packaging base.

[0016] Compared with the prior art, the present invention has the following beneficial effects:

[0017] 1. The present invention is designed for chips, and the chip is carried and assembled through a chip package. The pin contact post is contacted with the pin contact point through an inner conductor through a pin wire body to ensure the signal connection effect. The external buffer body used for insulation is arranged outside and independent spaces can be set for different pin contact posts to avoid the misconnection of the pin contact posts under the influence of conductive foreign matter, thereby ensuring the reliability of chip wiring.

[0018] 2. Compared with the existing test systems, the test system designed for the chip of the present invention adopts lateral connection to cause lateral wear during the test process, which does not affect the normal installation of the chip, and ensures the subsequent use of the chip while ensuring the detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is a schematic diagram of the assembly of a chip testing system proposed by the present invention;

[0020] Figure 2 A schematic diagram of the main structure of a pin wire body in a chip testing system proposed by the present invention;

[0021] Figure 3A schematic diagram of the independent structure of a pin wire body in a chip testing system proposed by the present invention;

[0022] Figure 4 A schematic diagram of the main cross-sectional structure of a chip testing system proposed by the present invention;

[0023] Figure 5 for Figure 4 A schematic diagram of the enlarged structure at A in the middle;

[0024] Figure 6 A schematic diagram of the three-dimensional structure of a chip testing system proposed by the present invention;

[0025] Figure 7 This is a structural schematic diagram of a joint control driving component in a chip testing system proposed by the present invention.

[0026] In the figure: 1. chip module; 2. pin contact column; 3. inner conductor; 4. outer buffer body; 5. package base; 6. package chip seat; 7. package cover body; 8. assembly; 9. positioning plug-in base; 10. positioning plug-in; 11. positioning frame; 12. metal contact seat; 13. insulating contact column; 14. isolation support foot; 15. test seat; 16. electric push rod; 17. detection plate; 18. arc-shaped conductive metal body; 19. rotating gear; 20. joint control push plate; 21. driving gear rod. DETAILED DESCRIPTION

[0027] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0028] Embodiment 1, refer to Figures 1 to 5 A chip testing system includes a chip body, the chip body includes a chip package, a pin wire body and a chip core body, the chip core body includes a chip module 1, and pin contact pillars 2 are evenly arranged on the bottom of the chip module 1, wherein the pin contact pillars 2 and the chip module 1 are existing pin chip technologies, which will not be described in detail here.

[0029] The pin conductor body includes an inner conductor 3 and an outer buffer body 4, both of which are hexagonal in shape. The outer buffer body 4 is sleeved on the outside of the inner conductor 3 and connected to the inner conductor 3 through an insulating contact column 13. An isolation support 14 is provided at the bottom of the outer buffer body 4 to improve the heat dissipation effect.

[0030] Among them, there is a gap at the bottom of the outer buffer body 4, which satisfies the effect of dissipating heat to the chip module 1 when in use, and the presence of the gap can produce enough buffer space when the chip is under pressure or vibrating, ensuring the heat dissipation effect while achieving the effect of energy absorption and shock reduction, ensuring the firmness of the connection.

[0031] The packaging base 5 is arranged in a "rectangular frame" shape, and adjacent outer buffer bodies 4 are connected to each other, and the outermost outer buffer body 4 is connected to the inner wall of the packaging base 5;

[0032] The size of the packaging base 5 is adapted to the chip module 1;

[0033] The chip package includes a package base 5 , a package chip seat 6 and a package cover 7 connected to the package chip seat 6 . The package cover 7 is connected to the package chip seat 6 through a combination body 8 .

[0034] It is worth noting that the assembly 8 is arranged in an L-shaped frame, and is installed and connected to the package chip seat 6 by means of adhesive plastic sealing. After the installation is completed, a certain protective effect is formed by the package chip seat 6 and the package cover body 7 to ensure the protection effect of the internal pin wire body and the chip core body.

[0035] Furthermore, a plurality of positioning plug-in bases 9 are arranged on the packaging base 5 , a positioning plug-in 10 adapted to the positioning plug-in base 9 is arranged at the bottom of the chip core body, and a positioning frame 11 adapted to the chip core body is arranged on the packaging base 5 .

[0036] The package chip seat 6 is evenly provided with pin contacts, and a metal contact seat 12 is provided at the pin contacts, wherein the metal contact seat 12 is hexagonal, adapted to the inner conductor 3, and its inner diameter is the outer diameter of the inner conductor 3, and its outer diameter is the inner diameter of the outer buffer body 4, that is, it can perfectly fill the gap between the inner conductor 3 and the outer buffer body 4;

[0037] Compared with the existing method of direct pin contact, this solution makes the pin contact column 2 contact the pin contact through the inner conductor 3, which ensures the signal connection effect. At the same time, the pin contact column 2 will not be disconnected from the pin contact during vibration, thereby ensuring the tightness of the wiring. The external buffer body 4 for insulation arranged on the outside can also set independent spaces for different pin contact columns 2, avoiding the pin contact column 2 from being connected incorrectly under the action of conductive foreign matter (debris, liquid), thereby ensuring the reliability of chip wiring.

[0038] Example 2, reference Figure 6 to Figure 7 The test body includes a test seat 15 arranged on the test bench, and a detection body matching the number of pin contact posts 2 is arranged above the test seat 15. The detection body can be provided with multiple models to match the chip model;

[0039] An electric push rod 16 is provided at one side of the test socket 15 , and an output end of the electric push rod 16 drives the detection body to contact the pin contact column 2 through a joint control driving component.

[0040] The detection body includes a detection plate 17 and an arc-shaped conductive metal body 18 arranged around the detection plate 17;

[0041] A cavity is defined inside the test seat 15 , and the test disc 17 is connected to a rotating gear 19 via a rotating shaft penetrating into the cavity, wherein the rotating shaft is rotationally connected to the inner wall of the cavity, so that the rotational force of the rotating gear 19 is transmitted to the test disc 17 .

[0042] The joint control driving member includes a joint control push plate 20 fixedly connected to the output end of the electric push rod 16. The joint control push plate 20 is fixedly connected with a plurality of driving gear rods 21. The driving gear rods 21 are respectively meshed and connected with the rotating gears 19 on both sides.

[0043] When testing the chip, the present solution places the chip on a test seat 15 that matches the model. The inner conductor 3 has corners and edges due to its hexagonal configuration, ensuring that the arc-shaped conductive metal body 18 on the test body is at the corners. At this time, the chip is moved down so that the inner conductor 3 is sleeved outside the arc-shaped conductive metal body 18. The two are in a non-contact state at this time, so there is no wear on the pins of the chip.

[0044] At this time, the electric push rod 16 is controlled to drive the connected joint control push plate 20 to move, and drive multiple driving gear rods 21 to rotate. During the rotation of the driving gear rod 21, the detection body connected to the rotating gear 19 will be driven to rotate. At this time, the arc-shaped conductive metal body 18 originally at the edge of the inner conductor 3 will rotate and contact the edge of the inner conductor 3 to achieve signal connection for chip detection. The wear caused at this time is lateral wear. During installation, it is necessary to vertically insert the metal layer, so it will not affect the chip pins. The chip testing system can effectively avoid pin wear, ensure the detection while ensuring the later use of the chip.

[0045] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A chip testing system, characterized in that: The invention comprises a chip body and a test seat (15) arranged on a test bench, wherein the chip body comprises a chip package, a pin wire body and a chip core body, wherein the chip core body comprises a chip module (1), wherein pin contact pillars (2) are evenly arranged at the bottom of the chip module (1), wherein the pin wire body comprises an inner conductor (3) and an outer buffer body (4), and wherein the chip package comprises a package base (5), a package chip seat (6) and a package cover body (7) connected to the package chip seat (6), wherein the package cover body (7) is connected to the package chip seat (6) via a combination body (8); A number of detection bodies matching the number of pin contact posts (2) are arranged above the test seat (15); an electric push rod (16) is arranged on one side of the test seat (15); an output end of the electric push rod (16) drives the detection body to contact the pin contact posts (2) through a joint control drive member; the detection body comprises a detection disk (17) and an arc-shaped conductive metal body (18) arranged around the detection disk (17); The test seat (15) has a cavity formed therein, the test disc (17) is connected to a rotating gear (19) via a rotating shaft penetrating into the cavity, the joint control drive component comprises a joint control push plate (20) fixedly connected to an output end of the electric push rod (16), the joint control push plate (20) being fixedly connected to a plurality of drive gear rods (21), the drive gear rods (21) being respectively meshed and connected to the rotating gears (19) on both sides.

2. A chip testing system according to claim 1, characterized in that: A plurality of positioning plug-in bases (9) are arranged on the packaging base (5), and a positioning plug-in (10) adapted to the positioning plug-in base (9) is arranged at the bottom of the chip core body; The packaging base (5) is provided with a positioning frame (11) adapted to the chip core body.

3. A chip testing system according to claim 1, characterized in that: Pin contacts are evenly arranged on the package chip seat (6), and metal contact seats (12) are arranged at the pin contacts.

4. A chip testing system according to claim 1, characterized in that: The inner conductor (3) and the outer buffer body (4) are both arranged in a hexagonal shape; the outer buffer body (4) is sleeved outside the inner conductor (3) and connected to the inner conductor (3) via an insulating contact column (13); and an isolation support foot (14) is provided at the bottom of the outer buffer body (4).

5. A chip testing system according to claim 1, characterized in that: The packaging base (5) is arranged in a "rectangular frame" shape, adjacent outer buffer bodies (4) are connected to each other, and the outermost outer buffer body (4) is connected to the inner wall of the packaging base (5).

Citation Information

Patent Citations

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    CN201072826Y