Semiconductor device with active device region and current sensor region
By setting up supplementary trench isolation electrodes in the semiconductor device, the problem of sensing output distortion of power devices under overcurrent or overtemperature conditions in the prior art is solved, and more accurate current and temperature measurement is achieved, which enhances the response of the device Speed and reliability.
Patent Information
- Application Number
- CN202410791969.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-06-19
- Filing Date
- 2024-06-19
- Publication Date
- 2024-12-20
AI Technical Summary
When an existing power device detects an overcurrent or overtemperature operating condition, it is difficult to quickly and reliably close it to avoid short circuit or overcurrent scenarios, resulting in sensored output distortion or leakage current, affecting the normal operation of the device.
A semiconductor device is designed, including an active device region and a current sensor region, and a supplementary trench is provided between the two to isolate the electrodes, while forming a supplementary trench on the substrate to separate the gate trench , ensure that the electrodes are not electrically connected, so that the transistors in both regions are turned on or off at the same time if necessary.
Effectively reduce or suppress leakage current, ensure accurate measurement of temperature and current, improve the device's reaction speed and reliability under overcurrent or overtemperature conditions, and avoid sensing output distortion.
Smart Images

Figure CN119170623A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a semiconductor device having an active device region and a current sensor region. Background Art
[0002] Some power devices include current and temperature sensing mechanisms to monitor overcurrent or overtemperature operating conditions. The output of such sensing mechanisms can be delivered to other control and protection circuits for controlling the operation of one or more power devices. When an overcurrent or overtemperature operating condition is detected, such control and protection circuits operate to disable the power device. The power device should be shut down as early as possible in an appropriate manner to avoid short circuit or overcurrent scenarios. Therefore, there is a need for reliable current and temperature sensing schemes for power devices (such as, for example, power semiconductor devices). Summary of the invention
[0003] According to an example of a semiconductor device, the semiconductor device includes: a substrate; and an active device region including a plurality of gate trenches formed on a first main surface of the semiconductor substrate. The semiconductor device also includes: a current sensor region including a plurality of gate trenches formed on the first main surface of the semiconductor substrate. The semiconductor device also includes a transition region arranged between the active device region and the current sensor region. The transition region includes a supplementary trench formed on the first main surface of the semiconductor substrate. The supplementary trench separates the plurality of gate trenches of the active device region from the plurality of gate trenches of the current sensor region. The electrodes formed in the supplementary trenches are neither electrically connected to the gate electrodes formed in the plurality of gate trenches of the active device region nor electrically connected to the gate electrodes formed in the plurality of gate trenches of the current sensor region.
[0004] Those skilled in the art will recognize additional features and advantages upon reading the following detailed description, and upon viewing the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0005] The present disclosure is illustrated by way of example and not by way of limitation in the figures of the accompanying drawings, wherein like reference numerals refer to similar or identical elements unless otherwise indicated. The elements of the drawings are not necessarily drawn to scale relative to each other. The features of the various illustrated examples can be combined unless they exclude each other.
[0006] Figure 1A illustrates a partial top view of an exemplary semiconductor device; and Figure 1B +1C illustrates a cross-sectional view of a semiconductor device;
[0007] Figure 2-4 illustrates a partial top view of an exemplary semiconductor device;
[0008] Figure 5 illustrates a circuit schematic diagram of an exemplary electronic system;
[0009] Figure 6 A top view illustrating a layout of an exemplary semiconductor device; and
[0010] Fig. 7A 7B, 7D, and 7E illustrate enlarged top views of exemplary semiconductor devices; and Figure 7C A cross-sectional view of a semiconductor device is shown. DETAILED DESCRIPTION
[0011] The making and use of several examples are discussed in detail below. However, it should be understood that the present invention provides many applicable inventive concepts that can be embodied in a variety of specific situations. The specific examples discussed only illustrate specific ways to make and use the present invention and do not limit the scope of the present invention.
[0012] The terms "having", "containing", "including", "comprising" and the like are open-ended terms, and the terms indicate the presence of stated structures, elements or features, but do not exclude the presence of additional elements or features. The articles "a", "an" and "the" are intended to include the plural as well as the singular, unless the context clearly indicates otherwise.
[0013] The terms "joined", "attached", "connected" and / or "coupled" are not intended to mean that the elements or layers must be in direct contact together; intervening elements or layers may be provided between the "joined", "attached", "connected" and / or "coupled" elements, respectively. However, according to the present disclosure, the above terms may optionally also have the following specific meanings: the elements or layers are in direct contact together, i.e. no intervening elements or layers are provided between the "joined", "attached", "connected" and / or "coupled" elements, respectively.
[0014] The term "electrically connected" describes a permanent low-resistance connection between electrically connected elements, such as a direct contact between the elements involved or a low-resistance connection via metal and / or heavily doped semiconductor material.
[0015] The terms “on” and “over” should not be interpreted as meaning only “directly on” and “directly over.” Conversely, if an element is positioned “on” or “over another element” (for example, a layer is “on” or “over another layer” or “on” or “over a substrate”), another component (for example, another layer) may be positioned between the two elements (for example, if a layer is “on” or “over a substrate,” the other layer may be positioned between the layer and the substrate).
[0016] As shown in the drawings, spatially relative terms (such as, "below," "beneath," "down," "above," "up," "under," etc.) are used herein for convenience in describing the relationship of one element or feature to another element(s) or feature(s). The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the drawings. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be used.
[0017] Next, exemplary embodiments of semiconductor devices having an active device region and a current sensor region are described with reference to the accompanying drawings. Although the exemplary embodiments are described in the context of IGBT (insulated gate bipolar transistor) devices, the exemplary embodiments may be implemented using other types of transistors, such as MOSFET (metal oxide semiconductor field effect transistor) devices, BJT (bipolar junction transistor) devices, JFET (junction field effect transistor) devices, etc. That means that references to emitters and collectors may be equally applicable to the source and drain of a MOSFET or similar terminals of other types of transistors. In the following embodiments, for n-channel devices, the first conductivity type is n-type and the second conductivity type is p-type, while for p-channel devices, the first conductivity type is p-type and the second conductivity type is n-type.
[0018] Figure 1A A partial top view of an exemplary semiconductor device 100 is illustrated. Figure 1B The diagram is along Figure 1A FIG. 1 is a cross-sectional view of the semiconductor device 100 taken along line AA′ in FIG. 1 . Figure 1C The diagram is along Figure 1A FIG. 1 is a cross-sectional view of the semiconductor device 100 along the line marked BB' in FIG. 1 . Note that for ease of illustration and to provide an unobstructed view, Figure 1B Compared with +1C, Figure 1A Contains fewer details.
[0019] The semiconductor device 100 includes a semiconductor substrate 102. The semiconductor substrate 102 may include one or more semiconductor materials of various semiconductor materials used to form semiconductor devices. For example, the semiconductor substrate 102 may include a single element semiconductor (e.g., Si, Ge, etc.), a silicon-on-insulator semiconductor, a binary semiconductor (e.g., SiC, GaN, GaAs, SiGe, etc.), a ternary semiconductor (e.g., AlGaN, InGaAs, InAlAs, etc.). The semiconductor substrate 102 may be a bulk semiconductor material, or may include one or more additional elements, such as, for example, an epitaxial layer, a field stop region, a buffer layer, a well region, etc. grown on the bulk semiconductor material. The bulk semiconductor material may be referred to as a base semiconductor. The semiconductor substrate 102 has a first main surface 104 and a second main surface 106 opposite to the first main surface 104. The first main surface 104 may be referred to as a front surface, and the second main surface 106 may be referred to as a back surface.
[0020] The semiconductor device 100 also includes an active device region 108 and a current sensor region 112. The active device region 108 includes a plurality of gate trenches 110 formed in the first main surface 104 of the semiconductor substrate 102. The current sensor region 112 includes a plurality of gate trenches 114 formed in the first main surface 104 of the semiconductor substrate 102. The semiconductor device 100 may be referred to as a trench semiconductor device. The active device region 108 includes a power transistor cell that forms a power transistor of the semiconductor device 100, and the current sensor region 112 includes a current sensor transistor cell that forms a current sensor transistor of the semiconductor device 100. The power transistor may be referred to as a main transistor. The current sensor cell mirrors the current flowing in the active device region 108, and the current flowing through the current sensor cell can be used to sense the current flowing through the main transistor, as will be described below in conjunction with Figure 5 That means that the current measured in the current sensor cell represents the current flowing through the active device region 108. The power transistor cells and the current sensor transistor cells may have the same configuration, spacing, etc., but there are fewer current sensor transistor cells than power transistor cells, for example, 1 / 10, 1 / 100, 1 / 1000, or even fewer cells than power transistor cells.
[0021] The semiconductor device 100 further includes a transition region 116 disposed between the active device region 108 and the current sensor region 112. The transition region 116 includes a supplementary trench 120 formed at the first main surface 104 of the semiconductor substrate 102, and the supplementary trench 120 separates the plurality of gate trenches 110 of the active device region 108 from the plurality of gate trenches 114 of the current sensor region 112. In an example, the transition region 116 spatially separates the plurality of gate trenches 110 of the active device region 108 from the plurality of gate trenches 114 of the current sensor region 112 within the semiconductor substrate 102, and there is no physical connection between the plurality of gate trenches 110 of the active device region 108 and the plurality of gate trenches 114 of the current sensor region 112. The transition region 116 may be referred to as an interface region, and the supplementary trench 120 may be referred to as an isolation trench.
[0022] like Figure 1B As shown in the cross-sectional view of FIG. 1C, the current sensor region 112 includes a gate trench 114 formed in the first main surface 104 of the semiconductor substrate 102 and extending into the semiconductor substrate 102. Similarly, the active device region 108 includes a gate trench 110 formed in the first main surface 104 of the semiconductor substrate 102 and extending into the semiconductor substrate 102. A gate electrode 122 is formed in the gate trench 114 of the current sensor region 112, and the gate electrode 122 is separated from the semiconductor substrate 102 by a gate dielectric 124. Similarly, a gate electrode 126 is formed in the gate trench 110 of the active device region 108, and the gate electrode 126 is separated from the semiconductor substrate 102 by a gate dielectric 128.
[0023] The electrode 130 is formed in the supplementary trench 120, and the electrode 130 is separated from the semiconductor substrate 102 by the dielectric 132. The electrode 130 formed in the supplementary trench 120 is not electrically connected to the gate electrode 126 formed in the gate trench 110 of the active device region 108. In addition, the electrode 130 formed in the supplementary trench 120 is not electrically connected to the gate electrode 122 formed in the gate trench 114 of the current sensor region 112. That means, the electrode 130 formed in the supplementary trench 120 is neither electrically connected to the gate electrode 126 formed in the gate trench 110 of the active device region 108 nor electrically connected to the gate electrode 122 formed in the gate trench 114 of the current sensor region 112. In one example, the electrode 130 formed in the supplementary trench 120 is electrically isolated from the gate electrode 126 formed in the gate trench 110 of the active device region 108. In addition, the electrode 130 formed in the supplementary trench 120 is electrically isolated from the gate electrode 122 formed in the gate trench 114 of the current sensor region 112 .
[0024] The embodiments of the supplementary trench 120 and the embodiments of the electrode 130 formed in the supplementary trench 120 and electrically isolated from the gate electrode 126 of the active device region 108 and the gate electrode 122 of the current sensor region 112 allow for reducing or suppressing leakage current flowing from the active device region 108 to the current sensor region 112 and vice versa. In one example, the gate electrode 126 of the active device region 108 is electrically connected to the gate electrode 122 of the current sensor region 112. That means that the power transistor of the active device region 108 and the current sensor transistor of the current sensor region 112 are turned on / off at the same time. That means that the power transistor of the active device region 108 and the current sensor transistor of the current sensor region 112 are turned on / off at the same time. In one example, by applying a positive voltage to the gate electrode 126 and the gate electrode 122, the power transistor and the current sensor transistor can be turned on. In addition, by applying a negative voltage to the gate electrode 126 and the gate electrode 122, the power transistor and the current sensor transistor can be turned off. In the absence of the electrode 130 formed in the supplementary trench 120 as described above, when the power transistor and the current sensor transistor are disconnected, parasitic leakage current may flow from the active device region 108 to the current sensor region 112, and vice versa. A leakage path involving the body region 136 formed on both sides of the supplementary trench 120 may occur, and a channel connecting the body region 136 on both sides of the supplementary trench 120 may be formed. In a state where the power transistor and the current sensor transistor are disconnected, the parasitic leakage current may adversely affect the operation of the semiconductor device 100. For example, when the power transistor and the current sensor transistor are disconnected, measurement of the temperature of the semiconductor device 100 may be performed. In the absence of the electrode 130 formed in the supplementary trench 120 as described above, such temperature measurement may be distorted.
[0025] like Figure 1B As shown in the cross-sectional view of , the current sensor region 112 includes a source region 134 of a first conductivity type and a body region 136 of a second conductivity type formed between adjacent gate trenches 114. The current sensor region 112 also includes a drift region 138 of the first conductivity type and a collector region 140 of the second conductivity type. A channel is formed in the body region 136 along the gate trenches 114 to provide a conductive connection between the source region 134 and the drift region 138. The channel is controlled by a voltage applied to the gate electrode 122. Note that for a device other than an IGBT, such as a MOSFET, the collector region 140 of the second conductivity type is replaced by a drain region of the first conductivity type.
[0026] A first conductive layer 142 is formed over the first main surface 104 of the semiconductor substrate 102. The first conductive layer 142 is segmented, and a section of the conductive layer 142 contacts the source region 134 and the body region 136. The section is electrically isolated from the gate electrode 122 by the segmented interlayer dielectric layer 144 formed over the first main surface 104 of the semiconductor substrate 102. A second conductive layer 146 is formed over the second main surface 106 of the semiconductor substrate 102 to provide a collector potential to the collector region 140. The first conductive layer 142 and / or the second conductive layer 146 may be a metallization layer.
[0027] As explained above, the current sensor cell located in the current sensor region 112 mirrors the current flowing in the power transistor cell in the active device region 108 and has a similar or identical cell configuration as the power transistor cell, but with a lower cell count. That means, similar to what is illustrated and described for the current sensor region 112, the active device region 108 includes a source region of a first conductivity type, a body region of a second conductivity type, a drift region of a first conductivity type, and a first conductive layer and a second conductive layer. In one example, the electrode 130 formed in the supplementary trench 120 is electrically connected to the source region of the active device region 108. The electrode 130 is electrically isolated from the gate electrode 126 of the active device region 108 and from the gate electrode 122 of the current sensor region 112.
[0028] The current sensor cells located in the current sensor region 112 and the power transistor cells located in the active device region 108 are configured to conduct a load current between the first main surface 104 of the semiconductor substrate 102 and the second main surface 106 of the semiconductor substrate 102. The semiconductor device 100 may be referred to as a vertical power semiconductor device, and may be configured to conduct a load current of more than 1 A, or more than 10 A, or more than 30 A, or several hundred A, such as, for example, in automotive applications, and may also be configured to block a voltage between load terminals in the range of tens to several kilovolts, for example, 10 V, 400 V, 650 V, 1.2 kV, 1.7 kV, 3.3 kV, 4.5 kV, 5.5 kV, 6 kV, 6.5 kV.
[0029] like Figure 1BAs shown in FIG. 1C , the gate trench 114 of the current sensor region 112 extends from the first main surface 104 of the semiconductor substrate 102 to a first depth d1 within the semiconductor substrate 102. In addition, the gate trench 114 has a first width w1. The gate trench 110 of the active device region 108 extends from the first main surface 104 of the semiconductor substrate 102 to a second depth d2 within the semiconductor substrate 102. In addition, the gate trench 110 has a second width (not shown). In one example, the gate trench 110 of the active device region 108 has at least one of the same width or the same depth as the gate trench 114 of the current sensor region 112. Such a regular structure allows the semiconductor device 100 to be easily manufactured, and the manufacturing cost is reduced. Similarly, the supplementary trench 120 extends from the first main surface 104 of the semiconductor substrate 102 to a third depth d3 within the semiconductor substrate 102, and has a third width w3. In one example, the supplemental trench 120 has at least one of the same width or the same depth as one of the gate trenches 110 of the active device region 108 and / or one of the gate trenches 114 of the current sensor region 112 .
[0030] Combination Figures 1A-1C The semiconductor device 100 shown and described is provided as an example. Other examples may differ from those described with respect to Figures 1A-1C For example, the shapes and positions of the gate trench, source region, body region, and supplementary trench may differ from those of the combination Figures 1A-1C For example, the contact recess may extend from the first main surface 104 of the semiconductor substrate 102 into the source region and the body region to provide electrical contact with the source region and the body region. Figure 1B There may be additional conductive layers and interlayer dielectric layers or fewer conductive layers and interlayer dielectric layers than those shown in +1C, and so on.
[0031] Figure 2 Another partial top view of the exemplary semiconductor device 200 is shown. Figures 1A-1C The semiconductor device 200 includes an active device region 208 , a current sensor region 212 , and a transition region 216 . The transition region 216 includes a supplementary trench 220 . Figures 1A-1C The gate trenches 110 and 114 of the semiconductor device 100 are stripe-shaped gate trenches arranged in parallel. Figure 2 The semiconductor device 200 and Figures 1A-1CThe semiconductor device 100 of the present invention is different in that the gate trenches 210, 214 are arranged in a grid shape. In one example, the grid can be a rectangular (in one embodiment, a square) or hexagonal grid. Both the active device region 208 and the current sensor region 212 include grid-shaped gate trenches 210, 214. In a manner that the source region and the body region (not shown) are surrounded by the gate trenches 210, 214, the source region and the body region can be arranged within the grid of the gate trenches 210, 214.
[0032] Combination Figures 1A-1C The semiconductor devices 100 and 200 illustrated and described in FIG. 2 are provided as examples. Other examples may differ from those described with respect to FIG. Figures 1A-1C 2. For example, the gate trenches 110, 114, 210, 214 may be arranged in a manner that is neither parallel to each other nor orthogonal to each other. In addition, the supplementary trenches 120, 220 may have a configuration similar to that of the combined trenches 110, 114, 210, 214. Figures 1A-1C 2. The grooves 110, 114, 210, 214, 120, 220 may have any type of shape, for example, an open shape such as straight stripes or a closed shape such as a grid shape.
[0033] Figure 3 Another partial top view of the exemplary semiconductor device 300 is shown. Figures 1A-1C , 200, the semiconductor device 300 includes an active device region 308, a current sensor region 312, and a transition region 316 including a supplementary trench 320. However, differently, the transition region 316 of the semiconductor device 300 includes another supplementary trench 348 extending parallel to the supplementary trench 320. Similar to the electrode formed in the supplementary trench 320, the electrode formed in the another supplementary trench 348 is electrically isolated from the gate electrode of the active device region 308 and from the gate electrode of the current sensor region 312. In one example, the electrode of the another supplementary trench 348 is electrically connected to the source region of the active device region 308. The electrode included in the another supplementary trench 348 can allow for further reduction or prevention of leakage current flowing from the active device region 308 to the current sensor region 312, and vice versa. In one example, the another supplementary trench 348 extends at least partially parallel to the supplementary trench 320.
[0034] Figure 4 Another partial top view of an exemplary semiconductor device 400 is shown. Figures 1A-1C, 2-3 of the semiconductor devices 100, 200, 300, the semiconductor device 400 includes an active device region 408, a current sensor region 412, and a transition region 416 including a supplementary trench 420. In the semiconductor device 400, the current sensor region 412 is embedded in the active device region 408. Figure 4 In the example of FIG. 4 , the transition region 416 and the supplemental trench 420 completely surround the current sensor region 412 to reduce or suppress leakage current flowing from the active device region 408 to the current sensor region 412 and vice versa as explained above.
[0035] In some examples, the supplemental groove 420 may not be as Figure 4 4. The supplementary trench 420 completely surrounds the current sensor region 412 as shown in FIG. Alternatively, the supplementary trench 420 may at least partially surround the current sensor region 412 to suppress leakage current flowing from the active device region 408 to the current sensor region 412 as explained above, and vice versa. In some examples, at a first side S1 of the current sensor region 412, the supplementary trench separates a plurality of gate trenches of the active device region 408 from a plurality of gate trenches of the current sensor region 412. In addition, at a second side S2 of the current sensor region 412 opposite to the first side S1, another supplementary trench separates the plurality of gate trenches of the current sensor region 412 from a plurality of additional gate trenches of the active device region 408. That means, at a third side S3 of the current sensor region 412 or a fourth side S4 of the current sensor region 412 opposite to the third side S3, there is no supplementary trench. In addition, the supplementary trench and the another supplementary trench do not form adjacent trenches. In some examples, the number of supplementary trenches on one side may be different from the number of supplementary trenches on the other side. For example, as follows Figure 7B As shown in FIG, at the first side S1 , there may be two supplementary grooves, and at the fourth side S4 , there may be one supplementary groove.
[0036] Figure 5 A circuit schematic diagram of an exemplary electronic system 550 configured to sense current and temperature of semiconductor device 500 is shown. Electronic system 550 may be part of a power electronic system such as a DC / DC converter, AC / DC converter, DC / AC inverter, AC / AC converter, or the like.
[0037] The semiconductor device 500 is part of an electronic system 550 and includes a main transistor 552, a current sensor transistor 554, and a temperature sensor device 556. The main transistor 552, the current sensor transistor 554, and the temperature sensor device 556 form an integrated circuit that is monolithically integrated in the semiconductor device 500. The semiconductor device 500 may be referred to as a semiconductor die. The collector region of the main transistor 552 and the collector region of the current sensor transistor 554 are both electrically connected to a collector terminal 558 of the semiconductor device 500. The gate electrode of the main transistor 552 and the gate electrode of the current sensor transistor 554 are all electrically connected to a gate terminal 560 of the semiconductor device 500. The source region of the main transistor 552 is electrically connected to an emitter terminal 562 of the semiconductor device 500, and the source region of the current sensor transistor 554 is electrically connected to a sense terminal 564 of the semiconductor device 500. The temperature sensor device 556 is electrically connected between the sense terminal 564 and the emitter terminal 562. That means that a first terminal of the temperature sensor device 556 is electrically connected to the sense terminal 564 and a second terminal of the temperature sensor device 556 is electrically connected to the emitter terminal 562 .
[0038] The main transistor 552 may include an active device region similar or identical to the active device regions 108, 208, 308, 408 explained above. The current sensor transistor 554 may include a current sensor region similar or identical to the current sensor regions 112, 212, 312, 412 explained above. The current sensor transistor 554 mirrors the current flowing in the main transistor 552, and the current flowing through the current sensor transistor 554 can be used to sense the current flowing through the main transistor 552, as will be described in more detail below. A transition region including at least one supplementary trench is arranged between the active device region and the current sensor region, as explained above. The transition region may be similar or identical to the transition region 116, 216, 316, 416 explained above, and the at least one supplementary trench may be similar or identical to the supplementary trench 120, 220, 320, 348, 420 explained above.
[0039] In one example, the temperature sensor device 556 includes at least one diode configured to sense the temperature of the semiconductor device 500, as will be described in more detail below. The anode terminal of the at least one diode is electrically connected to the sensing terminal 564, and the cathode terminal of the at least one diode is electrically connected to the emitter terminal 562. In one example, the temperature sensor device 556 includes a plurality of diodes coupled in series. The plurality of diodes coupled in series may be referred to as a diode stack. In one example, an anti-parallel diode may be coupled between the sensing terminal 564 and the emitter terminal 562 to protect the main transistor 552 and the semiconductor device 500 from damage in the event of ESD (electrostatic discharge). Implementing a diode to sense the temperature of the semiconductor device 500 is merely an example. In other examples, other semiconductor devices (such as, for example, a resistor) may be implemented to sense the temperature of the semiconductor device 500.
[0040] In addition to the semiconductor device 500, the electronic system 550 also includes additional circuit elements configured to sense the current and temperature of the semiconductor device 500. The electronic system 550 includes a switching device 566 and a current sensing resistor 568 coupled in series between the sensing terminal 564 and the emitter terminal 562. In one example, the switching device 566 includes a transistor. In one example, the switching device 566 can be controlled by the same signal 572 as the gate terminal 560 of the semiconductor device 500. In addition, the electronic system 550 includes a current source 570 coupled between the sensing terminal 564 and the emitter terminal 562. The additional circuit elements configured to sense the current and temperature of the semiconductor device 500 are provided as examples. In other examples, different and / or additional circuit elements may be present.
[0041] In the first operating mode, the gate terminal 560 and the switching device 566 of the semiconductor device 500 are switched to a first state. In one example, the first state may be an on state, in which a high voltage or a positive voltage may be applied to the gate terminal 560, and in which the main transistor 552 and the current sensor transistor 554 are turned on. In addition, in the first state, the switching device 566 is turned on and couples the sensing terminal 564 of the semiconductor device 500 to the current sensing resistor 568. In the first operating mode, the current flowing through the current sensor transistor 554 is sensed by sensing the voltage drop across the current sensing resistor 568 as measured between the sensing terminal 564 and the emitter terminal 562. This voltage may be sensed when the main transistor 552 and the current sensor transistor 554 are in a safe on state. Based on the current flowing through the current sensor transistor 554 and the ratio of the size of the main transistor 552 to the size of the current sensor transistor 554, the current flowing through the main transistor 552 may be determined. In the first operating mode, the semiconductor device 500 is configured to allow measurement of the current in the current sensor transistor 554 , and the first operating mode may be referred to as a current sensing mode.
[0042] In the second operating mode, the gate terminal 560 and the switch device 566 of the semiconductor device 500 are switched to a second state. In one example, the second state may be a disconnected state, in which a low voltage, a zero voltage, or a negative voltage may be applied to the gate terminal 560, and in which the main transistor 552 and the current sensor transistor 554 are not conducting. In addition, in the second state, the switch device 566 is not conducting, and the sensing terminal 564 of the semiconductor device 500 is decoupled from the current sensing resistor 568. In the second operating mode, the current source 570 provides a constant current flowing through the temperature sensor device 556 of the semiconductor device 500. The second state configuration allows temperature sensing of the semiconductor device 500 by sensing the voltage drop across the temperature sensor device 556 as measured between the sensing terminal 564 and the emitter terminal 562. The voltage drop may be sensed when the main transistor 552 and the current sensor transistor 554 are in a safe disconnected state. In the second operating mode, the semiconductor device 500 is configured to allow the temperature of the semiconductor device 500 to be measured, and the second operating mode may be referred to as a temperature sensing mode.
[0043] In such Figure 5In the exemplary electronic system 550 shown in , a single terminal of the semiconductor device 500 (the terminal is the sensing terminal 564) is used for both current measurement and temperature measurement. Therefore, the sensing terminal 564 can be referred to as a dual-mode sensing terminal. Via signal 572, switching between current measurement and temperature measurement is performed. When the gate terminal 560 is switched to the first state, the sensing terminal 564 is used to measure the current, and when the gate terminal 560 is switched to the second state, the sensing terminal 564 is used to measure the temperature.
[0044] Figure 6 FIG. 6 is a top view of a layout of an exemplary semiconductor device 600. The semiconductor device 600 may be combined with Figure 5 The semiconductor device 500 shown and described is similar or identical. The gate terminal of the semiconductor device 600 is electrically connected to the gate pad G, the emitter terminal of the semiconductor device 600 is electrically connected to the emitter pad E, and the sense terminal of the semiconductor device 600 is electrically connected to the sense pad S. The semiconductor device 600 is a vertical device, and the gate pad G, the emitter pad E and the sense pad S are arranged on a first main surface of the substrate of the semiconductor device 600. The collector terminal is electrically connected to the collector pad, which is arranged on a second main surface of the substrate opposite to the first main surface. Therefore, the collector pad is Figure 6 Not visible in.
[0045] The semiconductor device 600 includes a temperature sensor region 674 including a semiconductor device forming a temperature sensor device of the semiconductor device 600. The semiconductor device 600 also includes a current sensor region 612 including a current sensor transistor cell forming a current sensor transistor of the semiconductor device 600. The semiconductor device 600 also includes an active device region, which is at least partially arranged under the emitter pad E. The active device region includes a power transistor cell forming a power transistor of the semiconductor device 600. A transition region including at least one supplementary trench is arranged between the active device region and the current sensor region, as explained above.
[0046] Figure 6 The layout shown in FIG. 6 is only an example. In other examples, the temperature sensor area 674 may be located in a Figure 6 For example, the temperature sensor region 674 may be placed at the center of the semiconductor device 600 or near the center of the semiconductor device 600, or the temperature sensor region 674 may be distributed over the semiconductor device 600. Similarly, the current sensor region 612, the gate pad G, the emitter pad E, and / or the sense pad S may be located at locations other than those shown in FIG. Figure 6In one example, the emitter pad E may be divided into two or more emitter pads.
[0047] The sensing pad S is used for both current measurement and temperature measurement of the semiconductor device 600. Switching between current measurement and temperature measurement is performed via the gate pad G. Using the sensing pad S for both current measurement and temperature measurement results in minimal effort to access the pad, for example, during bonding, and further allows high active area utilization. In addition, the electrode formed in the supplementary trench of the transition region suppresses or reduces leakage current flowing from the active device region to the current sensor region, and vice versa, as explained above.
[0048] Fig. 7A +7B, 7D+7E diagram by Figure 6 FIG. 7 is an enlarged top view of a section of an embodiment of a semiconductor device 700 indicated by a circle in FIG. Figure 7C The diagram is along Fig. 7A 7B is a cross-sectional view of the semiconductor device 700 along the line marked as AA′.
[0049] The semiconductor device 700 includes a semiconductor substrate 702. The semiconductor substrate 702 has a first main surface 704 and a second main surface 706 opposite to the first main surface 704. The semiconductor device 700 also includes an active device region 708 and a current sensor region 712. The active device region 708 includes a plurality of gate trenches 710 formed at the first main surface 704 of the semiconductor substrate 702 and extending along a first direction y parallel to the first main surface 704 of the semiconductor substrate 702. The active device region 708 may be similar to the active device regions 108, 208, 308, 408 explained above. Differently, the active device region 708 also includes a plurality of emitter trenches 776 extending along the first direction y parallel to the gate trenches 710 and between the gate trenches 710. The active device region 708 includes a power transistor cell forming a power transistor of the semiconductor device 700. Emitter trench 776 includes an emitter electrode that is electrically connected to a source region formed in active device region 708 .
[0050] The current sensor region 712 includes a plurality of gate trenches 714 formed at the first main surface 704 of the semiconductor substrate 702 and extending along a first direction y. The current sensor region 712 may be similar to the current sensor regions 112, 212, 312, 412 explained above. Differently, the current sensor region 712 also includes a plurality of emitter trenches 778 extending along the first direction y parallel to the gate trenches 714 and between the gate trenches 714. In addition, the current sensor region 712 includes intersecting gate trenches 780 extending at least partially along a second direction x orthogonal to the first direction y. The intersecting gate trenches 780 connect at least a subset of the plurality of gate trenches 714 of the current sensor region 712 to each other. The current sensor region 712 includes a current sensor transistor cell forming a current sensor transistor of the semiconductor device 700. The emitter trench 778 includes an emitter electrode that is electrically connected to a source region formed in the current sensor region 712 .
[0051] The semiconductor device 700 further includes a transition region 716 arranged between the active device region 708 and the current sensor region 712. The transition region 716 includes a supplementary trench 720 and a further supplementary trench 748 formed at the first main surface 704 of the semiconductor substrate 702. The body region 736 is formed on both sides of the supplementary trench 120 and the further supplementary trench 748. The supplementary trench 720 and the further supplementary trench 748 separate the plurality of gate trenches 710 of the active device region 708 from the plurality of gate trenches 714 of the current sensor region 712. The transition region 716 may be similar or identical to the transition regions 116, 216, 316, 416 explained above, and the supplementary trench 720 and the further supplementary trench 748 may be similar or identical to the supplementary trenches 120, 220, 320, 348, 420 explained above. The supplementary trench 720 and the further supplementary trench 748 extend at least partially along the second direction x and include electrodes that are not electrically connected to the plurality of gate electrodes formed in the gate trench 710 of the active device region 708. In addition, the electrodes formed in the supplementary trench 720 and the further supplementary trench 748 are not electrically connected to the plurality of gate electrodes formed in the gate trench 714 of the current sensor region 712. In one example, the electrodes formed in the supplementary trench 720 and the further supplementary trench 748 are electrically connected to the source region formed in the active device region 708. Fig. 7A As shown in , the supplementary trench 720 and the further supplementary trench 748 may be connected to at least one of the plurality of emitter trenches 776 of the active device region 708. Alternatively, as Figure 7BAs shown in , the supplementary trench 720 and the further supplementary trench 748 may not be connected to at least one of the plurality of emitter trenches 776 of the active device region 708. Figure 7B In the example, by Figure 7C The electrodes formed in the supplementary trench 720 and the further supplementary trench 748 may be electrically connected to the source region formed in the active device region 708. The implementation of the electrodes formed in the supplementary trench 720 and the further supplementary trench 748 allows for the reduction or suppression of leakage current, as described above.
[0052] like Figure 7C As shown in the cross-sectional view of FIG. 7 , a first conductive layer 742 is formed over the first main surface 704 of the semiconductor substrate 702. The first conductive layer 742 may be similar or identical to the first conductive layer 142 explained above. The plurality of gate electrodes of the active device region 708 are electrically connected to the plurality of gate electrodes of the current sensor region 712 through the conductive layer 742 formed over the semiconductor substrate 702. The first conductive layer 742 may be segmented, and a section of the conductive layer 742 may contact both the plurality of gate electrodes of the active device region 708 and the plurality of gate electrodes of the current sensor region 712. The section of the conductive layer 742 may be electrically isolated from the electrodes formed in the supplementary trench 720 and the another supplementary trench 748 through the segmented interlayer dielectric layer 744 formed over the first main surface 704 of the semiconductor substrate 702. In one example, the section of the conductive layer 742 may occupy only a portion of the transition region 716 disposed between the active device region 708 and the current sensor region 712.
[0053] Alternatively, or additionally, as Fig.7D , at least one gate trench 782 of the plurality of gate trenches 710 of the active device region 708 is connected to the intersecting gate trench 780 of the current sensor region 712. Therefore, the plurality of gate electrodes formed in the gate trenches 710 of the active device region 708 are electrically connected to the plurality of gate electrodes formed in the gate trenches 714 of the current sensor region 712 via the at least one gate trench 782 of the plurality of gate trenches 710 of the active device region 708. In the region where the at least one gate trench 782 of the plurality of gate trenches 710 of the active device region 708 is connected to the intersecting gate trench 780, the supplementary trench 720 is not present and the other supplementary trench 748 is not present.
[0054] Fig. 7E The semiconductor device 700 is similar to Fig.7D However, differently, in Fig.7DIn the semiconductor device 700 of FIG. 7 , the at least one gate trench 782 of the plurality of gate trenches 710 of the active device region 708 separates the transition region 716 into a first portion 716_1 of the transition region 716 and another portion 716_2 of the transition region 716. That means, the transition region 716 and the supplementary trenches 720, 728 are partially interrupted to allow gate signal routing.
[0055] In one example, the plurality of emitter trenches 776 of the active device region 708 have at least one of the same width or the same depth as the plurality of emitter trenches 778 of the current sensor region 712. In one example, the supplementary trench 720 and the another supplementary trench 748 have at least one of the same width or the same depth as the plurality of emitter trenches 776 of the active device region 708 or the plurality of emitter trenches 778 of the current sensor region 712. In one example, the intersecting gate trench 780 has at least one of the same width or the same depth as the plurality of gate trenches 710 of the active device region 708 or the plurality of gate trenches 714 of the current sensor region 712. In the case where the trenches have at least one of the same width or the same depth, a regular structure can be achieved and the manufacturing cost of the semiconductor device 700 can be reduced.
[0056] Figures 7A-7E The semiconductor device 700 shown in FIG. 7 is only an example. Figure 7C A conductive layer is formed on the semiconductor substrate 702 similar to the first conductive layer 742 shown in FIG. 1 , and at least a subset of the plurality of gate electrodes of the current sensor region 712 are electrically connected to each other. In this example, there may be no intersecting gate trenches 780 in the current sensor region 712. In one example, by Figure 7C A conductive layer similar to the first conductive layer 742 shown in FIG. Fig. 7A 708 , at least a subset of the plurality of gate electrodes of the active device region 708 are electrically connected to each other by intersecting gate trenches similar to the intersecting gate trenches 780 illustrated in FIG. 708 . In one example, there may be additional trenches extending parallel to and between the gate trenches 710 of the active device region 708 and / or parallel to and between the gate trenches 714 of the current sensor region 712 along the first direction y. The additional trenches may include electrodes configured to float. The additional trenches may be referred to as dummy trenches. In one example, the transition region 716 includes at least one supplemental trench 720.
[0057] Examples of the present invention are summarized here. Other examples can also be understood from the entire specification and claims submitted herein.
[0058] Example 1: A semiconductor device comprises: a semiconductor substrate; an active device region comprising a plurality of gate trenches formed on a first main surface of the semiconductor substrate; a current sensor region comprising a plurality of gate trenches formed on the first main surface of the semiconductor substrate; and a transition region arranged between the active device region and the current sensor region, wherein the transition region comprises supplementary trenches formed on the first main surface of the semiconductor substrate, and wherein the supplementary trenches separate the plurality of gate trenches of the active device region from the plurality of gate trenches of the current sensor region, and wherein electrodes formed in the supplementary trenches are neither electrically connected to gate electrodes formed in the plurality of gate trenches of the active device region nor electrically connected to gate electrodes formed in the plurality of gate trenches of the current sensor region.
[0059] Example 2: The semiconductor device as described in Example 1 further includes: an emitter / source pad formed on the semiconductor substrate and electrically connected to a source region formed in an active device region; a sensing pad formed on the semiconductor substrate and electrically connected to a source region formed in a current sensor region; and a gate pad formed on the semiconductor substrate and electrically connected to the multiple gate electrodes in the active device region and to the multiple gate electrodes in the current sensor region.
[0060] Example 3: The semiconductor device of Example 2, wherein the electrode formed in the supplemental trench is electrically connected to the source region of the active device region.
[0061] Example 4: The semiconductor device of any of Examples 2 or 3, further comprising: a temperature sensor region comprising a temperature sensor device, wherein a first terminal of the temperature sensor device is electrically connected to the sensing pad.
[0062] Example 5: A semiconductor device as described in Example 4, wherein when the gate pad is switched to a first state, the semiconductor device is configured to allow the current in the current sensor area to be measured using the sensing pad, and wherein when the gate pad is switched to a second state, the semiconductor device is also configured to allow the temperature of the semiconductor device to be measured using the sensing pad.
[0063] Example 6: The semiconductor device of Example 5, wherein the first state is an on state and the second state is an off state.
[0064] Example 7: The semiconductor device of any of Examples 4 to 6, wherein the second terminal of the temperature sensor device is electrically connected to the emitter / source pad.
[0065] Example 8: The semiconductor device of any of Examples 4 to 7, wherein the temperature sensor device includes a plurality of diodes coupled in series.
[0066] Example 9: A semiconductor device as described in any of the previous examples, further comprising: another supplementary trench extending parallel to the supplementary trench.
[0067] Example 10 The semiconductor device of any of the preceding examples, wherein the supplementary trench at least partially surrounds the current sensor region.
[0068] Example 11: A semiconductor device as described in any of the previous examples, wherein a current sensor region is embedded in an active device region, and on a first side of the current sensor region, a supplementary trench separates the multiple gate trenches of the active device region from the multiple gate trenches of the current sensor region, and on a second side of the current sensor region opposite to the first side, another supplementary trench separates the multiple gate trenches of the current sensor region from multiple additional gate trenches of the active device region.
[0069] Example 12: The semiconductor device of any of the preceding examples, wherein the plurality of gate trenches of the active device region have at least one of the same width or the same depth as the plurality of gate trenches of the current sensor region.
[0070] Example 13: A semiconductor device as described in any of the preceding examples, wherein the plurality of gate trenches in the active device region extend along a first direction parallel to a first main surface of the semiconductor substrate, the active device region further includes a plurality of emitter trenches extending along the first direction parallel to the gate trenches and between the gate trenches, the plurality of gate trenches in the current sensor region extend along the first direction parallel to the first main surface of the semiconductor substrate, the current sensor region further includes a plurality of emitter trenches extending along the first direction parallel to the gate trenches and between the gate trenches, and the supplementary trench extends at least partially along a second direction orthogonal to the first direction.
[0071] Example 14: The semiconductor device of Example 13, wherein the plurality of emitter trenches of the active device region have at least one of the same width or the same depth as the plurality of emitter trenches of the current sensor region.
[0072] Example 15: The semiconductor device of any of Examples 13 or 14, wherein the supplemental trench has at least one of the same width or the same depth as the plurality of emitter trenches of the active device region or the plurality of emitter trenches of the current sensor region.
[0073] Example 16: The semiconductor device of any one of Examples 13 to 15 further includes: intersecting gate trenches extending at least partially along the second direction and connecting at least a subset of the plurality of gate trenches of the current sensor region to each other.
[0074] Example 17: The semiconductor device of Example 16, wherein the intersecting gate trenches have at least one of a same width or a same depth as the plurality of gate trenches of the active device region or the plurality of gate trenches of the current sensor region.
[0075] Example 18: The semiconductor device of any of Examples 16 or 17, wherein at least one gate trench of the plurality of gate trenches of the active device region is connected to an intersecting gate trench.
[0076] Example 19: The semiconductor device of any of Examples 16 or 17, wherein the plurality of gate electrodes of the active device region are electrically connected to the plurality of gate electrodes of the current sensor region through a conductive layer formed over the semiconductor substrate.
[0077] Example 20: The semiconductor device of any of Examples 13 to 15, wherein at least a subset of the plurality of gate electrodes of the current sensor region are electrically connected to each other by a conductive layer formed over the semiconductor substrate.
[0078] Although the present invention has been described with reference to illustrative examples, such description is not intended to be interpreted in a limiting sense. Various modifications and combinations of the illustrative examples and other examples of the present invention will be apparent to those skilled in the art upon reference to the description. Therefore, it is intended that the appended claims cover any such modifications or examples.
Claims
1. A semiconductor device (100, 200, 300, 400, 500, 600, 700), comprising: A semiconductor substrate (102, 702); An active device region (108, 208, 308, 408, 708) comprising a plurality of gate trenches (110, 210, 710) formed on a first major surface (104, 704) of the semiconductor substrate (102, 702); a current sensor region (112, 212, 312, 412, 612, 712) comprising a plurality of gate trenches (114, 214, 714) formed on the first main surface (104, 704) of the semiconductor substrate (102, 702); and A transition region (116, 216, 316, 416, 716) disposed between the active device region (108, 208, 308, 408, 708) and the current sensor region (112, 212, 312, 412, 612, 712), wherein the transition region (116, 216, 316, 416, 716) comprises a supplementary trench (120, 220, 320, 420, 720) formed at the first main surface (104, 704) of the semiconductor substrate (102, 702), and wherein the supplementary trench (120, 220, 320, 420, 720) separates the plurality of gate trenches (110, 210, 710) of the active device region (108, 208, 308, 408, 708) from the plurality of gate trenches (114, 214, 714) of the current sensor region (112, 212, 312, 412, 612, 712), and The electrode (130) formed in the supplemental trench (120, 220, 320, 420, 720) is neither electrically connected to the gate electrode (126) formed in the plurality of gate trenches (110, 210, 710) in the active device region (108, 208, 308, 408, 708) nor electrically connected to the gate electrode (122) formed in the plurality of gate trenches (114, 214, 714) in the current sensor region (112, 212, 312, 412, 612, 712).
2. The semiconductor device (100, 200, 300, 400, 500, 600, 700) according to claim 1, further comprising: an emitter / source pad (E) formed on the semiconductor substrate (102, 702) and electrically connected to a source region formed in the active device region (108, 208, 308, 408, 708); a sensing pad (S) formed on the semiconductor substrate (102, 702) and electrically connected to a source region (134) formed in the current sensor region (112, 212, 312, 412, 612, 712); and A gate pad (G) is formed on the semiconductor substrate (102, 702) and is electrically connected to the plurality of gate electrodes (126) of the active device region (108, 208, 308, 408, 708) and to the plurality of gate electrodes (122) of the current sensor region (112, 212, 312, 412, 612, 712).
3. The semiconductor device (100, 200, 300, 400, 500, 600, 700) of claim 2, wherein the electrode (130) formed in the supplemental trench (120, 220, 320, 420, 720) is electrically connected to the source region of the active device region (108, 208, 308, 408, 708).
4. The semiconductor device (500, 600) according to any one of claims 2 or 3, further comprising: A temperature sensor region (674) includes a temperature sensor device (556), wherein a first terminal of the temperature sensor device (556) is electrically connected to the sensing pad (S).
5. The semiconductor device (500, 600) of claim 4, wherein when the gate pad (G) is switched to a first state, the semiconductor device (100, 200, 300, 400, 500, 600, 700) is configured to allow the current in the current sensor region (112, 212, 312, 412, 612, 712) to be measured using the sensing pad (S), and wherein when the gate pad (G) is switched to a second state, the semiconductor device (100, 200, 300, 400, 500, 600, 700) is further configured to allow the temperature of the semiconductor device (100, 200, 300, 400, 500, 600, 700) to be measured using the sensing pad (S).
6. The semiconductor device (500, 600) according to claim 5, wherein the first state is an on-state, and the second state is an off-state.
7. The semiconductor device (500, 600) of any one of claims 4 to 6, wherein a second terminal of the temperature sensor device (556) is electrically connected to the emitter / source pad (E).
8. The semiconductor device (500, 600) of any one of claims 4 to 7, wherein the temperature sensor device (556) comprises a plurality of diodes coupled in series.
9. The semiconductor device (300) as claimed in any one of the preceding claims, further comprising: Another supplementary groove (348, 748) extends parallel to the supplementary groove (320).
10. The semiconductor device (400) as claimed in any one of the preceding claims, wherein the supplementary trench (420) at least partially surrounds the current sensor region (412).
11. The semiconductor device (100, 200, 300, 400, 500, 600, 700) as claimed in any one of the preceding claims, wherein The current sensor region (112, 212, 312, 412, 612, 712) is embedded in the active device region (108, 208, 308, 408, 708), The supplementary trenches (120, 220, 320, 420, 720) separate the plurality of gate trenches (110, 210, 710) of the active device region (108, 208, 308, 408, 708) from the plurality of gate trenches (114, 214, 714) of the current sensor region (112, 212, 312, 412, 612, 712), and At a second side (S2) of the current sensor region (112, 212, 312, 412, 612, 712) opposite to the first side (S1), another supplementary trench separates the plurality of gate trenches (114, 214, 714) of the current sensor region (112, 212, 312, 412, 612, 712) from a plurality of additional gate trenches (110, 210, 710) of the active device region (108, 208, 308, 408, 708).
12. The semiconductor device (100, 200, 300, 400, 500, 600, 700) of any of the preceding claims, wherein the plurality of gate trenches (110, 210, 710) of the active device region (108, 208, 308, 408, 708) have at least one of the same width or the same depth as the plurality of gate trenches (114, 214, 714) of the current sensor region (112, 212, 312, 412, 612, 712).
13. A semiconductor device (700) as claimed in any one of the preceding claims, wherein The plurality of gate trenches (710) of the active device region (708) extend along a first direction (y) parallel to the first main surface (704) of the semiconductor substrate (702), The active device region (708) further includes a plurality of emitter trenches (776) extending parallel to the gate trenches (710) and between the gate trenches (710) along the first direction (y). The plurality of gate trenches (714) of the current sensor region (712) extend along the first direction (y) parallel to the first main surface (704) of the semiconductor substrate (702), The current sensor region (712) further includes a plurality of emitter trenches (778) extending parallel to the gate trenches (714) and between the gate trenches (714) along the first direction (y), and The supplementary groove (720) extends at least partially along a second direction (x) orthogonal to the first direction (y).
14. The semiconductor device (700) of claim 13, wherein the plurality of emitter trenches (776) of the active device region (708) have at least one of the same width or the same depth as the plurality of emitter trenches (778) of the current sensor region (712).
15. The semiconductor device (700) of any one of claims 13 or 14, wherein the supplemental trench (720) has at least one of the same width or the same depth as the plurality of emitter trenches (776) of the active device region (708) or the plurality of emitter trenches (778) of the current sensor region (712).
16. The semiconductor device (700) according to any one of claims 13 to 15, further comprising: Intersecting gate trenches (780) extend at least partially along the second direction (x) and connect at least a subset of the plurality of gate trenches (714) of the current sensor region (112, 212, 312, 412, 612, 712) to each other.
17. The semiconductor device (700) of claim 16, wherein the intersecting gate trenches (780) have at least one of the same width or the same depth as the plurality of gate trenches (710) of the active device region (708) or the plurality of gate trenches (714) of the current sensor region (712).
18. The semiconductor device (700) of any one of claims 16 or 17, wherein at least one gate trench (782) of the plurality of gate trenches (710) of the active device region (708) is connected to the intersecting gate trench (780).
19. The semiconductor device (700) of any one of claims 16 or 17, wherein the plurality of gate electrodes of the active device region (708) are electrically connected to the plurality of gate electrodes of the current sensor region (712) via a conductive layer (742) formed over the semiconductor substrate (702).
20. The semiconductor device (700) of any one of claims 13 to 15, wherein at least a subset of the plurality of gate electrodes of the current sensor region (712) are electrically connected to each other via a conductive layer formed over the semiconductor substrate (702).
