Server power supply heat dissipation device

Abstract

The utility model relates to the technical field of servers, in particular to a server power supply heat dissipation device, which comprises a CPLD (complex programmable logic device) arranged on a power supply backboard and connected with a BMC (baseboard management controller) through an I2C (inter-integrated circuit) link; the CPLD is connected with a first port of the multiplexer, and the BMC is connected with a second port of the multiplexer; a third port of the multiplexer is connected with the power management bus; the CPLD is connected with a control pin of the multiplexer so as to control the multiplexer to communicate the first port to the third port or communicate the second port to the third port; the power management bus is connected with a voltage sensor and a current sensor which are arranged at the downstream of the power converter; and the CPLD is connected with the power supply fan driving chip.

Description

Technical Field

[0001] The utility model belongs to the technical field of servers, and in particular relates to a server power supply heat dissipation device. Background Art

[0002] BMC is a microprocessor used for remote monitoring and management of servers. It can be accessed remotely through a dedicated network and has multiple connections to the host system, enabling it to monitor server hardware, component temperature, fan control status, and record server logs through BMC.

[0003] In traditional servers, when the BMC fails, other controllers adjust the fans to full speed. This method is mostly used for servers inside the chassis. All fans running at full speed result in high energy consumption and high vibration environment, which is not conducive to the operation of the server. In addition, for AI servers equipped with a large number of GPUs, it is necessary to respond quickly to fan takeover, especially for the power supply. If the BMC failure is not discovered in time or the fan speed is not adjusted in time, it is likely to cause the server to crash. Utility Model Content

[0004] In view of the above-mentioned deficiencies in the prior art, the utility model provides a server power supply heat dissipation device to solve the above-mentioned technical problems.

[0005] The utility model provides a server power supply heat dissipation device, comprising:

[0006] A CPLD is arranged on the power backplane, the CPLD is connected to the BMC via an I2C link; the CPLD is connected to a first port of a multiplexer, the BMC is connected to a second port of the multiplexer; and a third port of the multiplexer is connected to a power management bus;

[0007] The CPLD is connected to a control pin of the multiplexer to control the multiplexer to connect the first port to the third port or connect the second port to the third port;

[0008] The power management bus is connected to a voltage sensor and a current sensor disposed downstream of the power converter;

[0009] The CPLD is connected to the power supply fan driver chip.

[0010] In an optional implementation, a MOS tube is provided upstream of the power converter, and a gate of the MOS tube is connected to the CPLD.

[0011] In an optional implementation, the CPLD is connected to a chip potentiometer of a GPU backplane via a potential signal line to select a reference rotation speed based on a potential signal of the GPU backplane.

[0012] In an optional implementation, the CPLD is respectively connected to communicate with a plurality of power supply fan driving chips, and the plurality of power supply fan driving chips respectively control the rotation speed of the corresponding power supply fan.

[0013] In an optional implementation, the CPLD is connected to the power fan driver chip via an I2C bus.

[0014] In an optional implementation, the slave device of the power management bus includes a voltage sensor and a current sensor, the voltage sensor detects the voltage of the output port of the power converter, and the current sensor detects the current of the output port of the power converter.

[0015] In an optional implementation, the power converter includes a buck chip.

[0016] In an optional embodiment, the device also includes a watchdog timer, which is installed in the CPLD and is used to periodically generate signal pulses. The CPLD sends the signal pulses generated by the watchdog timer to the BMC and waits for a response signal from the BMC to the signal pulses.

[0017] In an optional implementation, the CPLD includes a timer, and the CPLD determines a timeout condition of the response signal based on timing data of the timer.

[0018] In an optional implementation, the CPLD is connected to a control pin of the multiplexer via a serial port line.

[0019] The beneficial effect of the utility model is that the server power cooling device provided by the utility model establishes a parallel cooling control architecture of BMC and power backplane CPLD, timely sends BMC faults and responds quickly, CPLD takes over the cooling control of the power fan, and adjusts the speed of the power fan based on the power load, thereby ensuring the cooling control stability of the server power supply.

[0020] In addition, the utility model has a reliable design principle, a simple structure and a very broad application prospect. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the utility model or the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0022] Figure 1It is a schematic architecture diagram of a server power supply heat dissipation device according to an embodiment of the utility model. DETAILED DESCRIPTION

[0023] In order to enable those skilled in the art to better understand the technical solutions in the present invention, the following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0024] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0025] The key terms appearing in the present invention are explained below.

[0026] BMC, the server remote management controller, is called Baseboard Management Controller in English. It can perform firmware upgrades, check machine equipment, and other operations on the machine when the machine is not turned on. Fully implementing IPMI functions in BMC requires a powerful 16-bit or 32-bit microcontroller, RAM for data storage, flash memory for non-volatile data storage, and firmware, which can provide basic remote manageability in terms of safe remote restart, safe power-on, LAN warning, and system health monitoring. In addition to basic IPMI functions and system operation monitoring functions, mBMC can also realize the selection and protection of BIOS fast components by using one of the two flash memories to store the previous BIOS. For example, when the system cannot be started after a remote BIOS upgrade, the remote administrator can switch back to the previously working BIOS image to start the system. Once the BIOS is upgraded, the BIOS image can also be locked to effectively prevent viruses from invading it.

[0027] The I2C link is a simple, bidirectional, two-wire synchronous serial bus developed by Philips. It only requires two wires to transmit information between devices connected to the bus. The master device is used to start the bus to transmit data and generate a clock to open the transmitting device. At this time, any addressed device is considered a slave device. The relationship between the master and slave, send and receive on the bus is not constant, but depends on the data transmission direction at this time. If the host wants to send data to the slave device, the host first addresses the slave device, then actively sends data to the slave device, and finally the host terminates the data transmission; if the host wants to receive data from the slave device, the master device first addresses the slave device. Then the host receives the data sent by the slave device, and finally the host terminates the receiving process. In this case, the host is responsible for generating the timing clock and terminating the data transmission.

[0028] A graphics processing unit (GPU), also known as a display core, visual processor, or display chip, is a microprocessor that is specifically used to perform image and graphics-related calculations on personal computers, workstations, game consoles, and some mobile devices (such as tablets, smart phones, etc.).

[0029] CPLD (Complex Programmable Logic Device) is the abbreviation of Complex PLD, a more complex logic element than PLD. CPLD is a digital integrated circuit that users can construct logic functions according to their own needs. Its basic design method is to use the integrated development software platform, schematic diagram, hardware description language and other methods to generate the corresponding target file, and transfer the code to the target chip through the download cable ("in-system" programming) to realize the designed digital system.

[0030] PCI-Express (Peripheral Component Interconnect Express) is a high-speed serial computer expansion bus standard. Its original name was "3GIO". It was proposed by Intel in 2001 to replace the old PCI, PCI-X and AGP bus standards. PCIe SW Board is a PCIe conversion backplane or PCIe adapter board.

[0031] HMC chip potentiometer.

[0032] SKU stands for Stock Keeping Unit, which is the basic unit for measuring inventory in and out, and can be in units of pieces, boxes, pallets, etc. SKU id means the inventory unit code.

[0033] PDB Power Backplane.

[0034] PM BUS Power Management Bus.

[0035] In order to facilitate the understanding of the present invention, the server power supply heat dissipation device provided by the present invention is further described below based on the principle of the server power supply heat dissipation device of the present invention in combination with an embodiment.

[0036] For details, please refer to Figure 1 , the server power supply heat dissipation device comprises:

[0037] A CPLD is arranged on the power backplane, and the CPLD is connected to the BMC via an I2C link; the CPLD is connected to the first port of the multiplexer, and the BMC is connected to the second port of the multiplexer; the third port of the multiplexer is connected to the power management bus; the CPLD is connected to the control pin of the multiplexer to control the multiplexer to connect the first port to the third port or connect the second port to the third port; the power management bus is connected to a voltage sensor and a current sensor arranged downstream of the power converter; the CPLD is connected to the power fan driver chip.

[0038] A watchdog timer is installed on the CPLD, and the watchdog timer is used to periodically generate a signal pulse. The CPLD sends the signal pulse generated by the watchdog timer to the BMC, and waits for the BMC's response signal to the signal pulse. The CPLD includes a timer, and the CPLD judges the timeout of the response signal based on the timing data of the timer. The CPLD is connected to the control pin of the multiplexer through a serial port line so as to send the control signal to the control pin of the multiplexer in time, and then take over the fan in time when the BMC fails. Specifically, the CPLD sends a feeding signal to the BMC through an I2C link, and if the BMC's response information is not received, the BMC is determined to be faulty. After confirming that the BMC is faulty, the CPLD controls the multiplexer to connect the first port to the third port, so that the CPLD obtains control of the power supply fan. When the CPLD receives the BMC's response information to the feeding signal again, it is confirmed that the BMC has returned to normal, and the CPLD controls the multiplexer to connect the second port to the third port, returning the control of the power supply fan to the BMC.

[0039] The slave devices of the power management bus include voltage sensors and current sensors. The voltage sensor detects the voltage of the output port of the power converter, and the current sensor detects the current of the output port of the power converter. The power converter includes a step-down chip. The detection point is set downstream of the power converter, that is, the output voltage and current of the power supply are detected. The power management bus is used as a transmission link, which makes full use of the wide adaptability of the power management bus, without adding other connection links and occupying the interface of the CPLD.

[0040] If the server power supply has multiple fans, the CPLD is connected to multiple power supply fan driver chips for communication respectively, and the multiple power supply fan driver chips respectively control the speed of the corresponding power supply fans. The CPLD is connected to the power supply fan driver chip via an I2C bus.

[0041] After CPLD takes over the power supply fan, it obtains the voltage and current data collected by the voltage sensor and the current sensor, uses the fuzzy control program to generate the target speed based on the voltage and current data as input parameters, and sends the target speed to the power supply fan driver chip. The power supply fan driver chip adjusts the fan speed by adjusting the duty cycle.

[0042] A MOS tube is installed upstream of the power converter, and the gate of the MOS tube is connected to the CPLD. Since the CPLD continuously receives the voltage and current output by the power converter, the CPLD can monitor the power status. Once the voltage and current exceed the standard threshold range, the CPLD sends a potential signal to the MOS tube to disconnect the MOS tube to avoid overcurrent damage to the server power supply.

[0043] In addition, the CPLD is connected to a chip potentiometer of a GPU backplane through a potential signal line to select a reference rotation speed based on the potential signal of the GPU backplane.

[0044] Specifically, for AI servers equipped with GPUs, the GPU platform includes multiple versions of GPU platforms, such as NVIDIA's Delta and Delta-Next. The HMC_PRSNT_N signal of the HMC module on the NVIDIA Delta-Next GPU board is low potential, and the high and low potentials are used as the basis for the system SKU ID to distinguish the two GPU platform configurations. When the GPU platform is NVIDIA Delta, the HMC_PRSNT_N signal is high potential. Since different versions of GPUs have different energy consumption, after the CPLD identifies the GPU version based on the high and low potentials, it retrieves the reference speed corresponding to the version from the register and inputs the reference speed into the fuzzy control program. Here, the reference speed is equivalent to the weight.

[0045] Although the utility model is described in detail by referring to the accompanying drawings and in combination with the preferred embodiments, the utility model is not limited thereto. Without departing from the spirit and essence of the utility model, ordinary technicians in the field can make various equivalent modifications or substitutions to the embodiments of the utility model, and these modifications or substitutions should be within the scope of the utility model / any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed by the utility model, which should be included in the protection scope of the utility model. Therefore, the protection scope of the utility model shall be based on the protection scope of the claims.

Claims

1. A server power supply heat dissipation device, characterized in that: include: A CPLD is arranged on the power backplane, and the CPLD is connected to the BMC via an I2C link; The CPLD is connected to a first port of the multiplexer, and the BMC is connected to a second port of the multiplexer; The third port of the multiplexer is connected to the power management bus; The CPLD is connected to a control pin of the multiplexer to control the multiplexer to connect the first port to the third port or connect the second port to the third port; The power management bus is connected to a voltage sensor and a current sensor disposed downstream of the power converter; The CPLD is connected to a power supply fan driver chip; The CPLD is connected to a chip potentiometer of a GPU backplane via a potential signal line to select a reference speed based on a potential signal of the GPU backplane; The CPLD is respectively connected to a plurality of power supply fan driving chips for communication, and the plurality of power supply fan driving chips respectively control the rotation speed of the corresponding power supply fan; The CPLD is connected to the power supply fan driver chip via an I2C bus.

2. The server power supply heat dissipation device according to claim 1, characterized in that: A MOS tube is provided upstream of the power converter, and a gate of the MOS tube is connected to the CPLD.

3. The server power supply heat dissipation device according to claim 1, characterized in that: The slave device of the power management bus includes a voltage sensor and a current sensor. The voltage sensor detects the voltage of the output port of the power converter, and the current sensor detects the current of the output port of the power converter.

4. The server power supply heat dissipation device according to claim 3, characterized in that: The power converter includes a step-down chip.

5. The server power supply heat dissipation device according to claim 1, characterized in that: The device also includes a watchdog timer, which is installed in the CPLD and is used to periodically generate signal pulses. The CPLD sends the signal pulses generated by the watchdog timer to the BMC and waits for a response signal from the BMC to the signal pulses.

6. The server power supply heat dissipation device according to claim 5, characterized in that: The CPLD includes a timer, and the CPLD determines a timeout condition of the response signal based on timing data of the timer.

7. The server power supply heat dissipation device according to claim 1, characterized in that: The CPLD is connected to the control pin of the multiplexer through a serial port line.

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