Method for outputting voltage phase by phase-locked loop under non-ideal power grid voltage

Abstract

The invention belongs to the technical field of power control, and particularly relates to a method for a phase-locked loop to output a voltage phase under non-ideal power grid voltage, which comprises the following steps of: performing analog-to-digital conversion on a collected three-phase power grid voltage signal, and arranging the three-phase power grid voltage signal after analog-to-digital conversion on a three-phase static coordinate system; clark transformation is carried out on the three-phase power grid voltage signal after analog-to-digital conversion, and positive and negative sequence separation and positive sequence component extraction are carried out through a quasi-resonance controller and a second-order generalized integrator in sequence; park transformation is carried out on the extracted positive sequence component, a direct current component in a synchronous rotating coordinate system is processed through a proportional-integral controller and a remainder controller, and a voltage phase with the voltage frequency being 50 Hz is output. According to the method, the 50Hz positive sequence voltage component under the non-ideal power grid voltage can be accurately extracted and locked, so that the phase locking precision and stability of the phase-locked loop are remarkably improved.

Description

Technical Field

[0001] The invention belongs to the technical field of power control, and in particular relates to a method for outputting a voltage phase of a phase-locked loop under a non-ideal grid voltage. Background Art

[0002] The development trend of clean energy generation such as photovoltaic and wind power has also brought about profound changes in the structure and operation characteristics of the power grid. In particular, the application of a high proportion of power electronic switching devices in the process of large-scale new energy power generation has gradually shifted the power grid system from being dominated by traditional thermal power steam turbine units to a more complex and changeable non-ideal power grid form.

[0003] In a non-ideal grid environment, the grid voltage exhibits a variety of non-ideal characteristics, such as DC components, subsynchronous harmonic components, high-order harmonic components, and negative sequence components. These non-ideal characteristics bring great challenges to the stable operation of the generator set, especially the phase-locked loop (PLL), which is the key link for the synchronous operation of the generator set and the grid, and its performance directly affects the accuracy of the output voltage phase of the generator set.

[0004] In the prior art, the traditional phase-locked loop design is mainly based on ideal grid conditions, that is, the grid voltage is a pure sine wave without any non-ideal components. However, in the actual non-ideal grid environment, the traditional phase-locked loop often cannot accurately lock the phase of the power frequency voltage, resulting in the generator set not being able to work properly, and may even cause grid failure. This problem is particularly prominent today as the proportion of renewable energy power generation is increasing. Summary of the invention

[0005] In view of the above-mentioned deficiencies in the prior art, the present invention provides a method for outputting a voltage phase of a phase-locked loop under a non-ideal grid voltage to solve the above-mentioned technical problems.

[0006] A method for phase-locked loop output voltage phase under non-ideal grid voltage, comprising: Performing analog-to-digital conversion on the collected three-phase grid voltage signal, and arranging the analog-to-digital converted three-phase grid voltage signal on a three-phase stationary coordinate system; Performing Clarke transformation on the three-phase grid voltage signal after analog-to-digital conversion, so that the AC component of the three-phase grid voltage signal after analog-to-digital conversion in a three-phase stationary coordinate system is converted into an AC component in a two-phase stationary coordinate system; The AC component in the two-phase stationary coordinate system is extracted through a quasi-resonant controller with a voltage frequency of 50Hz for positive and negative sequence voltage components; The positive and negative voltage sequence components with a voltage frequency of 50 Hz are separated into positive and negative sequences and the positive sequence components are extracted by a second-order generalized integrator. Perform Park transformation on the extracted positive sequence component to convert the AC component in the two-phase stationary coordinate system into the DC component in the synchronous rotating coordinate system; The DC component in the synchronous rotating coordinate system is processed by a proportional-integral controller and a modulo controller, and the output voltage frequency is a voltage phase of 50 Hz.

[0007] A further improvement of the technical solution is that the Clarke coordinate transformation matrix of the three-phase grid voltage signal after analog-to-digital conversion is: .

[0008] A further improvement of the technical solution is that the transfer function of the quasi-resonant controller is: ; Among them, K R ,ω c , ω0 are the amplitude gain, cutoff angular frequency and resonant angular frequency of the quasi-resonant controller respectively; s is the Laplace operator.

[0009] A further improvement of the technical solution is that the resonant angular frequency ω0 is 2*π*50 rad / s; K R =1;ω c =3rad / s.

[0010] A further improvement of the technical solution is that the decomposition transformation matrix for realizing positive and negative sequence separation is: ; in, for e j2π / 3 , j is the imaginary factor.

[0011] Further improvements of this technical solution include: the two-phase stationary coordinate system - Positive sequence component of voltage below the axis for: ; in: T 3s / 2s is the Clarke coordinate transformation matrix; u abc is the three-phase grid voltage; u αβ is the AC component of the grid voltage in the two-phase stationary coordinate system; q is the rotation factor, which delays the voltage signal by 90° in the time domain, q=e -jπ / 2 .

[0012] A further improvement of the technical solution is that the grid voltage component of the q axis in the two-phase rotating coordinate system is adjusted by a PI controller in the proportional integral controller. =0, so that the grid voltage vector is projected onto the d-axis, and the grid voltage component of the d-axis in the two-phase rotating coordinate system is obtained. .

[0013] A further improvement of the technical solution is that the estimated value ω of the electrical angular velocity of the power grid is integrated by an integrator 1 / s in a proportional-integral controller.

[0014] A further improvement of the technical solution is that the signal output by the integrator 1 / s is modulo 2π by the modulo controller, so that the phase estimation value θ output by the integrator PLL Located between [0, 2π].

[0015] The beneficial effect of the present invention lies in that the present invention converts the collected three-phase grid voltage signal into digital form and arranges it in a three-phase stationary coordinate system, and then undergoes a series of processing such as Clarke transformation, quasi-resonant controller extraction, second-order generalized integrator positive and negative sequence separation, and Park transformation. The method can accurately extract and lock the 50Hz positive sequence voltage component under the non-ideal grid voltage, thereby significantly improving the phase locking accuracy and stability of the phase-locked loop.

[0016] In addition, the invention has a reliable design principle, a simple structure and a very broad application prospect. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0018] Figure 1 Schematic diagram of the relationship of a traditional three-phase phase-locked loop.

[0019] Figure 2 This is the output result diagram of PLL under ideal grid voltage conditions.

[0020] Figure 3 This is the output result diagram of PLL under non-ideal grid voltage conditions.

[0021] Figure 4 The present invention is a schematic flow chart of a method according to an embodiment of the present invention.

[0022] Figure 5 Bode plot of the quasi-resonant controller.

[0023] Figure 6 This is the schematic diagram of a second-order generalized integrator.

[0024] Figure 7 This is a schematic diagram of the relationship of the improved phase-locked loop.

[0025] Figure 8This is the output result diagram of the improved phase-locked loop under non-ideal grid voltage conditions. DETAILED DESCRIPTION

[0026] In order to enable those skilled in the art to better understand the technical solutions in the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used in the specification of the present invention herein are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0028] like Figure 1 As shown in the figure, the traditional three-phase phase-locked loop grid voltage processing process is as follows: first, the grid voltage signal collected by the voltage transformer is converted from the AC component in the three-phase stationary coordinate system to the AC component in the two-phase stationary coordinate system through Clarke transformation; secondly, the AC component in the two-phase stationary coordinate system is converted into the DC component in the synchronous rotating coordinate system through Park transformation, and then the phase of the grid power frequency voltage is output through proportional integral and modulus controllers. Among them, u gabc is the three-phase voltage value of the power grid collected by the voltage transformer (collected by the voltage transformer); 3s / 2s is the Clarke transformation; u gα 、u gβ is the grid voltage value under the α-β axis of the two-phase stationary coordinate system; 2s / 2r is the Park transformation; u gd 、u gq is the grid voltage value under the dq axis of the two-phase rotating coordinate system; PI is the proportional integral controller; ω ref is the electrical angular velocity of the power frequency voltage; ω is the estimated value of the electrical angular velocity; s is the Laplace operator; 1 / s is the integral link; π is the circumference of a circle; mod is the modulo module; θ PLL It is the grid voltage phase estimation value output by the phase-locked loop.

[0029] The ideal grid voltage expression is: ; Among them, u ga 、u gb 、u gc are the three-phase voltages of the ideal grid voltage respectively; U0, ω0 and φ0 are the effective value, electrical angular velocity and initial phase of the ideal grid voltage respectively.

[0030] When the grid voltage is ideal, the PLL (Phase-Locked Loop) is very stable in locking the grid voltage. Figure 2 As shown, the d-axis voltage is stable at 563V, the q-axis voltage is stable at 0V, and the electrical angular velocity is stable at 314rad / s.

[0031] In a non-ideal grid environment, the grid voltage exhibits a variety of non-ideal characteristics, such as DC components, subsynchronous harmonic components, higher harmonic components, and negative sequence components; higher harmonic components, negative sequence components, subsynchronous harmonic components, and unbalanced DC components are added to the ideal grid voltage. The expression of non-ideal grid voltage is: ; in, u ’ ga , u ’ gb , u ’ gc are the three-phase voltages of non-ideal grid voltages; U xn , ω xn and φ xn are the amplitude, electrical angular velocity and initial phase of the high-order harmonic voltage components respectively; U - , φ - are the amplitude and initial phase of negative sequence voltage respectively; U sso , ω sso and φ sso are the amplitude, electrical angular velocity and initial phase of the subsynchronous harmonic voltage component respectively; C 1. C 2. C 3 are the unbalanced DC components of the three-phase grid voltage.

[0032] like Figure 3 As shown in the figure, it can be seen that in the case of non-ideal grid voltage, the control effect of the phase-locked loop deteriorates, the q-axis component cannot be 0, and the output electrical angular velocity estimate cannot be maintained at 314rad / s, which ultimately causes the phase of the phase-locked loop output to be different from the phase of the power frequency grid voltage. Therefore, in order to avoid the phase-locked loop being affected by non-ideal components during the phase-locking process, it is urgent to propose an improved phase-locked loop to extract the power frequency positive sequence voltage component from the non-ideal grid voltage.

[0033] like Figure 4 As shown, the present invention provides a method for outputting a voltage phase of a phase-locked loop under a non-ideal grid voltage, comprising: Step 410, performing analog-to-digital conversion on the collected three-phase grid voltage signal, and arranging the analog-to-digital converted three-phase grid voltage signal on a three-phase stationary coordinate system; Step 420, performing Clarke transformation on the analog-to-digital converted three-phase grid voltage signal, so that the AC component of the analog-to-digital converted three-phase grid voltage signal in the three-phase stationary coordinate system is converted into the AC component in the two-phase stationary coordinate system; Step 430, extracting positive and negative sequence voltage components with a voltage frequency of 50 Hz from the AC components in the two-phase stationary coordinate system through a quasi-resonant controller; Step 440, the extracted positive and negative voltage sequence components with a voltage frequency of 50 Hz are separated into positive and negative sequences by a second-order generalized integrator, and the positive sequence component is extracted; Step 450, performing Park transformation on the extracted positive sequence component to convert the AC component in the two-phase stationary coordinate system into a DC component in the synchronous rotating coordinate system; Step 460 , the DC component in the synchronous rotating coordinate system is processed by a proportional-integral controller and a modulo controller, and the output voltage frequency is a voltage phase of 50 Hz.

[0034] Specifically, the Clarke coordinate transformation matrix of the three-phase grid voltage signal after analog-to-digital conversion is: .

[0035] In addition, the transfer function of the quasi-resonant controller is: ; Among them, K R ,ω c , ω0 are the amplitude gain, cutoff angular frequency and resonant angular frequency of the quasi-resonant controller respectively; s is the Laplace operator.

[0036] In order to understand the characteristics of the quasi-resonant controller, the resonant frequency f0 is designed to be 50 Hz, that is, the resonant angular frequency ω0 is 2*π*50 rad / s; K R =1;ω c =3rad / s. Based on the above parameters, we can draw the following Figure 5The Bode diagram of the quasi-resonant controller shown in the figure. The quasi-resonant controller allows the AC component at its resonant angular frequency to pass through and filters out the AC component that deviates greatly from its resonant angular frequency. The characteristic of the quasi-resonant controller for extracting specific frequencies can be used to screen out the positive and negative sequence components with a frequency of 50Hz in the grid voltage. In this way, the influence of high-order harmonic components, sub-synchronous components, and DC components on the phase-locked loop can be avoided. In addition, choosing to add a quasi-resonant controller after the Clarke transform saves one quasi-resonant controller compared to adding a quasi-resonant controller before the Clarke transform. The present invention only needs to add two quasi-resonant controllers after the Clarke transform.

[0037] After the Clarke transformed signal passes through the quasi-resonant controller, only the positive and negative sequence components with a frequency of 50Hz remain. Therefore, the next step is to eliminate the negative sequence component to achieve the extraction of the 50Hz positive sequence voltage. Figure 6 The second-order generalized integrator shown.

[0038] It can be understood that, using the symmetrical component method, the positive sequence component of the grid voltage u + abc It can be expressed as: ; Among them, u abc is the three-phase grid voltage value (the grid voltage collected by the voltage transformer after analog-to-digital conversion); in,[ T + ]To realize the decomposition transformation matrix of positive and negative sequence separation, the decomposition transformation matrix is: ; in, for e j2π / 3 , j is the imaginary factor.

[0039] Therefore, the two-phase stationary coordinate system - Positive sequence component of voltage below the axis for: ; in, T 3s / 2s is the Clarke coordinate transformation matrix; u abc is the three-phase grid voltage; u αβ is the AC component of the grid voltage in the two-phase stationary coordinate system; q is the rotation factor, which delays the voltage signal by 90° in the time domain, q=e -jπ / 2 .

[0040] In order to extract the positive sequence component in the a-β coordinate system, the input signal needs to be phase shifted by 90°. It is understandable that the 90° phase angle shift based on the sinusoidal signal can adopt schemes such as periodic delay, differentiation and all-pass filter, but such schemes respond slowly to frequency changes. Therefore, the present invention adopts the following method: Figure 6 The second-order generalized integrator shown in FIG. 1 is used to realize the above-mentioned operation, thereby extracting the power frequency voltage component from the non-ideal grid voltage.

[0041] The present invention is based on the traditional phase-locked loop, and adds a quasi-resonant controller and a second-order generalized integrator between Clarke transformation and Park transformation to process the grid voltage signal. The improved phase-locked loop is as follows: Figure 7 as shown; Figure 8 As shown in the figure, the voltage under the dq axis of the improved phase-locked loop synchronous rotating coordinate system has no oscillation, and the q axis voltage quickly stabilizes at 0, which is convenient for the normal operation of the subsequent phase-locked link. Furthermore, the estimated value of the electrical angular velocity quickly stabilizes at 314 rad / s, which is consistent with Figure 3 Compared with the control effect of traditional phase-locked loop, it has obvious advantages and provides a guarantee for the final phase-locked link to accurately lock the power frequency voltage component.

[0042] Among them, the grid voltage component of the q axis in the two-phase rotating coordinate system is adjusted by the PI controller in the proportional integral controller. =0, so that the grid voltage vector is projected onto the d-axis, and the grid voltage component of the d-axis in the two-phase rotating coordinate system is obtained. ; The estimated value of the electrical angular velocity of the power grid is integrated by the integrator 1 / s in the proportional integral controller; the signal output by the integrator 1 / s is modulo 2π by the modulo controller, so that the phase estimate θ output by the integrator PLL Located between [0, 2π].

[0043] Although the present invention has been described in detail with reference to the accompanying drawings and in combination with the preferred embodiments, the present invention is not limited thereto. Without departing from the spirit and essence of the present invention, a person of ordinary skill in the art may make various equivalent modifications or substitutions to the embodiments of the present invention, and these modifications or substitutions shall be within the scope of the present invention. Any person of ordinary skill in the art may easily think of changes or substitutions within the technical scope disclosed by the present invention, and these shall be within the scope of protection of the present invention.

Claims

1. A method for phase-locked loop output voltage phase under non-ideal grid voltage, characterized in that: include: Performing analog-to-digital conversion on the collected three-phase grid voltage signal, and arranging the analog-to-digital converted three-phase grid voltage signal on a three-phase stationary coordinate system; Performing Clarke transformation on the three-phase grid voltage signal after analog-to-digital conversion, so that the AC component of the three-phase grid voltage signal after analog-to-digital conversion in a three-phase stationary coordinate system is converted into an AC component in a two-phase stationary coordinate system; The AC component in the two-phase stationary coordinate system is extracted through a quasi-resonant controller with a voltage frequency of 50Hz for positive and negative sequence voltage components; The positive and negative voltage sequence components with a voltage frequency of 50 Hz are separated into positive and negative sequences and the positive sequence components are extracted by a second-order generalized integrator. Perform Park transformation on the extracted positive sequence component to convert the AC component in the two-phase stationary coordinate system into the DC component in the synchronous rotating coordinate system; The DC component in the synchronous rotating coordinate system is processed by a proportional-integral controller and a modulo controller, and the output voltage frequency is a voltage phase of 50 Hz.

2. The method for phase-locked loop output voltage phase under non-ideal grid voltage according to claim 1, characterized in that: The Clarke coordinate transformation matrix of the three-phase grid voltage signal after analog-to-digital conversion is: 。 3. The method for phase-locked loop output voltage phase under non-ideal grid voltage according to claim 1, characterized in that: The transfer function of the quasi-resonant controller is: ； Among them, K R ,ω c , ω0 are the amplitude gain, cutoff angular frequency and resonant angular frequency of the quasi-resonant controller respectively; s is the Laplace operator.

4. The method for phase-locked loop output voltage phase under non-ideal grid voltage according to claim 3, characterized in that: The resonant angular frequency ω0 is 2*π*50 rad / s; K R =1;ω c =3rad / s.

5. The method for phase-locked loop output voltage phase under non-ideal grid voltage according to claim 1, characterized in that: The decomposition transformation matrix to achieve positive and negative sequence separation is: ； in, for e j2π / 3 , j is the imaginary factor.

6. The method for phase-locked loop output voltage phase under non-ideal grid voltage according to claim 5, characterized in that: Two-phase stationary coordinate system - Positive sequence component of voltage below the axis for: ； in, T 3s / 2s is the Clarke coordinate transformation matrix; u abc is the three-phase grid voltage; u αβ is the AC component of the grid voltage in the two-phase stationary coordinate system; q is the rotation factor, which delays the voltage signal by 90° in the time domain, q=e -jπ / 2 .

7. The method for phase-locked loop output voltage phase under non-ideal grid voltage according to claim 1, characterized in that: The grid voltage component of the q axis in the two-phase rotating coordinate system is adjusted by the PI controller in the proportional integral controller =0, so that the grid voltage vector is projected onto the d-axis, and the grid voltage component of the d-axis in the two-phase rotating coordinate system is obtained. .

8. The method for phase-locked loop output voltage phase under non-ideal grid voltage according to claim 1, characterized in that: The estimated value ω of the electrical angular velocity of the grid is integrated by the integrator 1 / s in the proportional-integral controller.

9. The method for phase-locked loop output voltage phase under non-ideal grid voltage according to claim 1, characterized in that: The modulo controller modulos the signal output by the integrator 1 / s to 2π, so that the phase estimation value θ PLL Located between [0, 2π].

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