Resonant converter

Abstract

The resonant converter comprises a direct current source, a switching circuit, a resonant circuit, an output circuit, a voltage sampling circuit and a control circuit, the switching circuit is coupled to the DC source. The resonance circuit is coupled with the switching circuit; the output circuit is coupled with the resonance circuit and is used for coupling with a load; the voltage sampling circuit is coupled with the switching circuit and the resonance circuit, and is used for collecting the input voltage of the switching circuit and the resonance voltage of the resonance circuit, and outputting a first error voltage representing the change between the input voltage and the resonance voltage; the control circuit is coupled with the voltage sampling circuit and the output circuit and is used for acquiring a first error voltage and a second error voltage and generating a corresponding frequency regulation signal, the second error voltage represents the change between the output voltage of the output circuit and an expected output voltage matched with the input voltage of the switching circuit, and the frequency regulation signal represents the change between the output voltage of the output circuit and the expected output voltage. The frequency regulation and control signal is used for controlling the switching circuit to regulate the square wave frequency so as to regulate the output voltage of the resonant converter.

Description

Technical Field

[0001] The present application relates to the field of switching power supplies, and in particular to a resonant converter. Background Art

[0002] Resonant converters are often used in switching power supplies. When people use switching power supplies, they usually hope that the switching power supplies can output stable voltage or power. The existing methods for adjusting the output voltage or power are generally based on the voltage control mode, that is, the error between the output voltage and the input voltage is collected, and then the frequency of the resonant converter is controlled to achieve the effect of regulating the output voltage or power.

[0003] However, the resonant circuit generally includes capacitors and inductors, which may cause the output voltage to change relatively slowly. Therefore, when the voltage control mode is used to adjust the output voltage or power, a good output response cannot be obtained. Summary of the invention

[0004] The main technical problem solved by the present application is to provide a resonant converter, which can improve the problem of slow output response when adjusting the output voltage of a switching power supply in the prior art.

[0005] In order to solve the above technical problems, a technical solution adopted in the present application is: providing a resonant converter, including: a DC source, a switching circuit, a resonant circuit, an output circuit, a voltage sampling circuit and a control circuit; the switching circuit is coupled to the DC source; the resonant circuit is coupled to the switching circuit; the output circuit is coupled to the resonant circuit and is used to couple the load; the voltage sampling circuit is coupled to the switching circuit and the resonant circuit, and is used to collect the input voltage of the switching circuit and the resonant voltage of the resonant circuit, and is used to output a first error voltage representing the change between the input voltage and the resonant voltage; the control circuit is coupled to the voltage sampling circuit and the output circuit, and is used to obtain the first error voltage and the second error voltage, and use the first error voltage and the second error voltage to generate a corresponding frequency control signal, the second error voltage represents the change between the output voltage of the output circuit and the expected output voltage matching the input voltage of the switching circuit, and the frequency control signal is used to control the switching circuit to adjust the square wave frequency, thereby adjusting the output voltage of the resonant converter.

[0006] The beneficial effect of the present application is that, unlike the related art, the resonant voltage (for example, the voltage across the resonant capacitor) can quickly respond to voltage changes of the switching power supply, and the switching circuit is controlled by the resonant voltage and the output voltage, which can improve the problem of slow output response when adjusting the output voltage of the switching power supply in the prior art. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 is a schematic diagram of the circuit structure of an embodiment of a resonant converter of the present application;

[0008] Figure 2 Schematic diagram of the circuit structure of the voltage sampling circuit involved in the embodiment of the resonant converter of the present application;

[0009] Figure 3 is a circuit structure diagram of a control circuit involved in an embodiment of a resonant converter of the present application;

[0010] Figure 4 It is a schematic diagram of the logic control timing of the resonant converter embodiment of the present application. DETAILED DESCRIPTION

[0011] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0012] After long-term research, the inventor of this application found that in the related technology, the output voltage or output power of the switching power supply is generally adjusted based on the voltage control mode. However, the switching power supply based on the voltage control mode is prone to the problem of slow output response. In order to solve the above technical problems, this application proposes the following embodiments.

[0013] The following resonant converter embodiments of the present application describe exemplary structures of resonant converters.

[0014] See also Figure 1 The resonant converter 1 may include: a DC source 10, a switch circuit 20, a resonant circuit 30 and a voltage sampling circuit 40. The switch circuit 20 may be coupled to the DC source 10. The resonant circuit 30 may be coupled to the switch circuit 20.

[0015] In some examples, the switch circuit 20 may have a first field effect transistor Q1 and a second field effect transistor Q2 coupled in series between a voltage input terminal and a ground voltage. The resonant circuit 30 may be coupled to both ends of the second field effect transistor Q2. Optionally, the first field effect transistor Q1 and the second field effect transistor Q2 are not turned on at the same time. Among them, by controlling the frequency of the on and off of the first field effect transistor Q1 and the second field effect transistor Q2 (that is, the frequency of the resonant converter 1), the square wave frequency can be adjusted, and then the output voltage of the resonant converter 1 can be adjusted. In addition, the first field effect transistor Q1 can be called a metal-oxide semiconductor field effect transistor (MOSFET, Metal-Oxide-Semiconductor Field-Effect Transistor).

[0016] Optionally, the resonant circuit 30 may include a resonant capacitor C1 and a resonant inductor L1 coupled in series at both ends of the second field effect transistor Q2. In this case, when the first field effect transistor Q1 is turned on and the second field effect transistor Q2 is turned off, the DC source 10 can charge the resonant capacitor C1 of the resonant circuit 30, and C1 stores energy; when the first field effect transistor Q1 is turned off and the second field effect transistor Q2 is turned on, the resonant capacitor C1 of the resonant circuit 30 can release energy. Thus, the resonant circuit 30 can convert the DC power of the DC source 10 into AC power.

[0017] Optionally, the resonant converter 1 further includes an output circuit 50. The output circuit 50 may be coupled to the resonant circuit 30 and used to couple to a load. In other examples, the output circuit 50 may also be referred to as a secondary side output circuit.

[0018] The voltage sampling circuit 40 can be coupled to the switch circuit 20 and the resonant circuit 30, and is used to collect the input voltage Vdc of the switch circuit 20 and the resonant voltage of the resonant circuit 30, and is used to output a first error voltage Vc representing the change between the input voltage Vdc and the resonant voltage. The control circuit 60 can be coupled to the voltage sampling circuit 40 and the switch circuit 20, and use the first error voltage Vc to generate a corresponding frequency control signal, and the frequency control signal is used to control the switch circuit 20 to adjust the square wave frequency, thereby adjusting the output voltage of the resonant converter 1.

[0019] In addition, the resonant converter 1 may include a switch driving circuit 70. The control circuit 60 may be indirectly coupled to the switch circuit 20 via the switch driving circuit 70. That is, the control circuit 60 may output a frequency control signal to the switch driving circuit 70. The switch driving circuit 70 may control the on / off of the first field effect transistor Q1 and the second field effect transistor Q2 in the switch circuit 20 based on the frequency control signal.

[0020] Different from the related art, the resonant voltage 30 (for example, the voltage across the resonant capacitor C1) can quickly respond to the voltage change of the switching power supply. By controlling the switching circuit through the resonant voltage and the output voltage, the problem of slow output response when adjusting the output voltage of the switching power supply in the prior art can be improved.

[0021] See also Figure 2 The voltage sampling circuit 40 may include a capacitor voltage sampling circuit 41, an input voltage sampling circuit 42, and a differential amplifier circuit 43. The capacitor voltage sampling circuit 41 may be used to obtain the resonant voltage of the resonant circuit 30, for example, the resonant capacitor voltage Vcx. The input voltage sampling circuit 42 may be used to obtain the input voltage Vdc of the switch circuit 20 or the output voltage of the DC source 10.

[0022] Generally speaking, the resonant capacitor voltage Vcx is related to the resonant capacitor C1 current and the resonant inductor L1 current. In any cycle of the switching circuit 20, by acquiring the above parameters, the changes in voltage and current in the resonant converter 1 can be sensitively captured, and a quick response can be made.

[0023] In some examples, the control circuit 60 can adjust the on-off frequency of the first field effect transistor Q1 and the second field effect transistor Q2 in the switching circuit 20 (ie, the frequency of the resonant converter 1) according to the difference between the resonant capacitor voltage Vcx and the input voltage Vdc, thereby adjusting the voltage output.

[0024] Considering that directly acquiring the resonant capacitor voltage Vcx and the input voltage Vdc is not conducive to the control circuit 60 collecting accurate and clean signals, in some examples, the voltage sampling circuit 40 can process the acquired resonant capacitor voltage Vcx and the input voltage Vdc.

[0025] Optionally, the capacitor voltage sampling circuit 41 is coupled to the resonant circuit 30, and outputs a first sampling voltage Vcy according to the resonant capacitor voltage Vcx. Optionally, the input voltage sampling circuit 42 is coupled to the switch circuit 20, and outputs a second sampling voltage Vdcy according to the input voltage Vdc. Optionally, the differential amplifier circuit 43 is coupled between the capacitor voltage sampling circuit 41, the input voltage sampling circuit 42 and the control circuit 60, and outputs a first error voltage Vc based on the first sampling voltage Vcy and the second sampling voltage Vdcy.

[0026] Optionally, the capacitor voltage sampling circuit 41 may include an input terminal and an output terminal. The input voltage sampling circuit 42 may include an input terminal and an output terminal. The differential amplifier circuit 43 may include a first input terminal, a second input terminal and an output terminal. Among them, the input terminal of the capacitor voltage sampling circuit 41 may be coupled to the resonant capacitor C1, and the output terminal may be coupled to the first input terminal of the differential amplifier circuit 43. The input terminal of the input voltage sampling circuit 42 may be coupled to the DC source 10, and the output terminal may be coupled to the second input terminal of the differential amplifier circuit 43. The output terminal of the differential amplifier circuit 43 may be coupled to the control circuit 60.

[0027] The differential amplifier circuit 43 may include a first operational amplifier 430. The first operational amplifier 430 may have a non-inverting input terminal, an inverting input terminal, and an output terminal; wherein the non-inverting input terminal may be coupled to the capacitor voltage sampling circuit 41; the inverting input terminal may be coupled to the input voltage sampling circuit 42; and the output terminal may be coupled to the control circuit 60. That is, the two input terminals and the output terminal of the differential amplifier circuit 43 may correspond to the non-inverting input terminal, the inverting input terminal, and the output terminal of the first operational amplifier 430.

[0028] In addition, in the differential amplifier circuit 43, the inverting input terminal of the first operational amplifier 430 can also be coupled to the output terminal of the first operational amplifier 430. In addition, the differential amplifier circuit 43 can also include a resistor, and the coupling relationship thereof can be seen in Figure 2 .

[0029] Specifically, the differential amplifier circuit 43 may include a first resistor R1, which is coupled between the output terminal and the inverting input terminal of the first operational amplifier 430. The differential amplifier circuit 43 may include a second resistor R2, which is coupled between the non-inverting input terminal of the first operational amplifier 430 and the ground voltage. The differential amplifier circuit 43 may also include a third resistor R3, which is coupled between the non-inverting input terminal of the first operational amplifier 430 and the capacitor voltage sampling circuit 41. The differential amplifier circuit 43 may also include a fourth resistor R4, which is coupled between the inverting input terminal of the first operational amplifier 430 and the input voltage sampling circuit 42.

[0030] Optionally, the capacitor voltage sampling circuit 41 may include a second operational amplifier 410. The second operational amplifier 410 may have a non-inverting input terminal and an inverting input terminal. The non-inverting input terminal of the second operational amplifier 410 may be coupled to the resonant capacitor C1 to obtain the resonant capacitor voltage Vcx signal; the output terminal of the second operational amplifier 410 may be coupled to the first input terminal of the differential amplifier circuit 43 (the non-inverting input terminal of the first operational amplifier 430). That is, the input terminal and the output terminal of the capacitor voltage sampling circuit 41 may correspond to the non-inverting input terminal and the output terminal of the second operational amplifier 410.

[0031] In this case, the input end of the capacitor voltage sampling circuit 41 can collect the resonant capacitor voltage Vcx, and the acquired resonant capacitor voltage Vcx can be processed by the second operational amplifier 410 to output the first sampling voltage Vcy.

[0032] In addition, the inverting input terminal of the second operational amplifier 410 can be coupled to the output terminal of the second operational amplifier 410. In addition, the capacitor voltage sampling circuit 41 can include a fifth resistor R5, which is coupled between the inverting input terminal and the output terminal of the second operational amplifier 410. The capacitor voltage sampling circuit 41 can also include a sixth resistor R6, which is coupled between the non-inverting input terminal of the second operational amplifier 410 and the ground voltage. The capacitor voltage sampling circuit 41 can also include a seventh resistor R7, one end of which is coupled to the non-inverting input terminal of the second operational amplifier 410, and the other end of which can be coupled to the resonant capacitor C1.

[0033] Optionally, the input voltage sampling circuit 42 may include a third operational amplifier 420. The third operational amplifier 420 may have a non-inverting input terminal and an inverting input terminal. The non-inverting input terminal of the third operational amplifier 420 may be coupled to the DC source 10 to obtain the input voltage Vdc signal; the output terminal of the third operational amplifier 420 may be coupled to the second input terminal of the differential amplifier circuit 43 (the inverting input terminal of the first operational amplifier 430). That is, the input terminal and the output terminal of the input voltage sampling circuit 42 may correspond to the non-inverting input terminal and the output terminal of the third operational amplifier 420.

[0034] In this case, the input end of the input voltage sampling circuit 42 can collect the input voltage Vdc, and the acquired input voltage Vdc can be processed by the third operational amplifier 420 to output the second sampling voltage Vdcy.

[0035] In addition, the inverting input terminal of the third operational amplifier 420 can be coupled to the output terminal of the third operational amplifier 420. In addition, the input voltage sampling circuit 42 can include an eighth resistor R8, which is coupled between the inverting input terminal and the output terminal of the third operational amplifier 420. The input voltage sampling circuit 42 can also include a ninth resistor R9, which is coupled between the non-inverting input terminal of the third operational amplifier 420 and the ground voltage. The input voltage sampling circuit 42 can also include a tenth resistor R10, one end of which is coupled to the inverting input terminal of the third operational amplifier 420, and the other end of which can be coupled to the DC source 10.

[0036] In this case, by adding at least one operational amplifier to the voltage sampling circuit 40, it is possible to facilitate the voltage sampling circuit 40 to collect the input voltage Vdc and the resonant capacitor voltage Vcx; in addition, the voltage sampling circuit 40 can process the input voltage Vdc and the resonant capacitor voltage Vcx to input a reliable first error voltage Vc to the control circuit 60.

[0037] Optionally, the control circuit 60 is used to receive a second error voltage Vcmd. The second error voltage Vcmd represents the change between the output voltage of the output circuit 50 and the desired output voltage that matches the input voltage Vdc of the switch circuit 20. The control circuit 60 may obtain the second error voltage Vcmd in any manner in the existing voltage control mode, and is not specifically limited here.

[0038] Optionally, the control circuit 60 is used to generate a corresponding frequency control signal using the first error voltage Vc and the second error voltage Vcmd, wherein the second error voltage Vcmd can be the difference between the output voltage and the expected output voltage, or the difference between the output voltage and the input voltage Vdc of the switch circuit 20 .

[0039] Generally, if the output voltage is adjusted directly using the voltage control mode, the main power transfer function of the resonant converter 1 is generally a multi-order function, and a multi-order compensator is required for phase compensation. However, the use of a multi-order compensator for phase compensation will lead to problems such as complex compensator design, poor phase compensation, and low phase margin.

[0040] In the present application, by adding a feedback loop for obtaining the resonant capacitor voltage Vcx (resonant inductor L1 current) and controlling the square wave frequency according to the resonant capacitor voltage Vcx (resonant inductor L1 current), the main power transfer function of the resonant converter 1 can be changed to a first-order function, thereby improving the above-mentioned problem. In other words, the present application adjusts the output voltage through the voltage control mode (controlling the square wave frequency based on the resonant inductor L1 current) and the current control mode (controlling the square wave frequency based on the output voltage), which can improve the problem of slow output response when adjusting the output voltage of the switching power supply in the prior art.

[0041] See also Figure 3 The control circuit 60 includes: an error signal comparator 61 and a state machine circuit 62. The control circuit 60 can control the state machine circuit 62 to output a corresponding frequency control signal based on the first error voltage Vc and / or the second error voltage Vcmd obtained by the error signal comparator 61.

[0042] Optionally, the error signal comparator 61 is used to obtain the first error voltage Vc and the second error voltage Vcmd, and compare the two to output a comparison voltage signal Vcm.

[0043] Optionally, the error signal comparator 61 includes a fourth operational amplifier. The inverting input terminal of the fourth operational amplifier can be used to obtain the first error voltage Vc. The non-inverting input terminal of the fourth operational amplifier can be used to obtain the second error voltage Vcmd. In this case, when the second error voltage Vcmd is greater than the first error voltage Vc, the comparison voltage signal is a high level (Vcm=1), and when the first error voltage Vc is less than the second error voltage Vcmd, the comparison voltage signal is a low level (Vcm=0).

[0044] Optionally, the state machine circuit 62 is connected to the error signal comparator 61 signal, and is used to be set to a working state matching the comparison voltage signal Vcm, and output a frequency control signal matching the working state. Specifically, the frequency control signal may include a first control signal (Q1_PWM) and a second control signal (Q2_PWM). The first control signal (Q1_PWM) may be used to control the on and off of the first field effect tube Q1. The second control signal (Q2_PWM) may be used to control the on and off of the second field effect tube Q2.

[0045] Optionally, the control circuit 60 has a first control signal output terminal 601 and a second control signal output terminal 602. The signals output by the first control signal output terminal 601 and the second control signal output terminal 602 constitute a frequency control signal. Optionally, the second control signal output terminal 602 of the state machine circuit 62 is coupled to the gate of the first field effect transistor Q1. The first control signal output terminal 601 is coupled to the gate of the second field effect transistor Q2. Thus, the square wave frequency of the switch circuit 20 can be controlled by the frequency control signal.

[0046] In some examples, the first control signal (Q1_PWM) and the second control signal can be inverted signals. That is, when the first control signal is at a high level (Q1_PWM=1), the second control signal can be at a low level (Q2_PWM=0); when the first control signal is at a low level (Q1_PWM=0), the second control signal can be at a high level (Q2_PWM=1). In this case, the first field effect transistor Q1 and the second field effect transistor Q2 can be controlled not to be turned on or off at the same time.

[0047] Optionally, the state machine circuit 62 includes a state machine 620 and a first NOT gate circuit 621. The state machine 620 has a first state output terminal 622 and a second state output terminal 623. The first state output terminal 622 is used to output a first state signal s0 specified by the working state. The second state output terminal 623 is used to output a second state signal s1 specified by the working state. The state machine 620 can switch between different states and output a first state signal s0 and a second state signal s1 that match the current state.

[0048] Optionally, the second state output terminal 623 is coupled to the second control signal output terminal 602 and the input terminal of the first NOT gate circuit 621. The first control signal output terminal 601 is coupled to the output terminal of the first NOT gate circuit 621. In other words, the first control signal (Q1_PWM) may be the second state signal s1. The second control signal (Q2_PWM) may be the inverse signal of the second state signal s1.

[0049] Specifically, when the second state signal is at a low level (s1=0), the first control signal is at a high level (Q1_PWM=1), and the first field effect tube Q1 is turned on; the second control signal is at a low level (Q2_PWM=0), and the second field effect tube Q2 is turned off. When the second state signal is at a high level (s1=1), the first control signal is at a low level (Q1_PWM=0), and the first field effect tube Q1 is turned off; the second control signal is at a high level (Q2_PWM=1), and the second field effect tube Q2 is turned on.

[0050] Optionally, the state machine 620 is used to receive the first truth value e0 and the second truth value e1, and determine the working state that matches the first truth value e0 and the second truth value e1. Specifically, the state machine 620 may have a first input terminal and a second input terminal. The first input terminal may be used to receive the first truth value e0. The second input terminal may be used to receive the second truth value e1.

[0051] In this case, the state machine 620 can switch to a corresponding state by receiving the first true value e0 and the second true value e1, and can further output a first state signal s0 and a second state signal s1 that match the current state.

[0052] Optionally, the control circuit 60 may further include a counter 63 and a signal selection circuit 64. The signal selection circuit 64 may be used to output a first true value e0 and a second true value e1. Specifically, the signal selection circuit 64 may at least output different first true values ​​e0 and second true values ​​e1 according to the output of the counter 63, thereby controlling the state machine 620 to switch states.

[0053] Optionally, the counter 63 is coupled to the signal selection circuit 64. The signal selection circuit 64 is coupled to the state machine 620. In addition, the signal selection circuit 64 may also be coupled to the error signal comparator 61.

[0054] Optionally, the counter 63 may be used to output a first counting signal m1, a second counting signal zero, and a third counting signal m2. Specifically, the counter 63 may include a first output terminal for outputting the first counting signal m1, a second output terminal for outputting the second counting signal zero, and a third output terminal for outputting the third counting signal m2. The counter 63 outputting the first counting signal m1 may refer to the first output terminal outputting a high level; the counter 63 outputting the second counting signal zero may refer to the second output terminal outputting a high level; the counter 63 outputting the third counting signal m2 may refer to the third output terminal outputting a high level.

[0055] Optionally, the signal selection circuit 64 is used to receive the first counting signal m1, the second counting signal zero, the third counting signal m2, the comparison voltage signal Vcm and the second state signal s1. That is, the signal selection circuit 64 can control the state machine 620 to switch between different states based on the first counting signal m1, the second counting signal zero, the third counting signal m2, the comparison voltage signal Vcm and the second state signal s1.

[0056] Optionally, the counter 63 further has a direction control terminal. The direction control terminal is coupled to the second state output terminal 623 of the state machine 620 to receive the second state signal s1. The counter 63 is used to select up counting or down counting according to the second state signal s1; the counter 63 is used to output a first counting signal m1 when the count reaches a first counting comparison value, output a second counting signal zero when the count is zero, and output a third counting signal m2 when the count reaches a second counting comparison value.

[0057] Optionally, the direction control terminal of the counter 63 is coupled to the second state output terminal 623 of the state machine 620 via the second NOT gate circuit 631 to obtain the second state signal s1 output by the state machine 620 and obtain an inverted signal. Optionally, the counter 63 can be configured to count up when the direction control terminal receives a high level (dir=1); and count down when the direction control terminal receives a low level (dir=0).

[0058] Optionally, the first count comparison value corresponds to the maximum square wave frequency of the switch circuit 20, and the second count comparison value corresponds to the minimum square wave frequency of the switch circuit 20. Specifically, the counter 63 may include a first configuration terminal for configuring the first count comparison value and a second configuration segment for configuring the second count comparison value. The user can set the first count comparison value (maximum square wave frequency) and the second count comparison value (minimum square wave frequency) through the first configuration segment and the second configuration segment.

[0059] Optionally, the signal selection circuit 64 includes a first signal selection circuit 640 and a second signal selection circuit 641 .

[0060] Optionally, the first signal selection circuit 640 is coupled to the counter 63 and the state machine 620, and is used to receive the first counting signal m1, the second counting signal zero and the second state signal s1, and perform first signal selection processing on the first counting signal m1, the second counting signal zero and the second state signal s1 to output a first true value e0.

[0061] Optionally, the second signal selection circuit 641 is coupled to the counter 63, the error signal comparator 61 and the state machine 620, and is used to receive the third counting signal m2, the comparison voltage signal Vcm and the second state signal s1, and perform second signal selection processing on the third counting signal m2, the comparison voltage signal Vcm and the second state signal s1 to output a second true value e1.

[0062] That is, the signal selection circuit 64 is used to perform a first signal selection process on the first counting signal m1, the second counting signal zero and the second state signal s1 to output a first true value e0. In addition, the signal selection circuit 64 is also used to perform a second signal selection process on the third counting signal m2, the comparison voltage signal Vcm and the second state signal s1 to output a second true value e1.

[0063] Optionally, the first signal selection circuit 640 includes a first OR gate circuit 642, a first AND gate circuit 643 and a second AND gate circuit 644 coupled to the two input ends of the first OR gate circuit 642, and a third NOT gate circuit 645 coupled to the input end of the first AND gate circuit 643, and the output end of the first OR gate circuit 642 is coupled to the first input end.

[0064] Optionally, an input terminal of the third NOT gate circuit 645 is coupled to the second state output terminal 623 of the state machine 620 to receive the second state signal s1, another input terminal of the first AND gate circuit 643 is coupled to the counter 63 to receive the first counting signal m1, one input terminal of the second AND gate circuit 644 is coupled to the counter 63 to receive the second counting signal zero, and the other input terminal is coupled to the second state output terminal 623 of the state machine 620 to receive the second state signal s1.

[0065] Optionally, the second signal selection circuit 641 includes a third AND gate circuit 646 , a second OR gate circuit 647 coupled to two output terminals of the third AND gate circuit 646 , and a fourth NOT gate circuit 648 , and the output terminal of the third AND gate circuit 646 is coupled to the second input terminal.

[0066] Optionally, one end of the second OR gate circuit 647 is coupled to the error signal comparator 61 to obtain the comparison voltage signal Vcm, the other end of the second OR gate circuit 647 is coupled to the counter 63 to obtain the third counting signal m2, and the input end of the fourth NOT gate circuit 648 is coupled to the second state output end 623 of the state machine 620 to obtain the second state signal s1 of the state machine 620.

[0067] Optionally, the state machine 620 has a first state (state0), a second state (state1), a third state (state2), and a fourth state (state3), and the state machine 620 is configured as follows:

[0068] In the first state (state0), the first state output terminal 622 and the second state output terminal 623 output a low level (s0=0, s1=0); in the second state (state1), the first state output terminal 622 outputs a high level (s0=1), and the second state output terminal 623 outputs a low level (s1=0); in the third state (state2), the first state output terminal 622 outputs a low level (s0=0), and the second state output terminal 623 outputs a high level (s1=1); in the fourth state (state3), the first state output terminal 622 and the second state output terminal 623 output a high level (s0=1, s1=1).

[0069] In the first state (state0), if the first true value is a high level (e0=1), the state switches to the second state (state1); in the second state (state1), if the second true value is a high level (e1=1), the state switches to the third state (state2); in the third state (state2), if the first true value is a high level (e0=1), the state switches to the fourth state (state3); in the fourth state (state3), the state automatically switches to the first state (state0).

[0070] According to the coupling relationship between the first signal selection circuit 640, the second signal selection circuit 641 and the state machine circuit 62, the output truth table of the first state output terminal 622 and the second state output terminal 623 of the state machine 620 is:

[0071]

[0072]

[0073] See also Figure 4 After power is turned on, the state machine 620 enters the first state (state0). At this time, the second state output terminal 623 outputs a low level (s1=0). The direction control terminal is coupled to the second state output terminal 623 of the state machine 620 via the second NOT gate circuit 631, so the direction control terminal receives a high level signal (ie, dir=1), and the counter 63 counts upward.

[0074] In addition, when the state machine 620 is in the first state (state0), the first field effect transistor Q1 is turned on, and the resonant capacitor C1 is in a charging state.

[0075] When the count value reaches math1, the counter 63 outputs the first count signal m1. According to the output truth table of the state machine 620, it can be known that the state machine 620 will switch from the first state (state0) to the second state (state1).

[0076] When the state machine 620 is in the second state (state1), the counter 63 continues to count upward, and the resonant capacitor voltage Vcx and the input voltage Vdc output the first error voltage Vc through the voltage sampling circuit 40. The first error voltage Vc and the second error voltage Vcmd output the comparison voltage signal Vcm through the error signal comparator 61. Since the first field effect transistor Q1 is turned on when the state machine 620 is in the first state (state0) and the second state (state1), the resonant capacitor C1 is always in a charging state, which means that the resonant capacitor voltage Vcx will increase, and the first sampling voltage Vcy will increase accordingly; if the first sampling voltage Vcy is greater than the second sampling voltage Vdcy, the first error voltage Vc will increase accordingly; if the first error voltage Vc is higher than the second error voltage Vcmd, the comparison voltage signal is a high level (Vcm=1), and further, the second true value is a high level (e1=1), so that the state machine 620 can switch from the second state (state1) to the third state (state2).

[0077] According to the above analysis, it can be known that when the state machine 620 adjusts the voltage output of the resonant converter 1, it needs to adjust the conduction time of the first field effect transistor Q1, thereby achieving the effect of adjusting the square wave frequency.

[0078] In addition, before Vc is greater than Vcmd, if the count value has reached math2, according to the truth table of the state machine 620, the state machine 620 will also switch from the second state (state1) to the third state (state2), and the state machine 620 outputs s0=0, s1=1. That is, the maximum on-time of Q1 is math2. According to the actual application circuit, the value of math2 can be set to limit the minimum frequency of the resonant converter 1.

[0079] When the state machine 620 switches to the third state (state2), the second state output terminal 623 of the state machine 620 outputs a high level (s1=1). At this time, the direction control terminal receives a low level signal (ie, dir=0), and the counter 63 counts down. In addition, the first control signal is a low level (Q1_PWM=0), and the first field effect tube Q1 is turned off; the second control signal is a high level (Q2_PWM=1), and the second field effect tube Q2 is turned on.

[0080] Furthermore, when the count is 0, the counter 63 outputs a second count signal zero. According to the truth table of the state machine 620, the state machine 620 will switch to the fourth state (state3) at this time.

[0081] When the state machine 620 is in the fourth state (state3), the second state output terminal 623 outputs a high level (s1=1). According to the truth table of the state machine 620, it can be known that the state machine 620 will automatically switch to the first state (state0).

[0082] That is, when the first error voltage Vc is higher than the second error voltage Vcmd, or when the count value reaches math2, the state machine 620 switches from the second state to the third state, and the first field effect transistor Q1 switches from the on state to the off state. Thus, the first error voltage Vc and the second error voltage Vcmd can be used to control the on time of the first field effect transistor Q1, and can be used to control the state switching of the first field effect transistor Q1 in a timely manner.

[0083] In summary, by acquiring the voltage across the resonant capacitor C1 of the resonant circuit 30 and based on the change of the resonant voltage and the input voltage Vdc, the voltage change in the switching power supply can be quickly responded to, thereby improving the output response speed.

[0084] The above descriptions are merely embodiments of the present application and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A resonant converter, It is characterized in that include: DC source; A switch circuit coupled to the DC source; A resonant circuit coupled to the switch circuit; An output circuit, coupled to the resonant circuit and used to couple to a load; a voltage sampling circuit, coupled to the switch circuit and the resonant circuit, for collecting an input voltage of the switch circuit and a resonant voltage of the resonant circuit, and for outputting a first error voltage representing a change between the input voltage and the resonant voltage; as well as A control circuit is coupled to the voltage sampling circuit and the output circuit, and is used to obtain the first error voltage and the second error voltage, and generate a corresponding frequency control signal using the first error voltage and the second error voltage, wherein the second error voltage represents a change between an output voltage of the output circuit and a desired output voltage that matches an input voltage of the switching circuit, and the frequency control signal is used to control the switching circuit to adjust the square wave frequency, thereby adjusting the output voltage of the resonant converter.

2. The resonant converter according to claim 1, It is characterized in that The control circuit comprises: an error signal comparator, used for obtaining the first error voltage and the second error voltage, and comparing the two to output a comparison voltage signal; The state machine circuit is connected to the error signal comparator signal, and is used to be set to a working state matching the comparison voltage signal, and output the frequency control signal matching the working state.

3. The resonant converter according to claim 2, It is characterized in that The control circuit has a first control signal output terminal and a second control signal output terminal, and the signals output by the first control signal output terminal and the second control signal output terminal constitute the frequency control signal; the state machine circuit includes a state machine and a first NOT gate circuit; The state machine has a first state output terminal and a second state output terminal, the first state output terminal is used to output a first state signal specified by the working state, and the second state output terminal is used to output a second state signal specified by the working state; the second state output terminal is coupled to the second control signal output terminal and the input terminal of the first NOT gate circuit, and the first control signal output terminal is coupled to the output terminal of the first NOT gate circuit.

4. The resonant converter according to claim 3, It is characterized in that The control circuit includes a counter and a signal selection circuit; the counter is coupled to the signal selection circuit, and the signal selection circuit is coupled to the state machine; the signal selection circuit is coupled to the error signal comparator; the counter is used to output a first counting signal, a second counting signal and a third counting signal, and the signal selection circuit is used to receive the first counting signal, the second counting signal, the third counting signal, a comparison voltage signal and the second state signal; the signal selection circuit is used to perform a first signal selection process on the first counting signal, the second counting signal and the second state signal to output a first true value, and is also used to perform a second signal selection process on the third counting signal, the comparison voltage signal and the second state signal to output a second true value; The state machine is used to receive the first true value and the second true value, and determine the working state that matches the first true value and the second true value.

5. The resonant converter according to claim 4, It is characterized in that The signal selection circuit includes a first signal selection circuit and a second signal selection circuit; The first signal selection circuit is coupled to the counter and the state machine, and is used for receiving the first counting signal, the second counting signal and the second state signal, and performing a first signal selection process on the first counting signal, the second counting signal and the second state signal to output a first true value; The second signal selection circuit is coupled to the counter, the error signal comparator and the state machine, and is used to receive the third counting signal, the comparison voltage signal and the second state signal, and perform second signal selection processing on the third counting signal, the comparison voltage signal and the second state signal to output a second true value.

6. The resonant converter according to claim 5, It is characterized in that The state machine has a first input terminal; The first signal selection circuit includes a first OR gate circuit, a first AND gate circuit and a second AND gate circuit coupled to two input terminals of the first OR gate circuit, and a third NOT gate circuit coupled to the input terminal of the first AND gate circuit, wherein the output terminal of the first OR gate circuit is coupled to the first input terminal; An input end of the third NOT gate circuit is coupled to the second state output end of the state machine to receive the second state signal, another input end of the first AND gate circuit is coupled to the counter to receive the first counting signal, one input end of the second AND gate circuit is coupled to the counter to receive the second counting signal, and the other input end is coupled to the second state output end of the state machine to receive the second state signal.

7. The resonant converter according to claim 5, It is characterized in that The state machine has a second input terminal; The second signal selection circuit includes a third AND gate circuit, a second OR gate circuit coupled to two output terminals of the third AND gate circuit, and a fourth NOT gate circuit, wherein the output terminal of the third AND gate circuit is coupled to the second input terminal; One end of the second OR gate circuit is coupled to the error signal comparator to obtain the comparison voltage signal, the other end of the second OR gate circuit is coupled to the counter to obtain the third counting signal, and the input end of the fourth NOT gate circuit is coupled to the second state output end of the state machine to obtain the second state signal of the state machine.

8. The resonant converter according to claim 4, It is characterized in that The counter further has a direction control terminal; the direction control terminal is coupled to the second state output terminal of the state machine to receive the second state signal; the counter is used to select up counting or down counting according to the second state signal; the counter is used to output the first counting signal when the count reaches the first counting comparison value, output the second counting signal when the count is zero, and output the third counting signal when the count reaches the second counting comparison value; The first count comparison value corresponds to the maximum square wave frequency of the switch circuit, and the second count comparison value corresponds to the minimum square wave frequency of the switch circuit.

9. The resonant converter according to claim 4, It is characterized in that The direction control end of the counter is coupled to the second state output end of the state machine via a second NOT gate circuit to obtain the second state signal output by the state machine and obtain an inverted signal.

10. The resonant converter according to claim 4, It is characterized in that The state machine has a first state, a second state, a third state and a fourth state, and the state machine is configured as: In the first state, the first state output terminal and the second state output terminal output a low level; in the second state, the first state output terminal outputs a high level, and the second state output terminal outputs a low level; in the third state, the first state output terminal outputs a low level, and the second state output terminal outputs a high level; in the fourth state, the first state output terminal and the second state output terminal output a high level; In the first state, the first true value is at a high level, then the device switches to the second state; in the second state, the second true value is at a high level, then the device switches to the third state; in the third state, the first true value is at a high level, then the device switches to the fourth state; in the fourth state, the device automatically switches to the first state.

11. The resonant converter according to claim 10, It is characterized in that The switch circuit comprises a first field effect transistor and a second field effect transistor which are coupled in series between a voltage input terminal and a ground voltage, and the resonant circuit is coupled to both ends of the second field effect transistor. The first control signal output terminal of the state machine circuit is coupled to the gate of the first field effect transistor, and the second control signal output terminal is coupled to the gate of the second field effect transistor.

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