Drain harmonic suppression bias network, radio frequency power amplifier and method

Abstract

The invention provides a drain harmonic suppression bias network, a radio frequency power amplifier and a method, and belongs to the technical field of signal transmission equipment.The drain harmonic suppression bias network comprises a drain bias network, a first harmonic suppression module, a second harmonic suppression module and a third harmonic suppression module, the first harmonic suppression module is connected with the drain bias network, first ends of the second harmonic suppression module and the third harmonic suppression module are respectively connected between the first harmonic suppression module and the drain bias network, and second ends of the second harmonic suppression module and the third harmonic suppression module are grounded; the first harmonic suppression module is used for resonating at a fundamental frequency, the second harmonic suppression module is used for resonating at a second harmonic, and the third harmonic suppression module is used for resonating at a third harmonic. According to the invention, the harmonic suppression module is innovatively arranged on the bias network of the radio frequency power amplifier, so that the aim of integrating a bias circuit and a harmonic suppression circuit is fulfilled.

Description

Technical Field

[0001] The present invention relates to the technical field of signal transmission equipment, and in particular to a drain harmonic suppression bias network, a radio frequency power amplifier and a method. Background Art

[0002] An RF power amplifier is an electronic device used to enhance the power of RF signals. It is widely used in wireless communications, broadcasting, satellite communications, radar and other fields. Its main function is to amplify the input weak RF signal to a sufficient power level to drive the antenna or other loads to achieve effective signal transmission. However, due to the inherent nonlinear characteristics of transistors, high-order harmonic components will be generated after the RF signal is amplified by the transistor. The presence of harmonics will take away part of the fundamental wave energy, resulting in problems such as reduced output power, reduced efficiency, and spectrum pollution, which seriously affects the performance of the RF amplifier.

[0003] In related technologies, most RF power amplifier designs only focus on the performance of their main operating frequencies, while ignoring the generation and propagation of higher harmonics. Although this design method can achieve higher gains at the expected operating frequency, it will cause the output power signal to contain a large number of harmonic components, thereby affecting the quality of the final signal and the matching characteristics of the signal source. In order to suppress harmonics, some RF power amplifiers will add a harmonic suppression network to the matching network. However, the matching network is mainly responsible for matching the input signal with the transmitting impedance of the amplifier, while the harmonic suppression network has an impact on the transmission of the complete signal. Therefore, integrating the two may lead to a decrease in matching performance. Summary of the invention

[0004] In view of the above problems, in a first aspect, an embodiment of the present invention provides a drain harmonic suppression bias network, wherein the drain harmonic suppression bias network includes: a drain bias network, a first harmonic suppression module, a second harmonic suppression module and a third harmonic suppression module, wherein the first harmonic suppression module is connected to the drain bias network, the first ends of the second harmonic suppression module and the third harmonic suppression module are respectively connected between the first harmonic suppression module and the drain bias network, the second ends of the second harmonic suppression module and the third harmonic suppression module are grounded, the first harmonic suppression module is used to resonate at the fundamental frequency, the second harmonic suppression module is used to resonate at the second harmonic, and the third harmonic suppression module is used to resonate at the third harmonic.

[0005] According to one embodiment of the present invention, the drain bias network includes an inductor L5 and a capacitor C8, the first end of the inductor L5 is connected to the first harmonic suppression module, the second end of the inductor L5 is connected to the drain bias voltage, the first end of the capacitor C8 is connected to the second end of the inductor L5, and the second end of the capacitor C8 is grounded.

[0006] According to one embodiment of the present invention, the first harmonic suppression module includes an inductor L2 and a capacitor C5, and the inductor L2 and the capacitor C5 are connected in parallel.

[0007] According to one embodiment of the present invention, the second harmonic suppression module includes an inductor L3 and a capacitor C6, and the inductor L3 and the capacitor C6 are connected in series.

[0008] According to one embodiment of the present invention, the third harmonic suppression module includes an inductor L4 and a capacitor C7, and the inductor L4 and the capacitor C7 are connected in series.

[0009] A second aspect of the present application further provides a radio frequency power amplifier, which includes a drain harmonic suppression bias network as described in the above aspect.

[0010] According to one embodiment of the present invention, the RF power amplifier also includes: an input matching network, a transistor, an output matching network and a gate bias circuit, the input matching network is connected to the gate of the transistor, the output matching network is connected to the drain of the transistor, the gate bias circuit is connected to the gate of the transistor, and the drain harmonic suppression bias network is connected to the drain of the transistor.

[0011] According to one embodiment of the present invention, a first end of the first harmonic suppression module is connected to the drain of the transistor, a second end of the first harmonic suppression module is connected to a first end of the drain bias network, and a second end of the drain bias network is connected to a drain bias voltage.

[0012] According to one embodiment of the present invention, the radio frequency power amplifier further includes a stabilizing network connected between the input matching network and the gate of the transistor.

[0013] A third aspect of the present application further provides a method for suppressing drain harmonics, the method comprising: Add a drain harmonic suppression bias network to the drain of the transistor; The drain harmonic suppression bias network includes: a drain bias network, a first harmonic suppression module, a second harmonic suppression module and a third harmonic suppression module, the first harmonic suppression module is connected to the drain bias network, the first ends of the second harmonic suppression module and the third harmonic suppression module are respectively connected between the first harmonic suppression module and the drain bias network, the second ends of the second harmonic suppression module and the third harmonic suppression module are grounded, the first harmonic suppression module is used to resonate at the fundamental frequency, the second harmonic suppression module is used to resonate at the second harmonic, and the third harmonic suppression module is used to resonate at the third harmonic.

[0014] The above one or more technical solutions in the embodiments of the present application have at least one or more of the following technical effects: The present invention proposes a drain harmonic suppression bias network, which consists of a drain bias network and three harmonic suppression modules, namely, a first harmonic suppression module, a second harmonic suppression module and a third harmonic suppression module. The drain bias network is used to provide an appropriate drain bias voltage and work in coordination with the first harmonic suppression module, the second harmonic suppression module and the third harmonic suppression module. The first harmonic suppression module is used to resonate at the fundamental frequency, which is open circuit for the fundamental frequency signal and short circuit for the second and third harmonics. The second harmonic suppression module resonates at the second harmonic and can short circuit the second harmonic to the ground. The third harmonic suppression module resonates at the third harmonic and can short circuit the third harmonic to the ground. When the signal is transmitted, the fundamental frequency signal will be blocked when passing through the first harmonic suppression module, so that it can be transmitted normally in the original route, while the second and third harmonics will pass through the first harmonic suppression module and be guided to the ground by the second harmonic suppression module and the third harmonic suppression module, thereby achieving harmonic suppression. The present invention innovatively places the harmonic suppression module on the bias network of the RF power amplifier, which acts as an open circuit for the fundamental frequency and a short circuit for the second and third harmonics, and also acts as a choke, achieving the purpose of integrating the bias circuit with the harmonic suppression circuit. Suppressing harmonics on the bias circuit can more effectively reduce the high-order harmonic components in the output signal, thereby improving the signal quality, and separating the harmonic suppression network from the matching network can ensure that the matching network can efficiently match the input signal and improve the performance of the amplifier. At the same time, the harmonic suppression scheme based on the bias circuit can simplify the circuit structure and reduce the design difficulty and cost.

[0015] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented according to the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0017] Figure 1 is a schematic diagram of a circuit module of a radio frequency power amplifier in an embodiment of the present invention; Figure 2 Schematic diagram of the circuit principle of the radio frequency power amplifier in an embodiment of the present invention; Figure 3 A comparison diagram of the output power (Pout) of a conventional RF power amplifier and the RF power amplifier provided in the present application; Figure 4 A comparison chart of the power added efficiency (PAE) of a conventional RF power amplifier and the RF power amplifier provided in the present application; Figure 5 A comparison diagram of input return loss (S11) of a conventional RF power amplifier and the RF power amplifier provided in the present application; Figure 6 A comparison diagram of the output return loss (S22) of a conventional RF power amplifier and the RF power amplifier provided in the present application; Figure 7 This is a comparison chart of the small signal gain (S21) of a traditional RF power amplifier and the RF power amplifier provided in this application.

[0018] Explanation of the accompanying drawings: 100, drain harmonic suppression bias network; 110, drain bias network; 120, first harmonic suppression module; 130, second harmonic suppression module; 140, third harmonic suppression module; 200, input matching network; 300, transistor; 400, output matching network; 500, gate bias circuit; 600, stabilization network. DETAILED DESCRIPTION

[0019] The overall idea of ​​the technical solution provided by the present invention is as follows: See also Figure 1 The drain harmonic suppression bias network 100 includes: a drain bias network 110, a first harmonic suppression module 120, a second harmonic suppression module 130 and a third harmonic suppression module 140, the first harmonic suppression module 120 is connected to the drain bias network 110, the first ends of the second harmonic suppression module 130 and the third harmonic suppression module 140 are respectively connected between the first harmonic suppression module 120 and the drain bias network 110, the second ends of the second harmonic suppression module 130 and the third harmonic suppression module 140 are grounded, the first harmonic suppression module 120 is used to resonate at the fundamental frequency, the second harmonic suppression module 130 is used to resonate at the second harmonic, and the third harmonic suppression module 140 is used to resonate at the third harmonic.

[0020] Specifically, the drain bias network 110 is responsible for providing an appropriate bias voltage for the drain of the transistor to ensure that the transistor is in an optimal working state; the first harmonic suppression module 120 is connected to the drain bias network 110 and is designed to resonate at the fundamental frequency. For the fundamental frequency signal, it behaves as an open circuit, thereby blocking the fundamental frequency signal, and for the second and third harmonics, it behaves as a short circuit, thereby allowing the second and third harmonics to pass; the second harmonic suppression module 130 is connected between the first harmonic suppression module 120 and the drain bias network 110, and resonates at the second harmonic. The second harmonic after passing through the first harmonic suppression module 120 will be short-circuited to the ground by the second harmonic suppression module 130, thereby reducing the impact of the second harmonic on the signal; the third harmonic suppression module 140 is also connected between the first harmonic suppression module 120 and the drain bias network 110, and resonates at the third harmonic. It will short-circuit the third harmonic after passing through the first harmonic suppression module 120 to the ground, further reducing the impact of the third harmonic on the signal. The entire network is designed to effectively suppress the second and third harmonics without interfering with the fundamental signal, thereby improving the quality and efficiency of the amplifier output signal. By integrating the harmonic suppression module into the bias network, the circuit design is simplified, the cost is reduced, and the performance of the amplifier is improved. In addition, this design ensures that the matching network can efficiently match the input signal, further improving the overall performance of the amplifier.

[0021] More specifically, during signal transmission, the baseband signal in the signal will be blocked when passing through the first harmonic suppression module 120, so that it can be transmitted normally in the original route, while the second and third harmonics will pass through the first harmonic suppression module 120 and be guided to the ground by the second harmonic suppression module 130 and the third harmonic suppression module 140, thereby achieving harmonic suppression. The present invention innovatively places the harmonic suppression module on the bias network of the RF power amplifier, which appears as an open circuit for the baseband and a short circuit for the second and third harmonics. It also plays a choke role, achieving the purpose of integrating the bias circuit and the harmonic suppression circuit. Suppressing harmonics on the bias path can more effectively reduce the high-order harmonic components in the output signal, thereby improving the signal quality, and separating the harmonic suppression network from the matching network can ensure that the matching network can efficiently match the input signal and improve the performance of the amplifier. At the same time, the harmonic suppression scheme based on the bias path can simplify the circuit structure and reduce the design difficulty and cost.

[0022] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0023] See also Figure 2 The drain bias network 110 includes an inductor L5 and a capacitor C8, a first end of the inductor L5 is connected to the first harmonic suppression module 120, a second end of the inductor L5 is connected to the drain bias voltage, a first end of the capacitor C8 is connected to the second end of the inductor L5, and a second end of the capacitor C8 is grounded. Specifically, as part of the bias network, the inductor L5 helps to provide a stable drain bias voltage, and because the inductor presents a high impedance to the AC signal, it helps to reduce the influence of the harmonic signal on the bias voltage. The capacitor C8 and the inductor L5 form a low-pass filter, allowing the DC bias voltage to pass, while preventing high-frequency signals (such as harmonics) from reaching the bias voltage source, and because the capacitor presents a high impedance to the DC signal, it helps to stabilize the bias voltage and prevent high-frequency signal interference.

[0024] See also Figure 2 , the first harmonic suppression module 120 includes an inductor L2 and a capacitor C5, and the inductor L2 and the capacitor C5 are connected in parallel. Specifically, the inductor L2 and the capacitor C5 connected in parallel can form a resonant circuit, and its resonant frequency is mainly determined by the values ​​of the inductor and the capacitor. When the circuit resonates, the impedances of the inductor L2 and the capacitor C5 cancel each other out, and the entire circuit exhibits a high impedance (close to an open circuit). For the baseband signal, the first harmonic suppression module 120 is designed to resonate at the baseband, so it exhibits a high impedance at the baseband, blocking the baseband signal from passing. For the second harmonic and the third harmonic, the combination of the inductor and the capacitor exhibits a low impedance (close to a short circuit) at these frequencies, thereby effectively allowing these high-order harmonic components to pass.

[0025] See also Figure 2 The second harmonic suppression module 130 includes an inductor L3 and a capacitor C6, which are connected in series. Specifically, the inductor L3 and the capacitor C6 connected in series can form a resonant circuit. For the second harmonic suppression module 130, the inductor L3 and the capacitor C6 are designed to resonate at the frequency of the second harmonic. When the circuit resonates, the impedance of the circuit to the second harmonic is minimal, which is equivalent to a low impedance path, so that the second harmonic can be effectively short-circuited to the ground, thereby suppressing the propagation of the second harmonic.

[0026] See also Figure 2, the third harmonic suppression module 140 includes an inductor L4 and a capacitor C7, and the inductor L4 and the capacitor C7 are connected in series. Similar to the second harmonic suppression module 130, the third harmonic suppression module 140 is composed of an inductor L4 and a capacitor C7, and these two components are connected in series. This series connection also forms a resonant circuit. For the third harmonic suppression module 140, the inductor L4 and the capacitor C7 are designed to resonate at the frequency of the third harmonic. When the circuit resonates, the impedance of the circuit to the third harmonic is minimal, which is equivalent to a low impedance path, so that the third harmonic can be effectively short-circuited to the ground, thereby suppressing the propagation of the third harmonic.

[0027] See also Figure 2 The present invention also provides a radio frequency power amplifier, which includes the drain harmonic suppression bias network 100 as described above.

[0028] See also Figure 2 The RF power amplifier also includes an input matching network 200, a transistor 300, an output matching network 400 and a gate bias circuit 500. The input matching network 200 is connected to the gate of the transistor 300, the output matching network 400 is connected to the drain of the transistor 300, the gate bias circuit 500 is connected to the gate of the transistor 300, and the drain harmonic suppression bias network 100 is connected to the drain of the transistor 300.

[0029] Furthermore, the function of the input matching network 200 is to match the impedance of the input signal with the gate impedance of the transistor 300 to maximize the transmission efficiency of the signal and reduce reflection. This helps to ensure that the transistor can efficiently receive and amplify the input signal. For more details, please refer to Figure 2 The input matching network 200 includes a capacitor C0, an inductor L0, a capacitor C1 and a capacitor C2, wherein the inductor L0 and the capacitor C2 are connected in series, the first ends of the capacitor C0 and the capacitor C1 are connected to the series combination formed by the inductor L0 and the capacitor C2 in series, and the second ends of the capacitor C0 and the capacitor C1 are grounded, wherein the inductor L0 and the capacitor C2 are connected in series to form a series resonant circuit, which has the minimum impedance at a specific frequency and helps to achieve impedance matching, and the first ends of the capacitor C0 and the capacitor C1 are connected to the series combination of the inductor L0 and the capacitor C2, and their second ends are grounded. The capacitor C0 and the capacitor C1 can be used to adjust the input impedance so that the input impedance of the entire network matches the output impedance of the signal source or the pre-stage circuit. Through this design, the input matching network 200 can effectively adjust the impedance of the input end of the RF power amplifier to match the impedance of the signal source, thereby maximizing the transmission efficiency of the signal and reducing reflection.

[0030] Furthermore, transistor 300 is a core component of the amplifier and is responsible for amplifying the input signal. Figure 2The transistor 300 may include a transistor M1 that receives a signal from the input matching network 200 and outputs an amplified signal at a drain.

[0031] Further, the output matching network 400 is similar to the input matching network 200, and the function of the output matching network 400 is to match the drain impedance of the transistor 300 with the impedance of the subsequent circuit or antenna to maximize power transmission and reduce reflection. Figure 2 The output matching network 400 includes an inductor L6, a capacitor C9, an inductor L7, a capacitor C10, an inductor L8 and a capacitor C11, wherein the inductor L6, the inductor L7, the inductor L8 and the capacitor C11 are connected in series, the first ends of the capacitor C9 and the capacitor C10 are connected in parallel to the series combination formed by the series connection of the inductor L6, the inductor L7, the inductor L8 and the capacitor C11, the second ends of the capacitor C9 and the capacitor C10 are connected to the ground, the inductor L6, the inductor L7, the inductor L8 and the capacitor C11 are connected in series to form a resonant circuit, which has the minimum impedance at a specific frequency, which helps to achieve impedance matching, and the capacitor C9 and the capacitor C10 can be used to adjust the input impedance so that the input impedance of the entire network matches the output impedance of the signal source or the previous circuit.

[0032] Furthermore, the gate bias circuit 500 provides an appropriate DC bias voltage for the gate of the transistor 300 to ensure that the transistor operates in the optimal linear amplification region. Figure 2 The gate bias circuit 500 includes an inductor L1, a resistor R0 and a capacitor C3, wherein the inductor L1 and the resistor R0 are connected in series, a first end of the capacitor C3 is connected to a series combination formed by the inductor L1 and the resistor R0 in series, and a second end of the capacitor C3 is grounded. The series combination of the inductor L1 and the resistor R0 is used to provide a stable DC bias voltage, and the inductor L1 helps to prevent high-frequency signals from passing through, preventing these signals from interfering with the DC bias of the gate, and the capacitor C3 provides a low impedance path to the ground, which is used to filter out any possible AC signals and ensure that the gate receives only a stable DC bias voltage.

[0033] Furthermore, the drain harmonic suppression bias network 100 is specifically designed to suppress the second and third harmonics generated during transistor amplification. By resonating at a specific harmonic frequency, it short-circuits these unwanted harmonic components to ground, thereby improving the quality of the output signal.

[0034] See also Figure 2, the first end of the first harmonic suppression module 120 is connected to the drain of the transistor 300, the second end of the first harmonic suppression module 120 is connected to the first end of the drain bias network 110, and the second end of the drain bias network 110 is connected to the drain bias voltage. Specifically, the first end of the first harmonic suppression module 120 is connected to the drain of the transistor 300, which means that the first harmonic suppression module 120 is directly connected to the drain of the transistor, so that the signal output from the drain of the transistor can be preliminarily harmonic processed, and the second end of the first harmonic suppression module 120 is connected to the first end of the drain bias network 110. This connection mode integrates the first harmonic suppression module 120 with the drain bias network 110, so that the harmonic suppression function is combined with the bias control of the transistor. The second end of the drain bias network 110 is connected to the bias voltage source provided to the drain of the transistor. This bias voltage is crucial for the normal operation of the transistor, and it ensures that the transistor operates in the optimal amplification area.

[0035] See also Figure 2 The RF power amplifier further includes a stabilizing network 600, which is connected between the input matching network 200 and the gate of the transistor 300. The stabilizing network 600 is used to prevent the amplifier from self-oscillating under certain conditions. Oscillations can degrade the performance of the amplifier or even damage the device, so the stabilizing network 600 is essential to ensure stable operation of the amplifier. By adding the stabilizing network 600 between the input matching network 200 and the gate of the transistor 300, the stability of the amplifier can be improved, especially in wideband applications, where the stabilizing network 600 introduces specific impedance characteristics to offset conditions that may cause oscillations. Specifically, the stabilization network 600 includes a resistor R1 and a capacitor C4, which are connected in parallel. The resistor R1 provides a damping effect in the parallel combination, which helps to absorb excess energy that may be generated in the amplifier, thereby reducing the possibility of oscillation. The capacitor C4 can provide a frequency compensation function in the parallel combination. In a specific frequency range, the capacitor can provide a low impedance path, which helps to stabilize the frequency response of the amplifier and reduce the instability factors caused by the internal parasitic parameters of the transistor. By connecting the resistor R1 and the capacitor C4 in parallel, the stabilization network 600 can be optimized for a specific frequency range to suppress the oscillation that may be generated inside the amplifier. This design helps to ensure that the amplifier can provide stable amplification performance within a wide frequency band.

[0036] The present invention also provides a method for suppressing drain harmonics, the method comprising: Adding a drain harmonic suppression bias network 100 to the drain of the transistor 300; The drain harmonic suppression bias network 100 includes: a drain bias network 110, a first harmonic suppression module 120, a second harmonic suppression module 130 and a third harmonic suppression module 140, the first harmonic suppression module 120 is connected to the drain bias network 110, the first ends of the second harmonic suppression module 130 and the third harmonic suppression module 140 are respectively connected between the first harmonic suppression module 120 and the drain bias network 110, the second ends of the second harmonic suppression module 130 and the third harmonic suppression module 140 are grounded, the first harmonic suppression module 120 is used to resonate at the fundamental frequency, the second harmonic suppression module 130 is used to resonate at the second harmonic, and the third harmonic suppression module 140 is used to resonate at the third harmonic.

[0037] By adding a drain harmonic suppression bias network 100 to the drain of the transistor 300, the drain harmonic suppression bias network 100 can transmit the baseband signal normally during signal transmission, while suppressing the second and third harmonics. This method innovatively combines harmonic suppression with the bias network, simplifies the circuit structure, reduces the design difficulty and cost, and improves the signal quality. Through this method, the RF power amplifier can not only provide a higher power gain, but also ensure the quality of the output signal, reduce harmonic interference, and improve the overall performance. And separating the harmonic suppression network from the matching network can ensure that the matching network can efficiently match the input signal and improve the performance of the amplifier. At the same time, the harmonic suppression scheme based on the bias circuit can simplify the circuit structure and reduce the design difficulty and cost.

[0038] See also Figure 3 and Figure 4 , Figure 3 : is a comparison chart of the output power (Pout, Poweroutput) of a conventional RF power amplifier and the RF power amplifier provided in this application, Figure 4 The figure is a comparison of the power added efficiency (PAE) of a conventional RF power amplifier and the RF power amplifier provided by the present application. Among them, the conventional RF power amplifier is a structure without a drain harmonic suppression bias network 100, which corresponds to the conventional type in the figure; the RF power amplifier provided by the present application is a structure with a drain harmonic suppression bias network 100, which corresponds to the innovative type in the figure; it can be seen that compared with the conventional RF power amplifier, the improved RF power amplifier has improved performance in output power and power added efficiency. Compared with the increase in output power, the improvement in power added efficiency is more obvious near the fundamental frequency of 26-27 GHz.

[0039] See also Figure 5 and Figure 6 , Figure 5 is a comparison diagram of the input return loss (S11) of a conventional RF power amplifier and the RF power amplifier provided in this application, Figure 6 This is a comparison chart of the output return loss (S22) of a traditional RF power amplifier and the RF power amplifier provided in this application. It can be seen that the traditional RF power amplifier performs better than the improved type in terms of S11. Despite this, the S11 of the improved type is still at a good level. As for the performance of S22, the improved type is significantly better than the traditional type, showing a result far less than -10 dB at the fundamental frequency of 26-27 GHz. Regarding the judgment of the input and output reflection coefficient results of the RF power amplifier, the output reflection coefficient S22 is generally more important. S22 is related to the degree of output matching of the RF power amplifier, ensuring that the RF signal can be well transmitted without being reflected. For the consideration of S11, it is generally lower than -5 dB, and preferably lower than -10 dB.

[0040] See also Figure 7 , Figure 7 This is a comparison chart of the small signal gain (S21) of the traditional RF power amplifier and the RF power amplifier provided in the present application. It can be seen that the traditional RF power amplifier is a smooth downward curve, while the S21 of the improved RF power amplifier has a very obvious drop at the second harmonic and the third harmonic, which indicates that the harmonic suppression network introduced by the present invention has a more obvious harmonic suppression result and realizes the function of harmonic suppression.

[0041] It can be understood that impedance matching is achieved by matching the input and output impedances of the RF power amplifier (generally 50Ω here) to the selected optimal source impedance and optimal load impedance. The advantage of this is that it can maximize power transmission.

[0042] It is understandable that the output power of an RF power amplifier refers to the maximum power that the amplifier can output under specific working conditions, usually expressed in watts (W) or decibel milliwatts (dBm). Output power usually refers to the power that can be continuously provided to the output port load without damaging itself. Output power is one of the important parameters for evaluating the performance of a power amplifier, and directly affects the transmission distance and quality of the signal.

[0043] It can be understood that the efficiency of the RF power amplifier can represent the ratio of the actual useful output power of the RF power amplifier to the total power. It can reflect the power consumption of the RF power amplifier. For RF devices, high power consumption means high heat energy and low energy utilization, which is not conducive to the normal and efficient operation of RF devices. The efficiency of the RF power amplifier can be simply divided into two categories: drain efficiency and power added efficiency. Among them, the power added efficiency mentioned in the present invention takes into account the input power and can better reflect the efficiency of the RF power amplifier.

[0044] As you can understand, the full name of S parameter is scattering parameter, which is used to describe the frequency domain characteristics of the transmission channel. It is a network parameter based on the relationship between the incident wave and the reflected wave. Through S parameters, all characteristics of the transmission channel can be observed, such as signal reflection, crosstalk, loss, etc. S parameters are suitable for microwave circuit analysis. In addition, S parameters are also an excellent way to characterize devices, telling us the ratio of the power transmitted between the two ports. Among them, for a two-port network, S11 is the input reflection coefficient, which indicates the reflectivity of the signal input, and is also the key to characterizing the input matching of the RF power amplifier, S22 is the output reflection coefficient, which indicates the reflectivity of the signal output, and is also the key to characterizing the output matching of the RF power amplifier, S21 is the forward transmission coefficient, also called small signal gain, and S12 is the reverse transmission coefficient, also called isolation.

[0045] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention.

[0046] Obviously, those skilled in the art can make various changes and modifications to the embodiments of the present invention without departing from the spirit and scope of the embodiments of the present invention. Thus, if these modifications and variations of the embodiments of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A drain harmonic suppression bias network, characterized in that: include: A drain bias network, a first harmonic suppression module, a second harmonic suppression module and a third harmonic suppression module, wherein the first harmonic suppression module is connected to the drain bias network, the first ends of the second harmonic suppression module and the third harmonic suppression module are respectively connected between the first harmonic suppression module and the drain bias network, the second ends of the second harmonic suppression module and the third harmonic suppression module are grounded, the first harmonic suppression module is used to resonate at the fundamental frequency, the second harmonic suppression module is used to resonate at the second harmonic, and the third harmonic suppression module is used to resonate at the third harmonic.

2. The drain harmonic suppression bias network according to claim 1, characterized in that: The drain bias network includes an inductor L5 and a capacitor C8, a first end of the inductor L5 is connected to the first harmonic suppression module, a second end of the inductor L5 is connected to the drain bias voltage, a first end of the capacitor C8 is connected to the second end of the inductor L5, and a second end of the capacitor C8 is grounded.

3. The drain harmonic suppression bias network according to claim 1, characterized in that: The first harmonic suppression module includes an inductor L2 and a capacitor C5, and the inductor L2 and the capacitor C5 are connected in parallel.

4. The drain harmonic suppression bias network according to claim 1, characterized in that: The second harmonic suppression module includes an inductor L3 and a capacitor C6, and the inductor L3 and the capacitor C6 are connected in series.

5. The drain harmonic suppression bias network according to claim 1, characterized in that: The third harmonic suppression module includes an inductor L4 and a capacitor C7, and the inductor L4 and the capacitor C7 are connected in series.

6. A radio frequency power amplifier, characterized in that: Comprising a drain harmonic suppression bias network as described in any one of claims 1-5.

7. The radio frequency power amplifier according to claim 6, characterized in that: It also includes an input matching network, a transistor, an output matching network and a gate bias circuit, wherein the input matching network is connected to the gate of the transistor, the output matching network is connected to the drain of the transistor, the gate bias circuit is connected to the gate of the transistor, and the drain harmonic suppression bias network is connected to the drain of the transistor.

8. The radio frequency power amplifier according to claim 7, characterized in that: A first end of the first harmonic suppression module is connected to the drain of the transistor, a second end of the first harmonic suppression module is connected to a first end of the drain bias network, and a second end of the drain bias network is connected to a drain bias voltage.

9. The radio frequency power amplifier according to claim 7, characterized in that: Also included is a stabilizing network connected between the input matching network and the gate of the transistor.

10. A method for suppressing drain harmonics, characterized in that: The method comprises: Add a drain harmonic suppression bias network to the drain of the transistor; The drain harmonic suppression bias network includes: a drain bias network, a first harmonic suppression module, a second harmonic suppression module and a third harmonic suppression module, the first harmonic suppression module is connected to the drain bias network, the first ends of the second harmonic suppression module and the third harmonic suppression module are respectively connected between the first harmonic suppression module and the drain bias network, the second ends of the second harmonic suppression module and the third harmonic suppression module are grounded, the first harmonic suppression module is used to resonate at the fundamental frequency, the second harmonic suppression module is used to resonate at the second harmonic, and the third harmonic suppression module is used to resonate at the third harmonic.

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