Ceramic copper circuit board and semiconductor device using same

Abstract

Provided are a ceramic copper circuit board in which the average length RSm of roughness curve elements of the surface of a copper member is controlled, and a semiconductor device using the same. A ceramic copper circuit board according to an embodiment includes a ceramic substrate and a copper member bonded to one surface of the ceramic substrate. The method is characterized in that when the average length RSm of the roughness curve element is measured at each of five arbitrary positions selected from the surface of the copper member, the average value of the five average lengths RSm is 40 [mu] m or more and 250 [mu] m or less.

Description

Technical Field

[0001] The embodiments described below generally relate to a ceramic copper circuit board and a semiconductor device using the same. Background Art

[0002] A ceramic copper circuit substrate formed by joining a ceramic substrate to a copper plate is used as a circuit substrate for mounting semiconductor elements, etc. In addition, with the high performance of semiconductor elements, it is expected that the junction temperature will increase. Along with this, the joining using Ag nanoparticles in the installation of semiconductor elements has been studied. It has been studied that when the joining using Ag nanoparticles is performed, an Ag layer is set on the surface of the metal plate. For example, the ceramic circuit substrate described in Japanese Patent Gazette No. 6262968 (Patent Document 1) is a substrate obtained by improving the surface roughness (arithmetic mean roughness Ra) of a circuit substrate formed by joining a ceramic substrate to an aluminum plate via a bonding layer. In addition, Ag paste is used in the installation of semiconductor elements, etc. In order to improve the adhesion with the silver layer, a coating is also applied to the surface of the copper plate. Ni-P coating is used for the coating. For example, in Japanese Patent Gazette No. 2019-41108 (Patent Document 2), a recess is shown on the copper surface.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent No. 6262968

[0006] Patent Document 2: Japanese Patent Application Publication No. 2019-41108 Summary of the invention

[0007] Problems to be solved by the invention

[0008] As mentioned above, in order to improve the bonding property with the semiconductor element, silver (Ag) paste is used. On the other hand, when a silver (Ag) layer is provided on the copper member of the ceramic copper circuit substrate, the bonding strength is reduced. The cause was investigated and it was found that the cause was the average length RSm of the roughness curve element on the surface of the copper member. The present invention is an invention for coping with such a problem, and the purpose is to provide a ceramic copper circuit substrate in which the average length RSm of the roughness curve element on the surface of the copper member is controlled.

[0009] Means for solving problems

[0010] The ceramic copper circuit board of the embodiment comprises a ceramic substrate and a copper member bonded to one side of the ceramic substrate, wherein when the average length RSm of the roughness curve element is measured at any five locations selected from the surface of the copper member, the average value of the five average lengths RSm is greater than or equal to 40 μm and less than or equal to 250 μm. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 This is a schematic diagram showing an example of a ceramic copper circuit board according to an embodiment.

[0012] Figure 2 It is a schematic diagram which shows the method of the bonding strength (peel strength) test in an Example.

[0013] Figure 3 It is a schematic diagram showing an example of a semiconductor device according to an embodiment. DETAILED DESCRIPTION

[0014] The ceramic copper circuit board of the embodiment comprises a ceramic substrate and a copper member bonded to one side of the ceramic substrate, wherein when the average length RSm of the roughness curve element is measured at any five locations selected from the surface of the copper member, the average value of the five average lengths RSm is greater than or equal to 40 μm and less than or equal to 250 μm.

[0015] The drawings accompanying this application are described. Figure 1 This is a schematic diagram showing an example of a ceramic copper circuit board according to an embodiment of the present invention. Figure 1 This shows an example of bonding two copper plates to both sides of a ceramic substrate. The copper plate is an example of a copper component. Figure 1 In the figure, 1 is a ceramic copper circuit substrate, 2 is a ceramic substrate, 3 is a copper plate (surface copper plate), 4 is a copper plate (back copper plate), and 5 is a solder layer (active metal solder layer).

[0016] exist Figure 1 In the ceramic copper circuit board 1 shown in FIG. 1 , a copper plate 3 and a copper plate 4 are arranged on both sides of a ceramic substrate 2 via a solder layer 5 . Figure 1 In the structure shown in , the copper plate 3 is given a circuit shape, and the copper plate 4 is used as a heat sink. For convenience, the copper plate 3 is called a surface copper plate, and the copper plate 4 is called a back copper plate. In addition, two surface copper plates 3 are arranged. The ceramic copper circuit substrate 1 of the embodiment is not limited to such a form. More than three surface copper plates 3 may be provided in the ceramic substrate 2, or only one surface copper plate 3 may be provided. In addition, the ceramic copper circuit substrate 1 may also have a structure in which the back copper plate 4 is given a circuit shape. Alternatively, the ceramic copper circuit substrate 1 may also have a structure in which only the surface copper plate 3 is provided without the back copper plate 4. In Figure 1 , there is shown an example in which copper plates are bonded to both surfaces of the ceramic substrate 2. When the back copper plate 4 is used as a heat dissipation member, an aluminum plate may be used as a heat dissipation plate instead of the back copper plate 4.

[0017] Figure 2Schematic diagram showing the method of the bonding strength (peel strength) test in the embodiment of the present invention. Figure 2 In the figure, 1 is a ceramic copper circuit substrate, 6 is a bonding layer, and 7 is a silver ribbon. Figure 2 As shown in , the peel strength test was performed using a silver tape. Figure 3 Schematic diagram showing an example of a semiconductor device according to an embodiment of the present invention. Figure 3 In the figure, 6 is a bonding layer, 8 is a semiconductor element, and 9 is a semiconductor device. Figure 3 In the semiconductor device 9 described in the embodiment, one semiconductor element 8 is mounted on the surface copper plate 3. In the semiconductor device 9, a plurality of semiconductor elements 8 may be provided. A plurality of semiconductor elements 8 may also be mounted on one surface copper plate 3. Figure 3 In the example shown in , the semiconductor device 9 includes the bonding layer 6 (brazing layer), but the bonding layer 6 may not be provided and the surface copper plate 3 and the semiconductor element 8 may be directly bonded.

[0018] The ceramic substrate 2 is a silicon nitride substrate, an aluminum nitride substrate, an aluminum oxide substrate, an aluminum oxide zirconia substrate, etc. The thickness of the ceramic substrate 2 is preferably 0.1 mm or more and 3 mm or less. When the thickness of the substrate is less than 0.1 mm, it is possible to reduce the strength. If the thickness of the substrate is thicker than 3 mm, the ceramic substrate 2 becomes a thermal resistor, and the heat dissipation of the ceramic copper circuit substrate 1 may be reduced. The more preferred range of the thickness of the ceramic substrate 2 is 0.2 mm or more and 2 mm or less.

[0019] The 3-point bending strength of the silicon nitride substrate is preferably 600 MPa or more. The thermal conductivity is preferably 80 W / m·K or more. If the thermal conductivity is 80 W / m·K or more, the thermal conductivity of the silicon nitride substrate may also be 90 W / m·K or more, or 130 W / m·K or more. By increasing the strength of the substrate, the thickness of the substrate can be reduced. Therefore, the 3-point bending strength of the silicon nitride substrate is preferably 600 MPa or more, and more preferably 700 MPa or more. By using a silicon nitride substrate, the substrate thickness can be reduced to less than 0.40 mm, and further less than 0.30 mm.

[0020] The three-point bending strength of an aluminum nitride substrate is about 300 to 450 MPa. On the other hand, the thermal conductivity of an aluminum nitride substrate is more than 160 W / m·K. Since the strength of an aluminum nitride substrate is low, the substrate thickness is preferably more than 0.60 mm. The three-point bending strength of an alumina substrate is about 300 to 450 MPa, but an alumina substrate is cheap. The three-point bending strength of an alumina zirconia substrate is as high as about 550 MPa, but the thermal conductivity is about 30 to 50 W / m·K. The so-called alumina zirconia substrate is a substrate made of a sintered body mixed with alumina and zirconium oxide.

[0021] The ceramic substrate 2 is preferably any one of a silicon nitride substrate or an aluminum nitride substrate. Silicon nitride substrates and aluminum nitride substrates are nitride-based ceramic substrates. Nitride-based ceramics react with active metal brazing materials containing Ti to form titanium nitride. Oxide-based ceramics react with active metal brazing materials containing Ti to form titanium oxide. Nitride-based ceramics can improve the bonding strength with copper components (especially copper plates) by using active metal bonding methods.

[0022] The copper member is oxygen-free copper, copper alloy, etc. Generally speaking, the thermal conductivity of copper is as high as about 400 W / m·K, so the heat dissipation of the ceramic copper circuit substrate 1 can be improved. In addition, the thickness of the copper plate 3 and the thickness of the copper plate 4 can also be 0.3 mm or more, and further 0.6 mm or more. The so-called copper plate of 0.6 mm or more includes, for example, a 1 mm copper plate, a 2 mm copper plate, etc.

[0023] By thickening the copper plate, the heat dissipation of the joint body (ceramic copper circuit substrate 1) can be improved. In addition, the thickness of the surface copper plate 3 and the thickness of the back copper plate 4 can be the same or different. The copper component is preferably a component made of oxygen-free copper or a component in which a graphite layer exists in the copper layer. Oxygen-free copper has a copper purity of more than 99.96wt% as shown in JIS-H-3100 (ISO1337, etc.). The copper component can be directly bonded to the ceramic substrate 2 or bonded to the ceramic substrate 2 via a solder layer. It is also possible to bond a copper component to which a circuit shape is pre-given by punching the copper plate, etc. on the ceramic substrate. After the copper plate is bonded to the ceramic substrate, the circuit shape can also be given to the copper plate by etching. The heat dissipation component can also have a shape that protrudes relative to the ceramic substrate (for example, a shape in which a heat sink and a lead frame are integrated). A groove shape can also be provided in the heat dissipation component.

[0024] In the ceramic copper circuit substrate 1 of the embodiment, when the average length RSm of the roughness curve element is measured at any 5 locations selected from the surface of the copper component, the average value of the 5 average lengths RSm is preferably 40 μm or more and 250 μm or less. More preferably, the average value of the 5 average lengths RSm is 50 μm or more and 200 μm or less. Most preferably, the average value of the 5 average lengths RSm is 60 μm or more and 150 μm or less. If the average length RSm of the roughness curve element is within the above range, the bonding material can easily enter the tiny recesses in the surface of the copper plate 4. Therefore, the bonding between the copper plate 4 and the bonding layer 6 can be made stronger.

[0025] It should be noted that any five locations are selected from regions that do not overlap each other and are 500 μm or more apart from each other. In addition, the so-called "surface" refers to the region other than the side. The average length RSm of the roughness curve element in the side may be within the above-mentioned preferred range or may be outside the range.

[0026] The measurement length is set to 4 mm each time. If it is not possible to measure at a measurement length of 4 mm, multiple locations (3 or less) are measured instead. Each measurement length is set so that the total value of the measurement lengths of multiple locations becomes 4 mm, and the average length RSm measured at each location is averaged according to the ratio of the measurement lengths.

[0027] For example, the RSm value measured at the first site with a measurement length of 3 mm is A μm, and the RSm value measured at the second site with a measurement length of 1 mm is B μm. In this case, RSm is calculated by the following formula.

[0028] RSm=(3A+B) / 4

[0029] For calculation of surface roughness such as average length RSm, refer to JIS B 0601: 2013. JIS-B-0601 corresponds to ISO 4287. For measurement of surface roughness, an apparatus having a measurement accuracy equal to or higher than that of SURFCOM 2000DX-23 manufactured by Tokyo Seimitsu Co., Ltd. is used.

[0030] The minimum value of the 5 average lengths RSm is preferably greater than 30 μm. Therefore, each numerical value (absolute value) of the 5 average lengths RSm is more preferably greater than 30 μm and less than 250 μm. It is further preferred that each numerical value of the 5 average lengths RSm is greater than 35 μm and less than 150 μm. Most preferably, each numerical value of the 5 average lengths RSm is greater than 40 μm and less than 140 μm. The value of each average length RSm is within the above range and indicates that the difference in the average length RSm of each measurement site is small and its unevenness is controlled. Therefore, the unevenness of the bonding strength can be reduced, and a ceramic copper circuit substrate 1 with better ease of use can be obtained.

[0031] In addition, it is preferred that in addition to the average length RSm, the arithmetic mean roughness Ra is also controlled. When the arithmetic mean roughness Ra is measured at any 5 locations selected from the surface of the copper component, the average value of the 5 arithmetic mean roughness Ra is preferably greater than 0.1 μm and less than 0.7 μm. More preferably, the average value of the above 5 arithmetic mean roughness Ra is greater than 0.2 μm and less than 0.6 μm. In addition, any one of the 5 arithmetic mean roughness Ra is preferably greater than 0 μm and less than 1.5 μm. More preferably, any arithmetic mean roughness Ra is greater than 0.05 μm and less than 1.0 μm.

[0032] Preferably, the maximum valley depth Rv of the roughness curve is also controlled. When the maximum valley depth Rv of the roughness curve is measured at any 5 locations selected from the surface of the copper component, the average value of the 5 maximum valley depths Rv is preferably 0.4 μm or more and 2.5 μm or less. More preferably, the average value of the 5 maximum valley depths Rv is 0.5 μm or more and 2.0 μm or less. It is further preferred that the average value of the 5 maximum valley depths Rv is 0.6 μm or more and 1.8 μm or less.

[0033] The surface roughness is preferably controlled so that the minimum value of the five maximum valley depths Rv is greater than or equal to 0.25 μm and less than or equal to 2.5 μm. The surface roughness is more preferably controlled so that the minimum value of the five maximum valley depths Rv is greater than or equal to 0.3 μm and less than or equal to 2.4 μm. The surface roughness is further preferably controlled so that the minimum value of the five maximum valley depths Rv is greater than or equal to 0.4 μm and less than or equal to 2.3 μm.

[0034] Furthermore, it is preferable that the maximum height roughness Rz is also controlled. When the maximum height roughness Rz of the roughness curve is measured at five arbitrary points selected from the surface of the copper member, the average value of the five maximum height roughness Rz is preferably 10 μm or less.

[0035] When measuring the average length RSm, the arithmetic mean roughness Ra, the maximum valley depth Rv, and the maximum height roughness Rz, all the measurement locations are the same location. That is, the 5 locations where the average length RSm is measured, the 5 locations where the arithmetic mean roughness Ra is measured, the 5 locations where the maximum valley depth Rv is measured, and the 5 locations where the maximum height roughness Rz is measured are the same.

[0036] In the ceramic copper circuit substrate 1, the ceramic substrate 2 and the copper plate 3 are preferably joined via a solder layer 5. Furthermore, the solder layer 5 preferably contains silver (Ag), copper (Cu), or an active metal. As specific examples, a solder layer containing Ag, Cu and an active metal, a solder layer substantially free of Ag and containing copper and an active metal, a solder layer containing Cu and magnesium (Mg), etc. can be cited. The so-called substantially free of Ag means that Ag is not intentionally added, including the case where Ag is inevitably contained as an impurity. Sn or In may also be added as needed. The solder layer 5 may also contain more than 0.1% by mass and less than 10% by mass of one or more selected from carbon (C), tungsten (W), molybdenum (Mo) and rhenium (Re). By adding carbon, tungsten, molybdenum and rhenium, the fluidity of the active metal solder can be controlled. In addition, in the solder layer 5, manganese (Mn) may also be added as needed.

[0037] For the bonding of the ceramic substrate 2 and the copper plate 4, an active metal brazing filler metal containing an active metal is preferably used. The active metal is preferably selected from one or more of Ti (titanium), Nb (niobium), Zr (zirconium), and Hf (hafnium). The active metal brazing filler metal preferably contains at least Ti. In addition, the thickness of the bonding layer is preferably greater than 5 μm. More preferably, the thickness of the brazing filler metal layer 5 is greater than 10 μm and less than 200 μm. It is further preferred that the thickness of the brazing filler metal layer 5 is greater than 15 μm and less than 150 μm. If the brazing filler metal layer 5 is as thin as less than 5 μm, it may not be possible to maintain sufficient bonding strength. On the other hand, if the brazing filler metal layer 5 is thicker than 200 μm, it may become a factor in increased costs.

[0038] Next, the composition and joining method of each solder component are described. The content of Ag contained in the solder is preferably within the range of 0 mass % or more and 95 mass % or less. The content of Cu is preferably within the range of 3 mass % or more and 90 mass % or less. The total content of active metals or active metal hydrides is preferably within the range of 1 mass % or more and 15 mass % or less. The total content of Sn or In is preferably within the range of 1 mass % or more and 30 mass % or less. More preferably, the total content of Sn or In is within the range of 2 mass % or more and 15 mass % or less.

[0039] Ag or Cu is a component that becomes the main component of the brazing material layer 5. The active metal or active metal hydride is a component used to react with the ceramic substrate 2 to obtain a strong bond. Sn or In has the effect of lowering the melting point of the active metal brazing material. In addition, the brazing material may also contain inevitable impurities.

[0040] In the active metal brazing filler metal, carbon (C) may be added in an amount of 0.1% by mass or more and 2% by mass or less. In addition, in the active metal brazing filler metal, one or more selected from tungsten (W), molybdenum (Mo), and rhenium (Re) may be added in an amount of 0.1% by mass or more and 10% by mass or less. By adding carbon, tungsten, molybdenum, and rhenium, the fluidity of the active metal brazing filler metal can be controlled. Manganese (Mn) may also be added to the brazing filler metal as needed.

[0041] The composition ratio of the above-mentioned active metal brazing filler metal is the ratio when the total of each metal component is set to 100% by mass. For example, when titanium nitride powder is used, it is set to the mass% of titanium. It should be noted that the mass of organic matter such as adhesives is not counted. In the joining method involved in the embodiment, a brazing filler metal paste of the above-mentioned formula can be prepared and applied on a ceramic substrate, or a metal foil of the above-mentioned formula can be used instead of the brazing filler metal paste. Here, the method using the brazing filler metal paste is described. The various brazing filler metal components are mixed, and an adhesive is added to prepare an active metal brazing filler metal paste.

[0042] Various substrates can be applied to the ceramic substrate 2. Examples of ceramic substrates include silicon nitride substrates, aluminum nitride substrates, aluminum oxide substrates, zirconium oxide substrates, and aluminum oxide zirconium oxide (a mixture of aluminum oxide and zirconium oxide) substrates. The types of the above substrates can also be classified into oxide-based ceramic substrates or nitride-based ceramic substrates. The types of substrates can also be classified according to the metal component, such as silicon-containing ceramic substrates, aluminum-containing ceramic substrates, and zirconium-containing ceramics.

[0043] Silicon nitride substrates and aluminum nitride substrates are called nitride-based ceramic substrates. If the nitride-based ceramic and the copper plate are bonded by an active metal bonding method, the active metal reacts with the nitride-based ceramic substrate to form an active metal nitride layer. When Ti is used as the active metal, a titanium nitride (TiN) layer is formed. By forming this active metal nitride layer, the bonding strength between the ceramic substrate 2 and the copper plate 3 can be improved.

[0044] Alumina substrates, zirconium oxide substrates, and alumina zirconium oxide substrates are referred to as oxide-based ceramic substrates. If the oxide-based ceramic substrate and the copper plate are bonded by an active metal bonding method, the active metal reacts with the oxide-based ceramic substrate to form an active metal oxide layer. When Ti is used as the active metal, a titanium oxide (TiO2) layer is formed. By forming this active metal oxide layer, the bonding strength between the ceramic substrate 2 and the copper plate 3 can be improved.

[0045] The joint body formed by joining the ceramic substrate 2 and the copper plate 3 can also be a collective substrate that can be divided into two or more for obtaining a plurality of pieces. Individual joint bodies can be obtained by dividing the collective substrate into a plurality of pieces. The joint body can also further have a notch shape or a through hole for screw fixing, etc. That is, the shape of the ceramic copper circuit substrate 1 is not limited to the short shape shown in the figure. In addition, it is preferred that the joint body is prepared by placing copper plates on both sides of the ceramic substrate and heating at 850°C, and then etching the surface copper plate to obtain Figure 1 Such a ceramic copper circuit board 1.

[0046] The thickness of the copper component is preferably 0.3 mm or more. By thickening the copper plate 3, heat dissipation can be improved. In addition, the current carrying capacity can also be increased. Therefore, the thickness of the copper plate is preferably 0.3 mm or more, and more preferably 0.6 mm or more. The upper limit of the thickness of the copper plate is not particularly limited, but is preferably 5 mm or less. If it exceeds 5 mm, it may become difficult to impart the circuit shape by etching. Both the thickness of the surface copper plate 3 and the thickness of the back copper plate 4 are preferably 0.3 mm or more.

[0047] Here, "copper plate" also includes copper alloy plate. The copper plate is preferably an oxygen-free copper plate. Oxygen-free copper has a copper purity of 99.96wt% or more as shown in JIS-H-3100. A film may be provided on the surface of the copper component, or a rust inhibitor may be applied. The rust inhibitor and the film may be provided partially or on the entire surface of the copper component. The copper plate may also be given a predetermined shape such as a circuit shape before joining by punching or the like. Furthermore, a rust inhibitor may also be applied to the surface of the copper plate.

[0048] Figure 1 The ceramic copper circuit board 1 is shown as an example having a three-layer structure of copper-ceramic-copper. The structure of the ceramic copper circuit board 1 is not limited to the example shown in the figure. For example, the ceramic copper circuit board 1 may also have a structure of five or more layers such as copper-ceramic-copper-ceramic-copper.

[0049] In the bonding of the copper plate and the semiconductor element, it is preferred to use a paste containing one or more selected from silver and copper. It is more preferred to make at least one of silver or copper the main component in the solid content. Here, the so-called main component refers to a component that accounts for more than 50wt%. The bonding material containing more than 50wt% of silver or copper is different from the general SnAg solder and SnCu solder. The paste used for bonding with the semiconductor element preferably contains no more than the metal components other than copper or silver to the extent of impurities. It is more preferred to use a silver paste or a copper paste. It is further preferred to use a silver paste. Although the silver paste may cause ion migration, it is less oxidizable than copper. It is preferred because it can maintain the reliability of the bonding. The copper paste is easily oxidized, but it is difficult to cause ion migration. Therefore, the paste can also be used according to the purpose of the ceramic copper circuit substrate 1.

[0050] Here, the copper component-ceramic substrate-copper component is recorded as an example of an embodiment of the present invention, but the structure of the ceramic copper circuit substrate 1 is not particularly limited. The ceramic copper circuit substrate 1 may also have a structure such as a copper component-ceramic substrate-copper component-ceramic substrate-copper component. The heat sink may also be aluminum, as in the case of a copper component-ceramic substrate-aluminum component. The thickness of the heat sink may be different from the thickness of the circuit portion (surface copper plate 3). The heat sink may also have a shape integrated with the lead. That is, the copper component may also extend relative to the ceramic substrate 2.

[0051] Next, the method for controlling the surface roughness is described. First, a ceramic copper circuit substrate 1 is prepared. Next, the surface roughness of the copper component (surface copper plate 3) is measured to confirm whether its surface roughness is within the preferred range. For general copper components, in most cases, the surface is smooth, and the average value of the average length RSm is less than 40μm. In the process of preparing the ceramic copper circuit substrate 1, the surface roughness can also be controlled by methods other than the following examples. For example, the removal process or the bonding process of the resist provided on the surface of the copper component can also be worked on, and the surface roughness can be controlled in a manner that is within the preferred range. In the case where the surface roughness is not within the preferred range, it is preferred to implement a process for controlling the surface properties. It is also possible to implement a surface property control process without measuring the surface properties. As a method for controlling the surface properties, for example, grinding paper, plasma treatment, etc. can be listed.

[0052] As grinding paper, for example, sandpaper can be cited. When using sandpaper, its grain size (particle size) is preferably more than 20 μm and less than 50 μm. It is also possible to not only control the grain size, but also change the number of frictions in the same direction to adjust the surface roughness. As the number of frictions, it is preferably more than 2 times and less than 30 times. By rubbing the surface of the copper component with sandpaper, the surface roughness can be controlled. The surface becomes rough by increasing the number of frictions or strengthening the friction intensity. In addition, the larger the grain size, the rougher the surface after friction.

[0053] When plasma treatment is performed, argon (Ar) gas is preferably used. Specifically, a ceramic copper circuit substrate 1 is arranged in a processing space to generate plasma of Ar gas. The surface of the copper component is exposed to plasma, and the surface becomes rougher. Plasma treatment can be performed at normal pressure or in a reduced pressure atmosphere. If plasma treatment is used, it is also possible to remove elements other than copper attached to the surface of the copper component, so it is preferred.

[0054] The surface property of the copper component can also be controlled by etching or chemical grinding. In this case, it is preferred to use a reagent that controls the dissolution rate of the copper component. By using a reagent that controls the dissolution rate and controlling the time the copper component is in contact with the reagent, the surface of the copper component can be more controlled. The method for controlling the surface property is preferably selected from any one of the above methods, and two or more methods can also be combined.

[0055] When the semiconductor element is joined, the holding time of the pressurized sintering is preferably more than 100 seconds and less than 280 seconds. The holding time is further preferably more than 120 seconds and less than 200 seconds. If the holding time is within the above range, the unevenness of the joining can be reduced, so it is preferred. In addition, a reducing agent can also be added to the joining layer between the copper component and the semiconductor element. The difference between the average length RSm of the roughness curve element of the surface copper plate 3 and the average length RSm of the roughness curve element of the back copper plate 4 is preferably less than 100μm.

[0056] As the semiconductor element, Si element, SiC element, or GaN element can be listed. Among them, any one of SiC element and GaN element is preferred. These semiconductor elements may also be elements processed by a dicing machine.

[0057] (Example)

[0058] The following is an example of the present invention. First, copper plates are disposed on both sides of a ceramic substrate via an active metal brazing layer. The copper plate is bonded to the ceramic substrate by heating the laminate to obtain a ceramic copper circuit substrate. In the ceramic copper circuit substrate, the ceramic substrate is a silicon nitride substrate or an aluminum nitride substrate. The thickness of the copper plate is set to be greater than 0.3 mm and less than 1.0 mm. The thickness of the brazing layer is set to be greater than 30 μm and less than 50 μm. The type of ceramic substrate, the thickness of the copper plate and the thickness of the brazing layer in the examples and comparative examples are as shown in Table 1.

[0059] Table 1

[0060] Ceramic Substrate Copper plate thickness (mm) Solder layer thickness (μm) Example 1 Silicon Nitride Substrate 0.8 50 Example 2 Silicon Nitride Substrate 1.0 40 Example 3 Silicon Nitride Substrate 0.8 30 Example 4 Silicon Nitride Substrate 0.6 20 Example 5 Aluminum Nitride Substrate 0.6 30 Example 6 Aluminum Nitride Substrate 0.3 40 Example 7 Aluminum Nitride Substrate 0.3 40 Example 8 Silicon Nitride Substrate 0.8 50 Example 9 Silicon Nitride Substrate 1.0 40 Example 10 Silicon Nitride Substrate 0.8 20 Embodiment 11 Silicon Nitride Substrate 1.2 25 Comparative Example 1 Silicon Nitride Substrate 0.8 50 Comparative Example 2 Silicon Nitride Substrate 0.8 50

[0061] In Examples 1-11 and Comparative Examples 1-2, the surface of the copper plate of the obtained joint body is treated with sandpaper. The grain size of the sandpaper used in the examples is 20 μm to 50 μm. The surface of the copper plate is rubbed 2 to 30 times in approximately the same direction to make the surface of the copper plate rough. On the other hand, in Comparative Example 1, the surface of the copper component is rubbed 10 times using sandpaper with a grain size of 5 μm or less. In Comparative Example 2, the surface of the copper component is rubbed 20 times using sandpaper with a grain size of 100 μm or more.

[0062] In Examples 1-11 and Comparative Examples 1-2, the surface roughness of the copper (Cu) components was measured. The results obtained by measuring the surface roughness are shown in Table 2. For the measurement of the surface roughness, SURFCOM 2000DX-23 manufactured by Tokyo Seimitsu Co., Ltd. was used. The surface roughness of 5 selected locations on the surface of the copper plate was measured. Each measurement location was more than 500 μm apart from each other. In addition, from the results of the 5 measurements, the values ​​of RSm, Ra, Rv, and Rz were measured simultaneously. That is, the four parameters of RSm, Ra, Rv, and Rz were measured simultaneously from one measurement location.

[0063] Table 2 records the average value of RSm at 5 locations, the minimum value among 5 RSm, the average value of Ra at 5 locations, and the average value of Rv at 5 locations. In addition, in the column of the minimum value of RSm, the value that deviates the most from 145 μm (the average value of 40 μm and 250 μm in the range described in claim 1) is recorded in parentheses. In any example, the measured length is unified as 4.0 mm.

[0064] Table 2

[0065]

[0066] As can be seen from Table 2, in Examples 1 to 11, the average values ​​of RSm at 5 points are within the preferred range. In Examples 2 to 6, Example 8, and Example 11, the minimum value of RSm is within the preferred range. On the other hand, in Example 1, Example 7, Example 9, and Example 10, the minimum value of RSm is outside the preferred range.

[0067] In Example 1-5, the average value of Ra at 5 locations is also within the preferred range. In Example 6, the average value of Ra is outside the preferred range. Furthermore, in Example 1-5, the average value of Rv at 5 locations is also within the preferred range. In Example 6, the average value of Rv is outside the preferred range. In addition, in Example 1-5, Rz is less than 10 μm at any measurement location. On the other hand, in Example 6, there is a location where Rz exceeds 10 μm.

[0068] Silver (Ag) paste is applied on the surface of the copper plate and dried. Figure 2In this way, a silver (Ag) tape is assembled on the copper plate surface of the obtained ceramic copper circuit substrate, and pressure sintering is performed. The bonding strength of the silver (Ag) tape is measured by a peel strength test. In the peel strength test, the silver tape is stretched vertically along the surface direction of the ceramic substrate, and the strength of the silver tape when it is peeled off from the copper plate is measured. Examples of the above-mentioned peel strength of the silver tape being 4.0 or more are set as "best". Examples of peel strength being 3.0 or more and less than 4 are set as "better". Examples of peel strength being 2.0 or more and less than 3.0 are set as "good". Examples of peel strength being less than 2.0 are set as "bad".

[0069] The peel strength test was performed using MX2 series manufactured by Imada Co., Ltd. (test speed: 60 mm / min), and the electrical signal obtained in the device was converted into a numerical value using a load cell FGP-5 (5 kgf) manufactured by Nidec Shimpo Corporation. The results are shown in Table 3.

[0070] Table 3

[0071] Reliability of bonding Example 1 better Example 2 most Example 3 most Example 4 most Example 5 most Example 6 good Example 7 good Example 8 most Example 9 good Example 10 good Embodiment 11 most Comparative Example 1 Difference Comparative Example 2 Difference

[0072] As can be seen from Table 3, for the examples in which any one of the average value of RSm, the average value of Ra, and the average value of Rv is within the preferred range, the peel strength is 4.0 or more. On the other hand, for Example 1 in which the minimum value of RSm is out of the preferred range, the result of the peel strength test is 3.0 or more and less than 4.0. For Example 6 in which the average value of Ra and the average value of Rv are out of the preferred range, the result of the peel strength test is 2.0 or more and less than 3.0. For Comparative Example 1-2 in which the average value of RSm, the average value of Rv, and the minimum value of RSm are out of the preferred range, the result of the peel strength test is less than 2.0.

[0073] As can be seen from the results of Table 2 and Table 3, it is known that the value of the surface roughness (particularly RSm) greatly affects the peel strength in bonding with the silver layer.

[0074] This is believed to be due to the following reasons. When the average length RSm of the roughness curve element is less than 40μm, the period of the concavo-convex in the surface of the copper plate is short. The solder does not fully enter the concavo-convex on the surface of the copper plate, and the bonding strength is reduced. On the other hand, when the average length RSm exceeds 250μm, due to the long period of the concavo-convex, the anchoring effect is not fully exerted relative to the bonding layer in contact with the surface of the copper plate, and the bonding strength is reduced. By having an average value of the average length RSm of more than 40μm and less than 250μm, the anchoring effect relative to the bonding layer can be improved, thereby improving the bonding strength.

[0075] The control of the surface roughness is particularly useful when a ceramic copper circuit board and a semiconductor element are bonded together using a silver paste.

[0076] In the embodiment of the present invention, the bonding layer of the silver strip and the copper plate is measured with a silver paste, but it is not limited thereto, and may also be a lead-free solder or a copper paste. In addition, a reducing agent may be added to the paste as required. In addition, the peel strength of the copper plate and the above-mentioned bonding layer was investigated, but the bonding method via the above-mentioned bonding layer may be arbitrary.

[0077] (Composition 1)

[0078] A ceramic copper circuit substrate, comprising:

[0079] Ceramic substrates, and

[0080] A copper member bonded to one side of the ceramic substrate,

[0081] When the average lengths RSm of the roughness curve elements are measured at five arbitrary points selected from the surface of the copper member, the average value of the five average lengths RSm is 40 μm or more and 250 μm or less.

[0082] (Composition 2)

[0083] The ceramic copper circuit board according to claim 1, wherein the average value of the five average lengths RSm is greater than or equal to 60 μm and less than or equal to 150 μm.

[0084] (Composition 3)

[0085] The ceramic copper circuit substrate according to claim 1 or 2, wherein the minimum value of the five average lengths RSm is greater than 30 μm.

[0086] (Composition 4)

[0087] The ceramic copper circuit board according to any one of claims 1 to 3, wherein when the arithmetic mean roughness Ra is measured at each of the five locations, the average value of the five arithmetic mean roughness Ra is 0.1 μm or more and 0.7 μm or less.

[0088] (Composition 5)

[0089] According to any one of claims 1 to 4, when the maximum valley depths Rv of the roughness curve are measured at the five locations, the average value of the five maximum valley depths Rv is 0.5 μm or more and 2 μm or less.

[0090] (Composition 6)

[0091] The ceramic copper circuit board according to any one of claims 1 to 5, further comprising a brazing material layer for bonding the ceramic substrate and the copper member.

[0092] The brazing filler metal layer contains one or more selected from the group consisting of silver, copper and active metals.

[0093] (Composition 7)

[0094] The ceramic copper circuit board according to any one of claims 1 to 6, wherein a main component of the ceramic substrate is at least one selected from silicon nitride, aluminum nitride, aluminum oxide, or zirconium oxide.

[0095] (Composition 8)

[0096] The ceramic copper circuit board according to any one of claims 1 to 7, wherein the copper member has a thickness of 0.6 mm or more.

[0097] (Composition 9)

[0098] A semiconductor device comprising: the ceramic copper circuit substrate according to any one of claims 1 to 8, and

[0099] A semiconductor element is mounted on the copper member.

[0100] (Composition 10)

[0101] A semiconductor device comprising: the ceramic copper circuit substrate according to any one of claims 1 to 8,

[0102] A semiconductor element mounted on the copper member, and

[0103] A bonding layer bonding the semiconductor element to the copper member,

[0104] The bonding layer contains silver or copper.

[0105] According to an embodiment of the present invention, there are provided a ceramic copper circuit board and a semiconductor device in which the average length RSm of the roughness curve element of the surface of a copper member is controlled.

[0106] Several embodiments of the present invention are illustrated above, but these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other ways, and various omissions, substitutions, changes, etc. can be made without departing from the scope of the main purpose of the invention. These embodiments and their modifications are included in the scope and main purpose of the invention, and are also included in the invention recorded in the claims and their equivalents. In addition, the above-mentioned embodiments can be implemented in combination with each other.

[0107] Explanation of symbols

[0108] 1…Circuit board

[0109] 2…Ceramic substrate

[0110] 3…Copper components (surface copper plates)

[0111] 4…Copper component (copper back plate)

[0112] 5…Brass layer (active metal brazing layer)

[0113] 6…Joint layer (joint layer using silver paste or copper paste)

[0114] 7…Silver Belt

[0115] 8…Semiconductor components

[0116] 9…Semiconductor devices

Claims

1. A ceramic copper circuit substrate, comprising: a ceramic substrate, and a copper member bonded to one side of the ceramic substrate, When the average lengths RSm of the roughness curve elements are measured at five arbitrary points selected from the surface of the copper member, the average value of the five average lengths RSm is 40 μm or more and 250 μm or less.

2. The ceramic copper circuit substrate according to claim 1, wherein: The average value of the five average lengths RSm is 60 μm or more and 150 μm or less.

3. The ceramic copper circuit substrate according to claim 1, wherein: The minimum value of the five average lengths RSm is greater than or equal to 30 μm.

4. The ceramic copper circuit substrate according to claim 1, wherein: When the arithmetic mean roughness Ra is measured at each of the five locations, the average value of the five arithmetic mean roughness Ra is 0.1 μm or more and 0.7 μm or less.

5. The ceramic copper circuit substrate according to claim 1, wherein: When the maximum valley depths Rv of the roughness curve are measured at the five locations, the average value of the five maximum valley depths Rv is greater than or equal to 0.5 μm and less than or equal to 2 μm.

6. The ceramic copper circuit substrate according to claim 2, wherein: The minimum value of the five average lengths RSm is greater than or equal to 30 μm.

7. The ceramic copper circuit substrate according to claim 2, wherein: When the maximum valley depths Rv of the roughness curve are measured at the five locations, the average value of the five maximum valley depths Rv is greater than or equal to 0.5 μm and less than or equal to 2 μm.

8. The ceramic copper circuit substrate according to claim 6, wherein: When the maximum valley depths Rv of the roughness curve are measured at the five locations, the average value of the five maximum valley depths Rv is greater than or equal to 0.5 μm and less than or equal to 2 μm.

9. The ceramic copper circuit substrate according to claim 1, wherein: further comprising a brazing material layer for bonding the ceramic substrate and the copper member, The brazing filler metal layer contains one or more selected from the group consisting of silver, copper and active metals.

10. The ceramic copper circuit substrate according to claim 1, wherein: The main component of the ceramic substrate is one or more selected from silicon nitride, aluminum nitride, aluminum oxide, or zirconium oxide.

11. The ceramic copper circuit substrate according to claim 6, wherein: The main component of the ceramic substrate is one or more selected from silicon nitride, aluminum nitride, aluminum oxide, or zirconium oxide.

12. The ceramic copper circuit substrate according to claim 1, wherein: The copper component has a thickness of 0.6 mm or more.

13. A semiconductor device comprising: the ceramic copper circuit substrate according to any one of claims 1 to 12, and A semiconductor element is mounted on the copper member.

14. A semiconductor device comprising: the ceramic copper circuit substrate according to any one of claims 1 to 12, A semiconductor element mounted on the copper member, and a bonding layer bonding the semiconductor element to the copper member, The bonding layer contains silver or copper.

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