Wideband amplifier

Abstract

The wideband amplifier comprises an input matching network for impedance matching of the transconductance stage to the input and an output matching network for impedance matching of the transconductance stage to the output. The input matching network and the output matching network each include a parallel LC resonator circuit arranged in parallel with the series LC resonator circuit. The resonant cavity circuit arrangement configures the input matching network and the output matching network to resonate at a first frequency, an intermediate frequency greater than the first frequency, and a second frequency greater than the intermediate frequency to provide broadband matching.

Description

Technical Field

[0001] The present application relates to amplifiers, and more particularly, to broadband amplifiers. Background Art

[0002] Wireless communication devices and technologies are becoming more and more common. Wireless communication devices typically send and receive communication signals. Communication signals are typically processed by a variety of different components and circuits (such as a transceiver and one or more radio frequency front end (RFFE) components / circuits). Some wireless communication devices may be configured to operate on a variety of different communication frequency bands. For example, modern wireless communication devices may be configured to operate on a radio spectrum covering both 5G and 4G LTE frequencies. In some instances, modern wireless communication devices may be configured to operate on both 5G and 4G LTE frequencies, which may be referred to as carrier aggregation (CA), where a wireless communication device may communicate on multiple carriers simultaneously.

[0003] To transmit on multiple frequency bands, a wireless communication device may include an amplifier for each frequency band. However, including an amplifier for each frequency band increases complexity, cost, and power consumption. Summary of the invention

[0004] An amplifier is disclosed, comprising: a transconductance stage including a transconductance stage output node, the transconductance stage being configured to amplify an input signal; and an output matching network comprising: a first inductor having a first terminal coupled to the transconductance stage output node; an output transformer comprising a first coil electromagnetically coupled to a second coil, the first coil being coupled between a reference voltage node and a second terminal of the first inductor, the second coil being coupled to the amplifier output node; and a first capacitor being coupled between the second terminal of the first inductor and the reference voltage node.

[0005] In addition, an amplification method is disclosed, which includes: transconducting a first input voltage signal through a transconductance stage having an output capacitor to form a first output current signal at an output node of the transconductance stage; and driving the first output current signal into a parallel combination of a series inductor-capacitor resonant tank circuit and a first parallel inductor-capacitor resonant tank circuit, wherein the series inductor-capacitor resonant tank circuit includes an output capacitor and an inductor coupled between a first coil of an output transformer and the output node of the transconductance stage, and the first parallel inductor-capacitor resonant tank circuit includes a capacitor arranged in parallel with the first coil of the output transformer, so that both the series inductor-capacitor resonant tank circuit and the first parallel inductor-capacitor resonant tank circuit resonate at an intermediate frequency to match the impedance of the amplifier output node at the intermediate frequency with the output resistance of the transconductance stage, wherein the intermediate frequency is greater than the first frequency and less than the second frequency.

[0006] In addition, an amplifier is disclosed, which includes: a transconductance stage, the transconductance stage including a first transconductance transistor; and an input matching network, the input matching network including a first inductor coupled between an amplifier input node and ground, a second inductor having a first terminal coupled to the amplifier input node, a capacitor coupled between the second terminal of the second inductor and a gate of the first transconductance transistor, and a degeneration inductor coupled to the source of the first transconductance transistor, wherein a combination of the inductance of the second inductor, the inductance of the degeneration inductor, and a parasitic gate-source capacitance of the first transconductance transistor is configured to form a series inductor-capacitor (LC) resonant tank circuit that resonates at a first frequency, and wherein a combination of the capacitance of the amplifier input node and the inductance of the first inductor is configured to form a parallel LC resonant tank circuit that resonates at the first frequency.

[0007] Finally, an amplifier is provided, comprising: a transconductance stage including a transconductance stage output node; and an output matching network coupled to the transconductance stage output node and comprising a parallel inductor-capacitor resonant cavity circuit, the parallel inductor-capacitor resonant cavity circuit being arranged in parallel with the series inductor-capacitor resonant cavity circuit.

[0008] These and other advantageous features will be better understood from the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 is a schematic diagram of a broadband amplifier according to one aspect of the present disclosure.

[0010] Figure 2A is a circuit diagram of an output matching network of a broadband amplifier according to one aspect of the present disclosure.

[0011] Figure 2B According to one aspect of the present invention Figure 2A A circuit diagram of an alternative implementation of an output matching network.

[0012] Figure 3A is a simplified circuit diagram of an output matching network according to one aspect of the present disclosure.

[0013] Figure 3B is a simplified circuit diagram of an output matching network when resonating at an intermediate frequency according to one aspect of the present disclosure.

[0014] Figure 4A is a simplified circuit diagram of an output matching network according to one aspect of the present disclosure, illustrating the effective impedance of the output matching network as the input signal frequency increases above the intermediate frequency.

[0015] Figure 4BAn example embodiment according to one aspect of the present disclosure Figure 4A , illustrating the effective impedance of the output matching network as the input signal frequency increases above the IF frequency.

[0016] Figure 4C According to one aspect of the present disclosure Figure 4A A simplified circuit diagram of the output network matching network of , illustrating the effective impedance of the output matching network when the output network matching network is resonant at a frequency higher than the intermediate frequency.

[0017] Figure 5A is a simplified circuit diagram of an output matching network according to one aspect of the present disclosure, illustrating the effective impedance of the output matching network when the input signal frequency decreases below the intermediate frequency.

[0018] Figure 5B An example embodiment according to one aspect of the present disclosure Figure 5A An equivalent rearrangement of the components of the output matching network of , illustrating the effective impedance of the output matching network when the input signal frequency is reduced below the IF frequency.

[0019] Figure 5C According to one aspect of the present disclosure Figure 5A A simplified circuit diagram of the output network matching network of , illustrating the effective impedance of the output matching network when the output network matching network is resonant at a frequency lower than the intermediate frequency.

[0020] Figure 6 is a circuit diagram of a transconductance stage and an input matching network of a wideband amplifier according to one aspect of the present disclosure.

[0021] Figure 7 According to one aspect of the present disclosure Figure 6 Simplified circuit diagram of the input matching network.

[0022] Figure 8 A receiver incorporating a wideband low noise amplifier according to one aspect of the present disclosure is illustrated.

[0023] Fig. 9 A cellular telephone incorporating a wideband low noise amplifier according to one aspect of the present disclosure is illustrated.

[0024] Fig.10 is a flow chart of an example zoom-in method according to one aspect of the present disclosure.

[0025] Embodiments of the present disclosure and their advantages may be best understood by referring to the following detailed description.It should be appreciated that like reference numerals are used to identify like elements illustrated in one or more of the figures in the drawings. DETAILED DESCRIPTION

[0026] To provide broadband performance, a radio frequency front end (RFFE) may include two or more low noise amplifiers (LNAs) to cover a relatively wideband including two or more sub-bands. For example, an RFFE covering a wideband from 3.3 GHz to 5 GHz will include at least two LNAs, each tuned for a specific sub-band within the wideband. Including multiple LNAs increases power consumption and complexity.

[0027] A broadband LNA that replaces multiple LNAs and thus saves power and die space is disclosed. The broadband LNA may have an input matching network, a transconductance stage, and an output matching network. Both the input matching network and the output matching network are passive. The transconductance stage includes at least one transconductance transistor having a gate driven by the input matching network. To advantageously enhance impedance matching across the wideband, the output matching network may include a parallel inductor-capacitor (LC) resonator circuit arranged in parallel with a series LC resonator circuit. As will be further explained herein, the L and C parameters are selected such that the matching output network resonates at three frequencies: a lower frequency f1, a middle frequency f0, and a higher frequency f2, where f1 < f0 < f2. In one exemplary implementation, the lower frequency f1 may be approximately 3.3 GHz, the middle frequency f0 may be approximately 4.15 GHz, and the higher frequency f2 may be approximately 5 GHz. The result is an advantageous broadband output matching across at least a 2 GHz bandwidth. However, it should be understood that the broadband matching characteristics disclosed herein are also applicable to other frequency bands. Although the output network described herein may provide advantageous broadband output matching regardless of the specific implementation of the particular input matching network (which may have multiple possibilities), in some embodiments, the input matching network may also include a parallel inductor-capacitor (LC) resonator circuit arranged in parallel with a series LC resonator circuit, and the series LC resonator circuit similarly resonates at each of the lower frequency f1, the middle frequency f0, and the higher frequency f2.

[0028] The following discussion will be directed to an exemplary broadband LNA, but it should be understood that any suitable amplifier may benefit from the broadband matching disclosed herein. Figure 1An example LNA 100 is shown in FIG. 1. An input matching network 105 receives an RF input signal having a voltage vsrc and outputs an input voltage vin to a transconductance stage 110. The input matching network 105 is operable to divide the voltage vsrc according to a function of frequency Av(f) to form an input voltage vin, according to its impedance, where Av(f) is equal to the ratio of vin / vsrc. The transconductance stage 110 converts the input voltage vin into an output current Iout according to a frequency-dependent transconductance Gm(f) (which is equal to the ratio of Iout / vin). The output matching network 115 converts the output current Iout into an output voltage vout according to a frequency-dependent output impedance Zout(f) (equal to the ratio of vout / Iout). The overall gain of the broadband LNA 100 is therefore equal to the product of Av(f)*Gm(f)*Zout(f). The following discussion details how the bandwidth output matching network 115 is advantageously increased by using a parallel LC resonant tank circuit arranged in parallel with the series LC resonant tank circuit.

[0029] exist Figure 2A 1 and 2. The output matching network 115 is shown in more detail in . The transconductance stage 110 is represented by the impedance it provides to the output matching network 115 at the transconductance stage output node 205 of the transconductance stage 110. The transconductance stage impedance includes an output capacitance Cout and an output resistance Rout. The output matching network 115 includes an inductor L1 having a first terminal coupled to the transconductance stage output node 205. The inductance of the inductor L1 is selected so that L1 and Cout form a series LC resonant tank circuit 220 that resonates at an intermediate frequency f0 (note that the frequency f0 is between the lower frequency f1 and the higher frequency f2, and can therefore be represented as an "intermediate frequency" herein). The inductor L1 includes a second terminal coupled to an internal node 225 of the output matching network 115. The internal node 225 and the second terminal of the inductor L1 are the same electrical node.

[0030] The first coil L2 of the output transformer T is connected between the internal node 225 and a reference voltage node, which is a power supply node such as for the power supply voltage Vdd. The second coil L3 of the output transformer T is coupled to the amplifier output node 230 of the broadband LNA 100 through the blocking capacitor C3. The second coil L3 is shown as being coupled to a node of the power supply voltage Vdd, but it can also be coupled to another fixed voltage node, such as ground. Similarly, in an alternative specific implementation, the reference voltage node coupled to the first coil L2 can be a ground node. The blocking capacitor C3 is also represented herein as a second capacitor. The capacitor C2 (e.g., a fixed or variable capacitor C2) is coupled in parallel with the first coil L2 between the internal node 225 and the reference voltage node (such as, the power supply node of the power supply voltage Vdd) to form a parallel LC resonant tank circuit 215. In an alternative specific implementation, the blocking capacitor C3 can also be a variable capacitor. The capacitor C2 is also represented herein as a first capacitor. The capacitance of capacitor C2 and the inductance of first coil L2 are selected such that parallel LC tank circuit 215 resonates at intermediate frequency f0. Resistor R2 (eg, fixed or variable resistor R2) may be coupled in parallel with capacitor C2.

[0031] exist Figure 2B An alternative implementation of the output matching network 115 is shown in FIG. The output transformer T, capacitor C2, resistor R2, inductor L1, DC blocking capacitor C3 and transconductance stage 110 are shown in FIG. Figure 2A The arrangement under discussion. Figure 2B In a specific implementation of , the output node 230 may be protected by a plurality of electrostatic discharge diodes 210. In addition, a fixed or variable resistor R1 may be coupled in parallel with a fixed or variable capacitor C1 between the power supply node and the transconductance stage output node 205. By tuning the resistance of resistors R1 and R2, the broadband performance of the LNA 100 is enhanced for low gain states. Capacitor C1 is optional, but by appropriate tuning of its capacitance, the LNA 100 can be switched between a broadband operation mode and a narrowband operation mode. Capacitor C1 is also denoted herein as a second capacitor.

[0032] The output impedance Zout of the output matching network 115 will now be discussed in more detail. Figure 3A20. The parallel LC resonant tank circuit 215 and the series LC resonant tank circuit 220 are shown again in FIG. This is equivalent to treating the output impedance Zout as also the input impedance Zin. In this figure, the second coil L3 and the DC blocking capacitor C3 are omitted for clarity. In this regard, the DC blocking capacitor C3 has a relatively large capacitance and is therefore effectively a short circuit at the signal frequency of interest. Due to the resonance at the intermediate frequency f0, the parallel LC resonant tank circuit 215 provides an open circuit to the input impedance Zin. However, the resonance of the series LC resonant tank circuit 220 provides a short circuit to the input impedance Zin at the intermediate frequency f0. Therefore, as Figure 3B As shown, the input impedance Zin drops to substantially equal to the transconductance stage 110 at the intermediate frequency f0 ( Figure 1 ) output resistance Rout. The output resistance Rout of the transconductance stage 110 is typically about 30Ω. The reflection coefficient S11 (or equivalently S22) of the input impedance Zin is therefore approximately equal to -10 dB.

[0033] As the frequency of the input signal to the LNA 100 increases above the intermediate frequency f0 toward the higher frequency f2, the series LC tank circuit 220 becomes inductive because ωL>>1 / ωC, where ω is the angular frequency (2πf), L is the inductance of the inductor L1, and C is the output capacitance of the transconductance stage 110. Conversely, as the input signal frequency increases, the parallel LC tank circuit 215 becomes capacitive. Figure 4A As shown in , the parallel LC resonant tank circuit 215 thus effectively provides only the capacitance of capacitor C2 to the input impedance Zin of the output matching network 115. Similarly, the series LC resonant tank circuit 220 effectively provides only the inductance of inductor L1 to the input impedance Zin. It can be seen that the impedance of inductor L1 in series with resistor Rout is approximately equal to the same inductor in parallel with resistor Rout*Q, where Q is the load quality factor of the series LC resonant tank circuit 220. The input impedance Zin of the output matching network 115 can therefore be considered to be a parallel combination of capacitor C2, inductor L1, and resistor Q*Rout as the input signal frequency increases towards higher frequencies f2, as shown in FIG. Figure 4B At a higher frequency f2, the inductor L1 and the capacitor C2 act as a second parallel LC tank circuit that resonates at the frequency f2 to provide an open circuit to the input impedance Zin. The input impedance Zin of the output matching network 115 thus becomes equal to Q*Rout, as Figure 4C . This multiplication of Rout and the quality factor Q is advantageous because a typical value for Rout is 30 ohms, as discussed previously. Typical values ​​for the quality factor Q are such that Q*30 may be approximately equal to 50 ohms, which is a better output impedance match than that achieved at the intermediate frequency f0 (assuming that the output impedance of the wideband LNA 100 should be matched to 50 ohms).

[0034] As the frequency of the input signal to the wideband LNA 100 decreases toward the lower frequency f1 below the mid-range frequency f0, complementary resonant behavior occurs as discussed with respect to the higher frequency f2. Specifically, as the input signal frequency decreases toward the lower frequency f1, the impedance of the parallel LC tank circuit 215 becomes inductive, while the impedance of the series LC tank circuit 220 becomes capacitive. Figure 5A , the parallel LC resonant tank circuit 215 thus effectively provides only the inductance of the coil L2 to the input impedance Zin of the output matching network 115. Similarly, the series LC resonant tank circuit 220 effectively provides only the output capacitance Cout of the transconductance stage 110 to the input impedance Zin. It can be seen that the impedance of the output capacitance Cout in series with the resistor Rout is approximately equal to the same output capacitance Cout in parallel with the resistor Rout*Q, where Q is the load quality factor of the series LC resonant tank circuit 220. The input impedance Zin of the output matching network 115 can therefore be considered to be a parallel combination of the inductance of the first coil L2, the output capacitance Cout, and the resistor Q*Rout, as the input signal frequency decreases towards lower frequencies f1, as shown in FIG. Figure 5B As shown in . At the lower frequency f1, the first coil L2 and the output capacitor Cout act as a third parallel LC resonant tank circuit that resonates at the frequency f1 to provide an open circuit to the input impedance Zin. The input impedance Zin of the output matching network 115 at the lower frequency f1 thus becomes equal to Q*Rout, as shown in Figure 5C . This multiplication of Rout and the quality factor Q is advantageous because a typical value for Rout is 30 ohms, as discussed previously. Typical values ​​for the quality factor Q are such that Q*30 is approximately equal to 50 ohms, which is a better output impedance match than that achieved at the intermediate frequency f0 (again assuming that the output impedance of the wideband LNA 100 should be matched to 50 ohms).

[0035] As will be further explained herein, the transconductance stage 110 may be implemented with or without cascode transistors. In a cascode transistor implementation, the output node 205 of the transconductance stage 110 is coupled to the cascode transistor branch of the transconductance stage 110. The transconductance stage output node 205 is therefore a relatively high impedance node. In an implementation in which the output transformer is directly coupled to the transconductance stage output node 205, the output transformer may be configured to step down the impedance. For example, if the impedance of the amplifier output node 230 of the broadband LNA 100 is to be matched to 50 ohms, the output transformer may therefore step down the impedance from the transconductance stage output node to the amplifier output node. In contrast, the internal node 225 of the output matching network 115 may be a low impedance node because the impedance loads the series LC resonant tank circuit 220. By keeping the impedance of the internal node 225 relatively low, the series LC resonant tank circuit 220 may have a relatively high loading quality factor Q. Because the internal node 225 is a relatively low impedance node, the output transformer T steps down the impedance from the amplifier output node 230 to the internal node 225. Therefore, in the output transformer T, the inductance of the first coil L2 is higher than the inductance of the second coil L3.

[0036] exist Figure 6 An example transconductance stage 110 and input matching network 105 for a wideband LNA 100 are shown in more detail in FIG. Although a specific example of a transconductance stage 110 is depicted, a dashed box around the transconductance stage 110 is further provided to indicate that there may be various possible transconductance stages that may operate in conjunction with the output matching network described above to provide wideband operation. Similarly, although in Figure 6A specific input matching network 105 is depicted in FIG, but other input matching network implementations are possible and may be combined with the output matching network described above to provide broadband operation. To allow gain adaptation, the transconductance stage 110 includes several selectable branches or segments. Each branch includes its own transconductance transistor and cascode transistor. For example, the first branch 605 includes a first transconductance transistor M1, the drain of which is connected to the source of the first cascode transistor M2. The second branch 605' has a similar arrangement of the second transconductance transistor M1' and the second cascode transistor M2'. Similarly, the third branch 605" includes a third transconductance transistor M1" and a third cascode transistor M2". Finally, the fourth branch 605"' includes a fourth transconductance transistor M1"' and a fourth cascode transistor M2"'. The gates of the transconductance transistors M1, M1', M1" and M1"' form the input nodes of the transconductance stage 110. It should be understood that in alternative implementations, each cascode transistor may be alternatively selected by two or more cascode transistors. In alternative implementations, each selectable branch or segment will include only transconductance transistors. In these implementations, the transconductance stage output node 205 will be coupled to the drain of the transconductance transistor in the selected branch. In the transconductance stage 110, the transconductor and the cascode transistors are both n-type metal oxide semiconductor (NMOS) transistors, but it should be understood that the transconductance stage 110 is easily converted to a p-type metal oxide semiconductor (PMOS) implementation, in which the transconductor and the cascode transistors are both PMOS transistors or a mixture of NMOS and PMOS transistors.

[0037] To activate a branch, the controller 650 controls the gate bias of the corresponding cascode transistor using the bias voltage generated by the bias generator 651, so that the corresponding cascode transistor is turned on. For example, in a low gain state of the transconductance stage 110, only one branch can be active. Similarly, the bias generator 651 biases the gates of the cascode transistors in the inactive branches so that their cascode transistors are not turned on. For example, in an NMOS implementation, the bias generator 651 may ground the gates of the cascode transistors in the inactive branches to prevent them from contributing to the amplification of the LNA input signal voltage vrsc. The gate of each cascode transistor is coupled to ground through a corresponding capacitor C5, so that the gate of each cascode transistor is AC grounded. In a PMOS implementation, the inactive branches will charge the gates of their cascode transistors to the supply voltage, which is opposite to grounding in an NMOS implementation.

[0038] The input signal voltage vin from the input matching network 105 drives the gate of the transconductance transistor in each of the active branches, so that each active branch conducts a corresponding current according to the transconductance of the transconductance transistor. For example, assume that branch 605 is active. The first transconductance transistor M1 will then conduct the current through the common source common gate transistor M2 to form an output current Iout driving the output matching network 115 at the transconductance stage output node 205. More generally, each active branch contributes to the output current Iout.

[0039] In order to provide a broadband match to the required input impedance (e.g., 50Ω), the input matching network 105 includes an inductor L4, which is coupled between the amplifier input node 610 of the input signal voltage vsrc and a fixed voltage reference (e.g., ground). An ESD diode 625 may be present to provide electrostatic discharge protection for the amplifier input node 610. Inductor L5 is coupled between the amplifier input node 610 and the gate of the transconductance transistor through a DC blocking capacitor C6. The source of the transconductance transistor is coupled to ground through a degeneration inductor Ldegen. Inductor L4 may also be represented as a first inductor (or a second inductor) in this article, and inductor L5 may be represented as a second inductor (or a third inductor). Inductor L1 may also be represented as a third inductor in this article.

[0040] In some implementations, some (or all) of the inductors L4, L5, and Ldgen can be magnetically coupled to each other.

[0041] It will now be shown that the input matching network 105 also includes a parallel LC resonant tank circuit arranged in parallel with the series LC resonant tank circuit so as to resonate at the lower frequency f1, the intermediate frequency f0 and the higher frequency f2. Figure 7 The input matching network 105 is shown in a more simplified schematic diagram of FIG. The amplifier input node 610 is loaded not only by the inductor L4, but also by parasitic capacitance Cpar (such as that caused by the integrated circuit package wiring, ESD diode 625 ( Figure 6) etc. cause) loading. Due to their parallel coupling between ground and the amplifier input node 610, the parasitic capacitance Cpar and the inductor L4 form a parallel LC resonant tank circuit 705. The inductor L5 is coupled to the degeneration inductor Ldegen through the parasitic gate-source capacitance Cgs of the transconductance transistor. The degeneration from the degeneration inductor Ldegen introduces an effective (non-physical) resistance Rdegen. The series coupling of the inductor L5, the parasitic capacitance Cgs and the degeneration inductor Ldegen between the amplifier input node 610 and the resistance Rdegen forms a series LC resonant tank circuit 710. By appropriate selection of the inductors L4, L5 and Ldegen, the parallel LC resonant tank circuit 705 and the series LC resonant tank circuit 710 function similarly to that discussed with respect to the parallel LC resonant tank circuit 215 and the series LC resonant tank circuit 220 to substantially resonate at the lower frequency f1, the intermediate frequency f0 and the higher frequency f2. In this manner, the wideband LNA 100 has a wideband match at its amplifier input node 610 and at its amplifier output node 230 .

[0042] See again Figure 6 , the input matching network 105 may include a capacitor C4 (e.g., a variable capacitor) having a first terminal coupled to ground and a second terminal coupled to the amplifier input node 610 through a switch S1. When the switch S1 is closed, the capacitance of the capacitor C4 is added to the parasitic capacitance Cpar. If the parasitic capacitance Cpar is not sufficient for the desired resonance at the lower frequency f1, the intermediate frequency f0, and the higher frequency f2, the capacitor C4 may be appropriately tuned and the switch S1 may be closed accordingly. The use of the capacitor C4 is also advantageous because it reduces the dependence of the resonance on the process variation of the parasitic capacitance Cpar. In addition, when the switch S2 is closed, the resistor R5 (e.g., a variable resistor) may load the node 615 between the inductor L5 and the DC blocking capacitor C6. The resistor R4 (e.g., a variable resistor) is coupled in parallel with the capacitor C4 between the switch S1 and the ground. The resistors R4 and R5 and the capacitor C4 may be used in a low gain state to increase the input attenuation linearity while maintaining a broadband match. All components of the input matching network 105, the transconductance stage 110, and the output matching network may be integrated onto a single integrated circuit 120, such as Figure 1 However, in some implementations, the inductor L4 may be a discrete component to facilitate the layout of the inductor L1 , the output transformer T, and the degeneration inductor Ldegen in the integrated circuit 120 .

[0043] It should be understood that the broadband amplifier including the output matching network input 115 can be implemented with an alternative input matching network in place of the matching network 105. Similarly, the transconductance stage 110 is merely exemplary and can be replaced by an alternative transconductance stage in an alternative implementation. In addition, the integrated devices discussed herein can also be implemented as discrete devices.

[0044] The wideband LNA 100 as disclosed herein may be used in any suitable receiver architecture, such as for mobile devices, laptops, base stations, small cells, Internet of Things devices, etc. Figure 8 An example cellular telephone receiver 800 is shown in FIG. 1 (which may also be applied to other suitable receiver architectures such as WLAN or other WWAN systems). The wideband LNA 100 includes an input matching network, a transconductance stage, and an output matching network arranged as disclosed herein. The LNA 100 amplifies an input voltage signal vrsc, such as generated by a received RF signal from an antenna 810 (or multiple antennas). The output voltage signal vout from the LNA 100 is mixed in a mixer 830 with a local oscillator signal, such as from a voltage controlled oscillator (VCO) 815, to produce an analog baseband signal, which is filtered by a filter 820 before being digitized by an analog-to-digital converter (ADC) 825 to form a digital baseband signal. The filter 820 may alternatively be implemented in the digital domain downstream of the ADC 825, as is known in the receiver art.

[0045] A receiver having an LNA 100 as disclosed herein may be integrated into a transceiver RF front end circuit 935 within a cellular telephone 950, such as Fig. 9 . The transceiver RF front end circuit 935 converts the digital baseband signal from the modem 940 into an RF signal for transmission to a remote network node, such as a base station (not illustrated). The transceiver RF front end circuit 935 is also used to convert the received RF signal into a digital baseband signal for the modem 940. In some specific implementations, the modem 940 may also be integrated into a system on a chip (SoC). It should be understood that the LNA as disclosed herein may be included in an RF front end integrated circuit other than the transceiver integrated circuit.

[0046] Now refer to Fig.10The flowchart of discusses a method of matching the impedance of an output node of a transconductance stage in an LNA to an output impedance of the LNA. The method includes an action 1000 of transconducting a first input voltage signal through a transconductance stage having an output capacitor to form a first output current signal at an output node of the transconductance stage. The operation of the transconductance stage 110 is an example of action 1000. In addition, the method includes an action 1005 of driving the first output current signal into a parallel combination of a series inductor-capacitor resonant cavity circuit and a first parallel inductor-capacitor resonant cavity circuit, wherein the series inductor-capacitor resonant cavity circuit includes an output capacitor and an inductor coupled between a first coil of an output transformer and an output node of the transconductance stage, and the first parallel inductor-capacitor resonant cavity circuit includes a capacitor arranged in parallel with the first coil of the output transformer so that both the series inductor-capacitor resonant cavity circuit and the first parallel inductor-capacitor resonant cavity circuit resonate at an intermediate frequency to match the impedance of an amplifier output node at the intermediate frequency to an output resistance of the transconductance stage, wherein the intermediate frequency is greater than the first frequency and less than the second frequency. The operation of the series LC resonant tank circuit 220 at the intermediate frequency f0 is an example of action 1005. Figure 3B As discussed, driving the first output current signal into the parallel combination of the series inductor-capacitor resonant tank circuit and the first parallel inductor-capacitor resonant tank circuit causes the series inductor-capacitor resonant tank circuit to act as a short circuit.

[0047] The method can be extended to include resonance at the first frequency f1, such as FIG. 5A to FIG. 5C For example, the method may include the following actions: transconducting a second input voltage signal through a transconductance stage to form a second output current signal; and driving the second output current signal into a parallel combination of a series inductor-capacitor resonant tank circuit and a first parallel inductor-capacitor resonant tank circuit so that the combination of the first coil and the output capacitor acts as a second parallel inductor-capacitor resonant tank circuit that resonates at a first frequency so that an impedance of an amplifier output node at the first frequency matches a product of an output resistance of the transconductance stage and a quality factor of the series inductor-capacitor resonant tank circuit. Figure 5A , driving the second output current signal into the parallel combination of the series inductor-capacitor resonant tank circuit and the first parallel inductor-capacitor resonant tank circuit is shown. Figure 5B A second parallel inductor-capacitor resonant cavity circuit is shown in FIG. Then, as Figure 5C As shown in , when resonating at the first frequency, the second parallel inductor-capacitor resonant cavity circuit acts as an open circuit.

[0048] Finally, the method can be extended to include resonance at a second frequency f2, as in FIG. 4A to FIG. 4CThe method may include the following actions: transconducting a third input voltage signal through a transconductance stage to form a third output current signal; and driving the third output current signal into a parallel combination of a series inductor-capacitor resonant cavity circuit and a first parallel inductor-capacitor resonant cavity circuit so that the combination of the capacitor and the inductor acts as a third parallel inductor-capacitor resonant cavity circuit that resonates at a second frequency so that an impedance of an amplifier output node at the second frequency matches a product of an output resistance of the transconductance stage and a quality factor of the series inductor-capacitor resonant cavity circuit. Figure 4A , driving the third output current into the parallel combination of the series inductor-capacitor resonant tank circuit and the first parallel inductor-capacitor resonant tank circuit is shown. Figure 4B A third parallel inductor-capacitor resonant cavity circuit resonating at a second frequency is shown in FIG. Then, as Figure 4C As shown in , when resonating at the second frequency, the third parallel inductor-capacitor resonant tank circuit acts as an open circuit.

[0049] The present disclosure will now be summarized in a series of clauses:

[0050] Clause 1. An amplifier, comprising:

[0051] a transconductance stage including a transconductance stage output node, the transconductance stage being configured to amplify an input signal; and

[0052] An output matching network, the output matching network comprising:

[0053] a first inductor having a first terminal coupled to an output node of the transconductance stage;

[0054] an output transformer comprising a first coil electromagnetically coupled to a second coil, the first coil coupled between a reference voltage node and a second terminal of the first inductor, the second coil coupled to an amplifier output node;

[0055] and a first capacitor coupled between the second terminal of the first inductor and the reference voltage node.

[0056] Clause 2. The amplifier of clause 1, wherein the first capacitor is a variable capacitor, and wherein the reference voltage node is a supply node for a supply voltage.

[0057] Clause 3. The amplifier of any of Clauses 1 to 2, wherein the output matching network further comprises a resistor coupled between the second terminal of the first inductor and the reference voltage node.

[0058] Clause 4. The amplifier of clause 3, wherein the resistor is a variable resistor.

[0059] Clause 5. The amplifier of clause 1, wherein the output matching network further comprises:

[0060] A second capacitor is coupled between the transconductance stage output node and the reference voltage node.

[0061] Clause 6. The amplifier of clause 5, wherein the output matching network further comprises:

[0062] A resistor is coupled between the transconductance stage output node and the reference voltage node.

[0063] Clause 7. The amplifier of Clause 6, wherein the second capacitor is a variable capacitor and the resistor is a variable resistor.

[0064] Clause 8. The amplifier of any one of clauses 1 to 7, wherein an inductance of the first coil is greater than an inductance of the second coil.

[0065] Clause 9. An amplifier according to any one of clauses 1 to 8, wherein the transconductance stage comprises:

[0066] a first transconductance transistor, wherein an input node of the transconductance stage is formed by a gate of the first transconductance transistor; and

[0067] a first cascode transistor having a first cascode transistor coupled to the

[0068] The first transconductance transistor has a source and a drain coupled to the transconductance stage output node.

[0069] Clause 10. The amplifier of clause 9, wherein the transconductance stage further comprises:

[0070] a second transconductance transistor, wherein the input node of the transconductance stage is also formed by the gate of the second transconductance transistor, and

[0071] A second cascode transistor has a source coupled to the drain of the second transconductance transistor and has a drain coupled to the transconductance stage output node.

[0072] Clause 11. The amplifier according to any one of clauses 9 to 10, further comprising:

[0073] A degeneration inductor is coupled between a source of the first transconductance transistor and ground.

[0074] Clause 12. The amplifier of clause 10, further comprising:

[0075] a bias generator configured to generate a first gate bias voltage for a gate of the first cascode transistor and configured to generate a second gate voltage for a gate of the second cascode transistor; and

[0076] A controller is configured to control the bias generator to adjust the first gate bias voltage and the second gate bias voltage to control a gain of the transconductance stage.

[0077] Clause 13. The amplifier of Clause 1, wherein the output matching network further comprises a second capacitor coupled between a second coil and the amplifier output node.

[0078] Clause 14. The amplifier of any one of clauses 1 to 13, further comprising:

[0079] An input matching network is coupled between an amplifier input node and an input node of the transconductance stage.

[0080] Clause 15. An amplifier according to clause 14, wherein the input matching network comprises: a second inductor, the second inductor coupled between ground and the amplifier input node; a capacitor, the capacitor having a first terminal and a second terminal, wherein the second terminal of the capacitor is coupled to the input node of the transconductance stage; and a third inductor, the third inductor coupled between the amplifier input node and the first terminal of the capacitor.

[0081] Clause 16. An amplifier according to any one of clauses 1 to 15, wherein the amplifier comprises a low noise amplifier integrated within a receiver, the receiver comprising:

[0082] a mixer coupled to the amplifier output node;

[0083] analog-to-digital converters; and

[0084] A filter is coupled between an output node of the mixer and an input node of the analog-to-digital converter.

[0085] Clause 17. The amplifier of any one of clauses 1 to 16, further comprising:

[0086] A plurality of electrostatic discharge diodes are coupled to the amplifier output nodes.

[0087] Clause 18. The amplifier of clauses 1 to 16, further comprising:

[0088] A plurality of electrostatic discharge diodes are coupled to an amplifier input node of the amplifier.

[0089] Clause 19. A method of amplification, the method comprising:

[0090] transconducting a first input voltage signal through a transconductance stage having an output capacitor to form a first output current signal; and

[0091] The first output current signal is driven into a parallel combination of a series inductor-capacitor resonant tank circuit and a first shunt inductor-capacitor resonant tank circuit, wherein the series inductor-capacitor resonant tank circuit includes the output capacitor and an inductor coupled between a first coil of an output transformer and an output node of the transconductance stage, and the first shunt inductor-capacitor resonant tank circuit includes a capacitor arranged in parallel with the first coil of the output transformer, so that both the series inductor-capacitor resonant tank circuit and the first shunt inductor-capacitor resonant tank circuit resonate at an intermediate frequency to match an impedance of an amplifier output node at the intermediate frequency to an output resistance of the transconductance stage, wherein the intermediate frequency is greater than a first frequency and less than a second frequency.

[0092] Clause 20. The method of clause 19, wherein driving the first output current signal into the parallel combination of the series inductor-capacitor resonant tank circuit and the first parallel inductor-capacitor resonant tank circuit further comprises:

[0093] The series inductor-capacitor resonant tank circuit is caused to act as a short circuit.

[0094] Clause 21. The method according to any one of clauses 19 to 20, further comprising:

[0095] transconducting a second input voltage signal through the transconductance stage to form a second output current signal; and

[0096] The second output current signal is driven into the parallel combination of the series inductor-capacitor resonant tank circuit and the first parallel inductor-capacitor resonant tank circuit so that the combination of the first coil and the output capacitor acts as a second parallel inductor-capacitor resonant tank circuit that resonates at the first frequency so that the impedance of the amplifier output node at the first frequency matches the product of the output resistance of the transconductance stage and the quality factor of the series inductor-capacitor resonant tank circuit.

[0097] Clause 22. The method of clause 21, wherein driving the second output current signal into the parallel combination of the series inductor-capacitor resonant tank circuit and the first parallel inductor-capacitor resonant tank circuit further comprises:

[0098] The second parallel inductor-capacitor resonant tank circuit is caused to act as an open circuit.

[0099] Clause 23. The method according to any one of clauses 19 to 22, further comprising:

[0100] transconducting a third input voltage signal through the transconductance stage to form a third output current signal; and

[0101] The third output current signal is driven into the parallel combination of the series inductor-capacitor resonant tank circuit and the first parallel inductor-capacitor resonant tank circuit so that the combination of the capacitor and the inductor acts as a third parallel inductor-capacitor resonant tank circuit that resonates at the second frequency so that the impedance of the amplifier output node at the second frequency matches the product of the output resistance of the transconductance stage and the quality factor of the series inductor-capacitor resonant tank circuit.

[0102] Clause 24. The method of clause 23, wherein driving the third output current signal into the parallel combination of the series inductor-capacitor resonant tank circuit and the first parallel inductor-capacitor resonant tank circuit further comprises:

[0103] The third parallel inductor-capacitor resonant tank circuit is caused to act as an open circuit.

[0104] Clause 25. An amplifier, the amplifier comprising:

[0105] a transconductance stage comprising a first transconductance transistor; and

[0106] an input matching network comprising a first inductor coupled between an amplifier input node and ground, a second inductor having a first terminal coupled to the amplifier input node, a capacitor coupled between a second terminal of the second inductor and a gate of the first transconductance transistor, and a degeneration inductor coupled to a source of the first transconductance transistor, wherein a combination of an inductance of the second inductor, an inductance of the degeneration inductor, and a parasitic gate-source capacitance of the first transconductance transistor are configured to form a series inductor-capacitor (LC) resonant tank circuit that resonates at a first frequency, and wherein a combination of the capacitance of the amplifier input node and the inductance of the first inductor are configured to form a parallel LC resonant tank circuit that resonates at the first frequency.

[0107] Clause 26. The amplifier of clause 25, wherein the input matching network further comprises:

[0108] First switch;

[0109] a variable capacitor coupled to the amplifier input node through the first switch; and

[0110] A first variable resistor is coupled to the amplifier input node through the first switch.

[0111] Clause 27. The amplifier of clause 26, wherein the input matching network further comprises:

[0112] a second switch; and

[0113] A second variable resistor is coupled to the second terminal of the second inductor through the second switch.

[0114] Clause 28. The amplifier of any of Clauses 25 to 27, wherein the transconductance stage is included in an integrated circuit, and wherein the first inductor, the capacitor, and the degeneration inductor are also included in the integrated circuit.

[0115] Clause 29. The amplifier of any of Clauses 25 to 27, wherein the transconductance stage is included in an integrated circuit, and wherein the first inductor is a discrete component separate from the integrated circuit.

[0116] Clause 30. An amplifier according to any one of clauses 25 to 29, wherein the transconductance stage further comprises:

[0117] a transconductance stage output node; and

[0118] A first cascode transistor is coupled between the first transconductance transistor and the transconductance stage output node.

[0119] Clause 31. The amplifier of clause 30, wherein the transconductance stage further comprises:

[0120] a second transconductance transistor having a gate coupled to the second terminal of the second inductor through a capacitor and having a source coupled to the degeneration inductor; and

[0121] A second cascode transistor is coupled between the second transconductance transistor and the transconductance stage output node.

[0122] Clause 32. The amplifier of clause 31, further comprising:

[0123] A controller is configured to selectively control a gate voltage of the first cascode transistor and a gate voltage of the second cascode transistor to adjust a gain of the transconductance stage.

[0124] Clause 33. The amplifier of clause 30, further comprising:

[0125] an amplifier output node; and

[0126] an output matching network including an output transformer having a first coil electromagnetically coupled to a second coil coupled to the amplifier output node, the matching output network also including a third inductor coupled between the transconductance stage output node and the first coil.

[0127] Clause 34. The amplifier of clause 33, wherein the first coil is coupled between a power supply node for a power supply voltage and the third inductor, and wherein the output matching network further comprises a variable capacitor coupled between the power supply node and the third inductor.

[0128] Clause 35. An amplifier, the amplifier comprising:

[0129] a transconductance stage including a transconductance stage output node and having an output capacitance;

[0130] and

[0131] An output matching network is coupled to the transconductance stage output node and includes a parallel inductor-capacitor resonant tank circuit arranged in parallel with a series inductor-capacitor resonant tank circuit including the output capacitance of the transconductance stage.

[0132] Clause 36. The amplifier of clause 35, further comprising an output transformer, wherein the inductor of the parallel inductor-capacitor resonant tank circuit comprises a first coil of the output transformer.

[0133] Clause 37. The amplifier of Clause 36, wherein the series inductor-capacitor resonant tank circuit comprises an inductor coupled between the transconductance stage output node and the first winding of the output transformer.

[0134] Clause 38. The amplifier of clause 36, wherein the output transformer comprises a second coil coupled to an output node of the amplifier.

[0135] It should be understood that many modifications, substitutions and changes may be made to the materials, devices, configurations and methods of use of the equipment disclosed herein without departing from the scope of the present disclosure. In view of this, the scope of the present disclosure should not be limited to the specific embodiments illustrated and described herein (because they are only some examples of the present disclosure), but should be fully equivalent to the attached claims and their functional equivalents.

Claims

1. An amplifier, comprising: a transconductance stage, the transconductance stage comprising a transconductance stage output node, the transconductance stage being configured to amplify an input signal; and An output matching network, the output matching network comprising: a first inductor having a first terminal coupled to an output node of the transconductance stage; an output transformer comprising a first coil electromagnetically coupled to a second coil, the first coil coupled between a reference voltage node and a second terminal of the first inductor, the second coil coupled to an amplifier output node; and a first capacitor coupled between the second terminal of the first inductor and the reference voltage node. 2 . The amplifier of claim 1 , wherein the first capacitor is a variable capacitor, and wherein the reference voltage node is a power supply node for a power supply voltage.

3. The amplifier of claim 1, wherein the output matching network further comprises a resistor coupled between the second terminal of the first inductor and the reference voltage node. The amplifier of claim 3 , wherein the resistor is a variable resistor.

5. The amplifier of claim 1 , wherein the output matching network further comprises: A second capacitor is coupled between the transconductance stage output node and the reference voltage node.

6. The amplifier of claim 5, wherein the output matching network further comprises: A resistor is coupled between the transconductance stage output node and the reference voltage node.

7. The amplifier of claim 6, wherein the second capacitor is a variable capacitor and the resistor is a variable resistor.

8. The amplifier of claim 1, wherein an inductance of the first coil is greater than an inductance of the second coil.

9. The amplifier of claim 1 , wherein the transconductance stage comprises: a first transconductance transistor, wherein an input node of the transconductance stage is formed by a gate of the first transconductance transistor; and A first cascode transistor has a source coupled to the drain of the first transconductance transistor and has a drain coupled to the transconductance stage output node.

10. The amplifier of claim 9, wherein the transconductance stage further comprises: a second transconductance transistor, wherein the input node of the transconductance stage is also formed by the gate of the second transconductance transistor, and A second cascode transistor has a source coupled to the drain of the second transconductance transistor and has a drain coupled to the transconductance stage output node.

11. The amplifier of claim 9, further comprising: A degeneration inductor is coupled between a source of the first transconductance transistor and ground.

12. The amplifier of claim 10, further comprising: a bias generator configured to generate a first gate bias voltage for a gate of the first cascode transistor and configured to generate a second gate voltage for a gate of the second cascode transistor; and A controller is configured to control the bias generator to adjust the first gate bias voltage and the second gate bias voltage to control a gain of the transconductance stage.

13. The amplifier of claim 1, wherein the output matching network further comprises a second capacitor coupled between a second coil and the amplifier output node.

14. The amplifier of claim 1, further comprising: An input matching network is coupled between an amplifier input node and an input node of the transconductance stage.

15. The amplifier of claim 14, wherein the input matching network comprises: a second inductor coupled between ground and the amplifier input node; a capacitor having a first terminal and a second terminal, wherein the second terminal of the capacitor is coupled to the input node of the transconductance stage; and a third inductor coupled between the amplifier input node and the first terminal of the capacitor.

16. The amplifier of claim 1, wherein the amplifier comprises a low noise amplifier integrated within a receiver, the receiver comprising: a mixer coupled to the amplifier output node; Analog-to-digital converters; as well as A filter is coupled between an output node of the mixer and an input node of the analog-to-digital converter.

17. The amplifier of claim 1, further comprising: A plurality of electrostatic discharge diodes are coupled to the amplifier output nodes.

18. The amplifier of claim 1, further comprising: A plurality of electrostatic discharge diodes are coupled to an amplifier input node of the amplifier.

19. An amplification method, the amplification method comprising: transconducting a first input voltage signal through a transconductance stage having an output capacitor to form a first output current signal; as well as The first output current signal is driven into a parallel combination of a series inductor-capacitor resonant tank circuit and a first shunt inductor-capacitor resonant tank circuit, wherein the series inductor-capacitor resonant tank circuit includes the output capacitor and an inductor coupled between a first coil of an output transformer and an output node of the transconductance stage, and the first shunt inductor-capacitor resonant tank circuit includes a capacitor arranged in parallel with the first coil of the output transformer, so that both the series inductor-capacitor resonant tank circuit and the first shunt inductor-capacitor resonant tank circuit resonate at an intermediate frequency to match an impedance of an amplifier output node at the intermediate frequency to an output resistance of the transconductance stage, wherein the intermediate frequency is greater than a first frequency and less than a second frequency.

20. The method of claim 19, wherein driving the first output current signal into the parallel combination of the series inductor-capacitor resonant tank circuit and the first parallel inductor-capacitor resonant tank circuit further comprises: The series inductor-capacitor resonant tank circuit is caused to act as a short circuit.

21. The method according to claim 19, further comprising: transconducting a second input voltage signal through the transconductance stage to form a second output current signal; as well as The second output current signal is driven into the parallel combination of the series inductor-capacitor resonant tank circuit and the first parallel inductor-capacitor resonant tank circuit so that the combination of the first coil and the output capacitor acts as a second parallel inductor-capacitor resonant tank circuit that resonates at the first frequency so that the impedance of the amplifier output node at the first frequency matches the product of the output resistance of the transconductance stage and the quality factor of the series inductor-capacitor resonant tank circuit.

22. The method of claim 21 , wherein driving the second output current signal into the parallel combination of the series inductor-capacitor resonant tank circuit and the first parallel inductor-capacitor resonant tank circuit further comprises: The second parallel inductor-capacitor resonant tank circuit is caused to act as an open circuit.

23. The method according to claim 21, further comprising: transconducting a third input voltage signal through the transconductance stage to form a third output current signal; as well as The third output current signal is driven into the parallel combination of the series inductor-capacitor resonant tank circuit and the first parallel inductor-capacitor resonant tank circuit so that the combination of the capacitor and the inductor acts as a third parallel inductor-capacitor resonant tank circuit that resonates at the second frequency so that the impedance of the amplifier output node at the second frequency matches the product of the output resistance of the transconductance stage and the quality factor of the series inductor-capacitor resonant tank circuit.

24. The method of claim 23, wherein driving the third output current signal into the parallel combination of the series inductor-capacitor resonant tank circuit and the first parallel inductor-capacitor resonant tank circuit further comprises: The third parallel inductor-capacitor resonant tank circuit is caused to act as an open circuit.

25. An amplifier, comprising: a transconductance stage, the transconductance stage comprising a first transconductance transistor; and an input matching network comprising a first inductor coupled between an amplifier input node and ground, a second inductor having a first terminal coupled to the amplifier input node, a capacitor coupled between a second terminal of the second inductor and a gate of the first transconductance transistor, and a degeneration inductor coupled to a source of the first transconductance transistor, wherein a combination of an inductance of the second inductor, an inductance of the degeneration inductor, and a parasitic gate-source capacitance of the first transconductance transistor are configured to form a series inductor-capacitor (LC) resonant tank circuit that resonates at a first frequency, and wherein a combination of the capacitance of the amplifier input node and the inductance of the first inductor are configured to form a parallel LC resonant tank circuit that resonates at the first frequency.

26. The amplifier of claim 25, wherein the input matching network further comprises: First switch; a variable capacitor coupled to the amplifier input node via the first switch; and A first variable resistor is coupled to the amplifier input node through the first switch.

27. The amplifier of claim 26, wherein the input matching network further comprises: Second switch; and A second variable resistor is coupled to the second terminal of the second inductor through the second switch.

28. The amplifier of claim 25, wherein the transconductance stage is included in an integrated circuit, and wherein the first inductor, the capacitor, and the degeneration inductor are also included in the integrated circuit.

29. The amplifier of claim 25, wherein the transconductance stage is included in an integrated circuit, and wherein the first inductor is a discrete component separate from the integrated circuit.

30. The amplifier of claim 25, wherein the transconductance stage further comprises: Transconductance stage output node; and A first cascode transistor is coupled between the first transconductance transistor and an output node of the transconductance stage.

31. The amplifier of claim 30, wherein the transconductance stage further comprises: a second transconductance transistor having a gate coupled to the second terminal of the second inductor through a capacitor and having a source coupled to the degeneration inductor; and A second cascode transistor is coupled between the second transconductance transistor and the transconductance stage output node.

32. The amplifier of claim 31 , further comprising: A controller is configured to selectively control a gate voltage of the first cascode transistor and a gate voltage of the second cascode transistor to adjust a gain of the transconductance stage.

33. The amplifier of claim 30, further comprising: Amplifier output node; and an output matching network including an output transformer having a first coil electromagnetically coupled to a second coil coupled to the amplifier output node, the matching output network also including a third inductor coupled between the transconductance stage output node and the first coil.

34. The amplifier of claim 33, wherein the first coil is coupled between a power supply node for a power supply voltage and the third inductor, and wherein the output matching network further comprises a variable capacitor coupled between the power supply node and the third inductor.

35. An amplifier, comprising: a transconductance stage including a transconductance stage output node and having an output capacitance; and An output matching network is coupled to the transconductance stage output node and includes a parallel inductor-capacitor resonant tank circuit arranged in parallel with a series inductor-capacitor resonant tank circuit including the output capacitance of the transconductance stage.

36. The amplifier of claim 35, further comprising an output transformer, wherein the inductor of the parallel inductor-capacitor resonant tank circuit comprises a first winding of the output transformer.

37. The amplifier of claim 36 wherein the series inductor-capacitor resonant tank circuit comprises an inductor coupled between the transconductance stage output node and the first winding of the output transformer.

38. The amplifier of claim 36, wherein the output transformer comprises a second coil coupled to an output node of the amplifier.

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