Test system and method for LED drive control chip

Abstract

The invention relates to a test system and method for an LED drive control chip. The system comprises LED driving chips to be tested, a peripheral circuit and a control module, the number of the LED driving chips to be tested is multiple, only the first LED driving chip to be tested is connected with the control module through the peripheral circuit, and only the second LED driving chip to be tested is connected with the control module through the peripheral circuit. And the rest of the LED driving chips to be tested are respectively connected with the data output end of the previous LED driving chip to be tested through the respective data input ends of the rest of the LED driving chips to be tested. The control module inputs data to the data input end of the first to-be-tested LED driving chip, the previous to-be-tested LED driving chip processes front 24-bit data and latches the front 24-bit data, and the remaining data is shaped and amplified through an internal shaping processing circuit and then transmitted to the data input end of the next cascaded to-be-tested LED driving chip through the data output end. And the data is reduced by 24 bits after being transmitted by one LED driving chip to be tested. According to the invention, comprehensive detection and rapid detection of the chip are realized.

Description

Technical Field

[0001] The present invention relates to the technical field of chip testing, and in particular to a testing system and method for an LED drive control chip. Background Art

[0002] With the rapid development of LED technology, LED has been widely used in many fields such as lighting, display and decoration. In these applications, the magic light chip has been widely used. The magic light chip is a three-channel LED driver control dedicated circuit, which can independently control the brightness of the three color channels of red, green and blue, thereby achieving dimming effects of various colors. This three-channel LED driver control chip is usually integrated into LED lamps, light strips or display screens, and cascade control of multiple chips is achieved through serial data communication.

[0003] Existing testing equipment is difficult to fully cover all possible fault points and cannot detect multiple parameters of the chip at the same time. In addition, existing testing equipment usually needs to test one by one, which is time-consuming and difficult to meet the needs of large-scale production. Summary of the invention

[0004] Therefore, the technical problem to be solved by the present invention is to overcome the problems in the prior art that multiple parameters of a chip cannot be detected simultaneously and the detection efficiency is low.

[0005] In order to solve the above technical problems, the present invention provides a test system for an LED drive control chip, comprising: The LED driver chip to be tested comprises a first output port, a second output port and a third output port for controlling three color channels of the RGB LED lamp, and the LED driver chip to be tested further comprises a power pin terminal, a data input terminal and a data output terminal; A peripheral circuit includes a first resistor, a second resistor, a third resistor, a first switch, a second switch and a third switch; A control module, comprising a first control signal input terminal, a second control signal input terminal, a third control signal input terminal, a fourth control signal input terminal, a fifth control signal input terminal, a first power input terminal, and a second power input terminal; Wherein, the first power input terminal is connected to the power pin terminal to provide a working voltage for the LED driver chip to be tested; The second power input terminal is connected to the first output port via the first switch and the first resistor; The second power input terminal is connected to the second output port via the second switch and the second resistor; The second power input terminal is connected to the third output port via the third switch and the third resistor; The first control signal input terminal, the second control signal input terminal, and the third control signal input terminal are connected to the first output port, the second output port, and the third output port respectively; The fourth control signal input terminal is connected to the data output terminal; The fifth control signal input terminal is connected to the data input terminal; There are multiple cascaded LED driver chips to be tested, only the first LED driver chip to be tested is connected to the control module through the peripheral circuit, and the remaining LED driver chips to be tested are connected to the data output end of the previous LED driver chip to be tested through their respective data input ends. The control module inputs data to the data input end of the first LED driver chip to be tested, and the previous LED driver chip to be tested processes the first 24 bits of data and latches them. The remaining data is shaped and amplified by its internal shaping processing circuit and then transmitted to the data input end of the next cascaded LED driver chip to be tested through its data output end. After each transmission through a LED driver chip to be tested, the data is reduced by 24 bits.

[0006] In one embodiment of the present invention, the first resistor, the second resistor and the third resistor are all 500Ω.

[0007] The present invention also provides a method for testing an LED driver control chip. Based on the testing system of the LED driver control chip, the method comprises: Controlling to close the first switch, the second switch, and the third switch, respectively drawing a test current of a predetermined magnitude through the first control signal input terminal, the second control signal input terminal, the third control signal input terminal, the fourth control signal input terminal, the fifth control signal input terminal, and the first power supply input terminal, and performing an open circuit or short circuit test according to the voltage drop magnitude of each port of the first LED driver chip to be tested; Connect the first power input terminal to a first voltage, connect the second power input terminal to a second voltage, input a first code value data to the data input terminal of the first LED driver chip to be tested, control the closing of the first output port, the second output port and the third output port, control the opening of the first switch, the second switch and the third switch, and perform a leakage current test according to the leakage current of the output port of each LED driver chip to be tested; Connect the first power input terminal to a third voltage, connect the second power input terminal to a fourth voltage, input second code value data to the data input terminal of the first LED driver chip to be tested, control the first output port, the second output port and the third output port to be turned on, control the first switch, the second switch and the third switch to be turned on, and perform a current output capability test according to the output current of the output port of each LED driver chip to be tested; The first power input terminal is connected to a fifth voltage, test code data is input to the data input terminal of the first LED driver chip to be tested, and latch function and output function tests are performed according to output conditions of the data output terminals of each LED driver chip to be tested.

[0008] In one implementation of the present invention, the test current is 100 μA.

[0009] In one implementation of the present invention, the first voltage is 5V, and the second voltage is 11V.

[0010] In one implementation of the present invention, the first code value data is 24×N bits of 0 code value data, where N is the number of cascaded LED driver chips to be tested.

[0011] In one implementation of the present invention, the third voltage is 5V, and the fourth voltage is 2V.

[0012] In one embodiment of the present invention, the second code value data is 24×N-bit 1 code value data, where N is the number of cascaded LED driver chips to be tested.

[0013] In one implementation of the present invention, the fifth voltage is 5V.

[0014] In one embodiment of the present invention, inputting test code data to the data input terminal of the first LED driver chip to be tested, and performing latch function and output function tests according to the output conditions of the data output terminals of each LED driver chip to be tested, comprises: Input any 24×N-bit data to the data input terminal of the first LED driver chip to be tested, the previous LED driver chip to be tested processes the first 24 bits of data and latches them, and the remaining data is shaped and transmitted to the data input terminal of the next cascaded LED driver chip to be tested through the data output terminal; Real-time monitoring of waveforms through the data output terminals of the LED driver chips to be tested; If the data input terminal of each of the LED driver chips to be tested receives the first 24 bits of data, the corresponding data output terminal maintains the output at a low level, determining that the latch function is normal; If the data input end of each of the LED driver chips to be tested receives data other than the first 24 bits, the corresponding data output end synchronously outputs the data other than the first 24 bits, and it is determined that the output function is normal.

[0015] The above technical solution of the present invention has the following advantages compared with the prior art: The present invention discloses a test system and method for an LED driver control chip. Each LED driver control chip to be tested adopts single-line data input control, so that multiple chips can be cascaded. During the test, the control module transmits data to the first chip through the data input terminal. The first chip processes the first 24 bits of data and latches it. The remaining data is shaped and transmitted from the data output terminal to the data input terminal of the next cascade chip. By analogy, the signal is transmitted to the subsequent chips in sequence. Multiple chips can receive the test data and process it at the same time, thereby improving the efficiency of the test. It can also comprehensively detect various parameters of the chip, including open-short circuit test, leakage test, current conduction capability test, latching and forwarding capability test, etc. This comprehensive test method ensures that the chip has excellent performance and reliability in application, can quickly discover and eliminate unqualified chips, and avoid failures during product use. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to make the contents of the present invention more clearly understood, the present invention is further described in detail below based on specific embodiments of the present invention in conjunction with the accompanying drawings.

[0017] Figure 1 It is a schematic diagram of a test system for a single LED drive control chip of the present invention.

[0018] Figure 2 It is a schematic diagram of the channel interface of the test machine of the present invention. DETAILED DESCRIPTION

[0019] The present invention is further described below in conjunction with the accompanying drawings and specific embodiments so that those skilled in the art can better understand the present invention and implement it, but the embodiments are not intended to limit the present invention.

[0020] In the present invention, "several" means one or more, "multiple" means more than two, "greater than", "less than", "exceed" and the like are understood to exclude the number itself; "above", "below", "within" and the like are understood to include the number itself. In the description of the present invention, if there is a description of "first" or "second", it is only used for the purpose of distinguishing technical features, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.

[0021] In the present invention, unless otherwise clearly defined, the words "set", "install", "connect" and the like should be understood in a broad sense, for example, they can be directly connected or indirectly connected through an intermediate medium; they can be fixedly connected or detachably connected or integrally formed; they can be mechanically connected or electrically connected or able to communicate with each other; they can be the internal connection of two elements or the interaction relationship between two elements. Those skilled in the art can reasonably determine the specific meanings of the above words in the present invention in combination with the specific content of the technical solution.

[0022] Example 1 Reference Figure 1 As shown, this embodiment provides a test system for an LED drive control chip, including: The LED driver chip to be tested is specifically a WS2811 chip, including a first output port out1, a second output port out2 and a third output port out3 for controlling the three color channels (red, green and blue) of the RGB LED lamp. The driver chip to be tested also includes a power pin terminal VDD, a data input terminal DIN and a data output terminal DO. The chip adopts single-line data input control, which can realize cascade control of multiple chips. The power pin terminal VDD is connected to the positive power supply; the ground wire GND is used for the reference voltage of the circuit; the setting pin SET is used for chip configuration and working mode setting; the data input terminal DIN is used to receive external input control signals. The data output terminal DO allows the chip to transmit the processed data to the next cascaded LED driver chip; The peripheral circuit includes a first resistor R1, a second resistor R2, a third resistor R3, a first switch K1, a second switch K2 and a third switch K3; A control module, comprising a first control signal input terminal T1, a second control signal input terminal T2, a third control signal input terminal T3, a fourth control signal input terminal T4, a fifth control signal input terminal T5, a first power input terminal DPS1, and a second power input terminal DPS2; Wherein, the first power input terminal DPS1 is connected to the power pin terminal VDD to provide a working voltage for the driver chip to be tested; The second power input terminal DPS2 is connected to the first output port out1 through the first switch K1 and the first resistor R1; The second power input terminal DPS2 is connected to the second output port out2 through the second switch K2 and the second resistor R2; The second power input terminal DPS2 is connected to the third output port out3 through the third switch K3 and the third resistor R3; The first control signal input terminal T1, the second control signal input terminal T2, and the third control signal input terminal T3 are connected to the first output port out1, the second output port out2, and the third output port out3 respectively; The fourth control signal input terminal T4 is connected to the data output terminal DO; The fifth control signal input terminal T5 is connected to the data input terminal DIN; There are multiple cascaded LED driver chips to be tested, and only the first LED driver chip to be tested is connected to the control module through the peripheral circuit, and the remaining LED driver chips to be tested are connected to the data output terminal DO of the previous LED driver chip to be tested through their respective data input terminals DIN. The control module inputs data to the data input terminal DIN of the first LED driver chip to be tested, and the previous LED driver chip to be tested processes the first 24 bits of data and latches it, and the remaining data is shaped and amplified by its internal shaping processing circuit and then transmitted to the data input terminal DIN of the next cascaded LED driver chip to be tested through its data output terminal DO, and each time the data is transmitted through a LED driver chip to be tested, the data is reduced by 24 bits.

[0023] It can be understood that the first control signal input terminal T1, the second control signal input terminal T2, and the third control signal input terminal T3 are used to control the opening or closing of each channel (red, green, and blue). The signal controls the on and off of the current through these input terminals, thereby controlling the working state of the LED; The first power input terminal DPS1 is connected to the power pin terminal VDD of the chip to power the chip. DPS2 powers each channel to drive the output of the RGB LED; The first resistor R1 , the second resistor R2 and the third resistor R3 are all 500Ω, and are used to limit the current flowing through the LED to prevent the LED from being damaged by excessive current.

[0024] Each channel is equipped with a switch (a first switch K1, a second switch K2 and a third switch K3). The working state of the channel can be controlled by closing or opening the switch. When the switch is closed, the current flows to the LED through the resistor, thereby lighting up the corresponding LED.

[0025] It should be noted that the WS2811 chip contains an intelligent digital interface data latch signal shaping and amplification drive circuit, a high-precision internal oscillator and a programmable constant current output driver. At the same time, in order to reduce power supply ripple, the three channels have a certain delay conduction function, which can reduce circuit ripple when the frame is refreshed.

[0026] The WS2811 chip uses a single-line return-to-zero code communication method. After the chip is powered on and reset, the data input terminal DIN receives the data transmitted from the control module. The first 24-bit data is extracted by the first chip and sent to the data latch inside the chip. The remaining data is shaped and amplified by the internal shaping processing circuit and then forwarded to the next cascaded chip through the data output terminal DO. After each chip is transmitted, the signal is reduced by 24 bits. The WS2811 chip uses automatic shaping and forwarding technology, so that the number of cascaded chips is not limited by signal transmission, but only by the signal transmission speed requirements. Ensure that when cascading multiple chips, the test signal can be transmitted stably, and each chip can accurately receive, process and forward test data.

[0027] The data latch inside the chip generates different duty cycle control signals at the control ends of the first output port out1, the second output port out2 and the third output port out3 according to the received 24-bit data. When waiting for the data input terminal DIN to input the RESET signal, all chips synchronously send the received data to each segment. The chip will re-receive the data after the signal ends. After receiving the initial 24-bit data, it forwards the data port through the data output terminal DO. Before the chip receives the RESET code, the original outputs of the first output port out1, the second output port out2 and the third output port out3 remain unchanged. After receiving the low-level RESET code of more than 280μs, the chip outputs the 24-bit PWM data pulse width just received to the pins of the first output port out1, the second output port out2 and the third output port out3.

[0028] Specifically, the control module adopts a test machine (test board), and the control module can specifically adopt a TR6836 test machine.

[0029] The schematic diagram of the test machine channel interface is as follows: Figure 2 This figure shows the circuit connection relationship inside the chip test board.

[0030] DPS_A1, DPS_E1, DPS_A2, and DPS_E2 are interfaces for performing the function of connecting to the power supply; DPS_C1, DPS_G1, DPS_C2, and DPS_G2 are interfaces for measuring voltage or current at the first gear.

[0031] Example 2 This embodiment provides a method for testing an LED driver control chip, based on the testing system for the LED driver control chip described in Embodiment 1, the method comprising: (1) OS (Open Circuit / Short Circuit) open and short circuit test Measuring the contact between the chip port and the tester: In the mass production process, the contact between the chip and the test equipment is crucial. Poor contact may lead to inaccurate measurement or test failure, wasting time and resources. Therefore, it is necessary to check the contact quality before each test to avoid bad chips wasting subsequent test resources.

[0032] Test the protection diodes of all pins to ground: The protection diodes are used to prevent damage to the chip due to overvoltage or other electrical anomalies. Therefore, it is necessary to confirm that the protection diodes on all chip pins are working properly to ensure that the chip can withstand voltage fluctuations and electrical interference in actual applications.

[0033] Test method: Control the first switch K1, the second switch K2, and the third switch K3 to close, and respectively extract a predetermined test current (100μA in this embodiment, 100μA current will not damage the chip, but is sufficient to evaluate the contact quality) through the first control signal input terminal T1, the second control signal input terminal T2, the third control signal input terminal T3, the fourth control signal input terminal T4, the fifth control signal input terminal T5, and the first power input terminal DPS1. Perform an open circuit or short circuit test according to the voltage drop of each port of the first LED driver chip to be tested. By measuring the voltage drop of each port, it can be determined whether the chip has a short circuit or an open circuit. If the voltage drop is abnormal, it means that the chip has poor contact or an internal circuit fault. If poor contact is detected, the non-conforming product stops testing and sends a "FAIL" signal to avoid wasting time in the case of poor contact. The tester connects the subsequent chip to perform OS testing again.

[0034] It should be noted that only the first LED driver chip to be tested is connected to the test machine through the peripheral circuit, and the remaining LED driver chips to be tested are each powered separately.

[0035] (2) High impedance test of R, G, and B ports Test the leakage of the chip in the 0 code value state (OUT output is turned off): When the chip is in the off state, the R, G, and B ports should have no current output and be in a high impedance state. If there is leakage current, it means that there may be a problem with the internal control circuit of the chip. This test can detect the working quality of the chip and ensure that it can effectively turn off the output when it is not working.

[0036] Test method: connect the first power input terminal DPS1 to a first voltage (5V in this embodiment), connect the second power input terminal DPS2 to a second voltage (11V in this embodiment), input the first code value data to the data input terminal DIN of the first LED driver chip to be tested, control the closing of the first output port out1, the second output port out2 and the third output port out3, control the opening of the first switch K1, the second switch K2 and the third switch K3, and perform a leakage current test according to the leakage current of the output port of each LED driver chip to be tested. By testing the leakage current of each channel separately, if there is obvious leakage current when the channel is closed, the chip is faulty and cannot be completely closed.

[0037] Specifically, the first code value data is 24×N bits of 0 code value data, where N is the number of cascaded LED driver chips to be tested.

[0038] Exemplarily, when two LED driver chips to be tested are cascaded, the first code value data is 48-bit 0 code value data: 00_00_00_00_00_00H, and the data transmission rate is 0.8M, ensuring smooth data transmission.

[0039] (3) R, G, B port continuity test Test the current output capability of the chip in the 1 code value state (OUT output fully open): This test is designed to check the current output capability of the chip in the fully on state. Insufficient or excessive output current will affect the brightness of the LED and the service life of the chip. Therefore, it is necessary to ensure that the RGB port can stably output the required current when the code value is 1.

[0040] Test method: connect the first power input terminal DPS1 to the third voltage (5V in this embodiment), connect the second power input terminal DPS2 to the fourth voltage (2V in this embodiment), input the second code value data to the data input terminal DIN of the first LED driver chip to be tested, control the conduction of the first output port out1, the second output port out2 and the third output port out3, control the opening of the first switch K1, the second switch K2, and the third switch K3, and perform a current output capacity test according to the output current of the output port of each LED driver chip to be tested. Measure the current output of each channel by turning on the channel switches one by one. By comparing the actual output current with the expected current, it can be determined whether the chip can work normally. If the output current of a channel is abnormal, there is a problem with the chip and further detection or replacement is required.

[0041] The second code value data is 24×N-bit 1 code value data, where N is the number of cascaded LED driver chips to be tested.

[0042] Exemplarily, when two LED driver chips to be tested are cascaded, the second code value data is 48-bit 1 code value data: 11_11_11_11_11_11H, and the data transmission rate is 0.8M.

[0043] (4) Test the chip latching and forwarding capabilities The chip needs to be able to accurately receive data and store it in the internal data register, and also needs to be able to correctly forward subsequent data to the next cascaded chip. Therefore, it is crucial to test whether the chip can completely latch and forward data, especially when multiple chips are used in cascade.

[0044] Test method: connect the first power input terminal DPS1 to the fifth voltage (5V in this embodiment), input test code data to the data input terminal DIN of the first LED driver chip to be tested, and perform latch function and output function tests according to the output status of the data output terminal DO of each LED driver chip to be tested.

[0045] Specifically, inputting test code data to the data input terminal DIN of the first LED driver chip to be tested, and performing latch function and output function tests according to the output conditions of the data output terminals DO of each LED driver chip to be tested, including: Input any 24×N-bit data to the data input terminal DIN of the first LED driver chip to be tested, the previous LED driver chip to be tested processes the first 24 bits of data and latches them, and the remaining data is shaped and transmitted to the data input terminal DIN of the next cascaded LED driver chip to be tested through the data output terminal DO; Real-time monitoring of waveforms through the data output terminal DO of each LED driver chip to be tested; If the data input terminal DIN of each of the LED driver chips to be tested receives the first 24 bits of data, the corresponding data output terminal DO maintains the output at a low level, determining that the latch function is normal; If the data input terminal DIN of each of the LED driver chips to be tested receives data other than the first 24 bits, the corresponding data output terminal DO synchronously outputs the data other than the first 24 bits, and it is determined that the output function is normal.

[0046] Exemplarily, when two LED driver chips to be tested are cascaded, 48 bits of data are input to the data input terminal DIN: 08_08_08_08_08_08H, and the data transmission rate is 0.8M. The waveform is monitored in real time through the data output terminal DO; the working principle of the chip is to swallow the first 24 bits of data and forward the last 24 bits of data from the data output terminal DO; by monitoring the output waveform of the data output terminal DO, it can be determined whether the chip has correctly forwarded the input data. Under normal circumstances, the data output terminal DO should be at a low level when the chip receives the first 24 bits of data; when receiving the last 24 bits of data, the data output terminal DO should synchronously output these data. If the output waveform is abnormal, there is a problem with the data processing or forwarding module of the chip. Therefore, if the first 24 bits of data are input, the data output terminal DO keeps the output at a low level, and it is determined that the latch function is normal; if the last 24 bits of data are input, the data output terminal DO synchronously outputs the last 24 bits of data, and it is determined that the output function is normal.

[0047] Through the above test method, the performance and quality of the three-channel LED drive control dedicated circuit chip in practical applications are ensured. By testing the chip's leakage current, conduction current, signal reception and forwarding capabilities, unqualified chips can be effectively eliminated to ensure the reliability and stability of the final product, improve test efficiency, and ensure that each chip undergoes strict performance verification.

[0048] It will be appreciated by those skilled in the art that embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0049] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0050] These computer program instructions may also be stored in a computer readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0051] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process in the computer or other programmable device. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0052] Finally, it should be noted that the above specific implementation methods are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to examples, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the spirit and scope of the technical solution of the present invention, which should be included in the scope of the claims of the present invention.

Claims

1. A test system for an LED drive control chip, characterized in that: include: The LED driver chip to be tested comprises a first output port, a second output port and a third output port for controlling three color channels of the RGB LED lamp, and the LED driver chip to be tested further comprises a power pin terminal, a data input terminal and a data output terminal; A peripheral circuit includes a first resistor, a second resistor, a third resistor, a first switch, a second switch and a third switch; A control module, comprising a first control signal input terminal, a second control signal input terminal, a third control signal input terminal, a fourth control signal input terminal, a fifth control signal input terminal, a first power input terminal, and a second power input terminal; Wherein, the first power input terminal is connected to the power pin terminal to provide a working voltage for the LED driver chip to be tested; The second power input terminal is connected to the first output port via the first switch and the first resistor; The second power input terminal is connected to the second output port via the second switch and the second resistor; The second power input terminal is connected to the third output port via the third switch and the third resistor; The first control signal input terminal, the second control signal input terminal, and the third control signal input terminal are connected to the first output port, the second output port, and the third output port respectively; The fourth control signal input terminal is connected to the data output terminal; The fifth control signal input terminal is connected to the data input terminal; Among them, there are multiple LED driver chips to be tested in cascade, only the first LED driver chip to be tested is connected to the control module through the peripheral circuit, and the remaining LED driver chips to be tested are connected to the data output end of the previous LED driver chip to be tested through their respective data input ends.

2. A test system for an LED drive control chip according to claim 1, characterized in that: The first resistor, the second resistor and the third resistor are all 500Ω.

3. A method for testing an LED driver control chip, based on the LED driver control chip testing system according to any one of claims 1 to 2, characterized in that: The method comprises: Controlling to close the first switch, the second switch, and the third switch, respectively drawing a test current of a predetermined magnitude through the first control signal input terminal, the second control signal input terminal, the third control signal input terminal, the fourth control signal input terminal, the fifth control signal input terminal, and the first power supply input terminal, and performing an open circuit or short circuit test according to the voltage drop magnitude of each port of the first LED driver chip to be tested; Connect the first power input terminal to a first voltage, connect the second power input terminal to a second voltage, input a first code value data to the data input terminal of the first LED driver chip to be tested, control the closing of the first output port, the second output port and the third output port, control the opening of the first switch, the second switch and the third switch, and perform a leakage current test according to the leakage current of the output port of each LED driver chip to be tested; Connect the first power input terminal to a third voltage, connect the second power input terminal to a fourth voltage, input second code value data to the data input terminal of the first LED driver chip to be tested, control the first output port, the second output port and the third output port to be turned on, control the first switch, the second switch and the third switch to be turned on, and perform a current output capability test according to the output current of the output port of each LED driver chip to be tested; The first power input terminal is connected to a fifth voltage, test code data is input to the data input terminal of the first LED driver chip to be tested, and latch function and output function tests are performed according to output conditions of the data output terminals of each LED driver chip to be tested.

4. The method for testing an LED drive control chip according to claim 3, characterized in that: The test current is 100 μA.

5. The method for testing an LED drive control chip according to claim 3, characterized in that: The first voltage is 5V, and the second voltage is 11V.

6. The method for testing an LED drive control chip according to claim 3, characterized in that: The first code value data is 24×N bits of 0 code value data, where N is the number of cascaded LED driver chips to be tested.

7. The method for testing an LED drive control chip according to claim 3, characterized in that: The third voltage is 5V, and the fourth voltage is 2V.

8. The method for testing an LED drive control chip according to claim 3, characterized in that: The second code value data is 24×N-bit 1 code value data, where N is the number of cascaded LED driver chips to be tested.

9. The method for testing an LED drive control chip according to claim 3, characterized in that: The fifth voltage is 5V.

10. The method for testing an LED drive control chip according to claim 3, characterized in that: Inputting test code data to the data input terminal of the first LED driver chip to be tested, and performing latch function and output function tests according to the output conditions of the data output terminals of each LED driver chip to be tested, including: Input any 24×N-bit data to the data input terminal of the first LED driver chip to be tested, the previous LED driver chip to be tested processes the first 24 bits of data and latches them, and the remaining data is shaped and transmitted to the data input terminal of the next cascaded LED driver chip to be tested through the data output terminal; Real-time monitoring of waveforms through the data output terminals of the LED driver chips to be tested; If the data input terminal of each of the LED driver chips to be tested receives the first 24 bits of data, the corresponding data output terminal maintains the output at a low level, determining that the latch function is normal; If the data input end of each of the LED driver chips to be tested receives data other than the first 24 bits, the corresponding data output end synchronously outputs the data other than the first 24 bits, and it is determined that the output function is normal.

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