Power supply controller
By introducing temperature determination circuits, measurement circuits and nonvolatile memory into the power controller, the problems of service life evaluation and abnormal detection of power controllers under different temperature environments are solved, and the accuracy of data accumulation and life evaluation is achieved. Improves the reliability and maintenance efficiency of the power controller.
Patent Information
- Application Number
- CN202410810425.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-06-21
- Filing Date
- 2024-06-21
- Publication Date
- 2024-12-24
AI Technical Summary
It is difficult for existing power controllers to effectively determine and record their service life under different temperature environments, and lack effective temperature abnormality detection and storage mechanisms, which affects their service life accurately and fault analysis.
A power controller is designed, including a temperature determination circuit, a measurement circuit and a nonvolatile memory. The temperature range is determined by the temperature determination circuit, the measurement circuit records the temperature time period, and the nonvolatile memory is used to store temperature history information and abnormalities. The detection results enable long-term data accumulation and service life evaluation of the temperature environment of the power controller.
It realizes that even if the power supply controller is frequently interrupted, the operating environment data can be accumulated, the service life is accurately judged, and fault analysis is facilitated, which improves the reliability and maintenance efficiency of the power controller.
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Figure CN119182298A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a power supply controller. Background Art
[0002] Various types of power supply controllers are actually used as devices for controlling the operation of a power supply device that generates an output voltage from an input voltage.
[0003] Citation List
[0004] Patent Literature
[0005] Patent Document 1: Japanese Patent Application Publication No. 2020-089043
[0006] Power supply controllers and power supply devices are used in various environments. The use environment of power supply controllers and power supply devices is important information for determining their service life, and a technology that can refer to this information is useful. Summary of the invention
[0007] A power supply controller according to the present disclosure is a power supply controller for controlling the operation of a power supply device that generates an output voltage from an input voltage, and the power supply controller includes: a temperature determination circuit, which is configured to determine which of a plurality of temperature ranges the temperature of the power supply controller belongs to; a measurement circuit, which is configured to measure, for each of the plurality of temperature ranges, a time period during which the temperature of the power supply controller belongs to the temperature range; and a non-volatile memory, which is configured to store measurement results of the measurement circuit. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] Figure 1 is a schematic block diagram of a power supply device according to an embodiment of the present disclosure.
[0009] Figure 2 4 is an external stereoscopic diagram of a power controller according to an embodiment of the present disclosure.
[0010] Figure 3 A power supply device provided with a plurality of regulators for a plurality of channels according to an embodiment of the present disclosure is shown.
[0011] Figure 4 A power supply device provided with a plurality of regulators for a plurality of channels according to an embodiment of the present disclosure is shown.
[0012] Figure 5 is a configuration diagram of two regulators in a power supply device according to an embodiment of the present disclosure.
[0013] Figure 6 is a partial block diagram of a power controller according to an embodiment of the present disclosure.
[0014] Figure 7is a relationship diagram between multiple boundary temperatures and multiple temperature ranges according to an embodiment of the present disclosure.
[0015] Figure 8 According to the embodiment of the present disclosure Figure 6 Schematic diagram of the operation of the measurement circuit in .
[0016] Fig. 9 is a structural diagram showing temperature history information stored in a nonvolatile memory according to an embodiment of the present disclosure.
[0017] Fig.10 is a diagram showing an example of temperature history information stored in a nonvolatile memory according to an embodiment of the present disclosure. Specific embodiments
[0018] Examples of embodiments of the present disclosure will be described in detail below in conjunction with the accompanying drawings. In each of the drawings, the same components are represented by the same reference numerals, and in principle, repeated descriptions of the same components will be omitted. Here, for the sake of convenience of description, symbols or reference numerals referring to information, signals, physical quantities, functional components, circuits, elements, or components may be described, and the names of the information, signals, physical quantities, functional components, circuits, elements, or components corresponding to these symbols or reference numerals may be omitted or abbreviated. For example, the non-volatile memory (see Figure 6 ) may be described as "non-volatile memory 26" or abbreviated as "memory 26", both terms referring to the same thing.
[0019] First, some terms used in the description of the embodiments of the present disclosure are explained. The term "ground" refers to a reference conductive portion having a reference potential of 0V (zero volt) or the 0V potential itself. The reference conductive portion can be formed using a conductor such as metal. In the embodiments of the present disclosure, voltages not specifically noted represent potentials viewed from ground.
[0020] For any transistor configured as a FET (field effect transistor), which may be a MOSFET, the "on state" refers to the state in which the transistor is conducting between its drain and source, and the "off state" refers to the state in which the transistor is not conducting (cut off) between its drain and source. The same applies to transistors that are not FETs. Unless otherwise specified, MOSFETs should be considered enhancement MOSFETs. MOSFET is an abbreviation for "Metal Oxide Semiconductor Field Effect Transistor". Unless otherwise specified, the back gate of a MOSFET is considered to be shorted to the source. Hereafter, the on state and off state of any transistor may be referred to simply as "on" or "off".
[0021] Unless otherwise specified, connections between multiple sites (such as circuit elements, lines or nodes) forming a circuit can be understood to refer to electrical connections.
[0022] Figure 1 1 is a schematic block diagram of a power supply device 1 according to an embodiment of the present disclosure. The power supply device 1 includes a power supply controller 2 and a discrete component group 3 composed of a plurality of discrete components externally connected to the power supply controller 2. The power supply controller 2 may be an electronic component belonging to a PMIC (power management IC).
[0023] Figure 2 : is an external stereoscopic diagram of the power controller 2. The power controller 2 is an electronic component that includes: a semiconductor chip having a semiconductor integrated circuit formed on a semiconductor substrate, a housing (package) that accommodates the semiconductor chip, and a plurality of external terminals exposed from the housing to the outside of the power controller 2. The power controller 2 is formed by encapsulating the semiconductor chip in a housing (package) made of resin. Note that Figure 2 The number of external terminals of the power supply controller 2 and the type of the housing of the power supply controller 2 shown in are merely examples, and the external terminals and the housing may adopt any design.
[0024] like Figure 3 As shown, the power supply device 1 includes a certain number of regulators 4 corresponding to n channels, that is, n regulators 4 are provided. Each regulator 4 is provided with a control block 10. n is any integer equal to or greater than 2. The n channels include the first to nth channels. Each regulator 4 receives an input voltage V IN supply, and through the input voltage V IN Converts power to generate output voltage V OUT In each channel, the input voltage V IN and output voltage V OUT are different DC voltages. The input voltage V IN Or output voltage V OUT can be a negative DC voltage. However, in the following description, the input voltage V in each channel is IN and output voltage V OUT is a positive DC voltage.
[0025] The regulator 4 of one or more of the first to nth channels may be a switching regulator. The regulator 4 as a switching regulator may be a step-down switching regulator, which IN Step down to generate a voltage lower than the input voltage V IN The output voltage V OUT , or a step-up switching regulator that IN Boost to generate a voltage higher than the input voltage V IN The output voltage V OUTThe regulators 4 of one or more of the first to nth channels may each be a linear regulator. The n regulators 4 of the first to nth channels may all be switching regulators or linear regulators. Among the total n regulators 4 of the first to nth channels, one or more switching regulators and one or more linear regulators may be mixed.
[0026] A total of n output voltages V in channels 1 to n OUT are different DC voltages, but i A The output voltage of the channel V OUT The value of i B The output voltage of the channel V OUT The value of is consistent, where i A 、i B Represents any unique natural number less than or equal to n.
[0027] A total of n input voltages V in channels 1 to n IN Can be the same DC voltage as each other, that is, the input voltage V of the 1st to nth channels IN A common DC voltage can be used. A Channel input voltage V IN Can be with i B Channel input voltage V IN The same or different, any input voltage V of the 1st to nth channels IN Both can be the power supply voltage of the power controller 2.
[0028] A total of n control blocks 10 in the first to nth channels are provided in the power supply controller 2. In each channel, the regulator 4 is formed by the control block 10 and discrete components connected to the control block 10. Figure 4 As shown, the regulator 4, the control block 10, and the input voltage V IN and output voltage V OUT They are respectively represented as regulator 4[i], control block 10[i], input voltage V IN [i] and output voltage V OUT [i], where i is any integer (e.g., any natural number less than or equal to n).
[0029] The power supply device 1 operates (converts power) so that the input voltage V IN Generates output voltage V OUT The power controller 2 controls the operation (power conversion) of the power supply device 1. That is, the power controller 2 controls the operation (power conversion) of the regulator 4 of each channel.
[0030] Figure 5The regulator 4[i A ] and 4[i B ], the example configuration of the regulator 4[i A ] and 4[i B ] are any two of the regulators 4[1] to 4[n]. A ] is a control block 10[i A ]、Output coil L[i A ] and the output capacitor C[i A ] step-down switching regulator. Regulator 4[i B ] is a control block 10[i B ] and the output capacitor C[i B ] linear regulator. Regulator 4[i B ] can be an LDO (low dropout) regulator. Control block 10[i A ] and 10[i B ] is set in the power supply controller 2. Output coil L[i A ] and the output capacitor C[i A ] and the output capacitor C[i B ] is a component of discrete component group 3 (see Figure 1 ).
[0031] Control block 10[i A ] includes transistor 11 and transistor 12 and control drive circuit 13. Transistor 11 is a P-channel MOSFET, and transistor 12 is an N-channel MOSFET. Input voltage V IN [i A ] is supplied to the source of transistor 11. The drains of transistor 11 and transistor 12 are commonly connected to output coil L[i A ] The first end of the output coil L[i A The second end of ] is connected to the output node OUT[i A The source of transistor 12 is grounded. Output capacitor C[i A ] is set at the output node OUT[i A ] and ground. That is, the output capacitor C[i A ] is connected to the output node OUT[i A ], output capacitor C[i A The second end of the output node OUT[i A The voltage at ] is the output voltage V OUT [i A ].
[0032] Output voltage V OUT [i A ] is input to the control drive circuit 13. Figure 5 In the output node OUT[i A ] is connected to the control drive circuit 13, so the output voltage V OUT [i A ] itself as the output voltage V OUT [i A ] is fed back to the control drive circuit 13. However, the output voltage V OUT [i A ] can be the output voltage V OUT [i A The control driving circuit 13 is connected to the gates of the transistors 11 and 12, and controls the gate potentials of the transistors 11 and 12 to control the conduction or shutoff of the transistors 11 and 12 respectively. The control driving circuit 13 performs switch control to turn the transistors 11 and 12 on or off alternately, thereby generating a voltage V OUT [i A ] feedback information, so that the output voltage V OUT [i A ] is stabilized at a predetermined target voltage. Due to this switch control, a rectangular voltage (at about 0V and the input voltage V IN [i A ]). Output coil L[i A ] and the output capacitor C[i A ] rectifies and smoothes the rectangular voltage and outputs it at the output node OUT[i A ] generates an output voltage V OUT [i A ].
[0033] Control block 10[i B ] includes a transistor 14 and a control drive circuit 15. The transistor 14 is a P-channel MOSFET. The input voltage V IN [i B ] is supplied to the source of transistor 14. The drain of transistor 14 is connected to the output node OUT[i B ]. Output capacitor C[i B ] is set at the output node OUT[i B ] and ground. That is, the output capacitor C[i B ] is connected to the output node OUT[i B ], output capacitor C[i B The second end of the output node OUT[i B The voltage at ] is the output voltage V OUT [i B ].
[0034] Output voltage V OUT [i B ] is input to the control drive circuit 15. Figure 5 In the output node OUT[i B ] is connected to the control drive circuit 15, so the output voltage V OUT [i B ] itself as the output voltage V OUT [i B ] is input to the control drive circuit 15. However, the output voltage V OUT [i B ] can be the output voltage V OUT [i B The control drive circuit 15 is connected to the gate of the transistor 14. The control drive circuit 15 is based on the output voltage V OUT [i B ] to control the gate potential of transistor 14, thereby controlling the voltage provided to output node OUT[i B ] current. This control makes the output voltage V OUT [i B ] is stabilized at the predetermined target voltage.
[0035] Two or more devices having the same functions as the regulator 4 may be provided in the power supply device 1. A ] The regulator 4 of the equivalent configuration may be provided in the power supply device 1 with two or more components having the same configuration as the regulator 4[i B ]Regulator 4 of equivalent configuration.
[0036] Figure 6 2 is a block diagram showing a part of the power supply controller 2 to explain how the characteristic functions of the power supply controller 2 are presented. The power supply controller 2 includes a temperature sensor 21, a temperature determination circuit 22, a measurement circuit 23, an abnormality detection circuit 24, a memory controller 25, a nonvolatile memory 26, a volatile memory 27, and a signal output control circuit 28. The abnormality detection circuit 24 includes a temperature abnormality detection circuit 24a. Figure 6 The external device 5 is also shown as being arranged outside the power controller 2. The external device 5 includes, for example, an MPU (microprocessing unit). The power controller 2 and the external device 5 are connected to each other via a predetermined communication bus to achieve bidirectional communication. For example, the bidirectional communication between the power controller 2 and the external device 5 is achieved via I 2 C (Inter-Integrated Circuit) bus, SPI (Serial Peripheral Interface) bus and other communication buses.
[0037] The temperature sensor 21 detects the target temperature TEMP and outputs a temperature signal S corresponding to the target temperature TEMP.TEMP The target temperature TEMP is the temperature of the power controller 2. More specifically, the target temperature TEMP is the temperature at a predetermined measurement target position in the power controller 2. That is, the temperature sensor 21 is installed at a predetermined measurement target position in the power controller 2, and outputs a temperature signal S corresponding to the temperature at the measurement target position. TEMP .
[0038] The temperature sensor 21 generates a temperature signal S by using a temperature detection diode formed by a semiconductor PN junction. TEMP More specifically, for example, the temperature sensor 21 includes a temperature detection diode, a constant current circuit that supplies a constant current to the temperature detection diode in the forward direction, and a circuit that generates a temperature signal S based on a forward voltage Vf of the temperature detection diode. TEMP The forward voltage Vf is the forward voltage generated by the temperature detection diode during the period of time when a constant current is supplied to the temperature detection diode in the forward direction. The temperature signal S TEMP It can be the forward voltage Vf itself or a signal obtained by amplifying the forward voltage Vf. Since the forward voltage Vf increases or decreases according to the target temperature TEMP, the temperature signal S can be generated by detecting the forward voltage Vf. TEMP . Temperature signal S TEMP The temperature is supplied to the temperature determination circuit 22 and the temperature abnormality detection circuit 24a.
[0039] The temperature determination circuit 22 determines the temperature based on the temperature signal S TEMP It is determined whether the target temperature TEMP belongs to any one of the temperature ranges R[1] to R[m], where m is an arbitrary integer equal to or greater than 2. The temperature ranges R[1] to R[m] are m types of temperature ranges that do not overlap with each other. Figure 7 In the temperature determination circuit 22, a boundary temperature T is defined. B [1] to T B [m-1], which are the temperatures of a predetermined number (m-1) of types. Boundary temperature T B [j+1] is higher than the boundary temperature T B [j], where j is an arbitrary integer. For any integer j that satisfies “2≤j≤m-1”, the temperature range R[j] is equal to or greater than the boundary temperature T B [j-1] and is less than the boundary temperature T B [j]. Below the boundary temperature T B The temperature of [1] belongs to the temperature range R[1]. Equal to or greater than the boundary temperature T B The temperature of [m] belongs to the temperature range R[m].
[0040] The temperature determination circuit 22 may be constituted by an AD converter. In this case, the AD converter converts the temperature signal S into an analog voltage signal. TEMP Convert to digital signal to obtain temperature signal S TEMP Then, based on the acquired voltage value, the temperature determination circuit 22 determines to which of the temperature ranges R[1] to R[m] the target temperature TEMP belongs. Alternatively, the temperature determination circuit 22 may be composed of (m-1) comparators. In this case, the temperature determination circuit 22 uses (m-1) comparators to convert the temperature signal S TEMP The voltage is compared with (m-1) kinds of judgment voltages, and based on the temperature signal S TEMP The high / low relationship between the voltage and the (m-1) types of determination voltages is used to determine which of the temperature ranges R[1] to R[m] the target temperature TEMP belongs to.
[0041] The classification signal S indicates to which of the temperature ranges R[1] to R[m] the target temperature TEMP belongs. CLS The temperature is output from the temperature determination circuit 22 to the measurement circuit 23 .
[0042] Based on the classification signal S CLS , the measurement circuit 23 measures the time period during which the temperature TEMP belongs to the temperature range for each temperature range. For convenience, the classification signal S indicating that the target temperature TEMP belongs to the temperature range R[j] is CLS It is called classification signal S CLS [j] Therefore, for example, during the time period when the target temperature TEMP belongs to the temperature range R[1], the temperature determination circuit 22 outputs the classification signal S to the measurement circuit 23. CLS [1], and during the time period when the target temperature TEMP belongs to the temperature range R [2], the temperature determination circuit 22 outputs the classification signal S to the measurement circuit 23. CLS [2]. The same applies to the time period when the target temperature TEMP belongs to other temperature ranges. The measurement circuit 23 can be composed of a counter. The count value used to measure the time period when the target temperature TEMP belongs to the temperature range R[j] is called the count value VAL[j]. The initial value of the count value VAL[j] is zero.
[0043] Figure 8 1 shows how the count VAL[j] changes during the time period when the target temperature TEMP belongs to the temperature range R[j]. The measuring circuit 23 provides itself with the classification signal S CLS During the time period of the target temperature TEMP falling within the temperature range R[j], the count value VAL[j] is incremented by 1 at every predetermined time increment. When the count value VAL[j] reaches the predetermined upper limit value VAL[j], the count value VAL[j] is incremented by 1 at every predetermined time increment.MAX When the target temperature TEMP falls within the temperature range R[j], the measurement circuit 23 resets the count value VAL[j] and outputs the count signal UP[j] to the memory controller 25. Then, during the period when the target temperature TEMP falls within the temperature range R[j], the measurement circuit 23 resets the count value VAL[j] and outputs the count signal UP[j] to the memory controller 25. UNIT , the count signal UP[j] is output to the memory controller 25. That is, for example, during the period when the target temperature TEMP belongs to the temperature range R[1], every time the unit time t UNIT , the measurement circuit 23 will output the counting signal UP[1] to the memory controller 25, and during the time period when the target temperature TEMP belongs to the temperature range R[2], every unit time t UNIT , the measurement circuit 23 will output the counting signal UP[2] to the memory controller 25. The same applies to the time period when the target temperature TEMP belongs to other temperature ranges. UNIT Corresponding to the above time increment and upper limit value VAL MAX The count signal UP[j] may be a single pulse signal, for example.
[0044] Note that resetting the count value VAL[j] means assigning an initial value of zero to the count value VAL[j]. MAX is an integer value sufficiently greater than zero (e.g., has a value of 255 or 65535).
[0045] The abnormality detection circuit 24 detects a predetermined abnormality (more specifically, detects whether a predetermined abnormality occurs). The abnormality detected by the abnormality detection circuit 24 is an abnormality in the power supply controller 2 or the power supply device 1. The abnormality to be detected by the abnormality detection circuit 24 includes at least a temperature abnormality. The temperature abnormality detection circuit 24a detects a temperature abnormality. The temperature abnormality includes the target temperature TEMP reaching the predetermined shutdown temperature T TSD The first temperature abnormality and the target temperature TEMP reach the predetermined alarm temperature T TW The second temperature anomaly (T TSD >T TW The temperature abnormality detection circuit 24a detects the temperature based on the temperature signal S TEMP The first temperature abnormality or the second temperature abnormality is detected (more specifically, whether the first temperature abnormality or the second temperature abnormality occurs or not is detected).
[0046] The abnormality to be detected by the abnormality detection circuit 24 includes an abnormality in the output voltage of each channel. The abnormality detection circuit 24 detects an abnormality based on the output voltage V OUT The feedback information of [i] detects the abnormal output voltage of the i-th channel. The output voltage V OUT The feedback information of [i] is the output voltage V OUT [i] Itself or output voltage V OUTThe output voltage abnormalities of each channel include OVP abnormality, OVD abnormality, UVP abnormality, and UVD abnormality. The OVP abnormality of the i-th channel refers to the output voltage V OUT [i] Equal to or greater than the predetermined upper limit protection voltage V OVP [i] state. The OVD abnormality of the i-th channel refers to the output voltage V OUT [i] Equal to or greater than a predetermined upper limit detection voltage V OVD [i] state. The UVD abnormality of the i-th channel refers to the output voltage V OUT [i] Equal to or less than the predetermined lower limit alarm voltage V UVD [i] state. The UVP abnormality of the i-th channel refers to the output voltage V OUT [i] equal to or less than the predetermined lower protection voltage V UVP [i] state. Here, “V OVP [i]>V OVD [i]>V TG [i]>V UVD [i]>V UVP [i]>0” holds, where V TG [i] indicates the output voltage V OUT [i] The target voltage that should be stabilized at.
[0047] In addition, the abnormality detection circuit 24 can detect various types of abnormalities. Examples of abnormalities to be detected by the abnormality detection circuit 24 include an abnormality that the power supply voltage supplied to the power controller 2 is too high or too low, an abnormality in communication between the external device 5 and the power controller 2, and an abnormality of the watchdog timer used by the external device 5 or other circuits and the power controller 2. The abnormality detection circuit 24 outputs the detection result of each abnormality to the memory controller 25.
[0048] The memory controller 25 can write any information to the nonvolatile memory 26, and can also write any information to the volatile memory 27. In this case, the memory controller 25 can write information corresponding to the measurement result of the measurement circuit 23 or information corresponding to the detection result of each abnormality by the abnormality detection circuit 24 to the memory 26 and / or the memory 27. The memory controller 25 can also read any information stored in the memory 26 and / or the memory 27.
[0049] The nonvolatile memory 26 is a multi-time programmable (MTP) memory that can be rewritten multiple times to store information therein. Even if the power supply voltage supply of the power controller 2 is interrupted, the nonvolatile memory 26 retains the stored content. On the other hand, when the power supply voltage supply of the power controller 2 is interrupted, the storage content of the volatile memory 27 is lost. The volatile memory 27 is a random access memory (RAM) and can be a memory belonging to a register. The signal output control circuit 28 can output various information based on the storage content of the memory 26 or the memory 27 to the external device 5 via the above-mentioned communication bus. The signal output control circuit 28 can read out the storage content of the memory 26 or the memory 27 via the memory controller 25.
[0050] When the abnormality detection circuit 24 detects an abnormality, the memory controller 25 may store information indicating the detection in the memory 26 and the memory 27 for each detected abnormality. For example, when the temperature abnormality detection circuit 24a detects a first temperature abnormality, the memory controller 25 stores information indicating that the first temperature abnormality has been detected in the memory 26 and the memory 27. The same applies to the case where a second temperature abnormality is detected. For example, when the abnormality detection circuit 24 detects an OVP abnormality of the first channel, the memory controller 25 stores information indicating that an OVP abnormality of the first channel is detected in the memory 26 and the memory 27. Similarly, when the abnormality detection circuit 24 detects an OVP abnormality of the second channel, the memory controller 25 stores information indicating that an OVP abnormality of the second channel is detected in the memory 26 and the memory 27. The same applies to the case where an OVP abnormality of another channel is detected. The same applies to the case where an OVD abnormality, UVP abnormality, or UVD abnormality of any other channel is detected. The same applies to the case where other types of abnormalities are detected.
[0051] Furthermore, the memory controller 25 may perform a process of storing the temperature history information in the nonvolatile memory 26 . Fig. 9 FIG. 2 shows the structure of the temperature history information stored in the nonvolatile memory 26. The temperature history information includes a value indicating the cumulative driving time t ACM [1] to t ACM [m] information.
[0052] The power supply controller 2 is driven only during the period in which the power supply voltage is supplied to the power supply controller 2. The cumulative value of the period (time) in which the temperature TEMP belongs to the temperature range R[j] of the period in which the power supply controller 2 is driven corresponds to the cumulative driving time t ACM [j]. In other words, for example, the accumulated driving time t ACM[1] is the cumulative value of the time period (time) during which the temperature TEMP belongs to the temperature range R[1] during which the power controller 2 is driven (more specifically, the total driving time). Similarly, for example, the cumulative driving time t ACM [2] is the cumulative value of the time period (time) during which the temperature TEMP belongs to the temperature range R[2] during which the power controller 2 is driven (more specifically, the total driving time). The same applies to the cumulative driving time t ACM [3] to t ACM [m]. In other words, the cumulative driving time t ACM [j] represents the sum of the lengths of the time periods in which the temperature TEMP belongs to the temperature range R[j] during which the power controller 2 is driven (more specifically, the total driving time).
[0053] In practice, they represent the cumulative driving time t ACM [1] to t ACM The cumulative driving value N of [m] ACM [1] to N ACM [m] can be stored separately in the nonvolatile memory 26. The accumulated driving time t ACM [1] to t ACM [m] and the accumulated driving value N ACM [1] to N ACM [m] one-to-one correspondence. That is, the cumulative drive value N ACM [j] indicates the cumulative driving time t ACM [j] information. In the initial state of the power supply controller 2, the accumulated drive value N ACM [1] to N ACM [m] are all zero. Whenever the memory controller 25 receives the count signal UP[j] (see Figure 8 ), the memory controller 25 accumulates the driving value N ACM [j] is incremented by 1. In other words, for example, each time the memory controller 25 receives the count signal UP[1] from the measurement circuit 23, the memory controller 25 accumulates the drive value N ACM [1] increases by 1. Whenever the memory controller 25 receives the count signal UP from the measurement circuit 23 [2], the memory controller 25 accumulates the drive value N ACM [2] Increase by 1. Accumulated drive value N ACM [j] and unit time t UNIT The product of is the cumulative driving time t ACM [j]. Accumulated driving value N ACM Storage and cumulative driving time t of [j] ACM The storage of [j] is equivalent to each other.
[0054] Fig.10An example of temperature history information for a particular time of interest is shown. Fig.10 In the example, it is assumed that "m = 5" and the boundary temperature T B [1] T B [2] T B [3] and T B [4] are 0°C, 75°C, 100°C and 125°C respectively. During the time period from the initial state to the time of interest, in the state where the target temperature TEMP belongs to the temperature range R[1], the power controller 2 is driven for a total of 1 hour, in the state where the target temperature TEMP belongs to the temperature range R[2], the power controller 2 is driven for a total of 200 hours, in the state where the target temperature TEMP belongs to the temperature range R[3], the power controller 2 is driven for a total of 10 hours, in the state where the target temperature TEMP belongs to the temperature range R[4], the power controller 2 is driven for a total of 5 hours, and in the state where the target temperature TEMP belongs to the temperature range R[5], the power controller 2 is driven for a total of 1 hour. Then, at the time point of interest, the accumulated driving time t ACM [1] t ACM [2] t ACM [3] t ACM [4] and t ACM [5] The temperature history information of 1 hour, 200 hours, 10 hours, 5 hours and 1 hour respectively is stored and maintained in the non-volatile memory 26.
[0055] The signal output control circuit 28 can output the temperature history information stored in the nonvolatile memory 26 to the external device 5 via the above-mentioned communication bus. The external device 5 can send a command requesting the temperature history information to the power controller 2, and the signal output control circuit 28 sends the temperature history information to the external device 5 in response to the power controller 2 receiving the command.
[0056] In addition, the signal output control circuit 28 can output any information stored in the memory 26 or the memory 27 (for example, information corresponding to the detection result of each abnormality detected by the abnormality detection circuit 24) to the external device 5 via the above-mentioned communication bus. In this case, in response to receiving a predetermined command from the external device 5, the signal output control circuit 28 transmits the information specified by the command (the information in the memory 26 or the memory 27) to the external device 5.
[0057] By storing the temperature history information as described above in the nonvolatile memory 26, data on the operating environment of the power supply controller 2 can be accumulated even if the power supply voltage supply to the power supply controller 2 is frequently cut off. Therefore, the service life of the power supply controller 2 can be determined. In addition, having the nonvolatile memory 26 also store information related to abnormalities helps in subsequent failure analysis, etc. (that is, the information related to abnormalities can be used for failure analysis, etc.).
[0058] The signal output control circuit 28 can also perform a service life determination process. This will now be described. In the service life determination process, the signal output control circuit 28 determines the service life based on the accumulated driving time t stored in the nonvolatile memory 26. ACM [1] to t ACM [m] to determine whether the power controller 2 has reached the end of its service life.
[0059] In the design stage of the power controller 2, the design value of the driving time that the power controller 2 can continuously operate according to the specifications (hereinafter referred to as "serviceable design time") is determined. However, the serviceable design time varies according to the operating temperature of the power controller 2. Basically, the higher the operating temperature of the power controller 2, the shorter the serviceable design time. Taking this into account, in the service life determination process, the signal output control circuit 28 calculates the cumulative driving time t ACM [1] to t ACM [m] Perform weighted addition to obtain the weighted sum W SUM , and by adding the weighted sum W SUM The service life of the power supply controller 2 is compared with a predetermined service life determination threshold value to make a determination related to the service life of the power supply controller 2. SUM Increasing from zero, the power controller 2 is closer to the end of its useful life.
[0060] Weighted sum W SUM It is obtained according to the following formula (1). In other words, the weighted sum W SUM is the sum of the first to mth products. The jth product is (k[j]×t ACM [j]). k[1] to k[m] are all predetermined coefficients. The coefficients k[1] to k[m] are different from each other. However, the values of some of the coefficients k[1] to k[m] may be the same as the values of some of the other coefficients. The coefficients k[1] to k[m] include at least two or more coefficients with different values. For example, at least the coefficients k[1] and k[m] have values different from each other. As described above, the higher the operating temperature of the power supply controller 2, the shorter the service design time. Therefore, basically, the value of the coefficient k[j+1] should be greater than the value of the coefficient k[j] (at least "k[m]>k[1]").
[0061]
[0062] In the service life determination process, the signal output control circuit 28 calculates the weighted sum W SUM The predetermined service life threshold TH LIM When the weighted sum W SUM Equal to or greater than the service life judgment threshold TH LIM When the signal output control circuit 28 determines that the power supply controller 2 has reached the end of its service life, and when the weighted sum W SUM Less than the service life judgment threshold TH LIM , the signal output control circuit 28 does not determine that the power supply controller 2 has reached the end of its service life. The signal output control circuit 28 determines whether to output (transmit) a predetermined service life arrival signal to the external device 5 based on the determination result of whether the power supply controller 2 has reached the end of its service life. In the case where the signal output control circuit 28 determines that the power supply controller 2 has reached the end of its service life, the signal output control circuit 28 outputs (transmits) a predetermined service life arrival signal to the external device 5. In the case where the signal output control circuit 28 does not determine that the power supply controller 2 has reached the end of its service life, the signal output control circuit 28 does not output (transmit) a service life arrival signal.
[0063] In the service life determination process, the signal output control circuit 28 calculates the weighted sum W SUM With the predetermined service life alarm threshold TH W And the service life judgment threshold TH LIM Compare, and when "TH LIM >W SUM ≥TH W ", a predetermined service life alarm signal can be output (transmitted) to the external device 5. The service life arrival signal is a signal indicating that the power supply controller 2 has reached the end of its service life, and the service life alarm signal is a signal indicating that the power supply controller 2 is about to reach the end of its service life. By enabling the output of the service life arrival signal or the service life alarm signal, the user can know when to replace the power supply controller 2 or the device including the power supply controller 2.
[0064] The service life arrival information and the service life alarm information may be stored in each of the memory 26 and the memory 27. The service life arrival information and the service life alarm information each have a value of "1" or "0". The initial values of the service life arrival information and the service life alarm information are both "0". When "W SUM ≥TH W ", the signal output control circuit 28 writes "1" into the service life alarm information in the memory 26 and the memory 27 via the memory controller 25. When "W SUM ≥THLIM ", the signal output control circuit 28 writes "1" into the service life arrival information in the memory 26 and the memory 27 via the memory controller 25. The service life alarm information with a value of "1" indicates that the power supply controller 2 is about to reach the end of its service life. The service life arrival information with a value of "1" indicates that the power supply controller 2 has reached the end of its service life.
[0065] The service life arrival signal and the service life alarm signal may be in a form that the external device 5 can distinguish from each other. Alternatively, the following signal output configuration may be adopted. A signal output circuit having an open drain configuration is provided in the power supply controller 2, and the signal output circuit is configured to output a fault signal from the power supply controller 2 to the external device 5. The fault signal is a binary signal representing a value of "1" or "0". In principle, the signal output control circuit 28 assigns a fault signal value of "0", and when the "W SUM ≥TH LIM "When the fault signal value is "1", the fault signal value "1" is output. In this case, the fault signal value "1" is used as the service life reaching signal. Alternatively, in principle, the signal output control circuit 28 gives the fault signal value "0", and when "W is satisfied, SUM ≥TH W ", a fault signal with a value of "1" is output. In this case, the fault signal with a value of "1" serves as a service life alarm signal. In addition, when the abnormality detection circuit 24 detects a specific abnormality (for example, temperature abnormality or output voltage abnormality), the signal output control circuit 28 also outputs a fault signal with a value of "1". In this case, the external device 5 cannot determine the cause of the "1" fault signal in detail at the stage of receiving the "1" fault signal. However, after receiving the "1" fault signal, the external device 5 sends a command to the power controller 2 requesting storage information in the memory 26 or the memory 27. After receiving the information sent by the power controller 2 in response to the command (the storage information in the memory 26 or the memory 27), the external device 5 can determine the cause of the "1" fault signal in detail. It is worth noting that when the power controller 2 receives a predetermined fault reset command from the external device 5, the power controller 2 can reset the value of the fault signal to "0".
[0066] Application and transformation
[0067] Some applications or modifications of the above embodiments are described below.
[0068] The memory controller 25 may be configured to store temperature history information including time series data of the target temperature TEMP in the nonvolatile memory 26. In other words, for example, consider a case where the power controller 2 is driven for a total of 3 hours in a state where the target temperature TEMP belongs to the temperature range R[1], and then is driven for a total of 10 hours in a state where the target temperature TEMP belongs to the temperature range R[2]. In this case, time series data that can identify that after the power controller 2 is driven for a total of 3 hours in a state where the target temperature TEMP belongs to the temperature range R[1], the power controller 2 is driven for a total of 10 hours in a state where the target temperature TEMP belongs to the temperature range R[2] may be stored in the nonvolatile memory 26.
[0069] A plurality of temperature sensors 21 may be provided in the power controller 2. In this case, the plurality of temperature sensors 21 are installed at a plurality of mutually different measurement target positions in the power controller 2, and the plurality of temperature sensors 21 detect the temperatures at the plurality of measurement target positions, respectively. The temperatures at the plurality of measurement target positions are a plurality of target temperatures TEMP. In this case, the temperature history information may be stored in the nonvolatile memory 26 for each target temperature TEMP by performing each of the above operations for each target temperature TEMP.
[0070] The total number of regulators 4 in the power supply device 1 may be one. That is, "n=1" is also acceptable.
[0071] The power supply device 1 may be installed in a vehicle, such as a car. In this case, the input voltage V IN The power supply voltage of the power supply controller 2 is the output voltage of a battery installed in the vehicle, or is generated based on the output voltage of the battery. However, the power supply device 1 is not limited to application to a vehicle, and is not limited in any way.
[0072] The channel type of the FET (field effect transistor) described in the embodiment is only an example, and the channel type of any FET can be changed between the P-channel type and the N-channel type as long as it does not affect the above-mentioned main purpose.
[0073] Any of the above transistors may be any type of transistor, as long as no contradiction occurs. For example, any of the above transistors described as MOSFETs may be replaced by junction FETs, insulated gate bipolar transistors (IGBTs), or bipolar transistors, as long as no contradiction occurs. Any transistor has a first electrode, a second electrode, and a control electrode. In the case of a FET, one of the first and second electrodes is a drain, the other is a source, and the control electrode is a gate. In the case of an IGBT, one of the first and second electrodes is a collector, the other is an emitter, and the control electrode is a gate. In a bipolar transistor that is not an IGBT, one of the first and second electrodes is a collector, the other is an emitter, and the control electrode is a base.
[0074] The embodiments of the present disclosure can be appropriately modified in various ways within the scope of the technical ideas specified in the claims. The above embodiments are only examples of the embodiments of the present disclosure, and the meanings of the terms and the requirements of each component in the present disclosure are not limited to the meanings and requirements described in the above embodiments. The specific numerical values shown in the above description are only examples, and of course they can be changed to various values.
[0075] Notes
[0076] Supplementary explanation is provided for the present disclosure, specific configuration examples of which are shown in the above-mentioned embodiments.
[0077] A power controller according to one aspect of the present disclosure is a power controller (2) configured to control a power supply from an input voltage (V IN ) generates an output voltage (V OUT ) for operating a power supply device (1), the power supply controller (2) comprising: a temperature determination circuit (22) configured to determine to which of a plurality of temperature ranges (R[1] to R[m]) the temperature (TEMP) of the power supply controller belongs; a measurement circuit (23) configured to measure, for each of the plurality of temperature ranges, a time period during which the temperature of the power supply controller belongs to the temperature range; and a non-volatile memory (26) configured to store a measurement result of the measurement circuit (first configuration).
[0078] With this configuration, even if the supply of power voltage to the power controller is frequently cut off, data on the operating environment of the power controller can be accumulated, and a decision related to the service life of the power controller can also be made.
[0079] In the power supply controller according to the first configuration described above, the nonvolatile memory stores the accumulated driving time (t ACM [1] to t ACM [m]), and the cumulative driving time (t ACM[j]) may represent a cumulative value of a time period in which the temperature of the power controller belongs to the temperature range (R[j]) within a cycle in which the power controller is driven (second configuration).
[0080] The power controller according to the above-mentioned second configuration may also include a signal output control circuit (28), which is configured to output a specific signal (for example, a service life reaching signal) to an external device (5) of the power controller, wherein the signal output control circuit may be configured to decide whether to output the specific signal based on each accumulated driving time stored in the non-volatile memory (third configuration).
[0081] In the power controller according to the above-mentioned third configuration, the signal output control circuit can be configured to determine whether the power controller has reached the end of its service life based on each accumulated driving time stored in the non-volatile memory, and can decide whether to output a specific signal based on the determination result (fourth configuration).
[0082] With this configuration, external devices can be notified that the power controller has reached the end of its useful life.
[0083] In the power supply controller according to the fourth configuration described above, the signal output control circuit may be configured to obtain a weighted sum (W ) by weighted addition of a plurality of accumulated driving times in a plurality of temperature ranges. SUM , and whether the power supply controller has reached the end of its service life can be determined based on a comparison result between the weighted sum and a predetermined threshold (fifth configuration).
[0084] With this configuration, it is possible to satisfactorily evaluate whether the power supply controller has reached the end of its useful life.
[0085] The power controller according to any one of the first to fifth configurations may further include: a temperature sensor (21) configured to output a signal (S) corresponding to the temperature of the power controller. TEMP );and a temperature anomaly detection circuit (24a), which is configured to detect a temperature anomaly of the power controller based on an output signal of the temperature sensor, wherein the temperature determination circuit uses the temperature sensor to determine which of multiple temperature ranges the temperature of the power controller belongs to (sixth configuration).
[0086] With this configuration, the temperature sensor provided to detect temperature anomalies can also be used to perform other operations such as temperature classification and storing information in non-volatile memory.
[0087] The power supply controller according to any one of the first to fifth configurations described above may further include an abnormality detection circuit (24) configured to detect a predetermined abnormality, and when the abnormality detection circuit detects an abnormality, information indicating the detected abnormality may be stored in a non-volatile memory (seventh configuration).
[0088] With this configuration, subsequent failure analysis and the like (ie, information related to the abnormality can be used for failure analysis and the like) becomes easier.
[0089] In a power supply controller according to any one of the first to seventh configurations described above, the power supply device may include a regulator (4) for a plurality of channels and generate an output voltage according to an input voltage of each channel, and the power supply controller may control the operation of each regulator of each channel (eighth configuration).
Claims
1. A power controller configured to control the operation of a power supply device that generates an output voltage from an input voltage, the power controller comprising: a temperature determination circuit configured to determine to which of a plurality of temperature ranges the temperature of the power supply controller belongs; a measurement circuit configured to measure, for each of the plurality of temperature ranges, a time period during which the temperature of the power supply controller falls within the temperature range; as well as A non-volatile memory is configured to store a measurement result of the measurement circuit.
2. The power controller according to claim 1, wherein: The nonvolatile memory stores the accumulated driving time for each of the plurality of temperature ranges, and The accumulated driving time of each of the plurality of temperature ranges represents an accumulated value of a time period during which the temperature of the power controller belongs to the temperature range within a time period during which the power controller is driven.
3. The power controller according to claim 2, further comprising: A signal output control circuit, wherein the signal output control circuit is configured to output a specific signal to an external device of the power controller, wherein: The signal output control circuit determines whether to output the specific signal based on each accumulated driving time stored in the nonvolatile memory.
4. The power controller according to claim 3, wherein: The signal output control circuit determines whether the power controller has reached its service life based on each accumulated driving time stored in the nonvolatile memory, and decides whether to output the specific signal based on the determination result.
5. The power controller according to claim 4, wherein: The signal output control circuit obtains a weighted sum by weighted addition of a plurality of accumulated driving times in the plurality of temperature ranges, and determines whether the power controller reaches the end of its service life based on a comparison result between the weighted sum and a predetermined threshold.
6. The power controller according to any one of claims 1 to 5, further comprising: a temperature sensor configured to output a signal corresponding to a temperature of the power controller; as well as a temperature abnormality detection circuit configured to detect temperature abnormality of the power supply controller based on an output signal of the temperature sensor, wherein: The temperature determination circuit determines to which of the plurality of temperature ranges the temperature of the power supply controller belongs by using the temperature sensor.
7. The power controller according to any one of claims 1 to 5, further comprising: an abnormality detection circuit, the abnormality detection circuit being configured to detect a predetermined abnormality, wherein When the abnormality detection circuit detects an abnormality, information indicating that the abnormality has been detected is stored in the nonvolatile memory.
8. The power controller according to any one of claims 1 to 5, wherein: The power supply device includes a plurality of channels of regulators and generates an output voltage according to an input voltage of each channel, and The power supply controller controls the operation of each regulator of each channel.
