A phase-locked loop and control method for quick start

Abstract

The purpose of the present invention is to provide a phase-locked loop and control method for rapid startup, the circuit comprising: a current mirror control module, a frequency detection and phase detection module, a branch selection module and a voltage-controlled oscillator; the current mirror control module is connected to the branch selection module to provide a high output voltage of the voltage-controlled oscillator; the frequency detection and phase detection module is connected to the branch selection module to detect the phase difference pulse signal between the reference clock signal and the feedback clock signal; the branch selection module is connected to the current mirror control module and the charge pump to select the current supply branch of the voltage-controlled oscillator. The present invention is suitable for the design of a phase-locked loop with high frequency requirements. When the output voltage of the charge pump meets the requirements, a current mirror control device is used to directly control the voltage-controlled oscillator to reduce the startup time of the phase-locked loop.

Description

Technical Field

[0001] The present invention relates to the technical field of voltage-controlled oscillators, and in particular to a phase-locked loop for rapid startup and a control method thereof. Background Art

[0002] A phase locked loop (PLL) is a negative feedback control system that uses the voltage generated by phase synchronization to tune a voltage controlled oscillator to generate a target frequency. According to the principle of automatic control, this is a typical feedback control circuit that uses an external input reference signal to control the frequency and phase of the oscillation signal inside the loop, and realizes the automatic tracking of the output signal frequency to the input signal frequency. It is generally used in a closed-loop tracking circuit. It is a method to make the frequency more stable in radio transmission. It mainly includes VCO (voltage controlled oscillator) and PLL IC (phase locked loop integrated circuit). The voltage controlled oscillator gives a signal, one part of which is used as output, and the other part is compared with the local oscillator signal generated by the PLL IC through frequency division. In order to keep the frequency unchanged, the phase difference is required not to change. If there is a change in the phase difference, the voltage at the voltage output terminal of the PLL IC changes to control the VCO until the phase difference is restored to achieve the purpose of phase locking. A closed-loop electronic circuit that can keep the frequency and phase of the controlled oscillator in a certain relationship with the input signal.

[0003] With the development of storage devices, the data transmission rate is getting higher and higher, resulting in higher and higher frequencies provided by the phase-locked loop. Since the frequency of the voltage-controlled oscillator in the phase-locked loop is proportional to the output voltage of the charge pump, the output voltage of the charge pump is also increasing. Due to the working characteristics of the charge pump, it takes a certain amount of time to raise the output voltage to the voltage value required by the voltage-controlled oscillator. For higher charge pump output voltages, the required boost time is longer, resulting in a longer startup time for the entire phase-locked loop. In the existing traditional phase-locked loop technology, the charge pump is generally controlled to charge and discharge by generating a phase difference pulse signal related to the reference clock signal (ref_clk) and the feedback clock signal (fbk_clk) through a phase frequency detector (PFD), thereby achieving the purpose of regulating the frequency of the voltage-controlled oscillator (VCO). Since the frequency of the voltage-controlled oscillator is proportional to the output voltage of the charge pump, a higher charge pump output voltage is required for the voltage-controlled oscillator with high-frequency requirements to meet the high-frequency requirements. This will cause the charge pump to take a long enough time to reach the high output voltage requirement, resulting in a longer startup time for the entire phase-locked loop. Summary of the invention

[0004] The purpose of the present invention is to provide a phase-locked loop and control method for fast startup. The circuit is suitable for phase-locked loop design with high frequency requirements. Before the output voltage of the charge pump meets the requirements, a current mirror control device is used to directly control the voltage-controlled oscillator to reduce the startup time of the phase-locked loop.

[0005] A phase-locked loop for rapid startup, comprising: a current mirror control module, a frequency and phase detection module, a branch selection module and a voltage-controlled oscillator;

[0006] The current mirror control module is connected to the branch selection module and is used to provide a high output voltage of the voltage controlled oscillator;

[0007] The frequency and phase detection module is connected to the branch selection module and is used to detect the phase difference pulse signal between the reference clock signal and the feedback clock signal;

[0008] The branch selection module is connected to the current mirror control module and the charge pump, and is used to select the current supply branch of the voltage controlled oscillator.

[0009] Preferably, it also includes: a plurality of filtering modules;

[0010] The first filtering module is located between the current mirror control module and the branch selection module;

[0011] The second filtering module is located between the charge pump and the branch selection module;

[0012] The filtering module is used for filtering the signals output by the current mirror control module and the charge pump.

[0013] Preferably, it also includes: a feedback frequency division module;

[0014] The feedback frequency division module is connected to the frequency and phase detection module and the voltage controlled oscillator, and is used to adjust the feedback clock signal.

[0015] Preferably, the current mirror control module comprises: a second MOS tube, a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube, a seventh MOS tube, a fourth transmission gate and a first resistor;

[0016] The source of the second MOS tube is connected to VDD, the drain is connected to the drain of the third MOS tube, and the gate is connected to the gate of the fourth MOS tube;

[0017] The gate of the third MOS tube is connected to the gate of the fifth MOS tube, and the source is connected to the first end of the first resistor;

[0018] The source of the fourth MOS tube is connected to VDD, and the drain is connected to the gate and drain of the fifth MOS tube;

[0019] The source of the fifth MOS tube is grounded, and the gate is connected to the drain of the seventh MOS tube;

[0020] The gate of the sixth MOS tube is connected to the gate of the fourth MOS tube, the source is connected to VDD, and the drain is connected to the output;

[0021] The gate of the seventh MOS tube is connected to the fourth transmission gate, and the source is grounded;

[0022] A second end of the first resistor is grounded.

[0023] Preferably, the branch selection module comprises: a first transmission gate, a second transmission gate, a third transmission gate, a first NOT gate and a first MOS tube;

[0024] The input end of the charge pump is connected to the frequency and phase detection module, and the output end is connected to the filter module;

[0025] The source of the first MOS tube is connected to VDD, the drain is connected to the first transmission gate, and the gate is connected to the second transmission gate;

[0026] The input end of the first NOT gate is connected to the first transmission gate, and the output end is an enb signal;

[0027] The second transmission gate is connected to the charge pump and the voltage controlled oscillator;

[0028] The third transmission gate is connected to the feedback frequency division module and the voltage controlled oscillator.

[0029] Preferably, the filtering module comprises: a second resistor, a first capacitor and a second capacitor;

[0030] A first end of the first capacitor is grounded, and a second end is connected to a first end of the second resistor;

[0031] A first end of the second capacitor is grounded, and a second end is connected to the current mirror control module or the charge pump;

[0032] The second end of the second resistor is connected to the current mirror control module or the charge pump.

[0033] A phase-locked loop control method for rapid startup, applied to a phase-locked loop for rapid startup, comprising:

[0034] Get the output voltage of the charge pump;

[0035] When the output voltage of the charge pump is lower than a preset value, the branch selection module selects the current mirror control module to supply power to the voltage controlled oscillator;

[0036] When the output voltage of the charge pump is greater than a preset value, the branch selection module selects the charge pump to supply power to the voltage-controlled oscillator.

[0037] Preferably, when the output voltage of the charge pump is lower than a preset value, the branch selection module selects the current mirror control module to power the voltage controlled oscillator, including:

[0038] The output voltage of the charge pump is lower than the preset value, the first MOS tube is turned on, the en signal is high, and the enb signal is low;

[0039] The current mirror module works, the first transmission gate is turned on, the second transmission gate and the third transmission gate are turned off, and the voltage-controlled oscillator is controlled by the current mirror output voltage.

[0040] Preferably, when the output voltage of the charge pump is greater than a preset value, the branch selection module selects the charge pump to power the voltage-controlled oscillator, including:

[0041] The output voltage of the charge pump is greater than the preset value, the first MOS tube is cut off, the en signal becomes low, and the enb signal becomes high;

[0042] The current mirror circuit and the first transmission gate are both in a closed state, the second transmission gate and the third transmission gate are turned on, and the voltage-controlled oscillator is controlled by a charge pump.

[0043] An electronic device comprises: a processor and a memory, wherein the memory is used to store computer program codes, the computer program codes include computer instructions, and when the processor executes the computer instructions, the electronic device executes a phase-locked loop control method for fast startup.

[0044] The beneficial effects of the present invention are as follows: 1. The present invention designs a current mirror control module. When the phase-locked loop just starts to work, since the output voltage of the charge pump is very low, the current mirror control module is directly used to power the voltage-controlled oscillator, so the voltage-controlled oscillator can generate the required frequency clock signal in a shorter time, which results in the phase-locked loop being able to complete the output of the target frequency in a short time; 2. The present invention also designs a branch selection module. When the working time of the phase-locked loop increases, the output voltage of the charge pump gradually increases. When the output voltage of the charge pump reaches the voltage required by the voltage-controlled oscillator, the branch selection module selects the charge pump as the power supply branch of the voltage-controlled oscillator, and the voltage-controlled oscillator changes back to charge pump control. At this time, the output voltage of the charge pump is already at a higher voltage level, so the voltage-controlled oscillator can generate a high-frequency clock signal, and the entire phase-locked loop can output the clock signal of the target frequency in a short time through loop adjustment. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0046] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0047] Figure 1 A schematic diagram of a phase-locked loop circuit structure for rapid startup of the present invention;

[0048] Figure 2 It is a schematic diagram of the circuit structure of the current mirror control module of the present invention;

[0049] Figure 3 A schematic flow chart of a phase-locked loop control method for rapid startup according to the present invention;

[0050] Figure 4 The figure is a schematic diagram of the hardware structure of an electronic device of the present invention. DETAILED DESCRIPTION

[0051] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0052] It should be noted that all directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present invention are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0053] In addition, the descriptions of "first", "second", etc. in the present invention are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in the field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0054] With the development of storage devices, the data transmission rate is getting higher and higher, resulting in higher and higher frequencies provided by the phase-locked loop. Since the frequency of the voltage-controlled oscillator in the phase-locked loop is proportional to the output voltage of the charge pump, the output voltage of the charge pump is also increasing. Due to the working characteristics of the charge pump, it takes a certain amount of time to raise the output voltage to the voltage value required by the voltage-controlled oscillator. For higher charge pump output voltages, the required boost time is longer, resulting in a longer startup time for the entire phase-locked loop. In the existing traditional phase-locked loop technology, the charge pump is generally controlled to charge and discharge by generating a phase difference pulse signal related to the reference clock signal (ref_clk) and the feedback clock signal (fbk_clk) through a phase frequency detector (PFD), thereby achieving the purpose of regulating the frequency of the voltage-controlled oscillator (VCO). Since the frequency of the voltage-controlled oscillator is proportional to the output voltage of the charge pump, a higher charge pump output voltage is required for the voltage-controlled oscillator with high-frequency requirements to meet the high-frequency requirements. This will cause the charge pump to take a long enough time to reach the high output voltage requirement, resulting in a longer startup time for the entire phase-locked loop.

[0055] The present invention designs a current mirror control module. When the phase-locked loop just starts to work, since the output voltage of the charge pump is very low, the current mirror control module is directly used to power the voltage-controlled oscillator, so the voltage-controlled oscillator can generate the required frequency clock signal in a shorter time, which results in the phase-locked loop being able to complete the output of the target frequency in a short time; the present invention also designs a branch selection module. When the working time of the phase-locked loop increases, the output voltage of the charge pump gradually increases. When the output voltage of the charge pump reaches the voltage required by the voltage-controlled oscillator, the branch selection module selects the charge pump as the power supply branch of the voltage-controlled oscillator, and the voltage-controlled oscillator changes back to charge pump control. At this time, the output voltage of the charge pump is already at a higher voltage level, so the voltage-controlled oscillator can generate a high-frequency clock signal, and the entire phase-locked loop can output the clock signal of the target frequency in a short time through loop adjustment.

[0056] Example 1

[0057] A phase-locked loop for fast startup, reference Figure 1 , including: a current mirror control module, a frequency and phase detection module, a branch selection module and a voltage controlled oscillator;

[0058] The current mirror control module is connected to the branch selection module and is used to provide a high output voltage of the voltage controlled oscillator;

[0059] The frequency and phase detection module is connected to the branch selection module and is used to detect the phase difference pulse signal between the reference clock signal and the feedback clock signal;

[0060] The phase frequency detector (PFD) is a new type of phase detection circuit. It uses the transition edge of the input signal to trigger the operation. It is an edge-controlled digital phase frequency detector. It can not only detect phase, but also detect frequency. It has no fixed requirements for the duty cycle of the input signal, so it has superior performance. The phase frequency detector can be divided into two types: voltage-type phase frequency detector and current-type phase frequency detector. It is widely used in medium and large-scale digital frequency synthesizers. It is an important device in the phase-locked loop (PLL). It can realize negative feedback through appropriate adjustment according to the frequency and phase difference between the input signal and the feedback signal, so that the frequency of the output signal is constantly close to the frequency of the input signal, thereby maintaining the stability and accuracy of the system.

[0061] The branch selection module is connected with the current mirror control module and the charge pump, and is used for selecting the current supply branch of the voltage controlled oscillator.

[0062] In the embodiment of the present invention, the branch selection module is used to select and regulate the supply branch of the voltage-controlled oscillator according to the output voltage of the charge pump. There are two supply branches in front of the voltage-controlled oscillator. One is the ordinary charge pump supply branch in the prior art. In the existing traditional phase-locked loop technology, the phase frequency detector (PFD) is generally used to generate a phase difference pulse signal related to the reference clock signal (ref_clk) and the feedback clock signal (fbk_clk) to control the charge pump to charge and discharge, thereby achieving the purpose of regulating the frequency of the voltage-controlled oscillator (VCO). Since the frequency of the voltage-controlled oscillator is proportional to the output voltage of the charge pump, a higher charge pump output voltage is required for the voltage-controlled oscillator with high-frequency requirements to meet the high-frequency requirements. This will cause the charge pump to need a sufficiently long time to meet the high output voltage requirement, thereby causing the startup time of the entire phase-locked loop to be longer. Therefore, in order to reduce the startup time of the phase-locked loop, a current mirror control module can be used to directly generate the high output voltage required by the voltage-controlled oscillator. When the current mirror control device recognizes that the output voltage of the charge pump meets the requirement, the current mirror control device stops working, and the voltage controlled oscillator is still controlled by the output voltage of the charge pump.

[0063] Preferably, it also includes: a plurality of filtering modules;

[0064] The first filter module is located between the current mirror control module and the branch selection module;

[0065] The second filtering module is located between the charge pump and the branch selection module;

[0066] The filter module is used to filter the signals output by the current mirror control module and the charge pump.

[0067] The principle of the filter module is to use the characteristics of reactive elements (such as capacitors and inductors) to filter out the ripple in the rectified output voltage, thereby obtaining a relatively pure voltage. The filter module is based on the engineering application of Fourier analysis and transformation. Any signal that meets certain conditions can be regarded as a superposition of infinite sine waves. Therefore, the function of the filter module is to allow signal components within a certain frequency range to pass through as needed, while preventing other frequency components from passing through. This includes capacitor filtering, inductor filtering, and a compound filter module composed of capacitors and inductors.

[0068] Capacitor filtering utilizes the "DC isolation and AC passing" characteristics of capacitors, and extracts the required DC voltage from the unidirectional pulsating DC voltage by conducting the AC component and blocking the DC component. The larger the capacitance of the capacitor, the smaller the capacitive reactance to the AC component, making the AC component remaining on the load smaller, thereby obtaining a better filtering effect. Inductor filtering utilizes the "DC isolation" characteristics of the inductor, and filters the AC component through the inductor's large impedance to the AC component and small impedance to the DC component. The larger the inductance of the inductor, the greater the inductive reactance to the AC component, thereby effectively preventing the AC component from passing through. The duplex filter module combines the characteristics of capacitors and inductors, and further filters out unnecessary frequency components through a complex circuit structure to achieve a more precise filtering effect. The filter module selectively allows or blocks signals of different frequencies to process specific frequency bands, thereby achieving the purpose of purifying the signal.

[0069] Preferably, it also includes: a feedback frequency division module;

[0070] The feedback frequency division module is connected with the frequency and phase detection module and the voltage controlled oscillator, and is used for regulating the feedback clock signal.

[0071] The principle of feedback frequency division mainly involves a key component in the phase-locked loop (PLL) circuit, namely the feedback divider. In the PLL circuit, the function of the feedback divider is to divide the output signal of the voltage-controlled oscillator (VCO) to reduce its frequency, and then feed the divided signal back to the phase detector (PD) for phase comparison with the reference signal. Feedback frequency division includes the following steps: Phase detection and error signal generation: First, the phase detector compares the phase of the input reference signal with the phase of the feedback signal (here the feedback signal is the VCO output signal after the divider), and generates an error voltage signal based on the phase difference between the two signals. Error signal filtering: This error voltage signal is then sent to the loop filter to filter out the high-frequency components, thereby obtaining a smoother error signal. VCO tuning: The filtered error signal controls the VCO's electrical adjustment terminal, causing the VCO's output frequency to change to reduce the phase difference with the reference signal. Feedback frequency division: In this process, the VCO output signal is sent to the feedback divider for frequency division. If the output frequency of the VCO is much higher than the frequency of the reference signal, the feedback divider will divide it to a lower frequency for phase comparison with the reference signal. Negative feedback stability: This is a negative feedback process. When the reference frequency of the phase detector and the feedback frequency (that is, the output frequency of the VCO after division) are equal, the loop reaches a stable state. At this time, the output frequency of the PLL is N times the reference frequency (N is the division ratio of the divider). The introduction of the feedback divider enables the PLL circuit to generate an output signal much higher than the reference signal frequency while maintaining the stability and accuracy of the output signal. By adjusting the division ratio N of the divider, the output frequency range of the PLL can be flexibly changed to meet different application requirements. The principle of feedback division also reflects the negative feedback principle in control theory, that is, the system compares the difference between the output and the input, and adjusts the output of the system accordingly to reduce this difference, thereby reaching a stable state. In the PLL circuit, this negative feedback mechanism is realized by components such as the phase detector, loop filter and VCO.

[0072] Preferably, reference Figure 2 , the current mirror control module includes: a second MOS tube, a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube, a seventh MOS tube, a fourth transmission gate and a first resistor;

[0073] The source of the second MOS tube is connected to VDD, the drain is connected to the drain of the third MOS tube, and the gate is connected to the gate of the fourth MOS tube;

[0074] The gate of the third MOS tube is connected to the gate of the fifth MOS tube, and the source is connected to the first end of the first resistor;

[0075] The source of the fourth MOS tube is connected to VDD, and the drain is connected to the gate and drain of the fifth MOS tube;

[0076] The source of the fifth MOS tube is grounded, and the gate is connected to the drain of the seventh MOS tube;

[0077] The gate of the sixth MOS tube is connected to the gate of the fourth MOS tube, the source is connected to VDD, and the drain is connected to the output;

[0078] The gate of the seventh MOS tube is connected to the fourth transmission gate, and the source is grounded;

[0079] A second terminal of the first resistor is grounded.

[0080] ‌The current mirror control circuit is a constant current circuit that increases the gain of the amplifier circuit by designing the load into the form of a current mirror circuit. ‌The basic principle of the current mirror circuit is to use the current replication characteristics of two transistors (one NPN and one PNP) so that their currents are exactly the same under ideal conditions, thereby achieving a current mirror effect. The current mirror control module can provide a stable current source, which is very useful for application scenarios that require constant current. For example, in a differential amplifier circuit, designing the load into the form of a current mirror circuit can significantly increase the gain of the circuit. This is because the current mirror circuit, as a constant current circuit, can effectively improve the performance of the circuit when used as a load of an amplifier circuit.

[0081] Preferably, the branch selection module comprises: a first transmission gate, a second transmission gate, a third transmission gate, a first NOT gate and a first MOS transistor;

[0082] The input end of the charge pump is connected to the frequency and phase detection module, and the output end is connected to the filter module;

[0083] The source of the first MOS tube is connected to VDD, the drain is connected to the first transmission gate, and the gate is connected to the second transmission gate;

[0084] The input end of the first NOT gate is connected to the first transmission gate, and the output end is the enb signal;

[0085] The second transmission gate is connected to the charge pump and the voltage controlled oscillator;

[0086] The third transmission gate is connected to the feedback frequency division module and the voltage controlled oscillator.

[0087] exist Figure 1 In the embodiment, the control signals of TG1 and TG2 are opposite and cannot be turned on at the same time. TG2 and TG3 are turned on at the same time. When TG2 and TG3 are turned on, the current mirror stops working, that is, the phase-locked loop working path switches back to PFD-Charge pump-LPF-VCO-Divider.

[0088] Preferably, the filtering module comprises: a second resistor, a first capacitor and a second capacitor;

[0089] A first end of the first capacitor is grounded, and a second end is connected to a first end of the second resistor;

[0090] A first end of the second capacitor is grounded, and a second end is connected to the current mirror control module or the charge pump;

[0091] The second end of the second resistor is connected to the current mirror control module or the charge pump.

[0092] In an embodiment of the present invention, the filtering module adopts a simple filtering circuit, which has the advantages of efficient filtering, easy implementation, good stability and wide frequency range coverage. Efficient filtering: The filtering circuit can effectively filter out the frequency point of a specific frequency in the power line or the frequency outside the frequency point to obtain a power signal of a specific frequency, or a power signal after eliminating a specific frequency. This is very useful for circuits that need to eliminate noise or interference signals, and can significantly improve the quality and reliability of the signal. Easy to implement: The circuit structure of the filtering circuit is relatively simple, so it is relatively convenient to implement and easy to integrate into various circuit systems. Good stability: Since the filtering circuit has stable circuit parameters, it will not produce large errors due to changes in factors such as temperature and voltage during operation, ensuring the stability and reliability of the circuit. Wide frequency range: The filtering circuit can cover a wide frequency range, from low frequency to high frequency, which makes it suitable for a variety of different application scenarios and can meet filtering tasks with various frequency requirements.

[0093] Example 2

[0094] A phase-locked loop control method for fast startup, refer to Figure 3 , applied to a phase-locked loop for fast startup, comprising:

[0095] S100, obtaining the output voltage of the charge pump;

[0096] ‌Detecting the output voltage of a charge pump can be accomplished by using a comparator and a counting circuit. ‌The test circuit detects voltage drops in the voltage signal provided by the charge pump during a test cycle. A comparator is used to compare the voltage signal to a divided, delayed version of the signal. A counting circuit is connected to the output of the comparator to determine the number of drops during the test cycle. This method can be used to detect the output voltage of the charge pump and determine the quality and stability of the voltage signal through analysis by the comparator and counting circuit. In addition, by adjusting factors such as the ratio of the voltage divider and the maximum allowable number of drops, the circuit can control the accuracy and sensitivity of the detection of the charge pump output voltage. ‌ Charge pumps, also known as switched capacitor voltage converters, generate high voltages through the accumulation effect of capacitors on charge, allowing current to flow from a low potential to a high potential. This circuit can produce a doubled or negative voltage output, with the output voltage value being between the input voltage and the sum of the input voltage and the input voltage, and is affected by the frequency and effective value of the input voltage. ‌

[0097] S200, when the output voltage of the charge pump is lower than a preset value, the branch selection module selects the current mirror control module to supply power to the voltage controlled oscillator;

[0098] S300, when the output voltage of the charge pump is greater than a preset value, the branch selection module selects the charge pump to supply power to the voltage controlled oscillator.

[0099] A voltage controlled oscillator is an oscillator circuit whose output frequency corresponds to the input control voltage, usually represented by VCO (Voltage Controlled Oscillator). Its working principle is to control the frequency change of the oscillator by adjusting the voltage. This control is mainly achieved through varactor diodes, because varactor diodes are relatively easy to control and have a wide range and variety. Voltage controlled oscillators have a wide range of applications, including communications, radio, radar, sensing and measurement systems, etc., and are key components in systems such as phase-locked loops, function generators, frequency synthesizers, radars, and local oscillators. In addition, voltage controlled oscillators can also be made into variable LC oscillators, crystal oscillators, clock generators, and more complex frequency synthesizers. Especially in high-frequency applications, voltage-controlled crystal oscillators (VCXOs) and temperature-compensated VCXOs (TCVCXOs) provide very stable and accurate high-frequency signals. The basic operation of a voltage controlled oscillator is to output a frequency that depends on an externally accessible control input. Unlike typical oscillators, VCOs also include control elements that can adjust the frequency of positive feedback oscillations. In some cases, this is a varactor diode that affects the resonant frequency of the resonant tank used to create the positive feedback phase shift required for oscillation. This works because the varactor diode can operate as a reverse biased diode, exhibiting a voltage-dependent capacitance characteristic. The voltage-controlled capacitor acts as a variable control for the indicating capacitor (LC) tank circuit used to create oscillations, because the change in capacitance value ultimately changes the resonant behavior in the tank circuit.

[0100] Preferably, in S200, when the output voltage of the charge pump is lower than a preset value, the branch selection module selects the current mirror control module to supply power to the voltage controlled oscillator, including:

[0101] S210, the output voltage of the charge pump is lower than the preset value, the first MOS tube is turned on, the en signal is high, and the enb signal is low;

[0102] S220, the current mirror module works, the first transmission gate is turned on, the second transmission gate and the third transmission gate are turned off, and the voltage-controlled oscillator is controlled by the current mirror output voltage.

[0103] When the phase-locked loop starts working, the output voltage of the charge pump is very low, causing PMOS1 (PMOS1 is a MOS tube with a larger threshold voltage) to turn on, the en signal is pulled high, and the enb signal is low. Figure 3The current mirror circuit starts to work, TG1 is turned on, TG2 and TG3 are turned off, and the voltage-controlled oscillator is controlled by the current mirror output voltage. Since the current mirror circuit can meet the high-frequency output voltage requirement in a very short time, the voltage-controlled oscillator can generate the required frequency clock signal in a shorter time, which results in the phase-locked loop being able to complete the target frequency output in a short time.

[0104] Preferably, in S300, when the output voltage of the charge pump is greater than a preset value, the branch selection module selects the charge pump to power the voltage-controlled oscillator, including:

[0105] S310, the output voltage of the charge pump is greater than a preset value, the first MOS tube is turned off, the en signal becomes low, and the enb signal becomes high;

[0106] S320, the current mirror circuit and the first transmission gate are both in the off state, the second transmission gate and the third transmission gate are turned on, and the voltage controlled oscillator is controlled by the charge pump.

[0107] As time goes by, the output voltage of the charge pump gradually rises. When the voltage of the charge pump rises to the point where PMOS1 is turned off, the en signal becomes low, the enb signal becomes high, the current mirror circuit and TG1 are both in the off state, TG2 and TG3 are turned on, and the voltage-controlled oscillator returns to charge pump control. At this time, the output voltage of the charge pump is already at a higher voltage level, so the voltage-controlled oscillator can generate a high-frequency clock signal, and the entire phase-locked loop can output a clock signal of the target frequency in a short time through loop adjustment.

[0108] Example 3

[0109] An electronic device comprises: a processor and a memory, wherein the memory is used to store computer program codes, the computer program codes include computer instructions, and when the processor executes the computer instructions, the electronic device executes a phase-locked loop control method for rapid startup.

[0110] refer to Figure 4 , the electronic device 2 includes a processor 21, a memory 22, an input device 23, and an output device 24. The processor 21, the memory 22, the input device 23, and the output device 24 are coupled via a connector, and the connector includes various interfaces, transmission lines, or buses, etc., which are not limited in the embodiments of the present invention. It should be understood that in various embodiments of the present invention, coupling refers to mutual connection in a specific manner, including direct connection or indirect connection through other devices, for example, through various interfaces, transmission lines, buses, etc.

[0111] The processor 21 may be one or more graphics processing units (GPUs). When the processor 21 is a GPU, the GPU may be a single-core GPU or a multi-core GPU. Optionally, the processor 21 may be a processor group consisting of multiple GPUs, and the multiple processors are coupled to each other via one or more buses. Optionally, the processor may also be other types of processors, etc., which are not limited in the embodiments of the present invention.

[0112] The memory 22 can be used to store computer program instructions and various computer program codes including program codes for executing the scheme of the present invention. Optionally, the memory includes but is not limited to random access memory (RAM), read-only memory (ROM), erasable programmable read only memory (EPROM), or portable read only memory (CD-ROM), which is used for related instructions and data.

[0113] The input device 23 is used to input data and / or signals, and the output device 24 is used to output data and / or signals. The output device 24 and the input device 23 may be independent devices or an integrated device.

[0114] The present invention designs a current mirror control module. When the phase-locked loop just starts to work, since the output voltage of the charge pump is very low, the current mirror control module is directly used to power the voltage-controlled oscillator, so the voltage-controlled oscillator can generate the required frequency clock signal in a shorter time, which results in the phase-locked loop being able to complete the output of the target frequency in a short time; the present invention also designs a branch selection module. When the working time of the phase-locked loop increases, the output voltage of the charge pump gradually increases. When the output voltage of the charge pump reaches the voltage required by the voltage-controlled oscillator, the branch selection module selects the charge pump as the power supply branch of the voltage-controlled oscillator, and the voltage-controlled oscillator changes back to charge pump control. At this time, the output voltage of the charge pump is already at a higher voltage level, so the voltage-controlled oscillator can generate a high-frequency clock signal, and the entire phase-locked loop can output the clock signal of the target frequency in a short time through loop adjustment.

[0115] The foregoing is merely a specific embodiment of the present invention, which enables those skilled in the art to understand or implement the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A phase-locked loop for fast startup, characterized in that: include: Current mirror control module, frequency and phase detection module, branch selection module and voltage controlled oscillator; The current mirror control module is connected to the branch selection module and is used to provide a high output voltage of the voltage controlled oscillator; The frequency and phase detection module is connected to the branch selection module and is used to detect the phase difference pulse signal between the reference clock signal and the feedback clock signal; The branch selection module is connected to the current mirror control module and the charge pump, and is used to select the current supply branch of the voltage controlled oscillator; The current mirror control module includes: a second MOS tube, a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube, a seventh MOS tube, a fourth transmission gate and a first resistor; The source of the second MOS tube is connected to VDD, the drain is connected to the drain of the third MOS tube, and the gate is connected to the gate of the fourth MOS tube; The gate of the third MOS tube is connected to the gate of the fifth MOS tube, and the source is connected to the first end of the first resistor; The source of the fourth MOS tube is connected to VDD, and the drain is connected to the gate and drain of the fifth MOS tube; The source of the fifth MOS tube is grounded, and the gate is connected to the drain of the seventh MOS tube; The gate of the sixth MOS tube is connected to the gate of the fourth MOS tube, the source is connected to VDD, and the drain is connected to the output; The gate of the seventh MOS tube is connected to the fourth transmission gate, and the source is grounded; A second end of the first resistor is grounded.

2. A phase-locked loop for rapid startup according to claim 1, characterized in that: Also includes: Multiple filtering modules; The first filtering module is located between the current mirror control module and the branch selection module; The second filtering module is located between the charge pump and the branch selection module; The filtering module is used for filtering the signals output by the current mirror control module and the charge pump.

3. A phase-locked loop for rapid startup according to claim 2, characterized in that: Also includes: Feedback frequency division module; The feedback frequency division module is connected to the frequency and phase detection module and the voltage controlled oscillator, and is used to adjust the feedback clock signal.

4. A phase-locked loop for rapid startup according to claim 1, characterized in that: The branch selection module includes: a first transmission gate, a second transmission gate, a third transmission gate, a first NOT gate and a first MOS tube; The input end of the charge pump is connected to the frequency and phase detection module, and the output end is connected to the filter module; The source of the first MOS tube is connected to VDD, the drain is connected to the first transmission gate, and the gate is connected to the second transmission gate; The input end of the first NOT gate is connected to the first transmission gate, and the output end is an enb signal; The second transmission gate is connected to the charge pump and the voltage controlled oscillator; The third transmission gate is connected to the feedback frequency division module and the voltage controlled oscillator.

5. A phase-locked loop for rapid startup according to claim 2, characterized in that: The filtering module includes: a second resistor, a first capacitor and a second capacitor; A first end of the first capacitor is grounded, and a second end is connected to a first end of the second resistor; A first end of the second capacitor is grounded, and a second end is connected to the current mirror control module or the charge pump; The second end of the second resistor is connected to the current mirror control module or the charge pump.

6. A phase-locked loop control method for rapid startup, applied to a phase-locked loop for rapid startup as claimed in any one of claims 1 to 5, characterized in that: include: Get the output voltage of the charge pump; When the output voltage of the charge pump is lower than a preset value, the branch selection module selects the current mirror control module to supply power to the voltage controlled oscillator; When the output voltage of the charge pump is greater than a preset value, the branch selection module selects the charge pump to supply power to the voltage-controlled oscillator.

7. A phase-locked loop control method for rapid startup according to claim 6, characterized in that: When the output voltage of the charge pump is lower than a preset value, the branch selection module selects the current mirror control module to supply power to the voltage controlled oscillator, including: The output voltage of the charge pump is lower than the preset value, the first MOS tube is turned on, the en signal is high, and the enb signal is low; The current mirror module works, the first transmission gate is turned on, the second transmission gate and the third transmission gate are turned off, and the voltage-controlled oscillator is controlled by the current mirror output voltage.

8. A phase-locked loop control method for rapid startup according to claim 6, characterized in that: When the output voltage of the charge pump is greater than a preset value, the branch selection module selects the charge pump to supply power to the voltage-controlled oscillator, including: The output voltage of the charge pump is greater than the preset value, the first MOS tube is turned off, the en signal becomes low, and the enb signal becomes high; The current mirror circuit and the first transmission gate are both in a closed state, the second transmission gate and the third transmission gate are turned on, and the voltage-controlled oscillator is controlled by a charge pump.

9. An electronic device, characterized in that: include: A processor and a memory, wherein the memory is used to store computer program code, wherein the computer program code includes computer instructions, and when the processor executes the computer instructions, the electronic device executes a phase-locked loop control method for fast startup as described in any one of claims 6 to 8.

Images