A wafer substrate tapping test method and device
By designing a wafer substrate tapping test device including a multi-point force controllable tapping unit and a sensing monitoring unit, the detection inaccuracy problem caused by manual operation in the prior art is solved, and automatic detection of high precision and high accuracy is achieved.
Patent Information
- Application Number
- CN202411346834.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-26
- Publication Date
- 2025-04-04
- Estimated Expiration
- 2044-09-26
AI Technical Summary
The existing wafer substrate knocking test methods have poor repeatability due to manual operation, which can easily lead to problems such as good chips being knocked out or bad products not being detected.
A device including a strike base, a wafer substrate carrier, a multi-point force controllable strike unit and a sensing monitoring unit is designed to realize automated strike testing through image analysis and sensing analysis to ensure high detection accuracy and accuracy.
It improves the detection accuracy and accuracy of wafer substrate strike test, avoids the uncertainty of manual operation, ensures effective detection of wafer substrate defects, and reduces the risk of good chip damage and missed defective products.
Smart Images

Figure CN119197965B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of wafer substrate testing, and in particular to a wafer substrate knocking test method and device. Background Art
[0002] Before wafer manufacturing, the manufacturing of wafer substrates must be completed. The basic processes include pulling single crystals, grinding outer circles, slicing, chamfering, grinding, polishing, cleaning and testing. Defects may occur in each link, especially slicing. The ingot is sliced by mechanical processing to form a wafer substrate. Due to the mechanical processing, tool defects (groove defects caused by blade cutting, line mark defects caused by wire cutting), cracks / cracks, scratches, residual mechanical damage, etc. will be formed on the wafer substrate. If these defects are not discovered and handled early, they will have a significant impact on wafer manufacturing. The commonly used method is to perform manual tapping tests after slicing, rough grinding and fine grinding. The factory performs the tapping position and number according to self-defined rules. The manual tapping test has poor repeatability in tapping force, tapping position, etc., relying on the skills of the operator, which is easy to cause good wafers to be broken or defective products to be undetected. Undetected defective products have a great impact on subsequent wafer substrate manufacturing and wafer manufacturing. Another method is to use X-rays or near-infrared light to perform comprehensive transmission inspection of the wafer substrate. This method has high detection accuracy, but its disadvantages are long detection time and high cost. It is generally only used after polishing as a basis for factory inspection.
[0003] In the prior art, the patent with publication number CN116273977A describes a single-point wafer tapping test device with automatic wafer transmission, which can realize multi-point tapping test along the fixed circumference of the wafer substrate by rotating the tapping hammer. However, the distribution of defects on the wafer substrate is very random, and each area may have defects. Only tapping test on one point or multiple points along the fixed circumference of the wafer substrate is likely to cause defects in other areas to be missed. Summary of the invention
[0004] In view of the shortcomings of the prior art, the present invention provides a wafer substrate tapping test device, and the present invention also provides a wafer substrate tapping test method.
[0005] The technical solution adopted by the present invention to solve the above technical problems is:
[0006] On the one hand, the present invention provides a wafer substrate knocking test device, which includes a knocking base, a wafer substrate carrying platform, a multi-point force controllable knocking unit and a sensor monitoring unit; the wafer substrate is placed horizontally on the wafer substrate carrying platform; the knocking base is composed of a base, four supporting rods and an upper seat; the upper seat and the base are fastened together by four supporting rods through bolts, and a wafer substrate carrying platform is installed between the base and the upper seat; one or more multi-point force controllable knocking units are installed on the upper seat, and the multi-point force controllable knocking unit is composed of a driving unit, a force sensor and a knocking head, the knocking head is fastened to the force sensor by bolts, and the force sensor is fastened to the driving unit by bolts; the sensor monitoring unit is composed of a crushing monitoring sensor and a process image monitoring component, and the crushing monitoring sensor is installed on the upper seat and is located above the wafer substrate; the process image monitoring component is fastened to the upper seat by bolts.
[0007] As a preferred embodiment of the present invention, the wafer substrate carrying platform is composed of a wafer substrate seat and a transparent protective seat. The wafer substrate seat is fastened to the base by bolts, and the transparent protective seat is a light-transmitting structure.
[0008] As a preferred embodiment of the present invention, the process image monitoring component is composed of a mounting bracket, a camera and a lens, and the camera is a CCD, CMOS, digital or analog camera.
[0009] As a preferred embodiment of the present invention, the multi-point force controllable knocking unit and the sensor monitoring unit are both communicatively connected to the controller; an image analysis unit and a material input unit are provided in the controller; the material input unit is used to input the material of the wafer substrate to be knocked and the rated force corresponding to the material input by the user; the image analysis unit is used to analyze the image of the wafer substrate on the wafer substrate carrier to obtain the execution force, and control the multi-point force controllable knocking unit corresponding to the knocking point to knock the wafer substrate with the execution force.
[0010] As a preferred embodiment of the present invention, the specific process of the image analysis unit analyzing the image of the wafer substrate on the wafer substrate carrying table is as follows:
[0011] The image is evenly divided into several sub-images according to the knocking points of the wafer substrate, and the sub-image is enlarged several times to form a pixel map to obtain a sub-pixel map; the grayscale value of each pixel in the sub-pixel map is identified, and the grayscale value of each pixel is compared with the set grayscale threshold. If the grayscale value of the pixel is inconsistent with the grayscale threshold, the pixel is marked as an abnormal pixel, and the number of abnormal pixels is counted to obtain the abnormal pixel value of the sub-pixel map; the four adjacent pixels of each abnormal pixel are judged. If there are zero abnormal pixels in the four adjacent pixels of the abnormal pixel, the abnormal pixel is marked as a different zero pixel. If there is one abnormal pixel in the four adjacent pixels of the abnormal pixel, the abnormal pixel is marked as a different one pixel. If the four adjacent pixels of the abnormal pixel are different If there are two abnormal pixels in a pixel, the abnormal pixel is marked as an abnormal two-pixel; if there are three abnormal pixels in the four adjacent pixels of the abnormal pixel, the abnormal pixel is marked as an abnormal three-pixel; if there are four abnormal pixels in the four adjacent pixels of the abnormal pixel, the abnormal pixel is marked as an abnormal four-pixel; the number of abnormal zero pixels, abnormal one pixels, abnormal two pixels, abnormal three pixels and abnormal four pixels is counted respectively to obtain the abnormal zero value, abnormal two value, abnormal three value and abnormal four value, which are substituted into the differential model to obtain the differential value of the sub-image, the differential values of all sub-images are summed up to obtain the total differential value, and the total differential value is converted into a force value of one according to a preset force conversion coefficient; the material of the wafer substrate is obtained, each material corresponds to a rated force, and the rated force is subtracted from the force value of one to obtain the execution force.
[0012] As a preferred embodiment of the present invention, the controller further includes a sensor analysis unit, which is used to collect and analyze the voltage and current of the force sensor when it is powered within a preset time range, as well as the corresponding collection time and the reading and test time of each test. The specific analysis process is as follows:
[0013] Sort the voltages according to the order of collection time, and the difference between two adjacent voltages is the voltage difference. All voltage differences are summed up to get the total voltage difference and marked as UZ; compare the voltage with the preset voltage. If the voltage is inconsistent with the preset voltage, mark the collection time corresponding to the voltage as the abnormal pressure moment, sort according to the order between the abnormal pressure moments and calculate the difference between two adjacent abnormal pressure moments to get the abnormal pressure duration, and average all the values of the abnormal pressure duration to get the abnormal pressure mean; the minimum abnormal pressure duration; the total voltage difference, the abnormal pressure mean and the minimum abnormal pressure duration are normalized and substituted into the preset pressure distribution model to get the pressure factor index. If the pressure factor index is greater than the set index threshold, all power supply currents are compared with the preset current, and the number of power supply currents inconsistent with the preset current is counted to get the power abnormality value; if the power abnormality value is greater than the set current abnormal threshold, the number of test moments is counted Get the total number of tests, sort the test moments in chronological order, calculate the difference between two adjacent test moments to get the test interval time, calculate the mean of all the test interval time to get the test average time value, divide the total number of tests by the test average time value to get the total time ratio; finally, normalize the pressure factor index, the electrical anomaly value and the total time ratio and take the values of the three, convert the values of the three into straight line lengths according to a certain ratio, construct a circle with the straight line length of the pressure factor index as the radius, take the center of the circle as the starting point to make a height equal to the straight line length corresponding to the electrical anomaly value, construct a cylinder with the circle and the height, select the center of the upper end face of the cylinder as the starting point, make a height equal to the straight line length corresponding to the total time ratio, construct a cone with the circle of the upper end face of the cylinder and the height corresponding to the total time ratio, calculate the volume of the cube formed by the cylinder and the cone, and mark the value of the volume as the operational anomaly value of the force sensor;
[0014] The operation abnormality value is compared with the set operation abnormality threshold 1 and operation abnormality threshold 2, and the operation abnormality threshold 1 is less than the operation abnormality threshold 2; when the operation abnormality value is greater than the operation abnormality threshold 1 and less than or equal to the operation abnormality threshold 2, a maintenance instruction of the force sensor is generated and sent to the corresponding technician intelligent terminal;
[0015] When the abnormal value is greater than the abnormal threshold value 2, the corresponding multi-point force controllable knocking unit is controlled to stop the test instruction and issue an early warning, and at the same time a replacement instruction is generated and sent to the corresponding technician's smart terminal.
[0016] In another aspect, the present invention provides a wafer substrate tapping test method, comprising:
[0017] placing a wafer substrate on a wafer substrate holder of a wafer substrate carrying table;
[0018] Set the desired tapping point and strength through the controller;
[0019] The multi-point force-controllable knocking unit is driven to knock the wafer substrate; if the wafer substrate is broken, the breakage monitoring sensor will send the breakage information back to the controller; if the wafer substrate is not broken, a new knocking point and force are set to knock again or the wafer substrate is sent back.
[0020] Compared with the prior art, the present invention has the following beneficial effects:
[0021] 1. The present invention is composed of a striking base, a wafer substrate carrier, a multi-point force controllable striking unit and a sensor monitoring unit. The striking head can be independently controlled and has a force sensor, and the striking force is controllable. It is also equipped with a breakage monitoring sensor and process image monitoring, with high and accurate detection accuracy, and is compatible with wafer substrates of multiple sizes. Furthermore, the structure is simple and can be integrated with the front-end module of semiconductor equipment, seamlessly integrated into the production line of fully automatic wafer substrate production.
[0022] 2. The present invention analyzes the image of the wafer substrate on the wafer substrate carrier through an image analysis unit to obtain the execution force, and controls the multi-point force controllable knocking unit corresponding to the knocking point to knock the wafer substrate with the execution force, so as to better perform knocking test on the wafer substrate and improve the accuracy; avoid excessive knocking affecting the test results.
[0023] 3. The present invention analyzes the force sensor through the sensing and analyzing unit to obtain the abnormal value, determines based on the abnormal value to generate maintenance instructions and then replacement instructions, and then performs maintenance and replacement operations on the force sensor to avoid problems with the force sensor that affect the accuracy of the entire tapping test. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] In order to facilitate understanding by those skilled in the art, the present invention is further described below with reference to the accompanying drawings.
[0025] Figure 1 It is a schematic diagram of the overall structure of the device of the present invention;
[0026] Figure 2 It is a schematic diagram of the structure of the wafer substrate carrier of the present invention;
[0027] Figure 3 It is a schematic diagram of the structure of the sensor monitoring unit of the present invention;
[0028] Figure 4 It is a schematic diagram of the structure of the multi-point force controllable knocking unit of the present invention;
[0029] Figure 5 This is a principle block diagram of the controller of the present invention.
[0030] Reference numerals:
[0031] 1. Striking base; 2. Wafer substrate carrier; 3. Multi-point force controllable striking unit; 4. Sensor monitoring unit; 5. Wafer substrate; 11. Base; 12. Support rod; 13. Upper seat; 21. Wafer substrate seat; 22. Transparent protective seat; 31. Driving unit; 32. Force sensor; 33. Striking head; 41. Crushing monitoring sensor; 42. Process image monitoring component; 421. Mounting bracket; 422. Camera; 423. Lens. DETAILED DESCRIPTION
[0032] The technical solution of the present invention will be clearly and completely described below in conjunction with the accompanying drawings and specific embodiments.
[0033] Example 1
[0034] like Figure 1 As shown, a wafer substrate tapping test device is composed of a tapping base 1, a wafer substrate carrying platform 2, a multi-point force controllable tapping unit 3 and a sensor monitoring unit 4. The wafer substrate carrying platform 2, the multi-point force controllable tapping unit 3 and the sensor monitoring unit 4 are all fastened to the tapping base 1 by screws, and the wafer substrate 5 is horizontally placed on the wafer substrate carrying platform 2.
[0035] like Figure 2 - Figure 4 As shown, the striking base 1 is composed of a base 11, four supporting rods 12 and an upper base 13. The upper base 13 and the base 11 are fastened together by four supporting rods 12 by bolts, and a striking unit working area is formed in the middle. The wafer substrate carrier 2 is composed of a wafer substrate seat 21 and a transparent protective seat 22. The wafer substrate seat 21 is fastened to the base 11 of the striking base 1 by bolts, and the transparent protective seat 22 is light-transmissive so that the process image monitoring 42 of the sensor monitoring unit 4 can be monitored through. The multi-point force controllable knocking unit 3 is composed of a driving unit 31, a force sensor 32 and a knocking head 33. The knocking head 33 is fastened to the force sensor 32 by bolts, and the force sensor 32 is fastened to the driving unit 31 by bolts. The number of multi-point force controllable knocking units 3 can be 1, 2, 3, 4, 5, 6, 7, 8, 9, etc., and 9 are shown in the figure. The maximum cross-sectional area of each component of the multi-point force controllable knocking unit 3 multiplied by the total number shall not be greater than the area of the wafer substrate 5. The driving unit 31 can be pneumatic, electromagnetically driven, motor-driven or hydraulically driven. The sensing monitoring unit 4 is composed of a crushing monitoring sensor 41 and a process image monitoring component 42. The crushing monitoring sensor 41 is installed on the upper seat 13 of the knocking base 1, located above the wafer substrate 5; the process image monitoring component 42 is fastened to the upper seat 13 of the knocking base 1 by bolts. The process image monitoring component 42 is composed of a mounting bracket 421, a camera 422 and a lens 423. The camera 422 can be CCD, CMOS, digital or analog.
[0036] When the present invention is in use, the wafer substrate 5 is transferred in by means of a wafer robot arm or the like, and placed on the wafer substrate seat 21 of the wafer substrate carrier 2. The required knocking point and force are set by the controller, and then the multi-point force controllable knocking unit 3 is driven to knock the wafer substrate 5. Specifically, the driving unit 31 drives the knocking head 33 to move downward with the set force to knock the wafer substrate 5. If the wafer substrate 5 is broken, the broken monitoring sensor 41 of the sensing monitoring unit 4 will return the broken information to the controller; if the wafer substrate 5 is not broken, a new knocking point and force can be set to knock again, or the wafer substrate 5 can be transferred back by means of a wafer robot arm or the like according to the program. The process image monitoring component 42 of the sensing monitoring unit 4 can monitor the entire process by video and send it to the controller for subsequent viewing of the entire knocking test process.
[0037] Example 2
[0038] like Figure 5 As shown, on the basis of Example 1, an image analysis unit and a material input unit are further provided in the controller, the material input unit is used to input the material of the wafer substrate to be tested by the user and the rated force corresponding to the material, the image analysis unit sends an image acquisition instruction to the sensor monitoring unit 4, and receives the image of the wafer substrate 5 on the wafer substrate carrier 2 fed back by the sensor monitoring unit 4 at a certain time interval, analyzes the image, divides the image into several sub-images evenly according to the knocking points of the wafer substrate 5, magnifies the sub-image several times to form a pixel map to obtain a sub-pixel map; identifies the gray value of each pixel in the sub-pixel map, compares the gray value of each pixel with the set gray threshold, if the gray value of the pixel is inconsistent with the gray threshold, then marks the pixel as an abnormal pixel, counts the number of abnormal pixels to obtain the abnormal pixel value of the sub-pixel map; for each abnormal image The four adjacent pixels of the abnormal pixel are judged. If there are zero abnormal pixels in the four adjacent pixels of the abnormal pixel, the abnormal pixel is marked as a different zero pixel. If there is one abnormal pixel in the four adjacent pixels of the abnormal pixel, the abnormal pixel is marked as a different one pixel. If there are two abnormal pixels in the four adjacent pixels of the abnormal pixel, the abnormal pixel is marked as a different two pixel. If there are three abnormal pixels in the four adjacent pixels of the abnormal pixel, the abnormal pixel is marked as a different three pixel. If there are four abnormal pixels in the four adjacent pixels of the abnormal pixel, the abnormal pixel is marked as a different four pixel. The number of different zero pixels, different one pixels, different two pixels, different three pixels and different four pixels is counted respectively to obtain different zero values, different two values, different three values and different four values, and marked as YC0, YC1, YC2, YC3, YC4, YCi, i=0, 1, 2, 3, 4; substitute into the differential classification model Get the sub-image's outlier value JF; where μ1 and μ2 are preset weight factors, and their sizes are custom settings, such as 0.6 and 0.4; YZ is the abnormal pixel value of the sub-pixel image, and η0, η1, η2, η3, and η4 are the weight coefficients corresponding to outlier zero value, outlier two value, outlier three value, and outlier four value, respectively;
[0039] The difference values of all sub-graphs are summed up to obtain the total difference value, and the total difference value is converted into a force value of one according to the preset force conversion coefficient; the material of the wafer substrate is obtained, each material corresponds to a rated force, and the rated force is subtracted from the force value of one to obtain the execution force; then the multi-point force controllable knocking unit 3 corresponding to the knocking point is controlled to knock the wafer substrate 5 with the execution force.
[0040] Example 3
[0041] like Figure 5 As shown, on the basis of Example 2, the controller further includes a sensing and analyzing unit, which is used to collect the voltage and current of the force sensor 32 when it is powered on within a preset time range, as well as the corresponding collection time and the reading and test time of each test, wherein the preset time range is the time range between the time when the force sensor 32 was last maintained and the current time, and if there is no maintenance, it is the time range between the installation time and the current time;
[0042] The voltages are sorted according to the order of collection time, and the difference between two adjacent voltages is the voltage difference. All voltage differences are summed up to obtain the total voltage difference and marked as UZ; the voltage is compared with the preset voltage. If the voltage is inconsistent with the preset voltage, the collection time corresponding to the voltage is marked as the abnormal pressure time, and the abnormal pressure time is sorted according to the order of the abnormal pressure time and the difference between two adjacent abnormal pressure time is calculated to obtain the abnormal pressure duration, and the average of all the abnormal pressure duration values is calculated to obtain the abnormal pressure mean and marked as UJ; the minimum abnormal pressure duration is marked as Umin; the total voltage difference, the abnormal pressure mean and the minimum abnormal pressure duration are normalized and substituted into the preset pressure division model to obtain the pressure factor index Uk, where the pressure division model is specifically Uk=UZ×γ1 / (UJ×γ2+Umin×γ3+1), and γ1, γ2 and γ3 are all weight factors preset by the model. If the pressure factor index is greater than the set index threshold, all power supply currents are compared with the preset currents, and the number of power supply currents that are inconsistent with the preset currents is counted to obtain the power anomaly value; if the power anomaly value is greater than the set current anomaly threshold, the number of test moments is counted to obtain the total number of tests, and the test moments are sorted in chronological order, and the difference between two adjacent test moments is calculated to obtain the test interval length, and the average of all test interval lengths is calculated to obtain the average test duration value, and the total number of tests is divided by the value of the average test duration value to obtain the total time ratio; finally, the pressure factor index is calculated. The number, the electrical anomaly value and the total time ratio are normalized and the values of the three are taken, and the values of the three are converted into straight line lengths according to a certain ratio, a circle is constructed with the straight line length of the pressure factor index as the radius, and a height equal to the length of the straight line corresponding to the electrical anomaly value is made with the center of the circle as the starting point, and a cylinder is constructed with the circle and the height, and the center of the upper end face of the cylinder is selected as the starting point, and a height equal to the length of the straight line corresponding to the total time ratio is made, and a cone is constructed with the circle of the upper end face of the cylinder and the height corresponding to the total time ratio, and the volume of the cube formed by the cylinder and the cone is calculated and the value of the volume is marked as the operational anomaly value of the force sensor 32;
[0043] The operation abnormality value is compared with the set operation abnormality threshold 1 and operation abnormality threshold 2, and the operation abnormality threshold 1 is less than the operation abnormality threshold 2; when the operation abnormality value is greater than the operation abnormality threshold 1 and less than or equal to the operation abnormality threshold 2, a maintenance instruction for the force sensor 32 is generated and sent to the corresponding technician's intelligent terminal, wherein the maintenance instruction includes the number, position, model of the force sensor 32 and the time to reach the corresponding position of the force sensor 32, wherein the time to reach the corresponding position of the force sensor 32 is inversely proportional to the operation abnormality value, and the larger the operation abnormality value, the shorter the corresponding time to reach the corresponding position of the force sensor 32, so that the technician can reasonably reach the corresponding position according to the operation abnormality value of the force sensor 32 to perform maintenance operations such as inspection, repair and calibration.
[0044] When the abnormal value is greater than the abnormal threshold value 2, the corresponding multi-point force controllable knocking unit 3 is controlled to stop the test instruction and issue an early warning, and at the same time, a replacement instruction is generated and sent to the corresponding technician's smart terminal to facilitate the technician to replace it; the replacement instruction includes the number, position and model of the force sensor 32.
[0045] This specification selects and specifically describes these embodiments as the preferred embodiments of the present invention in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can well understand and use the present invention. Any modification or equivalent substitution made by ordinary technicians in this field and related fields without creative work should fall within the scope of protection of the present invention.
Claims
1. A wafer substrate knocking test device, comprising a knocking base (1), a wafer substrate carrier (2), a multi-point force controllable knocking unit (3) and a sensor monitoring unit (4); a wafer substrate (5) is horizontally placed on the wafer substrate carrier (2); and the device is characterized in that: The knocking base (1) is composed of a base (11), four supporting rods (12) and an upper base (13); the upper base (13) and the base (11) are fastened together by four supporting rods (12) through bolts; a wafer substrate carrier (2) is installed between the base (11) and the upper base (13); one or more multi-point force controllable knocking units (3) are installed on the upper base (13); the multi-point force controllable knocking units (3) are composed of a driving unit (31), a force sensor (32) and a plurality of controllable knocking units (3). and a striking head (33), the striking head (33) being fastened to the force sensor (32) by bolts, and the force sensor (32) being fastened to the driving unit (31) by bolts; the sensing monitoring unit (4) being composed of a crushing monitoring sensor (41) and a process image monitoring component (42), the crushing monitoring sensor (41) being mounted on the upper seat (13) and being located above the wafer substrate (5); and the process image monitoring component (42) being fastened to the upper seat (13) by bolts; The multi-point force controllable knocking unit (3) and the sensor monitoring unit (4) are both connected to the controller for communication; the controller is provided with an image analysis unit and a material input unit; the material input unit is used by a user to input the material of the wafer substrate to be knocked and the rated force corresponding to the material; the image analysis unit is used to analyze the image of the wafer substrate (5) on the wafer substrate support table (2) to obtain the execution force, and control the multi-point force controllable knocking unit (3) corresponding to the knocking point to knock the wafer substrate (5) with the execution force; The specific process of the image analysis unit analyzing the image of the wafer substrate (5) on the wafer substrate carrying platform (2) is as follows: The image is evenly divided into a plurality of sub-images according to the knocking points of the wafer substrate (5), and the sub-images are magnified several times to form a pixel map to obtain a sub-pixel map; the gray value of each pixel in the sub-pixel map is identified, and the gray value of each pixel is compared with a set gray threshold value; if the gray value of the pixel is inconsistent with the gray threshold value, the pixel is marked as an abnormal pixel, and the number of abnormal pixels is counted to obtain the abnormal pixel value of the sub-pixel map; The four adjacent pixels of each abnormal pixel are judged. If there are zero abnormal pixels in the four adjacent pixels of the abnormal pixel, the abnormal pixel is marked as a non-zero pixel. If there is one abnormal pixel in the four adjacent pixels of the abnormal pixel, the abnormal pixel is marked as a non-one pixel. If there are two abnormal pixels in the four adjacent pixels of the abnormal pixel, the abnormal pixel is marked as a non-two pixel. If there are three abnormal pixels in the four adjacent pixels of the abnormal pixel, the abnormal pixel is marked as a non-three pixel. If there are four abnormal pixels in the four adjacent pixels of the abnormal pixel, the abnormal pixel is marked as a non-four pixel. The number of non-zero pixels, non-one pixels, non-two pixels, non-three pixels and non-four pixels is counted respectively to obtain the non-zero value, non-two value, non-three value and non-four value, which are substituted into the differential model to obtain the differential value of the sub-image, the differential values of all sub-images are summed to obtain the total differential value, and the total differential value is converted into a force value of one according to a preset force conversion coefficient; the material of the wafer substrate is obtained, each material corresponds to a rated force, and the rated force is subtracted from the force value one to obtain the execution force.
2. A wafer substrate tapping test device according to claim 1, characterized in that: The wafer substrate carrying platform (2) is composed of a wafer substrate seat (21) and a transparent protective seat (22); the wafer substrate seat (21) is fastened to the base (11) by means of bolts; and the transparent protective seat (22) is a light-transmitting structure.
3. The wafer substrate tapping test device according to claim 1, characterized in that: The process image monitoring component (42) is composed of a mounting bracket (421), a camera (422) and a lens (423); the camera (422) is a CCD, CMOS, digital or analog camera.
4. The wafer substrate tapping test device according to claim 1, characterized in that: The controller further comprises a sensor analysis unit, which is used to collect the voltage and current of the force sensor (32) when it is powered within a preset time range, as well as the corresponding collection time and the reading and test time of each test, and perform analysis. The specific analysis process is as follows: The voltages are sorted according to the order of the acquisition time, the difference between two adjacent voltages is the voltage difference, and all the voltage differences are summed to obtain the total voltage difference; the voltage is compared with the preset voltage. If the voltage is inconsistent with the preset voltage, the acquisition time corresponding to the voltage is marked as the abnormal pressure time, and the abnormal pressure time is sorted according to the order between the abnormal pressure time and the difference between two adjacent abnormal pressure time is calculated to obtain the abnormal pressure duration, and the average of all the abnormal pressure duration values is calculated to obtain the abnormal pressure mean; the minimum abnormal pressure duration; the total voltage difference, the abnormal pressure mean and the minimum abnormal pressure duration are normalized and substituted into the preset pressure distribution model to obtain the pressure factor index. If the pressure factor index is greater than the set index threshold, all the power supply currents are compared with the preset current, and the number of power supply currents inconsistent with the preset current is counted to obtain the voltage abnormality value; If the electrical anomaly value is greater than the set current anomaly threshold, the number of test moments is counted to obtain the total number of tests, the test moments are sorted in chronological order, the difference between two adjacent test moments is calculated to obtain the test interval length, all the test interval lengths are averaged to obtain the test average duration value, and the total number of tests is divided by the test average duration value to obtain the total time ratio; finally, the pressure factor index, the electrical anomaly value and the total time ratio are normalized and the values of the three are taken, and the values of the three are converted into straight line lengths according to a certain ratio, a circle is constructed with the straight line length of the pressure factor index as the radius, a height is made with the center of the circle as the starting point and the length is equal to the length of the straight line corresponding to the electrical anomaly value, a cylinder is constructed with the circle and the height, the center of the upper end face of the cylinder is selected as the starting point, a height is made with a length equal to the length of the straight line corresponding to the total time ratio, a cone is constructed with the circle of the upper end face of the cylinder and the height corresponding to the total time ratio, the volume of the cube formed by the cylinder and the cone is calculated, and the value of the volume is marked as the operational anomaly value of the force sensor (32); The operation abnormality value is compared with the set operation abnormality threshold 1 and operation abnormality threshold 2, and the operation abnormality threshold 1 is less than the operation abnormality threshold 2; when the operation abnormality value is greater than the operation abnormality threshold 1 and less than or equal to the operation abnormality threshold 2, a maintenance instruction for the force sensor (32) is generated and sent to a corresponding technician intelligent terminal; When the abnormal value is greater than the abnormal threshold value 2, the corresponding multi-point force controllable knocking unit (3) is controlled to stop the test instruction and issue an early warning, and at the same time, a replacement instruction is generated and sent to the corresponding technician's smart terminal.
5. The wafer substrate tapping test device according to any one of claims 1 to 4, characterized in that: The testing method of the device includes: Placing a wafer substrate (5) on a wafer substrate seat (21) of a wafer substrate carrying platform (2); Set the desired tapping point and strength through the controller; The multi-point force controllable knocking unit (3) is driven to knock the wafer substrate (5); if the wafer substrate (5) is broken, the breakage monitoring sensor (41) transmits the breakage information back to the controller; if the wafer substrate (5) is not broken, a new knocking point and force are set to knock again or the wafer substrate (5) is sent back.
Citation Information
Patent Citations
Sheet knocking testing device
CN116273977A
Clamp regulation and control method and device based on computer vision, terminal and storage medium
CN115805457A
Wafer hidden crack detection device and wafer hidden crack detection method
CN115938968A