A method for detecting bonding force of blind holes in circuit boards

Abstract

The present application provides a method for detecting the bonding force of blind holes in a circuit board, comprising: a substrate comprises a substrate layer, a first copper foil layer and a second copper foil layer, a first blind hole is opened on a first insulating layer; copper is plated on the first insulating layer, and the first blind hole is filled to form a first circuit layer; a second insulating layer is covered on a side of the first circuit layer away from the first insulating layer; a plurality of second blind holes are opened on the second insulating layer, the plurality of second blind holes are plated, copper is plated on a side of the second insulating layer away from the first circuit layer to form a second circuit layer, and the substrate layer, the first copper foil layer and the second copper foil layer in the substrate are peeled off. The present invention sets the bottom of the first blind hole as a bonding force test point at the bottom of the blind hole, thereby preventing the copper in the first blind hole from being pulled out by the hole wall, so that the force can be directly applied to the bottom of the hole, and the design pattern of the tensile test is retained, so as to monitor the copper-copper bonding force of the blind hole copper and monitor the circuit bonding force of the circuit pattern and the insulating material.

Description

Technical Field

[0001] The present application belongs to the technical field of circuit boards, and in particular, relates to a method for detecting the bonding force of blind holes in circuit boards. Background Art

[0002] In the prior art, it is necessary to conduct reliability analysis on the product. The defective substrates are usually broken at the lower diameter of the internal vias.

[0003] The test board for monitoring the copper bonding strength of the via hole is composed of a substrate board, a circuit layer, and an insulating layer. In the general manufacturing process, copper plating is performed on the organic substrate board to form a circuit layer, an insulating layer is laminated on the circuit layer, and a via hole is opened on the insulating layer. The second copper plating is continued to form a circuit layer again, and then the bonding strength of the bottom of the via hole is tested.

[0004] During the process of substrate reliability testing, substrates that have passed the bonding force test may still have fractures at the bottom of the through-holes, resulting in the inability to effectively monitor defective products with abnormal bonding force.

[0005] Currently, no effective solution has been proposed to the above problems.

[0006] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present invention and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because these solutions are described in the background technology section of the present invention. Summary of the invention

[0007] The purpose of this application is to provide a method for detecting the bonding force of blind vias in a circuit board to solve the above problems.

[0008] The present application provides a method for detecting the bonding strength of a blind hole in a circuit board, comprising:

[0009] Providing a substrate, wherein the substrate is composed of a base material layer, a first copper foil layer and a second copper foil layer tightly attached in sequence;

[0010] Covering the second copper foil layer with a first insulating layer, and opening a first blind hole in the first insulating layer;

[0011] Plating copper on the insulating layer to fill the first blind hole and form a first circuit layer;

[0012] Covering a second insulating layer on a side of the first circuit layer away from the first insulating layer;

[0013] Opening a plurality of second blind holes on the second insulating layer, and filling and plating the plurality of second blind holes;

[0014] Copper plating is performed on a side of the second insulating layer away from the first circuit layer to form a second circuit layer;

[0015] Peeling off the base material layer, the first copper foil layer and the second copper foil layer in the substrate;

[0016] copper plating the second copper foil layer to form a third circuit layer, thereby manufacturing a circuit board;

[0017] Among them, the side of the first blind hole in the circuit board facing the third circuit layer is set as the blind hole bottom bonding strength test point, and the side of the second blind hole facing the second circuit layer is set as the blind hole copper bonding strength test point, which are used to detect the circuit board.

[0018] Preferably, a diameter of a side of the first blind hole facing the third circuit layer is smaller than a diameter of a side away from the third circuit layer.

[0019] Preferably, the first copper foil layer is set to 18 um.

[0020] Preferably, the second copper foil layer is set to be 1-10 um.

[0021] Preferably, the substrate is made by hot pressing or gluing.

[0022] Preferably, the first insulating layer is covered by heat pressing, and the second insulating layer is covered by heat pressing.

[0023] Preferably, a portion of the second circuit layer corresponding to the second blind hole is set as a first covering portion, and a portion of the second circuit layer connected to the first covering portion is set as a second covering portion.

[0024] Preferably, a portion on the third circuit layer corresponding to the first blind hole is set as a third covering portion, and a portion on the third circuit layer connected to the third covering portion is set as a fourth covering portion.

[0025] Compared with the prior art, the present invention has the following beneficial effects:

[0026] 1. The present invention sets the bottom of the first blind hole as the blind hole bottom bonding force test point, so that the copper in the first blind hole can be prevented from being pulled out by the hole wall, so that the force can be directly applied to the bottom of the hole, and the design pattern of the tensile test is retained, so that it can be used to monitor the copper-copper bonding force of the blind hole copper and the circuit bonding force between the circuit pattern and the insulating material, which significantly improves the accuracy of defective product inspection.

[0027] 2. The present invention continues copper plating on the second copper foil layer with a thickness of 1-10 um to complete the third circuit layer, thereby making the bonding strength test process more stable.

[0028] 3. The present invention sets the second circuit layer to specifically include a first covering portion and a second covering portion, and the second covering portion is partially set as an extension area of ​​solid copper, which can be used to monitor the bonding force between the second circuit layer and the second insulating layer.

[0029] 4. The present invention sets a third circuit layer including a third covering part and a fourth covering part. The third covering part corresponds to the position of the first blind hole, and the fourth covering part is connected to the third covering part. The third covering part can be used to perform a reverse rapid tensile test on the first blind hole, and then the bonding force condition of the aperture position under the first blind hole can be monitored; the fourth covering part is used to monitor the bonding condition between the fourth covering part and the first insulating layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0031] Figure 1 It is a substrate structure diagram of a method for detecting the bonding force of blind vias in a circuit board provided in an embodiment of the present application;

[0032] Figure 2 This is a first blind hole structure diagram of a method for detecting the bonding force of a blind hole in a circuit board provided in an embodiment of the present application;

[0033] Figure 3 This is a first circuit layer structure diagram of a circuit board blind hole bonding force detection method provided in an embodiment of the present application;

[0034] Figure 4 This is a second insulating layer structure diagram of a circuit board blind hole bonding force detection method provided in an embodiment of the present application;

[0035] Figure 5 This is a second blind hole structure diagram of a method for detecting the bonding force of a blind hole in a circuit board provided in an embodiment of the present application;

[0036] Figure 6 This is a second circuit layer structure diagram of a circuit board blind hole bonding force detection method provided in an embodiment of the present application;

[0037] Figure 7 This is a structural diagram of the first covering part of a method for detecting the bonding force of a blind hole in a circuit board provided in an embodiment of the present application;

[0038] Figure 8It is a structural diagram of the third covering part of a method for detecting the bonding force of blind holes in a circuit board provided in an embodiment of the present application.

[0039] In the figure: 1, substrate; 11, base material layer; 12, first copper foil layer; 13, second copper foil layer; 2, first insulating layer; 21, first blind hole; 3, first circuit layer; 4, second insulating layer; 41, second blind hole; 5, second circuit layer; 51, first covering part; 52, second covering part; 6, third circuit layer; 61, third covering part; 62, fourth covering part. DETAILED DESCRIPTION

[0040] In order to enable those skilled in the art to better understand the technical solutions in this application, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of this application.

[0041] In the description of the present invention, it should be noted that the orientations or positional relationships indicated by the terms "upper", "middle", "lower", "inner", "outer", "front", "back", etc. are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or component referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. The terms "first", "second", and "third" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances. The following describes an implementation method of the present invention based on its overall structure.

[0042] Reference Figure 1 As shown, the embodiment of the present application provides a method for detecting the bonding force of a blind hole of a circuit board, comprising:

[0043] A substrate 1 is provided, wherein the substrate 1 is composed of a base material layer 11, a first copper foil layer 12 and a second copper foil layer 13 which are closely attached in sequence;

[0044] The first insulating layer 2 is covered on the second copper foil layer 13, and a first blind hole 21 is opened on the first insulating layer 2;

[0045] Copper plating is performed on the first insulating layer 2 to fill the first blind hole 21 and form a first circuit layer 3;

[0046] A second insulating layer 4 is covered on a side of the first circuit layer 3 away from the first insulating layer 2;

[0047] A plurality of second blind holes 41 are formed on the second insulating layer 4;

[0048] Copper plating is performed on a side of the second insulating layer 4 away from the first circuit layer 3 to form a second circuit layer 5;

[0049] The base material layer 11, the first copper foil layer 12 and the second copper foil layer 13 in the substrate 1 are peeled off;

[0050] The second copper foil layer 13 is copper plated to form a third circuit layer 6, thereby manufacturing a circuit board;

[0051] Among them, the side of the first blind hole 21 in the circuit board facing the third circuit layer 6 is set as the blind hole bottom bonding strength test point, and the side of the second blind hole facing the second circuit layer is set as the blind hole copper bonding strength test, which is used to detect the circuit board.

[0052] according to Figure 1 A person skilled in the art may select a substrate 1 for making a circuit board, wherein the substrate 1 includes a base material layer 11 , a first copper foil layer 12 and a third copper foil layer 13 .

[0053] In the arrangement of the above-mentioned substrate 1, preferably, the substrate 1 can be made by hot pressing or gluing. That is, those skilled in the art can combine the base material layer 11, the first copper foil layer 12 and the third copper foil layer 13 by hot pressing or gluing to form the substrate 1. It is understandable that the base material layer 11, the first copper foil layer 12 and the third copper foil layer 13 are arranged in sequence to form the substrate 1.

[0054] Furthermore, those skilled in the art may arrange the first insulating layer 2 on a side of the second copper foil layer 13 away from the first copper foil layer 12. After the first insulating layer 2 is arranged, the first blind hole 21 may be further opened on the first insulating layer 2.

[0055] After the first blind hole 21 is set, copper plating can be performed on the side of the first insulating layer 2 away from the first copper foil layer 12. The copper plating step can fill the first blind hole 21 on the first insulating layer 2 with copper, and at the same time, the second circuit layer 5 can be formed on the side of the first insulating layer 2 away from the first copper foil layer 13.

[0056] In the above embodiment, the second insulating layer 4 is formed on the side of the first circuit layer 3 away from the first insulating layer 2 , and those skilled in the art may further open a plurality of second blind holes 41 on the second insulating layer 4 .

[0057] It is understandable that the size of the second blind hole 41 and the spacing between the plurality of second blind holes 41 can be set according to the actual design. In the above embodiment, after the second blind hole 41 is processed, the technicians can fill the second blind hole with copper plating process.

[0058] In the above steps, the first circuit layer 3, the second insulating layer 4, and the second circuit layer 5 can be made on the substrate 1. Furthermore, those skilled in the art can remove the structure of the substrate 1. In the above embodiment, the substrate 1 includes a base material layer 11, a first copper foil layer 12, and a second copper foil layer 13. In this step, those skilled in the art can peel off the base material layer 11 and the first copper foil layer 12, that is, only the second copper foil layer 13 is left connected to the first insulating layer 2.

[0059] In the above steps, the first insulating layer 2 is connected to the second copper foil layer 13 , and those skilled in the art may perform copper plating on the position where the second copper foil layer 13 is located.

[0060] In this embodiment, copper plating is performed on a side of the second copper foil layer 13 away from the first insulating layer 2 , thereby forming the third circuit layer 6 .

[0061] according to Figure 3 , the third circuit layer 6 is connected to the second copper foil layer 13, the second copper foil layer 13 is connected to the first insulating layer 2, and a plurality of first blind holes 21 are provided on the first insulating layer. Preferably, the diameter of the first blind hole 21 facing the third circuit layer 6 is smaller than the diameter of the side away from the third circuit layer 6. During the processing, the first blind hole 21 can be processed by laser processing.

[0062] In this embodiment, those skilled in the art may set the side of the first blind hole 21 with a smaller aperture as the bottom of the hole, and the corresponding side of the first blind hole 21 with a larger aperture as the top of the hole. Figure 3 , the bottom of the first blind hole 21 is released from the second copper foil layer 13 .

[0063] During the bonding test, a person skilled in the art can set the side of the first blind hole 21 in the circuit board facing the third circuit layer 6 as the bonding test point of the bottom of the blind hole, and set the side of the second blind hole facing the second circuit layer as the bonding test point of the blind hole copper. That is, the bottom of the first blind hole 21 is set as the bonding test point of the bottom of the blind hole, so that the bonding test of the bottom of the blind hole can be stably completed. At the same time, the side of the second blind hole facing the second circuit layer is set as the bonding test of the blind hole copper, so that the bonding strength of the blind hole copper can be tested.

[0064] Specifically, the test point is set at the bottom of the hole during the bonding test, so that the copper in the first blind hole can be prevented from being pulled out by the hole wall, and the force can be directly applied to the bottom of the hole, which significantly improves the accuracy of defective product inspection.

[0065] In the above-mentioned setting, in the setting of the plate 1, preferably, the first copper foil layer 12 is set to 18 um. More preferably, the second copper foil layer 13 is set to 1-10 um.

[0066] By means of the above-mentioned setting, under the thickness conditions of the first copper foil layer 12 and the second copper foil layer 13, the above-mentioned steps can be performed to obtain a circuit board, and the bonding strength of the copper in the first blind hole 12 in the circuit board can be tested. In particular, after the substrate layer 11 and the first copper foil layer 12 are peeled off, copper plating is continued on the second copper foil layer 13 with a thickness of 1-10 um to complete the third circuit layer, so that the bonding strength test process can be more stable.

[0067] In the above-mentioned embodiment, preferably, the first insulating layer 2 is covered by heat pressing, and the second insulating layer 4 is covered by heat pressing, so that the first insulating layer 2 and the second insulating layer 4 can be stably installed.

[0068] It is understandable that, in the above process, when a person skilled in the art tests the bonding strength of a circuit board, the manufactured test board is first baked. During the baking process, the baking temperature can be set to 190 degrees Celsius, and the baking time can be maintained for 150 minutes. After the baking step is completed, the test board is fixed on the platform, and the test point is set at the bottom of the first blind hole 12. Specifically, during the test process, the test speed can be set to 2 inches per minute, and a cross-sectional analysis of the test area can be performed.

[0069] Preferably, the portion of the second circuit layer 5 corresponding to the second blind hole 41 is set as the first covering portion 51 , and the portion of the second circuit layer 5 connected to the first covering portion 51 is set as the second covering portion 52 .

[0070] Those skilled in the art may arrange that the second circuit layer 5 specifically includes a first covering portion 51 and a second covering portion 52. The first covering portion 51 corresponds to the position where the second blind hole 41 is arranged. In an optional embodiment, the second blind hole 41 may correspond to the middle position of the second circuit layer 5, that is, the first covering portion 51 of the second circuit layer 5 is arranged at the middle position of the second circuit layer 5. The second covering portion 52 is connected to the first covering portion 51, that is, the second covering portion 52 is arranged at the edge position of the second circuit layer 5.

[0071] It can be understood that part of the second covering portion 52 is configured as an extension area of ​​solid copper, which can be used to monitor the bonding force between the second circuit layer 5 and the second insulating layer 4 .

[0072] In this embodiment, preferably, the third covering portion 61 is provided on the third circuit layer 6 corresponding to the first blind hole 21 , and the portion of the third circuit layer 6 connected to the third covering portion 61 is provided as the fourth covering portion 62 .

[0073] In the above embodiment, copper is plated on the side of the second copper foil layer 13 away from the first insulating layer 2 to form the third circuit layer 6 , that is, the third circuit layer 6 is adjacent to the second copper foil layer 13 .

[0074] It can be understood that the third circuit layer 6 includes a third covering portion 61 and a fourth covering portion 62. The third covering portion 61 corresponds to the position of the first blind hole 21, and the fourth covering portion 60 is connected to the third covering portion 61. In an optional embodiment, the first blind hole 21 corresponds to the middle position of the third circuit layer 6, that is, the third covering portion 61 corresponds to the position of the first blind hole 21, and the fourth covering portion 62 is arranged at the outer edge of the third covering portion 61.

[0075] In the above setting, the third covering part 61 can be used to perform a reverse rapid tensile test on the first blind hole 21, and then monitor the bonding force condition of the lower aperture position of the first blind hole; the fourth covering part 62 is used to monitor the bonding condition between the fourth covering part 62 and the first insulating layer.

[0076] Although different specific embodiments are mentioned in the content of this application, this application is not limited to the situations described in the industry standards or embodiments, etc. Some industry standards or slightly modified implementation plans based on the implementation of the custom methods or embodiments can also achieve the same, equivalent or similar, or predictable implementation effects after deformation of the above embodiments. The embodiments of data acquisition, processing, output, judgment methods, etc. after these modifications or deformations can still fall within the scope of the optional implementation plans of this application.

[0077] Although the present application has been described through embodiments, those skilled in the art will appreciate that there are many modifications and changes to the present application without departing from the spirit of the present application. It is intended that the attached embodiments include these modifications and changes without departing from the present application.

Claims

1. A method for detecting the bonding strength of blind vias in a circuit board, characterized in that: include: Providing a substrate, wherein the substrate is composed of a base material layer, a first copper foil layer and a second copper foil layer tightly attached in sequence; Covering the second copper foil layer with a first insulating layer, and opening a first blind hole in the first insulating layer; Plating copper on the first insulating layer to fill the first blind hole and form a first circuit layer; Covering a second insulating layer on a side of the first circuit layer away from the first insulating layer; Opening a plurality of second blind holes on the second insulating layer, and filling and plating the plurality of second blind holes; Copper plating is performed on a side of the second insulating layer away from the first circuit layer to form a second circuit layer; The base material layer and the first copper foil layer in the substrate are peeled off so as to keep the second copper foil layer connected to the first insulating layer; copper plating the second copper foil layer to form a third circuit layer, thereby manufacturing a circuit board; Among them, the side of the blind hole in the circuit board facing the third circuit layer is set as the blind hole bottom bonding strength test point, and the side of the second blind hole facing the second circuit layer is set as the blind hole copper bonding strength test point, which are used to detect the circuit board.

2. The method for detecting the bonding strength of blind vias of a circuit board according to claim 1, characterized in that: A diameter of a side of the first blind hole facing the third circuit layer is smaller than a diameter of a side away from the third circuit layer.

3. The method for detecting the bonding strength of blind vias of a circuit board according to claim 1, characterized in that: The thickness of the first copper foil layer is set to 18 um.

4. The method for detecting the bonding strength of blind vias of a circuit board according to claim 1, characterized in that: The thickness of the second copper foil layer is set to 1-10 um.

5. The method for detecting the bonding strength of blind vias of a circuit board according to claim 1, characterized in that: The substrate is made by hot pressing or gluing.

6. The method for detecting the bonding strength of blind vias of a circuit board according to claim 1, characterized in that: The first insulating layer is covered by heat pressing, and the second insulating layer is covered by heat pressing.

7. The method for detecting the bonding strength of blind vias of a circuit board according to claim 1, characterized in that: A portion of the second circuit layer corresponding to the second blind hole is set as a first covering portion, and a portion of the second circuit layer connected to the first covering portion is set as a second covering portion.

8. The method for detecting the bonding strength of blind vias of a circuit board according to claim 1, characterized in that: A portion of the third circuit layer corresponding to the first blind hole is set as a third covering portion, and a portion of the third circuit layer connected to the third covering portion is set as a fourth covering portion.

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