A test system for integrated circuits

Abstract

The present invention discloses a test system for an integrated circuit, which relates to the technical field of integrated circuits, and includes a power module for power supply control; a test control module for signal reception and module control; an integrated circuit module for providing a first control signal to be detected in a working state; a signal processing module for signal sampling and signal holding; a voltage trend detection module for controlling a path switching module to switch a signal transmission path when the first control signal is a voltage drop trend; a path switching module for transmitting a signal held by a signal processing module and a first control signal; a signal change detection module for performing subtraction processing on the signal held by the signal processing module and the first control signal; and an abnormality judgment module for setting a voltage threshold and judging whether the signal after subtraction is normal. The test system for the integrated circuit of the present invention can timely detect whether the first control signal output by the integrated circuit is abnormal and perform abnormal protection.

Description

Technical Field

[0001] The invention relates to the technical field of integrated circuits, and in particular to a testing system for integrated circuits. Background Art

[0002] Integrated Circuit (IC) is an advanced microelectronic device that integrates many micro components into one chip. To ensure that the integrated circuit can work stably and safely, the integrated circuit is generally tested. The integrated circuit test system in the prior art generally uses an oscilloscope to directly display the signal waveform output by the integrated circuit, and intuitively judges whether the integrated circuit has output abnormalities. Relevant personnel need to monitor it, resulting in the inability to timely judge whether the output of the integrated circuit is abnormal when testing the integrated circuit, and the inability to automatically control the working state of the integrated circuit according to the signal state of the integrated circuit output. Therefore, it needs to be improved. Summary of the invention

[0003] An embodiment of the present invention provides a testing system for an integrated circuit to solve the problems raised in the above background technology.

[0004] According to an embodiment of the present invention, there is provided an integrated circuit test system, comprising: a power supply module, a test control module, an integrated circuit module, a signal processing module, a voltage trend detection module, a path switching module, a signal change detection module and an abnormality judgment module;

[0005] a power module connected to the test control module and the integrated circuit module, and configured to receive direct current power and transmit the direct current power to the integrated circuit module upon receiving a first test signal output by the test control module;

[0006] A test control module, connected to the integrated circuit module, the abnormality judgment module and the signal processing module, for outputting a first test signal and transmitting the first test signal to the integrated circuit and triggering the operation of the integrated circuit module, and when receiving the first abnormality signal or the second abnormality signal output by the abnormality judgment module, stopping the transmission of the first trigger signal, regularly outputting a sampling control signal and controlling the signal processing module to perform signal sampling, outputting a first pulse signal and adjusting the voltage threshold set by the abnormality judgment module;

[0007] The integrated circuit module is used to output a first control signal when receiving direct current power and a first test signal;

[0008] A signal processing module connected to the integrated circuit module, configured to receive the first control signal and perform signal sampling processing when the sampling control signal is received, and to hold the sampled signal and output a holding signal when the sampling control signal is not received;

[0009] A voltage trend detection module, connected to the integrated circuit module, for detecting the voltage change trend of the first control signal and outputting a second control signal when the voltage drops;

[0010] A path switching module, connected to the voltage trend addition module and the signal processing module, for receiving the holding signal and the first control signal and transmitting the holding signal and the first control signal to the signal change detection module, and switching the transmission path of the first control signal and the holding signal when receiving the second control signal;

[0011] A signal change detection module, connected to the path switching module, for performing subtraction processing on the first control signal and the holding signal, and outputting a first difference signal;

[0012] The abnormality judgment module is connected to the signal change detection module, and is used to receive the first pulse signal and set a voltage threshold. When the received first difference signal is greater than the voltage threshold, the first abnormality signal is output, and when the received first difference signal is negative, the second abnormality signal is output.

[0013] As a further solution of the present invention: the power module includes a power interface, a first capacitor, a first resistor, a first power tube, a first diode, a second capacitor and a first switch tube; the test control module includes a first tester, a first logic chip, a first trigger, a second diode and a third diode; the integrated circuit module includes a first integrated chip;

[0014] Preferably, the first end of the power interface is connected to one end of the first capacitor and the source of the first power tube and to the gate of the first power tube and the collector of the first switch tube through the first resistor, the drain of the first power tube is connected to the VDD end of the first integrated chip, the Y end of the first logic chip is connected to the IN end of the first integrated chip, the B end of the first logic chip is connected to the IO2 end of the first tester and the anode of the first diode, the cathode of the first diode is connected to the base of the first switch tube and is grounded through the second capacitor, the emitter of the first switch tube, the D end of the first trigger, the other end of the first capacitor and the second end of the power interface are all grounded, the Q1 end of the first trigger is connected to the A end of the first logic chip, the CLK end of the first trigger is connected to the cathode of the second diode and the cathode of the third diode, the anode of the third diode is connected to the IO4 end of the first tester, the anode of the second diode is connected to the IO5 end of the first tester, the IO1 end of the first tester is connected to the signal processing module, and the GND end of the first integrated chip is grounded.

[0015] As a further solution of the present invention: the signal processing module includes a first operational amplifier, a first analog switch, a third resistor, a fourth resistor, a third capacitor, a second operational amplifier and a fifth resistor;

[0016] Preferably, the inverting end of the first op amp is connected to the output end of the second op amp and is connected to the inverting end of the second op amp through a fifth resistor, the non-inverting end of the second op amp is connected to the first end of the third resistor and the first end of the third capacitor through a fourth resistor, the other end of the third capacitor is grounded, the other end of the third resistor is connected to the fourth end of the first analog switch, the fifth end of the first analog switch is connected to the IO1 end of the first tester, the third end of the first analog switch is connected to the output end of the first op amp, and the non-inverting end of the first op amp is connected to the OUT end of the first integrated circuit.

[0017] As a further solution of the present invention: the path switching module includes a second analog switch, a first power supply, a second resistor and a second switch tube;

[0018] Preferably, the first end and the third end of the second analog switch are both connected to the OUT end of the first integrated chip, the eighth end and the tenth end of the second analog switch are both connected to the output end of the second op amp, the twelfth end and the thirteenth end of the second analog switch are both connected to the collector of the second switch tube and connected to the first power supply through the second resistor, the emitter of the second switch tube is grounded, the base of the second switch tube is connected to the voltage trend detection module, the fifth end and the sixth end of the first analog switch, the second end of the second analog switch is connected to the ninth end of the second analog switch, and the fourth end of the second analog switch is connected to the eleventh end of the second analog switch.

[0019] As a further solution of the present invention: the signal change detection module includes a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor and a third operational amplifier;

[0020] Preferably, the in-phase end of the third operational amplifier is connected to one end of the sixth resistor and is grounded through the seventh resistor, the other end of the sixth resistor is connected to the second end and the ninth end of the second analog switch, the inverting end of the third operational amplifier is connected to one end of the eighth resistor and is connected to the output end of the third operational amplifier and the abnormality judgment module through the ninth resistor, and the other end of the eighth resistor is connected to the fourth end and the eleventh end of the second analog switch.

[0021] As a further solution of the present invention: the abnormality judgment module includes a first comparator, a fourth power supply, a twelfth resistor, a second power tube, an eleventh resistor, a first optical coupler, a second power supply, a third power supply and a tenth resistor;

[0022] Preferably, the in-phase end of the first comparator is connected to the second end of the first optocoupler and the output end of the third operational amplifier, the inverting end of the first comparator is connected to the drain of the second power tube and is connected to the fourth power supply through a twelfth resistor, the first end of the first optocoupler is connected to the second power supply, the third end of the first optocoupler is connected to the third power supply, the fourth end of the first optocoupler is connected to the anode of the second diode and is grounded through a tenth resistor, the source of the second power tube is grounded through an eleventh resistor, and the gate of the second power tube is connected to the IO3 end of the first tester.

[0023] As a further solution of the present invention: the voltage trend detection module includes a fourth diode, a fifth diode, a fourth capacitor and a second comparator;

[0024] Preferably, the anode of the fourth diode is connected to the anode of the fifth diode and the OUT terminal of the first integrated chip, the cathode of the fourth diode is connected to the inverting terminal of the second comparator, the non-inverting terminal of the second comparator is connected to the cathode of the fifth diode and grounded through the fourth capacitor, and the output terminal of the second comparator is connected to the fifth terminal and the sixth terminal of the second analog switch.

[0025] Compared with the prior art, the beneficial effects of the present invention are as follows: the test system of the integrated circuit of the present invention controls the integrated circuit module to start working by the test control module, and time-controlled the signal processing module to sample and hold the signal output by the integrated circuit module; the signal change detection module cooperates with the path switching module to detect the voltage change degree of the signal output by the integrated circuit module when the signal processing module is in a holding state, and when the voltage change degree exceeds the voltage threshold set by the abnormal judgment module, or when a voltage drop occurs during a voltage rise, or when a voltage boost occurs during a voltage drop, the abnormal judgment module will control the test control module to stop working, so as to timely detect and judge whether an abnormality occurs in the integrated circuit module. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.

[0027] Figure 1 A schematic block diagram of a principle of an integrated circuit testing system provided by an embodiment of the present invention.

[0028] Figure 2 A circuit diagram of an integrated circuit testing system provided by an embodiment of the present invention.

[0029] Figure 3 A circuit diagram of a voltage trend detection module provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0030] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0031] In one embodiment, see Figure 1 , an integrated circuit test system, comprising: a power supply module 1, a test control module 2, an integrated circuit module 3, a signal processing module 4, a voltage trend detection module 5, a path switching module 6, a signal change detection module 7 and an abnormality judgment module 8;

[0032] Specifically, the power supply module 1 is connected to the test control module 2 and the integrated circuit module 3, and is used to access the DC power and transmit the DC power to the integrated circuit module 3 when receiving the first test signal output by the test control module 2;

[0033] The test control module 2 is connected to the integrated circuit module 3, the abnormality judgment module 8 and the signal processing module 4, and is used to output a first test signal and transmit the first test signal to the integrated circuit and trigger the operation of the integrated circuit module 3. When receiving the first abnormality signal or the second abnormality signal output by the abnormality judgment module 8, the test control module 2 stops transmitting the first trigger signal, outputs a sampling control signal at a fixed time and controls the signal processing module 4 to perform signal sampling, outputs a first pulse signal and adjusts the voltage threshold set by the abnormality judgment module 8;

[0034] The integrated circuit module 3 is used to output a first control signal when receiving direct current power and a first test signal;

[0035] The signal processing module 4 is connected to the integrated circuit module 3, and is used to receive the first control signal and perform signal sampling processing when the sampling control signal is received, and to hold the sampled signal and output a holding signal when the sampling control signal is not received;

[0036] A voltage trend detection module 5, connected to the integrated circuit module 3, for detecting the voltage change trend of the first control signal and outputting a second control signal when the voltage drops;

[0037] A path switching module 6 is connected to the voltage trend addition module and the signal processing module 4, and is used to receive the holding signal and the first control signal and transmit the holding signal and the first control signal to the signal change detection module 7, and when receiving the second control signal, switches the transmission path of the first control signal and the holding signal;

[0038] A signal change detection module 7, connected to the path switching module 6, for performing subtraction processing on the first control signal and the holding signal, and outputting a first difference signal;

[0039] The abnormality judgment module 8 is connected to the signal change detection module 7, and is used to receive the first pulse signal and set the voltage threshold. When the received first difference signal is greater than the voltage threshold, the first abnormality signal is output, and when the received first difference signal is negative, the second abnormality signal is output.

[0040] In a specific embodiment, the power supply module 1 can adopt a power supply circuit composed of a power supply interface, capacitors, field effect transistors, triodes, etc., which can be connected to DC power, controlled by the test control module 2 and power the integrated circuit module 3; the test control module 2 can adopt a test control circuit composed of a single-chip microcomputer, a logic chip, a D trigger and a diode, integrating many components such as an arithmetic unit, a controller, a memory, a trigger, and an input and output device to realize signal processing, data storage, module control, timing control and other functions; the integrated circuit module 3 can adopt an integrated circuit composed of an integrated chip that provides a pulse signal upon receiving a trigger signal; the signal processing module 4 can sample the signal output by the integrated circuit module 3 and hold the sampled signal; the voltage trend detection module 5 can adopt a diode, a capacitor and a comparator to detect the voltage change of the signal output by the integrated circuit module 3; the above-mentioned path switching module 6 can adopt a path switching circuit composed of a transistor, a resistor and an analog switch, which can transmit the signal and switch the signal transmission path; the above-mentioned signal change detection module 7 can adopt a signal change detection circuit composed of a resistor and an operational amplifier, which can perform subtraction processing on the signal output by the path switching module 6, and then judge the degree of voltage change; the above-mentioned abnormal judgment module 8 can adopt an abnormal judgment circuit composed of a photoelectric coupler, a resistor, a comparator, etc., which can detect the negative pressure, set the voltage threshold and compare the signal voltage output by the signal change detection module 7, and the maximum voltage change value of the output signal of the integrated circuit module 3 allowed during the voltage threshold is maintained by the signal processing module 4.

[0041] In another embodiment, see Figure 1 , Figure 2 and Figure 3 The power module 1 includes a power interface, a first capacitor C1, a first resistor R1, a first power tube Q1, a first diode D1, a second capacitor C2 and a first switch tube V1; the test control module 2 includes a first tester U1, a first logic chip U3, a first trigger U2, a second diode D2 and a third diode D3; the integrated circuit module 3 includes a first integrated chip IC1;

[0042] Specifically, the first end of the power interface is connected to one end of the first capacitor C1 and the source of the first power tube Q1, and is connected to the gate of the first power tube Q1 and the collector of the first switch tube V1 through the first resistor R1, the drain of the first power tube Q1 is connected to the VDD end of the first integrated chip IC1, the Y end of the first logic chip U3 is connected to the IN end of the first integrated chip IC1, the B end of the first logic chip U3 is connected to the IO2 end of the first tester U1 and the anode of the first diode D1, the cathode of the first diode D1 is connected to the base of the first switch tube V1 and is grounded through the second capacitor C2, and the The emitter of a switch tube V1, the D terminal of the first trigger U2, the other end of the first capacitor C1 and the second end of the power interface are all grounded, the Q1 terminal of the first trigger U2 is connected to the A terminal of the first logic chip U3, the CLK terminal of the first trigger U2 is connected to the cathode of the second diode D2 and the cathode of the third diode D3, the anode of the third diode D3 is connected to the IO4 terminal of the first tester U1, the anode of the second diode D2 is connected to the IO5 terminal of the first tester U1, the IO1 terminal of the first tester U1 is connected to the signal processing module 4, and the GND terminal of the first integrated chip IC1 is grounded.

[0043] In a specific embodiment, the first power tube Q1 can be a P-channel field effect tube, which is controlled and turned on by the first switch tube V1; the first switch tube V1 can be an NPN transistor; the first tester U1 can be an STM32 microcontroller; the first logic chip U3 can be an AND gate chip, and the first trigger U2 can be a D trigger.

[0044] Further, the signal processing module 4 includes a first operational amplifier OP1, a first analog switch J1, a third resistor R3, a fourth resistor R4, a third capacitor C3, a second operational amplifier OP2 and a fifth resistor R5;

[0045] Specifically, the inverting end of the first operational amplifier OP1 is connected to the output end of the second operational amplifier OP2 and is connected to the inverting end of the second operational amplifier OP2 through the fifth resistor R5, the non-inverting end of the second operational amplifier OP2 is connected to the first end of the third resistor R3 and the first end of the third capacitor C3 through the fourth resistor R4, the other end of the third capacitor C3 is grounded, the other end of the third resistor R3 is connected to the fourth end of the first analog switch J1, the fifth end of the first analog switch J1 is connected to the IO1 end of the first tester U1, the third end of the first analog switch J1 is connected to the output end of the first operational amplifier OP1, and the non-inverting end of the first operational amplifier OP1 is connected to the OUT end of the first integrated circuit.

[0046] In a specific embodiment, both the first operational amplifier OP1 and the second operational amplifier OP2 may use OP07 operational amplifiers; the first analog switch J1 may use CD4066 analog switch; the third capacitor C3 performs signal sampling and holding processing, specifically, when the first analog switch J1 is turned on, signal sampling is performed, and when the first analog switch J1 is turned off, signal holding is performed.

[0047] Furthermore, the path switching module 6 includes a second analog switch J2, a first power supply VCC1, a second resistor R2 and a second switch tube V2;

[0048] Specifically, the first end and the third end of the second analog switch J2 are both connected to the OUT end of the first integrated chip IC1, the eighth end and the tenth end of the second analog switch J2 are both connected to the output end of the second operational amplifier OP2, the twelfth end and the thirteenth end of the second analog switch J2 are both connected to the collector of the second switch tube V2 and connected to the first power supply VCC1 through the second resistor R2, the emitter of the second switch tube V2 is grounded, the base of the second switch tube V2 is connected to the voltage trend detection module 5, the fifth end and the sixth end of the first analog switch J1, the second end of the second analog switch J2 is connected to the ninth end of the second analog switch J2, and the fourth end of the second analog switch J2 is connected to the eleventh end of the second analog switch J2.

[0049] In a specific embodiment, the second analog switch J2 may be a CD4066 chip; the second switch tube V2 may be an NPN transistor.

[0050] Further, the signal change detection module 7 includes a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9 and a third operational amplifier OP3;

[0051] Specifically, the in-phase end of the third operational amplifier OP3 is connected to one end of the sixth resistor R6 and is grounded through the seventh resistor R7, the other end of the sixth resistor R6 is connected to the second end and the ninth end of the second analog switch J2, the inverting end of the third operational amplifier OP3 is connected to one end of the eighth resistor R8 and is connected to the output end of the third operational amplifier OP3 and the abnormality judgment module 8 through the ninth resistor R9, and the other end of the eighth resistor R8 is connected to the fourth end and the eleventh end of the second analog switch J2.

[0052] In a specific embodiment, the third operational amplifier OP3 can select an OP07 operational amplifier, and cooperate with the seventh resistor R7, the sixth resistor R6, the eighth resistor R8 and the ninth resistor R9 to perform subtraction processing, specifically the voltage of the signal at the in-phase terminal of the third operational amplifier OP3 minus the voltage of the signal at the inverting terminal of the third operational amplifier OP3.

[0053] Further, the abnormality judgment module 8 includes a first comparator A1, a fourth power supply VCC4, a twelfth resistor R12, a second power tube Q2, an eleventh resistor R11, a first optical coupler U4, a second power supply VCC2, a third power supply VCC3 and a tenth resistor R10;

[0054] Specifically, the in-phase end of the first comparator A1 is connected to the second end of the first optocoupler U4 and the output end of the third operational amplifier OP3, the inverting end of the first comparator A1 is connected to the drain of the second power tube Q2 and is connected to the fourth power supply VCC4 through the twelfth resistor R12, the first end of the first optocoupler U4 is connected to the second power supply VCC2, the third end of the first optocoupler U4 is connected to the third power supply VCC3, the fourth end of the first optocoupler U4 is connected to the anode of the second diode D2 and is grounded through the tenth resistor R10, the source of the second power tube Q2 is grounded through the eleventh resistor R11, and the gate of the second power tube Q2 is connected to the IO3 end of the first tester U1.

[0055] In a specific embodiment, the above-mentioned first optocoupler U4 can use a PC817 photoelectric coupler, wherein the voltage value provided by the second power supply VCC2 cannot trigger the first optocoupler U4 to turn on when the second end of the first optocoupler U4 is grounded, and when the second end of the first optocoupler U4 is a negative value, the first optocoupler U4 is turned on; the above-mentioned first comparator A1 can use an LM358 comparator; the above-mentioned fourth power supply VCC4, the twelfth resistor R12, the second power tube Q2 and the eleventh resistor R11 set a voltage threshold, and the voltage threshold determines whether the degree of change in the voltage of the signal output from the OUT end of the first integrated signal is abnormal.

[0056] Further, the voltage trend detection module 5 includes a fourth diode D4, a fifth diode D5, a fourth capacitor C4 and a second comparator A2;

[0057] Specifically, the anode of the fourth diode D4 is connected to the anode of the fifth diode D5 and the OUT terminal of the first integrated chip IC1, the cathode of the fourth diode D4 is connected to the inverting terminal of the second comparator A2, the non-inverting terminal of the second comparator A2 is connected to the cathode of the fifth diode D5 and grounded through the fourth capacitor C4, and the output terminal of the second comparator A2 is connected to the fifth terminal and the sixth terminal of the second analog switch J2.

[0058] In a specific embodiment, the second comparator A2 may be a LM358 comparator, which compares the voltage output by the fourth diode D4 with the voltage output by the fifth capacitor in cooperation with the fourth capacitor C4 to determine the short-time voltage change state.

[0059] In a test system for an integrated circuit of the present embodiment, a DC power source interface is connected to the DC power source, and a first capacitor C1 performs filtering processing. When the CLK of the first trigger U2 is in a low level state, the Q1 of the first trigger U2 outputs a high level to control the A terminal of the first logic chip U3 to become a high level. At this time, as long as the IO2 terminal of the first tester U1 outputs the first test signal, the Y terminal of the first logic chip U3 triggers the first integrated chip IC1 to work, and a pulse signal is output from the OUT terminal of the first integrated chip IC1. The IO1 terminal of the first tester U1 triggers the first analog switch J1 to turn on, so that the pulse signal output from the OUT terminal of the first integrated chip IC1 is processed by the first operational amplifier OP1, and the third capacitor C3 stores the sample, and the second When the operational amplifier OP2 processes and outputs the pulse signal at the OUT end of the first integrated chip IC1 and the pulse signal shows an upward trend, the second comparator A2 will output a low level because the fourth capacitor C4 needs a period of time to store. The thirteenth and twelfth ends of the second analog switch J2 are triggered to become high levels by the first power supply VCC1 and the second resistor R2. The first end and the second end of the second analog switch J2 are turned on, and the tenth and eleventh ends of the second analog switch J2 are turned on. When the IO1 end of the first tester U1 controls the first analog switch J1 to be turned off, the third capacitor C3 performs sampling and holding. According to the timing duration, the IO3 end of the first tester U1 adjusts the conduction degree of the second power tube Q2, and cooperates with the fourth power supply VCC4 and the twelfth end of the first tester U1 to control the conduction degree of the second power tube Q2. The resistor R12 and the eleventh resistor R11 set the voltage threshold. At this time, it is necessary to know the voltage change value when the voltage rises in a certain period of time under the normal state of the pulse signal output by the first integrated chip IC1. The voltage threshold is set according to the voltage change value. Then, the third operational amplifier OP3 cooperates with the sixth resistor R6, the seventh resistor R7, the eighth resistor R8 and the ninth resistor R9 to control the voltage of the pulse signal output from the OUT end of the first integrated chip IC1 minus the voltage of the signal after sampling and holding by the third capacitor C3. When the voltage difference is greater than the voltage threshold, the first comparator A1 outputs a high level. When the voltage difference is a negative value, the first optical coupler U4 is turned on. At this time, it means that a voltage drop occurs under the trend of voltage rising. When the first comparator A1 outputs a high level or the first optical coupler U4 is turned on, the CLK terminal of the first trigger U2 will be triggered to become a high level, so that the Q1 terminal of the first trigger U2 outputs a low level, the first analog switch J1 stops working, and the first integrated chip IC1 stops working. Similarly, when the pulse signal output from the OUT terminal of the first integrated chip IC1 shows a downward trend, the second comparator A2 outputs a high level and triggers the second switch tube V2 to turn on. The fifth and sixth terminals of the second analog switch J2 become high levels, the eighth and ninth terminals of the first analog switch J1 are turned on, and the third and fourth terminals are turned on, and the path is switched, so that the voltage of the sampled signal is subtracted from the voltage of the pulse signal output from the OUT terminal of the first integrated chip IC1.The first comparator A1 is used to determine whether the voltage change degree when the voltage drops exceeds the voltage threshold, or whether a short rise occurs when the voltage drops. If it exceeds or occurs, the test work of the first integrated chip IC1 will be stopped.

[0060] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

[0061] In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

Claims

1. A test system for an integrated circuit, characterized in that: The integrated circuit test system includes: a power supply module, a test control module, an integrated circuit module, a signal processing module, a voltage trend detection module, a path switching module, a signal change detection module and an abnormality judgment module; The power supply module is connected to the test control module and the integrated circuit module, and is used to receive direct current power and transmit direct current power to the integrated circuit module when receiving the first test signal output by the test control module; The test control module is connected to the integrated circuit module, the abnormality judgment module and the signal processing module, and is used to output a first test signal and transmit the first test signal to the integrated circuit and trigger the operation of the integrated circuit module. When receiving the first abnormality signal or the second abnormality signal output by the abnormality judgment module, the test control module stops transmitting the first trigger signal, outputs a sampling control signal at a fixed time and controls the signal processing module to perform signal sampling, outputs a first pulse signal and adjusts the voltage threshold set by the abnormality judgment module; The integrated circuit module is used to output a first control signal when receiving direct current power and a first test signal; The signal processing module is connected to the integrated circuit module, and is used to receive the first control signal and perform signal sampling processing when the sampling control signal is received, and to hold the sampled signal and output a holding signal when the sampling control signal is not received; The voltage trend detection module is connected to the integrated circuit module and is used to detect the voltage change trend of the first control signal and output a second control signal when the voltage drops; The path switching module is connected to the voltage trend detection module and the signal processing module, and is used to receive the holding signal and the first control signal and transmit the holding signal and the first control signal to the signal change detection module, and when receiving the second control signal, switches the transmission path of the first control signal and the holding signal; The signal change detection module is connected to the path switching module, and is used to perform subtraction processing on the first control signal and the holding signal, and output a first difference signal; The abnormality judgment module is connected to the signal change detection module, and is used to receive the first pulse signal and set a voltage threshold, and output a first abnormality signal when the received first difference signal is greater than the voltage threshold, and output a second abnormality signal when the received first difference signal is negative; The power module includes a power interface, a first capacitor, a first resistor, a first power tube, a first diode, a second capacitor and a first switch tube; the test control module includes a first tester, a first logic chip, a first trigger, a second diode and a third diode; the integrated circuit module includes a first integrated chip; The first end of the power interface is connected to one end of the first capacitor and the source of the first power tube and is connected to the gate of the first power tube and the collector of the first switch tube through the first resistor, the drain of the first power tube is connected to the VDD end of the first integrated chip, the Y end of the first logic chip is connected to the IN end of the first integrated chip, the B end of the first logic chip is connected to the IO2 end of the first tester and the anode of the first diode, the cathode of the first diode is connected to the base of the first switch tube and is grounded through the second capacitor, the emitter of the first switch tube, the D end of the first trigger, the other end of the first capacitor and the second end of the power interface are all grounded, the Q1 end of the first trigger is connected to the A end of the first logic chip, the CLK end of the first trigger is connected to the cathode of the second diode and the cathode of the third diode, the anode of the third diode is connected to the IO4 end of the first tester, the anode of the second diode is connected to the IO5 end of the first tester, the IO1 end of the first tester is connected to the signal processing module, and the GND end of the first integrated chip is grounded.

2. The integrated circuit testing system according to claim 1, characterized in that: The signal processing module includes a first operational amplifier, a first analog switch, a third resistor, a fourth resistor, a third capacitor, a second operational amplifier and a fifth resistor; The inverting end of the first operational amplifier is connected to the output end of the second operational amplifier and is connected to the inverting end of the second operational amplifier through a fifth resistor, the non-inverting end of the second operational amplifier is connected to the first end of the third resistor and the first end of the third capacitor through a fourth resistor, the other end of the third capacitor is grounded, the other end of the third resistor is connected to the fourth end of the first analog switch, the fifth end of the first analog switch is connected to the IO1 end of the first tester, the third end of the first analog switch is connected to the output end of the first operational amplifier, and the non-inverting end of the first operational amplifier is connected to the OUT end of the first integrated circuit.

3. The integrated circuit testing system according to claim 2, characterized in that: The path switching module includes a second analog switch, a first power supply, a second resistor and a second switch tube; The first end and the third end of the second analog switch are both connected to the OUT end of the first integrated chip, the eighth end and the tenth end of the second analog switch are both connected to the output end of the second operational amplifier, the twelfth end and the thirteenth end of the second analog switch are both connected to the collector of the second switch tube and connected to the first power supply through the second resistor, the emitter of the second switch tube is grounded, the base of the second switch tube is connected to the voltage trend detection module, the fifth end and the sixth end of the first analog switch, the second end of the second analog switch is connected to the ninth end of the second analog switch, and the fourth end of the second analog switch is connected to the eleventh end of the second analog switch.

4. The integrated circuit testing system according to claim 3, characterized in that: The signal change detection module includes a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor and a third operational amplifier; The in-phase end of the third operational amplifier is connected to one end of the sixth resistor and is grounded through the seventh resistor, the other end of the sixth resistor is connected to the second end and the ninth end of the second analog switch, the inverting end of the third operational amplifier is connected to one end of the eighth resistor and is connected to the output end of the third operational amplifier and the abnormality judgment module through the ninth resistor, and the other end of the eighth resistor is connected to the fourth end and the eleventh end of the second analog switch.

5. The integrated circuit testing system according to claim 4, characterized in that: The abnormality judgment module includes a first comparator, a fourth power supply, a twelfth resistor, a second power tube, an eleventh resistor, a first optical coupler, a second power supply, a third power supply and a tenth resistor; The in-phase end of the first comparator is connected to the second end of the first optocoupler and the output end of the third operational amplifier, the inverting end of the first comparator is connected to the drain of the second power tube and is connected to the fourth power supply through the twelfth resistor, the first end of the first optocoupler is connected to the second power supply, the third end of the first optocoupler is connected to the third power supply, the fourth end of the first optocoupler is connected to the anode of the second diode and is grounded through the tenth resistor, the source of the second power tube is grounded through the eleventh resistor, and the gate of the second power tube is connected to the IO3 end of the first tester.

6. The integrated circuit testing system according to claim 5, characterized in that: The voltage trend detection module includes a fourth diode, a fifth diode, a fourth capacitor and a second comparator; The anode of the fourth diode is connected to the anode of the fifth diode and the OUT terminal of the first integrated chip, the cathode of the fourth diode is connected to the inverting terminal of the second comparator, the non-inverting terminal of the second comparator is connected to the cathode of the fifth diode and grounded through the fourth capacitor, and the output terminal of the second comparator is connected to the fifth terminal and the sixth terminal of the second analog switch.

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