Data stream processing for media management of memory subsystems

Abstract

The invention relates to data stream processing for media management of a memory subsystem. A set of transfer units of a plurality of transfer units associated with a pointer of a garbage collection procedure is selected. The selection is based on a set of data streams corresponding to the pointer, and each transmission unit in the set of transmission units is associated with the same data stream in the set of data streams. A plurality of write commands are issued for the pointer in conjunction with the garbage collection program. Each write command includes an instruction to write a transfer unit of the set of transfer units to a respective target address of the memory subsystem.

Description

[0001] Information about divisional applications

[0002] This application is a divisional application of the invention patent application with application date of February 3, 2021, application number "202110148345.1", and invention name "Data stream processing for media management of memory subsystem".

[0003] Cross-references

[0004] This patent application claims priority to U.S. patent application No. 16 / 788,196, filed on February 11, 2020 by Bianco et al., entitled “DATA STREAM PROCESSING FOR MEDIA MANAGEMENT FORA MEMORY SUB-SYSTEM,” each of which is assigned to the assignee of this application, and each of which is expressly incorporated herein by reference in its entirety.

[0005] The technical field relates to data stream processing for media management of storage subsystems. Background Art

[0006] The memory subsystem may include one or more memory devices that store data. The memory devices may be, for example, non-volatile memory devices and volatile memory devices. Typically, the host system may utilize the memory subsystem to store data at the memory devices and retrieve data from the memory devices. Summary of the invention

[0007] A method is described. In some examples, the method may include: selecting, in conjunction with a garbage collector, a set of transfer units from a plurality of transfer units associated with a pointer of the garbage collector, wherein the selection is based at least in part on a set of data streams corresponding to the pointer, and each transfer unit in the set of transfer units is associated with the same data stream in the set of data streams; and issuing, in conjunction with the garbage collector, a plurality of write commands for the pointer, each write command including an instruction for writing a transfer unit in the set of transfer units to a corresponding target address of a memory subsystem.

[0008] A system is described. In some examples, the system may include: a plurality of memory components; and a processing device operably coupled to the plurality of memory components to: select a set of transfer units from a plurality of transfer units associated with a pointer of a garbage collector of the plurality of memory components, wherein each transfer unit in the set of transfer units is associated with a same data stream from a set of data streams corresponding to the pointer; and issue a plurality of read commands for the pointer in conjunction with the garbage collector, each read command including an instruction for reading one of the set of transfer units at a corresponding source address of the plurality of memory components.

[0009] A non-transitory computer-readable storage medium is described. In some examples, the non-transitory computer-readable storage medium may include instructions that, when executed by a processing device, cause the processing device to: select, in conjunction with a garbage collection program, a set of transfer units from a plurality of transfer units associated with a pointer of the garbage collection program, wherein the selection is based at least in part on a set of data streams corresponding to the pointer, and each transfer unit in the set of transfer units is associated with the same data stream in the set of data streams; and issue, in conjunction with the garbage collection program, a plurality of write commands for the pointer, each write command including instructions for writing a transfer unit in the set of transfer units to a corresponding target address of a memory subsystem. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The present disclosure will be more fully understood from the detailed description given below and the accompanying drawings of various examples of the present disclosure. However, the accompanying drawings should not be used to limit the present disclosure to specific examples, but are only for ease of explanation and understanding.

[0011] Figure 1 An exemplary computing system including a memory subsystem according to some examples of the present disclosure is shown.

[0012] Figure 2 is a flow chart of an exemplary method for performing data stream processing for media management according to some examples of the present disclosure.

[0013] Figure 3 is a method flow chart of an exemplary method for performing data stream processing for media management according to some examples of the present disclosure.

[0014] Figure 4 is an example of a memory subsystem for performing data stream processing for media management according to some examples of the present disclosure.

[0015] Figure 5 is a block diagram of an exemplary computer system in which examples of the present disclosure may operate. DETAILED DESCRIPTION

[0016] Various aspects of the present disclosure relate to data flow processing for media management of a memory subsystem. The memory subsystem may be a storage device, a memory module, or a combination of a storage device and a memory module. Figure 1 Examples of storage devices and memory modules are described. In general, a host system may utilize a memory subsystem that includes one or more components, such as a memory device that stores data. The host system may provide data to be stored at the memory subsystem and may request to retrieve data from the memory subsystem.

[0017] The memory device may be a non-volatile memory device. A non-volatile memory device is a package of one or more dies. Each die may be composed of one or more planes. For some types of non-volatile memory devices (e.g., NAND devices), each plane is composed of a set of physical blocks. Each block is composed of a set of pages. Each page is composed of a set of memory cells, which store data bits. For some memory devices (such as NAND devices), a block is the smallest area that can be erased, and pages within a block cannot be erased individually. For such devices, an erase operation is performed one block at a time.

[0018] The pages of a block may contain valid data, invalid data, or no data. Invalid data is data that is marked as outdated because a new version of the data is stored on the memory device. Invalid data includes data that was previously written but is no longer associated with a valid logical address (such as a logical address referenced by the host system in a physical to logical (P2L) mapping table). Valid data is the latest version of such data stored on the memory device. The memory subsystem may mark data as invalid based on information received from the operating system, for example. Pages without data include pages that were previously erased but not yet written.

[0019] The memory subsystem controller may perform operations for media management algorithms, such as wear leveling, refresh, garbage collection, erasure, and the like. A block may have some pages with valid data and some pages with invalid data. To avoid waiting for all pages in a block to have invalid data in order to erase and reuse the block, an algorithm referred to hereinafter as "garbage collection" may be invoked to allow erasure and release of the block as a free block for subsequent write operations. Garbage collection is a set of media management operations that include, for example, selecting blocks with valid and invalid data, selecting pages in the block with valid data, copying valid data to a new location (e.g., a free page in another block), marking data in previously selected pages as invalid, and erasing selected blocks.

[0020] "Garbage collection" hereinafter refers to selecting a block, rewriting valid data from the selected block to another block, and erasing all invalid data and valid data stored at the selected block. Valid data from a plurality of selected blocks may be copied to a smaller number of other blocks, and then the selected blocks may be erased. As a result, the number of erased blocks may be increased, making more blocks available for storing subsequent data from the host system.

[0021] During garbage collection, based on one or more read commands issued by the memory subsystem controller, valid data of the block to be erased is first read into and stored by the buffer, and the corresponding page (e.g., a page containing valid data thereon) is erased. The valid data can then be written (e.g., rewritten) to the memory subsystem (e.g., a different page of the memory subsystem). In order to write the valid data to a location (e.g., a different page of the memory subsystem), the memory subsystem controller issues write commands, each of which indicates a memory address (e.g., a target memory address) into which the valid data is to be written.

[0022] During a conventional garbage collection procedure, data blocks containing data from a single or multiple data streams are selected for garbage collection according to a block picking algorithm. A data stream (or stream) may refer to a grouping of logical data (e.g., user data) based on one or more criteria specified by a host system. The use of data streams (e.g., the use of data streams by an application) tends to cause the written data to have a similar life cycle. That is, all data assigned to a particular stream tends to be updated, deleted, or rewritten at a similar rhythm. The block picking algorithm may depend on several factors, including wear leveling, error handling, or the amount of valid data in a data block, among others. In some cases, the reliance of the block picking algorithm on these and other factors may result in data from multiple data streams being compressed together at a target location after garbage collection is performed. The mixing of multiple data streams (i.e., multiple data streams are stored or compressed at a target location) may result in data being invalidated due to host activity (e.g., due to host write operations). Therefore, it may be beneficial to group data according to corresponding data streams, which may reduce the amount of garbage collection procedures performed on the data, and may improve the performance and durability of the memory subsystem.

[0023] Aspects of the present disclosure address the above and other deficiencies by assigning a unique identifier to data written to each block of a memory subsystem. For example, data may be written to a given block of a memory subsystem from a primary data source and associated with a single data stream. Although some mixing of data streams may occur at first or at this stage (e.g., due to data being written to a block from other data sources), most data may be written from a single data source associated with a single data stream and identified by a unique identifier.

[0024] In some examples, a data block may contain data from various data sources (i.e., data intermixing may occur). The data stored to the block from the various data sources may each be associated with a unique identifier representing the data stream from which the data was written. For example, a single data block may contain data written from three different data streams, and the data written from each of the three streams may be associated with a different unique identifier. In some examples, a block may be associated with its own unique identifier, which may be (or may be associated with) the identifier of the data stream having the greatest number of writes issued for the block.

[0025] When executing a garbage collector, a data block can be loaded to a pointer (e.g., a single pointer). A pointer can refer to an entity (e.g., a firmware entity) that can control the order in which data is written to a block. As discussed herein, data loaded into a pointer of a garbage collector can be selected based on a unique identifier associated with a data stream of a block written to a memory subsystem. That is, a garbage collector can be executed on one or more blocks based on a unique identifier of the corresponding block. Because the unique identifier of a block can be based on a data stream with a maximum number of writes issued for the block, a garbage collector can be executed on a block with generally homogeneous data (e.g., data written from the same data stream). Therefore, because the identifier of the block can be determined based on a data stream with a maximum number of writes issued for a block, subsequent garbage collectors can occur on blocks with the same identifier, so that after garbage collection, more data from the same data stream is stored together at a target location. Such techniques can reduce the amount of garbage collectors executed on data, and can improve the performance and durability of a memory subsystem.

[0026] Figure 1 An exemplary computing system 100 including a memory subsystem 110 according to some embodiments of the present disclosure is shown. Memory subsystem 110 may include media such as one or more non-volatile memory devices (e.g., memory device 130), one or more volatile memory devices (e.g., memory device 140), or a combination thereof.

[0027] The memory subsystem 110 may be a storage device, a memory module, or a hybrid of a storage device and a memory module. Examples of storage devices include solid-state drives (SSDs), flash drives, universal serial bus (USB) flash drives, embedded multimedia controllers (eMMC) drives, universal flash storage (UFS) drives, secure digital (SD) cards, and hard disk drives (HDDs). Examples of memory modules include dual in-line memory modules (DIMMs), small outline DIMMs (SO-DIMMs), and various types of non-volatile DIMMs (NVDIMMs).

[0028] Computing system 100 may include a host system 105 coupled to one or more memory systems 110. In some examples, host system 105 is coupled to memory systems 110 of different types. Figure 1 An example of a host system 105 coupled to a memory subsystem 110 is shown. As used herein, "coupled to" or "coupled with..." generally refers to a connection between components, which can be an indirect communication connection or a direct communication connection (e.g., without intermediate components), whether wired or wireless, including connections such as electrical, optical, magnetic, etc.

[0029] The host system 105 may include a processor chipset and a software stack executed by the processor chipset. The processor chipset may include one or more cores, one or more caches, a memory controller (e.g., an NVDIMM controller), and a memory protocol controller (e.g., a PCIe controller, a SATA controller). The host system 120, for example, uses the memory subsystem 110 to write data to the memory subsystem 110 and read data from the memory subsystem 110.

[0030] The host system 105 may be coupled to the memory subsystem 110 using a physical host interface. Examples of the physical host interface include, but are not limited to, a Serial Advanced Technology Attachment (SATA) interface, a Peripheral Component Interconnect Express (PCIe) interface, a USB interface, a Fibre Channel, a Serial Attached SCSI (SAS), a Small Computer System Interface (SCSI), a Double Data Rate (DDR) memory bus, a Dual In-line Memory Module (DIMM) interface (e.g., a DIMM slot interface supporting Double Data Rate (DDR)), an Open NAND Flash Interface (ONFI), Double Data Rate (DDR), Low Power Double Data Rate (LPDDR), or any other interface. The physical host interface may be used to transfer data between the host system 105 and the memory subsystem 110. When the memory subsystem 110 is coupled to the host system 105 via a PCIe interface, the host system 105 may further utilize a Non-Volatile Memory Express (NVMe) interface to access a memory component (e.g., a memory device 130). The physical host interface may provide an interface for transferring control, address, data, and other signals between the memory subsystem 110 and the host system 105. Figure 1 Memory subsystem 110 is shown as an example. In general, host system 120 can access multiple memory subsystems via the same communication connection, multiple separate communication connections, and / or a combination of communication connections.

[0031] Memory devices 130, 140 may include any combination of different types of non-volatile memory devices and / or volatile memory devices. Volatile memory devices (e.g., memory device 140) may be, but are not limited to, random access memory (RAM) such as dynamic RAM (DRAM) and synchronous DRAM (SDRAM).

[0032] Some examples of non-volatile memory devices (e.g., memory device 130) include NAND-type flash memory and write-in-place memory, such as a three-dimensional cross-point ("3D cross-point") memory device, which is a cross-point array of non-volatile memory cells. The cross-point array of non-volatile memory can perform bit storage based on body resistance changes in combination with a stackable cross-grid data access array. In addition, compared to many flash-based memories, cross-point non-volatile memory can perform write-in-place operations, in which non-volatile memory cells can be programmed without having to erase the non-volatile memory cells in advance. NAND-type flash memory includes, for example, two-dimensional NAND (2D NAND) and three-dimensional NAND (3D NAND).

[0033] Each of the memory devices 130 may include one or more memory cell arrays. One type of memory cell, such as a single-level cell (SLC), may store one bit per cell. Other types of memory cells, such as multi-level cells (MLC), triple-level cells (TLC), and quad-level cells (QLC), may store multiple bits per cell. In some embodiments, each of the memory devices 130 may include one or more memory cell arrays, such as SLC, MLC, TLC, QLC, or any combination of such memory cells. In some embodiments, a particular memory device may include an SLC portion and an MLC portion, a TLC portion, or a QLC portion of a memory cell. The memory cells of the memory device 130 may be grouped into pages that may refer to logical units of a memory device for storing data. For some types of memory (e.g., NAND), pages may be grouped to form blocks.

[0034] Although nonvolatile memory components such as NAND-type flash memory (e.g., 2D NAND, 3D NAND) and a 3D cross-point array of nonvolatile memory cells are described, the memory device 130 can be based on any other type of nonvolatile memory, such as ROM, phase change memory (PCM), self-selected memory, other chalcogenide-based memories, ferroelectric transistor random access memory (FeTRAM), ferroelectric RAM (FeRAM), magneto-magnetic RAM (MRAM), spin-transfer torque (STT)-MRAM, conductive bridging RAM (CBRAM), resistive random access memory (RRAM), oxide-based RRAM (OxRAM), non-OR (NOR) flash memory, and electrically erasable programmable ROM (EEPROM).

[0035] The memory subsystem controller 115 (or simply controller 115) can communicate with the memory device 130 to perform operations such as reading data, writing data, or erasing data at the memory device 130, as well as other such operations. The memory subsystem controller 115 can include hardware such as one or more integrated circuits and / or discrete components, buffer memory, or a combination thereof. The hardware can include digital circuitry with dedicated (i.e., hard-coded) logic to perform the operations described herein. The memory subsystem controller 115 can be a microcontroller, dedicated logic circuitry (e.g., a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a digital signal processor (DSP)), or another suitable processor.

[0036] The memory subsystem controller 115 may include a processor 120 (e.g., a processing device) configured to execute instructions stored in a local memory 125. In the example shown, the local memory 125 of the memory subsystem controller 115 includes an embedded memory configured to store instructions for executing various processes, operations, logic flows, and routines for controlling the operation of the memory subsystem 110, including handling communications between the memory subsystem 110 and the host system 105.

[0037] In some examples, local memory 125 may include memory registers that store memory pointers, pre-fetched data, etc. Local memory 125 may also include ROM for storing microcode. Figure 1 The exemplary memory subsystem 110 in has been shown as including a memory subsystem controller 115, but in another example of the present disclosure, the memory subsystem 110 does not include a memory subsystem controller 115, but may rely on external control (e.g., provided by an external host or by a processor or controller separate from the memory subsystem).

[0038] In general, the memory subsystem controller 115 may receive commands or operations from the host system 105, and may convert the commands or operations into instructions or appropriate commands to achieve the desired access to the memory device 130 and / or the memory device 140. The memory subsystem controller 115 may be responsible for other operations such as wear leveling operations, garbage collection procedures, error detection and correction code (ECC) operations, encryption operations, cache operations, and address conversion between logical addresses (e.g., logical block addresses (LBA), namespaces) and physical addresses (e.g., physical block addresses) associated with the memory device 130. The memory subsystem controller 115 may further include a host interface circuit system to communicate with the host system 105 via a physical host interface. The host interface circuit system may convert commands received from the host system into command instructions to access the memory device 130 and / or the memory device 140, and convert responses associated with the memory device 130 and / or the memory device 140 into information for the host system 105.

[0039] The memory subsystem 110 may also include additional circuitry or components not shown. In some examples, the memory subsystem 110 may include a cache or buffer (e.g., DRAM) and address circuitry (e.g., row decoders and column decoders) that may receive addresses from the memory subsystem controller 115 and decode the addresses to access the memory device 130.

[0040] In some examples, memory device 130 includes a local media controller 135 that operates in conjunction with memory subsystem controller 115 to perform operations on one or more memory cells of memory device 130. An external controller (e.g., memory subsystem controller 115) can externally manage memory device 130 (e.g., perform media management operations on memory device 130). In some embodiments, memory device 130 is a managed memory device, which is a bare memory device combined with a local controller (e.g., local controller 135) for media management within the same memory device package. An example of a managed memory device is a managed NAND (MNAND) device.

[0041] The memory subsystem 110 includes a pointer manager 150 that can facilitate one or more media management operations (e.g., garbage collection) using an associated master pointer (AHC). For example, the pointer manager 150 can select a particular data block on which to perform a garbage collection procedure based on a primary AHC associated with the block. The primary AHC can indicate (e.g., to the system) a possible data source for the block (e.g., the AHC can be an identifier associated with a data stream stored on the block, such as a data stream with a maximum amount of write data to the block). The pointer manager 150 can issue multiple write commands associated with each transfer unit (TU) of the block, and can transmit the AHC associated with each TU. As the pointer manager 150 transmits each AHC, a counter corresponding to the AHC can be incremented. After the garbage collection procedure is completed, the counters can be compared, and the counter with the highest value can indicate whether the primary AHC remains unchanged or is updated. Ensuring that the AHC associated with any one block reflects the data stream with the most data on the block can minimize the amount of data stored to the block from another source (e.g., intermingled data) and increase the likelihood that fast reads and other fast read operations will be performed on the memory subsystem 110. Further details regarding the operation of the pointer manager 150 are described below.

[0042] In some examples, the memory subsystem controller 115 includes at least a portion of the pointer manager 150. For example, the memory subsystem controller 115 may include a processor 120 (e.g., a processing device) configured to execute instructions stored in the local memory 125 to perform the operations described herein. In some examples, the pointer manager 150 is part of the host system 105, an application, or an operating system.

[0043] Figure 2 is a flow chart of an exemplary method 200 of data stream processing for media management according to some examples of the present disclosure. The method 200 may be performed by processing logic, which may include hardware (e.g., a processing device, a circuit system, dedicated logic, programmable logic, microcode, hardware of a device, an integrated circuit, etc.), software (e.g., instructions running or executed on a processing device), or a combination thereof. In some examples, the method 200 is performed by Figure 1 , and pointer manager 150. Although shown in a particular order or sequence, the order of the processes may be modified unless otherwise specified. Therefore, the examples shown should be understood as examples only, and the processes shown may be performed in a different order, and some processes may be performed in parallel. In addition, one or more processes may be omitted in various examples. Therefore, not all processes are required in every example. Other method flows are possible.

[0044] At operation 205, the processing device may select a TU set associated with a pointer of the garbage collector in conjunction with the garbage collector. In some examples, the selection is based at least in part on a data stream set corresponding to the pointer, and each TU in the TU set is associated with the same data stream in the data stream set.

[0045] In some examples, method 200 may include selecting a TU set for performing a garbage collection procedure based at least in part on the amount of valid data in the data set and an error handling factor. In some examples, method 200 may include dynamically adjusting a weighting factor based at least in part on the number of TU sets selected for performing a garbage collection procedure.

[0046] In some examples, method 200 may include identifying a set of data streams corresponding to the pointer based at least in part on the pointer identifier, wherein each of the set of data streams is associated with a corresponding master pointer. In some examples, method 200 may include: selecting a second set of TUs associated with the pointer of the garbage collector for performing the garbage collector, wherein each TU in the second set of TUs is associated with a same second data stream in the set of data streams, the same second data stream being different from the same data stream; and issuing a second set of write commands for the pointer in conjunction with the garbage collector, each write command including an instruction for writing one of the second set of TUs to a corresponding target address of the memory subsystem.

[0047] In some examples, method 200 may include maintaining a record of a corresponding counter for each master pointer indicating a pointer to a garbage collector based at least in part on issuing a plurality of write commands and a second set of write commands. In some examples, method 200 may include selecting a set of TUs for performing a garbage collector on the data set based at least in part on a weighting factor for a data stream associated with the same master pointer as the data set.

[0048] At operation 210, the processing device may issue a plurality of write commands for the pointer in conjunction with a garbage collector. In some examples, each write command may include an instruction for writing a TU in the set of TUs to a corresponding target address of the memory subsystem.

[0049] In some examples, the method 200 may include, for each data stream of the garbage collector associated with the pointer, sending an indication of the corresponding master pointer, wherein the indication is sent with the plurality of write commands or the second set of write commands. In some examples, the method 200 may include storing a master pointer identifier for the data set of the garbage collector based at least in part on the record, wherein the master pointer identifier corresponds to the master pointer having the highest count value in the record.

[0050] Figure 3An example of a method flow chart 300 for data stream processing for media management according to some examples of the present disclosure is shown. The method flow chart 300 may illustrate stages for executing a garbage collection program. The method flow chart 300 illustrates multiple pointers (e.g., pointers 305-a, 305-b, and 305-n) for controlling which block to write data to. The method flow chart 300 also illustrates multiple blocks to which data is to be written (e.g., block 310-a, block 210-b, block 310-n) and multiple blocks containing data (e.g., blocks 315-a to 315-e). Additionally or alternatively, the method flow chart 300 illustrates an erased block pool 330 and specific pointers (e.g., pointer 320) and blocks 325 selected for the garbage collection program. In some examples, as shown in reference Figure 3 The steps or operations performed as described may be implemented at a memory subsystem (eg, a NAND memory subsystem) and may be performed according to the operation of a host system and / or a local memory controller.

[0051] Method flow chart 300 illustrates the operation of a garbage collection procedure. During a garbage collection procedure, data (e.g., within a memory subsystem) may be migrated from one location (e.g., a source location) to another location (e.g., a target location) independently of any direct host interaction. Garbage collection may be performed to pack valid data together, thereby freeing up space for new writes, to avoid errors, for wear leveling, and / or to restore redundant array of independent nodes (RAIN) parity protection when errors occur. Additionally or alternatively, garbage collection may consist of moving or copying data from one or more blocks (e.g., one or more blocks of NAND cells) to a target block. In some examples, garbage collection may result in data consolidation to free up resources (e.g., NAND cells) for subsequent erase and new write processing.

[0052] In some examples, the data blocks transferred during the garbage collection procedure may be or may be referred to as TUs. TUs may be received by a host system (e.g., Figure 1 The pointer 320 is managed by the host system 105 and may include a logical address (e.g., a TU address (TUA)) and a physical address (e.g., an abstract physical address such as a flash logical address (FLA)). To merge data and / or free resources for subsequent access operations, a TU may be written to a new block and a previous block (e.g., a block from which a TU was moved) may be erased. A candidate (e.g., a block) for garbage collection may be selected using a pointer 320, such as Figure 3As shown. In some examples, each candidate for garbage collection can include an AHC. The AHC can identify a write pointer that was originally written to data contained in a particular block. As discussed herein, selecting blocks for garbage collection based on associated AHCs can minimize the amount of unrelated (e.g., mixed) data (data associated with different AHCs) written to blocks during a garbage collection procedure.

[0053] Each of pointers 305-a to 305-n represents a data stream to be written to a particular block. For example, pointer 305-a represents a data stream to be written to block 310-a, pointer 305-b represents a data stream to be written to block 310-b, and pointer 305-n represents the nth data stream to be written to block 310-n (e.g., the nth block). Once data is written to the corresponding block, the block can be classified as a filler block. For example, each of blocks 315-a to 315-f can be a filler block. That is, blocks 310-a to 310-n and blocks 315-a to 315-f can represent the same structure, only blocks 310-a to 310-n have not yet been written (e.g., have not yet been completely written). Therefore, because blocks 315-a to 315-f are filler blocks, these blocks can meet the conditions of the garbage collector.

[0054] In order to perform a garbage collection procedure on one or more of the blocks 315, the pointer 320 can select a particular block for the garbage collection procedure. In some examples, an algorithm can be used to select the particular block, while in other examples, the block can be selected based on one or more characteristics. For example, a particular block can be selected based on the amount of valid data stored in the block, the error handling characteristics associated with the block, the weighting factor associated with the block, the specific AHC associated with the block, etc. Once selected, the data can be moved to the block 325, and the data from the selected block can be erased (e.g., and subsequently overwritten). In some examples, the block 325 can be selected from an erased pool 330 containing one or more blank blocks. Additionally or alternatively, each of the blocks 310-a to 310-n can also be selected from the erased pool 330.

[0055] As discussed herein, it may be beneficial to select blocks containing data written by the same pointer for garbage collection. The data associated with each of the pointers 305-a to 305-n may be associated with a unique AHC. During a garbage collection routine, the AHC associated with a block may be determined dynamically. In some examples, the AHC may be determined because there are fewer garbage collection pointers available than master pointers. That is, each unique AHC may be transmitted with a write command, which may allow each write command to be counted (e.g., based on a counter increment). Thus, during a garbage collection routine for a particular block (e.g., block 325), the system is able to determine how much data mixing has occurred on a given block.

[0056] When data is written to one of blocks 310-a to 310-n, the corresponding block is assigned an AHC. For example, block 315-a may be selected for a garbage collection procedure and may be associated with AHC1. In some examples, AHC1 may correspond to pointer 305-a (i.e., indicating that data is written to block 315-a using pointer 305-a). Thus, when it is desired to perform a garbage collection procedure on the data associated with AHC1, block 315-a may be selected (e.g., via pointer 320). Selecting block 315-a in this manner may reduce the amount of mixed data (e.g., data not associated with pointer 305-a) written to block 325 during a garbage collection procedure.

[0057] In order to minimize the amount of mixed data during the garbage collection procedure, when each write command is issued for the pointer, an AHC corresponding to the pointer may also be issued or included in the write command. Based on one or more internal operations, the AHC may be included in the write command (e.g., inside the memory subsystem). At the host interface, a stream identifier may be sent with the write command. Whenever a new stream identifier is seen for the first time (e.g., by the memory subsystem), a particular stream is "opened". That is, the stream identifier replaces an empty slot or the least recently used slot in the stream-master pointer mapping table. If the stream identifier sent with the command is not new, it is used to look up the associated master pointer in the stream-master pointer mapping table. Therefore, the AHC associated with the stream ID can replace part or all of the stream identifiers in the internal commands that constitute the host write command. The AHC can be used to route the internal write command to the correct master write pointer.

[0058] Thus, after each AHC is assigned to a block, the corresponding counter may be incremented. The counter may be analyzed once each write command associated with a block is transmitted. In some examples, thousands of write commands may be required to complete a block, and even more to write a block stripe. Thus, the counter may be analyzed at key points in the garbage collection process. For example, upon completion of each block stripe. In other examples, the value of the counter may be stored upon completion of a block stripe, and may be analyzed at a later time.

[0059] In some examples, because the block was previously assigned an AHC, the analysis can include comparing the value of each counter to determine whether the AHC should be maintained or updated. In some examples, the counters can be maintained and incremented for writes to the block stripe being written by the garbage collection pointer. The counts can be cleared when a new block stripe is loaded into the garbage collection pointer. In some examples, the counter associated with the AHC can include a larger value than any other counter. This can indicate that the block primarily contains data associated with the AHC. In other examples, the counter associated with the AHC can indicate a smaller value than another counter, which can cause the AHC for the block to be updated to the AHC associated with the other counter.

[0060] Updating the AHC for a block may occur to reduce the amount of data streams that are mixed in a given block 315. For example, block 315-a may have been initially assigned AHC1, which may correspond to pointer 305-a. This may indicate to the system that the data stored to block 315-a is primarily written by pointer 305-a. Therefore, when a garbage collection procedure associated with AHC1 is performed, block 315-a may be selected by pointer 320. Selecting a block associated with an AHC (e.g., AHC1) may be desirable because the system expects data stored to that block (e.g., block 315-a) to be associated with a particular pointer (pointer 305-a). However, during the garbage collection procedure, counters associated with AHCs other than AHC1 may be the counters that increment the most. For example, due to a write command for data associated with AHC2 (the data corresponding to a different data stream than AHC1) being issued during the garbage collection procedure, the counter associated with AHC2 may increment the most. Counter AHC2 may be associated with a different pointer (e.g., pointer 305-b), which may indicate that most of the stored data is associated with pointer 305-b. In such an example, the AHC of the block may be updated to AHC2. During a garbage collection procedure, updating the AHC may minimize the amount of mixed data.

[0061] Figure 4 An example of a memory subsystem 400 for performing data stream processing for media management according to some examples of the present disclosure is shown. The memory subsystem 400 can include a plurality of pointers (e.g., pointers 405-a, 405-b, and 405-n) for controlling which block data is written to, a plurality of blocks (e.g., blocks 410-a to 410-f) to which data has been written, and a selection algorithm 415 for selecting one or more pointers and / or blocks for garbage collection. In some examples, the selection algorithm 415 can include a counter 420 for determining (e.g., counting) the number of specific AHCs associated with any one written block.

[0062] Each of pointers 405-a, 405-b, and 405-c represents a data stream to be written to a particular block. For exemplary purposes only, pointer 405-a represents a data stream to be written to block 410-a, pointer 405-b represents a data stream to be written to block 410-c, and pointer 405-c represents the nth data stream to be written to block 410-d (e.g., the nth block). In some examples (not shown), the memory subsystem 400 may include a corresponding pointer for each block (e.g., blocks 410-a to 410-f). In some examples, each block may include an identifier (e.g., AHC) indicating which pointer initially wrote data to the block. For example, pointer 405-a may be associated with AHC1, pointer 405-b may be associated with AHC2, and pointer 405-c may be associated with AHC3.

[0063] In order to perform a garbage collection procedure on one or more blocks 410, the selection algorithm 415 may select a particular block 410 for the garbage collection procedure. In some examples, the particular block may be selected based on the number of stream IDs associated with the block, the AHC associated with the block, etc. For example, the selection algorithm 415 may determine to perform a garbage collection procedure on a block associated with AHC1. For exemplary purposes only, block 410-c may be associated with AHC1. The selection algorithm 415 may select block 410-c and move its data to a separate free block so that block 410-c may be erased (e.g., and subsequently overwritten). In some examples, the block may be removed from an erased pool (e.g., as referenced in FIG. 1 ). Figure 3 A blank block is selected from the erased pool 330) in question.

[0064] As discussed herein, it may be beneficial to select blocks containing data written by the same pointer for garbage collection. Thus, each time data is written to a block (e.g., block 410-c), a counter may be incremented. That is, each stream ID may be transmitted with a write command, which may allow counter 420 to count each write command. For example, block 410-c may contain data (e.g., pages) associated with ID1, ID2, and ID3. Each time a write command associated with each data segment stored in block 410-c is transmitted, counter 420 may determine (e.g., count) the stream ID associated with the block. That is, counter 420 may determine that block 410-c is associated with two (2) ID1s, seven (7) ID2s, and two (2) ID3s. Because block 410-c was initially associated with AHC1, and counter 420 identifies that most of the data for the block is associated with AHC1, the AHC for block 410-c may remain AHC1 (e.g., selection algorithm 415 is unable to update the AHC for block 410-c). Not updating the AHC associated with the block may indicate that the amount of data mixed with AHCs from other AHCs during the garbage collection procedure was relatively small and therefore did not affect the AHC associated with the block.

[0065] In another example, the selection algorithm 415 may determine to perform a garbage collection procedure on a block associated with AHC2. For exemplary purposes only, block 410-d may be associated with AHC2. The selection algorithm 415 may select block 410-d and move its data to a separate free block so that block 410-d may be erased (e.g., making it available for subsequent writing). In some examples, the block 410-d may be removed from the erased pool (e.g., as described in reference to FIG. 1 ). Figure 3 A blank block is selected from the erased pool 330) in question.

[0066] As discussed herein, counter 420 may be incremented each time a write command associated with each data segment stored to block 410-d is transmitted. That is, counter 420 may determine that block 410-d is associated with five (5) ID1s, two (2) ID2s, and three (3) ID3s. Because block 410-d was initially associated with AHC2, and counter 420 identified that the majority of the data for the block is associated with AHC1, the AHC for block 410-c may be updated. For example, selection algorithm 415 may update the AHC for block 410-d to AHC1, which may be associated with a different pointer (e.g., pointer 405-a). Updating the AHC may indicate that the data on the block associated with a given AHC is greater than the amount of data associated with other AHCs.

[0067] Figure 5An exemplary machine of a computer system 500 according to examples as disclosed herein that supports elastic buffers for media management is shown. The computer system 500 may include a set of instructions to cause the machine to perform any one or more of the techniques described herein. In some examples, the computer system 500 may correspond to a host system (e.g., reference Figure 1 105), which includes a memory subsystem (e.g., reference Figure 1 The memory subsystem 110 described above, coupled to or utilizing the memory subsystem, or can be used to perform operations of the controller (e.g., execute an operating system to perform operations corresponding to the reference Figure 1 In some examples, the machine may be connected (e.g., networked) to other machines in a Local Area Network (LAN), an intranet, an extranet, and / or the Internet. The machine may operate in the capacity of a server or a client machine in a client-server network environment, as a peer machine in a peer-to-peer (or distributed) network environment, or as a server or a client machine in a cloud computing infrastructure or environment.

[0068] The machine may be a personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a cellular phone, a network appliance, a server, a network router, a switch or a bridge, or any machine capable of executing a set of instructions (in sequence or otherwise) that specify actions to be taken by the machine. Further, while a single machine is shown, the term "machine" may also include any collection of machines that individually or jointly execute a set of instructions (or multiple sets of instructions) to perform any one or more of the methodologies discussed herein.

[0069] The exemplary computer system 500 may include a processing device 505, a main memory 510 (e.g., ROM, flash memory, DRAM such as SDRAM or Rambus DRAM (RDRAM), etc.), a static memory 515 (e.g., flash memory, static RAM (SRAM), etc.), and a data storage system 525 that communicate with each other via a bus 545.

[0070] Processing device 505 represents one or more general processing devices, such as a microprocessor, a central processing unit, etc. More specifically, the processing device can be a complex instruction set computing (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIW) microprocessor, or a processor that implements other instruction sets or a processor that implements a combination of instruction sets. Processing device 505 can also be one or more special-purpose processing devices, such as ASIC, FPGA, DSP, network processor, etc. Processing device 505 is configured to execute instructions 535 for performing the operations and steps discussed herein. Computer system 500 can further include a network interface device 520 to communicate via a network 540.

[0071] The data storage system 525 may include a machine-readable storage medium 530 (also referred to as a computer-readable medium) on which is stored one or more sets of instructions 535 or software embodying any one or more of the methods or functions described herein. The instructions 535 may also reside, completely or at least partially, within the main memory 510 and / or within the processing device 505 during execution of the instructions by the computer system 500, the main memory 510 and the processing device 505 also constituting machine-readable storage media. The machine-readable storage medium 530, the data storage system 525, and / or the main memory 510 may correspond to a memory subsystem.

[0072] In one example, instructions 535 include instructions for implementing instructions corresponding to buffer manager 550 (eg, reference Figure 1 The term "machine-readable storage medium" may include any medium that can store or encode a set of instructions for execution by a machine and cause the machine to perform any one or more of the methods of the present disclosure. The term "machine-readable storage medium" may include, but is not limited to, solid-state memory, optical media, and magnetic media.

[0073] Some parts of the foregoing detailed description have been presented in terms of algorithms and symbolic representations of the operations on the data bits in a computer memory. These algorithmic descriptions and representations are the means by which those skilled in the art of data processing use to most effectively communicate the substance of their work to other persons skilled in the art. Algorithms are here and are generally considered to be self-consistent sequences of operations that lead to desired results. These operations are those operations that require physical manipulation of physical quantities. Typically, although not necessarily, these quantities take the form of electrical or magnetic signals that can be stored, combined, compared, and otherwise manipulated. It has been shown that sometimes, in principle, it is convenient to refer to these signals as bits, values, elements, symbols, characters, items, quantities, etc. for general reasons.

[0074] It should be borne in mind, however, that all of these or similar terms will be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. The present disclosure may refer to the actions and processes of a computer system or similar electronic computing device that manipulates and transforms data represented as physical (electronic) quantities within the computer system's registers and memories into other data similarly represented as physical quantities within the computer system's memories or registers or other such information storage systems.

[0075] The present disclosure also relates to an apparatus for performing the operations herein. Such an apparatus may be specifically constructed for the intended purpose, or it may comprise a general purpose computer selectively activated or reconfigured by a computer program stored in the computer. Such a computer program may be stored in a computer readable storage medium, such as but not limited to any type of disk including a floppy disk, an optical disk, a CD-ROM, and a magneto-optical disk, a ROM, a RAM, an EPROM, an EEPROM, a magnetic card or an optical card, or any type of medium suitable for storing electronic instructions, all of which are each coupled to a computer system bus.

[0076] The algorithms and displays presented herein are not inherently associated with any particular computer or other device. Various general purpose systems can be used together with programs according to the teachings herein, or it may be convenient to construct more specialized equipment to perform the method. As described below, structures for various of these systems will occur. In addition, the present disclosure is not described with reference to any particular programming language. It should be understood that various programming languages ​​can be used to implement the teachings of the present disclosure as described herein.

[0077] The present disclosure may be provided as a computer program product or software, which may include a machine-readable medium having instructions stored thereon, which may be used to program a computer system (or other electronic device) to perform a process according to the present disclosure. A machine-readable medium includes any mechanism for storing information in a form readable by a machine (e.g., a computer). In some examples, a machine-readable (e.g., computer-readable) medium includes a machine (e.g., computer) readable storage medium, such as ROM, RAM, disk storage media, optical storage media, flash memory components, etc.

[0078] In the foregoing description, examples of the present disclosure have been described with reference to specific exemplary examples of the present disclosure. It will be apparent that various modifications may be made thereto without departing from the broader scope and spirit of the examples of the present disclosure as set forth in the following claims. Therefore, this specification and the accompanying drawings should be understood in an illustrative sense rather than a restrictive sense.

Claims

1. A method comprising: receiving a write command to write data associated with the data stream into a target block of memory cells; incrementing an access counter for the target block of memory cells based at least in part on writing at least a portion of the data, wherein the access counter corresponds to the data stream; as well as In conjunction with a garbage collection operation, a plurality of memory cell blocks including the memory cell target block are selected based at least in part on a value of the access counter, wherein each memory cell block in the plurality is associated with the data stream.

2. The method according to claim 1, further comprising: In conjunction with the garbage collection operation and based at least in part on selecting the plurality of memory cell blocks, a plurality of write commands are issued, wherein each write command includes an instruction to write corresponding data stored in a corresponding memory cell block of the plurality of memory cell blocks to a corresponding target address of a memory subsystem.

3. The method according to claim 1, further comprising: identifying an associated master pointer identifier based at least in part on a mapping between a plurality of data stream identifiers and a plurality of associated master pointer identifiers; generating a command including the associated master pointer identifier to write the portion of the data to the target block of memory cells, wherein the access counter is incremented based at least in part on writing the portion of the data; as well as The associated master pointer identifier is assigned to the memory unit target block.

4. The method according to claim 3, wherein: The write command includes a data stream identifier from the plurality of data stream identifiers, wherein the data stream identifier is associated with the data stream; and The data stream identifier is mapped to the associated master pointer identifier.

5. The method according to claim 4, further comprising: determining whether the data flow identifier is contained in the mapping; as well as The mapping is updated to include the data flow identifier and the associated master pointer identifier based at least in part on a determination that the data flow identifier is not included in the mapping.

6. The method according to claim 3, further comprising: receiving a second write command to write second data associated with a second data stream to the target block of memory cells; incrementing a second access counter for the memory cell target block based at least in part on writing at least a portion of the second data to the memory cell target block, wherein the second access counter corresponds to the second data stream; as well as A second master pointer identifier associated with the second data stream is assigned to the memory unit target block.

7. The method according to claim 6, further comprising: A determination is made as to whether the value of the access counter is greater than the value of the second access counter, wherein the associated primary pointer identifier is assigned to the memory cell target block based at least in part on determining that the value of the access counter is greater than the value of the second access counter.

8. A device comprising: a controller associated with the memory device, wherein the controller is configured to cause the apparatus to: receiving a write command to write data associated with the data stream into a target block of memory cells; incrementing an access counter for the target block of memory cells based at least in part on writing at least a portion of the data, wherein the access counter corresponds to the data stream; as well as In conjunction with a garbage collection operation, a plurality of memory cell blocks including the memory cell target block are selected based at least in part on a value of the access counter, wherein each memory cell block in the plurality is associated with the data stream.

9. The apparatus of claim 8, wherein the controller is further configured to reference the apparatus: In conjunction with the garbage collection operation and based at least in part on selecting the plurality of memory cell blocks, a plurality of write commands are issued, wherein each write command includes an instruction to write corresponding data stored in a corresponding memory cell block of the plurality of memory cell blocks to a corresponding target address of a memory subsystem.

10. The apparatus of claim 8, wherein the controller is further configured to reference the apparatus: identifying an associated master pointer identifier based at least in part on a mapping between a plurality of data stream identifiers and a plurality of associated master pointer identifiers; generating a command including the associated master pointer identifier to write the portion of the data to the memory cell target block, wherein the access counter is incremented based at least in part on writing the portion of the data; and The associated master pointer identifier is assigned to the memory unit target block.

11. The apparatus of claim 10, wherein: The write command includes a data stream identifier from the plurality of data stream identifiers, wherein the data stream identifier is associated with the data stream; and The data stream identifier is mapped to the associated master pointer identifier.

12. The apparatus of claim 11, wherein the controller is further configured to reference the apparatus: determining whether the data flow identifier is contained in the mapping; and The mapping is updated to include the data flow identifier and the associated master pointer identifier based at least in part on a determination that the data flow identifier is not included in the mapping.

13. The apparatus of claim 12, wherein the controller is further configured to reference the apparatus: receiving a second write command to write second data associated with a second data stream to the target block of memory cells; incrementing a second access counter for the memory cell target block based at least in part on writing at least a portion of the second data to the memory cell target block, wherein the second access counter corresponds to the second data stream; and A second master pointer identifier associated with the second data stream is assigned to the memory unit target block.

14. The apparatus of claim 13, wherein the controller is further configured to reference the apparatus: A determination is made as to whether the value of the access counter is greater than the value of the second access counter, wherein the associated primary pointer identifier is assigned to the memory cell target block based at least in part on determining that the value of the access counter is greater than the value of the second access counter.

15. A non-transitory computer-readable storage medium storing code, the code comprising instructions executed by a processor to: receiving a write command to write data associated with the data stream into a target block of memory cells; incrementing an access counter for the target block of memory cells based at least in part on writing at least a portion of the data, wherein the access counter corresponds to the data stream; and In conjunction with a garbage collection operation, a plurality of memory cell blocks including the memory cell target block are selected based at least in part on a value of the access counter, wherein each memory cell block in the plurality is associated with the data stream.

16. The non-transitory computer-readable storage medium of claim 15, wherein the instructions are further executable by the processor to: In conjunction with the garbage collection operation and based at least in part on selecting the plurality of memory cell blocks, a plurality of write commands are issued, wherein each write command includes an instruction to write corresponding data stored in a corresponding memory cell block of the plurality of memory cell blocks to a corresponding target address of a memory subsystem.

17. The non-transitory computer-readable storage medium of claim 15, wherein the instructions are further executable by the processor to: identifying an associated master pointer identifier based at least in part on a mapping between a plurality of data stream identifiers and a plurality of associated master pointer identifiers; generating a command including the associated master pointer identifier to write the portion of the data to the memory cell target block, wherein the access counter is incremented based at least in part on writing the portion of the data; and The associated master pointer identifier is assigned to the memory unit target block.

18. The non-transitory computer-readable storage medium of claim 17, wherein: The write command includes a data stream identifier from the plurality of data stream identifiers, wherein the data stream identifier is associated with the data stream; and The data stream identifier is mapped to the associated master pointer identifier.

19. The non-transitory computer-readable storage medium of claim 18, wherein the instructions are further executable by the processor to: determining whether the data flow identifier is contained in the mapping; and The mapping is updated to include the data flow identifier and the associated master pointer identifier based at least in part on a determination that the data flow identifier is not included in the mapping.

20. The non-transitory computer-readable storage medium of claim 17, wherein the instructions are further executable by the processor to: receiving a second write command to write second data associated with a second data stream to the target block of memory cells; incrementing a second access counter for the memory cell target block based at least in part on writing at least a portion of the second data to the memory cell target block, wherein the second access counter corresponds to the second data stream; and A second master pointer identifier associated with the second data stream is assigned to the memory unit target block.

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