Memory management method, device and equipment applied to relay protection device

Abstract

The invention provides a memory management method, device and equipment applied to a relay protection device, and relates to the field of intelligent equipment of a power system. According to the memory management method applied to the relay protection device, memories of the relay protection device comprise a user space memory, a kernel space memory and a physical memory, and the management method comprises the steps that mapping relations between the physical memory and the user space memory and between the physical memory and the kernel space memory are built; based on the mapping relation, executing read-write operation of a process running on the user space memory on the physical memory through the kernel space memory; and detecting the physical memory based on the read-write operation. According to the embodiment of the invention, the requirement of the complex service function of the secondary equipment of the power system on quick, real-time and reliable storage can be met through the existing CPU and chip.

Description

Technical Field

[0001] The present application relates to the field of intelligent devices in power systems, and more specifically, to a memory management method, device and equipment applied to relay protection devices. Background Art

[0002] During operation, the relay protection device may generate events, reports and other information, which have strict requirements on the storage cycle and need to be stored at high speed. In addition, the information needs to be reliably saved when the relay protection device loses power so that it can be restored after the next power-on.

[0003] At present, non-domestic platforms generally use NVSRAM (Non-volatile SRAM) or FRAM (Ferroelectric RAM) devices to achieve non-volatile high-speed storage. For domestically produced self-controlled platforms, due to chip design and production capacity reasons, there is a lack of purely domestic FRAM or NVSRAM devices. In addition, the number of peripheral bus interfaces of domestic CPU devices is limited, and there are not enough interfaces to connect to the corresponding chips.

[0004] Therefore, it is necessary to design a method to replace non-volatile random static storage devices such as NVSRAM or FRAM to overcome the limitation of the lack of autonomous and controllable hardware devices, so as to achieve the purpose of meeting the needs of fast, real-time and reliable storage of complex business functions of secondary equipment in power systems through existing CPUs and peripheral chips. Summary of the invention

[0005] According to one aspect of the present application, a memory management method applied to a relay protection device is provided, wherein the memory of the relay protection device includes user space memory, kernel space memory and physical memory, and the memory management method includes: constructing a mapping relationship between the physical memory and the user space memory and the kernel space memory, respectively; based on the mapping relationship, executing read and write operations on the physical memory by a process running on the user space memory through the kernel space memory; and detecting the physical memory based on the read and write operations.

[0006] According to some embodiments, the physical memory includes a Flash memory and a DDR memory; a mapping relationship between the physical memory and the user space memory and the kernel space memory is constructed, including: obtaining the SRAM space in the DDR memory; mapping the SRAM space in the DDR memory to the user space memory; and mapping the SRAM space in the DDR memory to the kernel space memory.

[0007] According to some embodiments, before executing read and write operations on physical memory by a process running on user space memory through kernel space memory based on a mapping relationship, the method also includes: when the relay protection device is powered on, obtaining SRAM data stored in the Flash memory; saving the SRAM data to the kernel space memory; based on the mapping relationship between physical memory and kernel space memory, saving the SRAM data in the kernel space memory to the SRAM space in the DDR memory; based on the mapping relationship between physical memory and user space memory, saving the SRAM data in the SRAM space in the DDR memory to the user space memory.

[0008] According to some embodiments, the SRAM space in the DDR memory is divided into multiple data blocks, each of the multiple data blocks includes multiple data pages, and the multiple data pages are backed up in the Flash memory; when the relay protection device is powered on, the SRAM data stored in the Flash memory is obtained, including: traversing the data pages in the backup and obtaining the write sequence numbers corresponding to the data pages in the backup; according to preset rules, the corresponding data pages are obtained according to the write sequence numbers to generate SRAM data.

[0009] According to some embodiments, based on the mapping relationship, the read and write operations of the process running on the user space memory on the physical memory are executed through the kernel space memory, including: when the relay protection device is running, based on the mapping relationship between the physical memory and the user space memory, the read and write operations of the process running on the user space memory on the SRAM space in the DDR memory are executed.

[0010] According to some embodiments, the SRAM space in the DDR memory is divided into multiple data blocks, each of the multiple data blocks includes multiple data pages, and the multiple data pages are backed up in the Flash memory; based on the read and write operations, the physical memory is detected, including: detecting the multiple data blocks to determine whether the multiple data blocks are overwritten by the process running on the user space memory; obtaining the overwritten data pages corresponding to the overwritten data blocks in the multiple data blocks; and synchronizing the overwritten data pages to the Flash memory.

[0011] According to some embodiments, when the relay protection device is powered on, the usage of multiple data blocks is detected to determine whether the multiple data blocks can be used to store data; and when the relay protection device is powered off, the SRAM data not saved in the DDR memory is saved in the Flash memory.

[0012] According to one aspect of the present application, a memory management device applied to a relay protection device is provided, wherein the memory of the relay protection device includes user space memory, kernel space memory and physical memory, and the memory management device includes: a mapping module, which is used to construct a mapping relationship between the physical memory and the user space memory and the kernel space memory respectively; a driver module, which is used to execute read and write operations of the physical memory by a process running on the user space memory through the kernel space memory based on the mapping relationship; and a management module, which is used to detect the physical memory based on the read and write operations.

[0013] According to one aspect of the present application, an electronic device is provided, comprising: one or more processors; a storage device for storing one or more programs; when the one or more programs are executed by the one or more processors, the one or more processors implement the aforementioned method.

[0014] According to one aspect of the present application, a computer-readable storage medium is provided, on which a computer program or instruction is stored. When the computer program or instruction is executed by a processor, the aforementioned method is implemented.

[0015] According to the embodiments of the present application, by establishing a mapping between physical memory and user space memory, as well as between physical memory and kernel space memory, effective management of the memory of the relay protection device can be achieved in the form of a software program to replace the existing hardware memory management solution based on non-volatile storage devices. The implementation process is simple, fast, safe and reliable, and the storage hardware requirements of the relay protection device are low.

[0016] It should be understood that the foregoing general description and the following detailed description are exemplary only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application.

[0018] Figure 1 A schematic diagram of the memory structure of a relay protection device according to an exemplary embodiment of the present application is shown.

[0019] Figure 2 A flow chart of a memory management method applied to a relay protection device according to an exemplary embodiment of the present application is shown.

[0020] Figure 3A , 3B A schematic diagram of data page storage according to an exemplary embodiment of the present application is shown.

[0021] Figure 4A block diagram of a memory management device applied to a relay protection device according to an exemplary embodiment of the present application is shown.

[0022] Figure 5 A block diagram of an electronic device according to an exemplary embodiment of the present application is shown. DETAILED DESCRIPTION

[0023] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this application will be comprehensive and complete and will fully convey the concepts of the example embodiments to those skilled in the art. The same reference numerals in the figures represent the same or similar parts, and thus their repeated description will be omitted.

[0024] The described features, structures or characteristics may be combined in one or more embodiments in any suitable manner. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present application. However, those skilled in the art will appreciate that the technical scheme of the present application may be put into practice without one or more of these specific details, or other modes, components, materials, devices or operations may be adopted. In these cases, known structures, methods, devices, realizations, materials or operations will not be shown or described in detail.

[0025] The flowcharts shown in the accompanying drawings are only exemplary and do not necessarily include all the contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps can be decomposed, and some operations / steps can be combined or partially combined, so the actual execution order may change according to actual conditions.

[0026] The terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally includes steps or units that are not listed, or optionally includes other steps or units inherent to these processes, methods, products or devices.

[0027] The present application provides a memory management method, device and equipment applied to a relay protection device, which can be used to replace a non-volatile high-speed random access memory device to perform memory management of the relay protection device.

[0028] A memory management method, device and apparatus for a relay protection device according to an embodiment of the present application will be described in detail below with reference to the accompanying drawings.

[0029] This application refers to the following terms:

[0030] SRAM (Static Random-Access Memory): A type of random access memory. As long as the power is on, the data stored in SRAM can be kept permanently. When the power supply stops, the data stored in SRAM will disappear.

[0031] mmap: A standard interface of the Linux operating system, through which programs running in user space memory can directly access physical memory.

[0032] ioremap: A standard interface of the Linux operating system, through which drivers running in kernel space memory can access physical memory.

[0033] Figure 1 A schematic diagram of the memory structure of a relay protection device according to an exemplary embodiment of the present application is shown.

[0034] like Figure 1 As shown, the memory of the relay protection device includes a user space memory 100 , a kernel space memory 200 and a physical memory 300 .

[0035] The physical memory 300 includes a Flash memory 310 and a DDR memory 320 .

[0036] The Flash memory 310 includes a file system area 311 and an SRAM replacement area 312. The file system area 311 mounts a normal file system for general storage of the relay protection device.

[0037] According to some embodiments, the size of the SRAM replacement area 312 can be adjusted according to the power-off write-back capability of the relay protection device. For example, for a system with strong power-off write-back capability, the size of the SRAM replacement area 312 can be appropriately increased.

[0038] The DDR memory 320 includes an SRAM space 321 for storing SRAM data.

[0039] Memory Management Device ( Figure 1 (not shown) constructs a mapping relationship between the SRAM space 321 and the user space memory 100, so that the process running on the user space memory 100 can directly access the physical memory 300 through the address pointer.

[0040] According to some embodiments, the write and read operations of the process on the user space memory 100 on the physical memory 300 are all performed through the DDR memory 320 to achieve high-speed physical memory read and write operations.

[0041] The memory management device constructs a mapping relationship from the SRAM space 321 to the kernel space memory 200 to maintain data consistency between the user space memory 100 and the Flash memory 310 .

[0042] When the relay protection device is powered on, the memory management device first restores the SRAM data in the SRAM replacement area 312 to the kernel space memory 200. Then, through the mapping relationship between the SRAM space 321 and the kernel space memory 200, the memory management device saves the SRAM data to the SRAM space 321 in the DDR memory 320. Finally, through the mapping relationship between the SRAM space 321 and the user space memory 100, the memory management device saves the SRAM data from the SRAM space 321 to the user space memory 100.

[0043] When the relay protection device loses power, the CPU of the relay protection device system ( Figure 1 Not shown) according to the power plug ( Figure 1 The memory management device writes back the SRAM data that has been modified in the interrupt logic but not yet saved in the physical memory 300 to the SRAM replacement area 312 of the Flash memory 310 to achieve power-off retention of the relay protection device system.

[0044] Figure 2 A flow chart of a memory management method applied to a relay protection device according to an exemplary embodiment of the present application is shown.

[0045] like Figure 2 As shown, in step S110, the memory management device constructs a mapping relationship between the physical memory and the user space memory and the kernel space memory respectively.

[0046] For example, in step S110, the memory management device constructs mapping relationships between the SRAM space in the DDR memory in the physical memory and the user space memory and the kernel space memory respectively.

[0047] The memory management device first determines the SRAM space in the DDR memory of the physical memory.

[0048] According to some embodiments, the physical memory includes a Flash memory and a DDR memory, wherein the Flash memory includes an independent SRAM replacement area for writing back and saving SRAM data, and the DDR memory includes an SRAM space for storing SRAM data.

[0049] The memory management device maps the SRAM space in the DDR memory to the user space memory to implement the read and write operations of the process running on the user space memory on the physical memory.

[0050] According to some embodiments, the SRAM space in the DDR memory may be mapped to the user space memory using the mmap mapping method.

[0051] Likewise, the memory management device maps the SRAM space in the DDR memory to the kernel space memory, so that the kernel driver running in the kernel space memory maintains the consistency of data between the user space memory and the Flash memory in the physical memory.

[0052] According to some embodiments, the SRAM space in the DDR memory may be mapped to the kernel space memory using the ioremap mapping method.

[0053] In step S120, based on the mapping relationship, the memory management device executes the read and write operations of the process running in the user space memory on the physical memory through the kernel space memory.

[0054] For example, in step S120, when the relay protection device is running, based on the mapping relationship between the physical memory and the user space memory, the memory management device executes the read and write operations of the process running on the user space memory on the SRAM space in the DDR memory.

[0055] First, when the relay protection device is powered on, the memory management device obtains the SRAM data stored in the Flash memory of the physical memory.

[0056] According to some embodiments, the SRAM space in the DDR memory of the physical memory is divided into a plurality of data blocks, wherein each data block includes a plurality of data pages. Furthermore, the plurality of data pages in the SRAM space in the DDR memory are backed up in the Flash memory accordingly.

[0057] According to some embodiments, the memory management device traverses the backup data pages in the Flash memory and obtains the write sequence number (ie, write_cnt) corresponding to the backup data page. The larger the write sequence number, the newer the corresponding written data page.

[0058] Furthermore, the memory management device arranges the backed-up data pages according to the corresponding write sequence numbers according to a preset rule to combine them into SRAM data. For example, the memory management device may first query the maximum value of the write sequence numbers corresponding to the backed-up data pages, and obtain the corresponding data pages in descending order of the write sequence numbers to combine them into SRAM data and store them in the SRAM replacement area in the Flash memory.

[0059] The memory management device saves the SRAM data stored in the Flash memory to the kernel space memory.

[0060] Furthermore, based on the mapping relationship between the physical memory and the kernel space memory, the memory management device saves the SRAM data in the kernel space memory to the SRAM space in the DDR memory. Furthermore, based on the mapping relationship between the physical memory and the user space memory, the memory management device saves the SRAM data in the SRAM space in the DDR memory to the user space memory.

[0061] When the relay protection device is running, the memory management device executes the access of the process running on the user space memory to the DDR memory, and based on the mapping relationship between the physical memory and the user space memory, executes the read and write operations of the process running on the user space memory on the SRAM space in the DDR memory.

[0062] According to some embodiments, a process running on the user space memory accesses SRAM data stored in the SRAM space in the DDR memory through an address pointer, and its writing and reading operations are performed through the DDR memory.

[0063] In step S130, based on the read and write operations, the memory management device detects the physical memory.

[0064] For example, in step S130, the memory management device detects the physical memory according to the read and write operations of the process running on the user space memory.

[0065] When a process running on the user space memory performs read and write operations on the physical memory, the memory management device detects whether a plurality of data blocks and data pages in the data blocks in the SRAM space in the DDR memory are rewritten by the process.

[0066] According to some embodiments, the memory management device detects dirty flags of multiple data pages in the SRAM space in the DDR memory through a kernel driver running in the kernel space memory to determine whether the data pages and corresponding data blocks have been modified by the process running in the user space memory.

[0067] Then, the memory management device synchronously stores the modified data page in the Flash memory.

[0068] For example, the data block status of the SRAM replacement area in the Flash memory that is synchronized with the data block in the SRAM space in the DDR memory is as follows: Figure 3A As shown, data block X includes multiple data pages, Page_no=2, Page_no=3, ..., Page_no=n, and the write sequence numbers corresponding to the data pages are write_cnt=10, write_cnt=18, ..., write_cnt=87. In addition, there is no free page in data block X.

[0069] Data block Y is adjacent to data block X, and includes a data page Page_no=m (corresponding write sequence number write_cnt=1) and a plurality of free pages.

[0070] Assume that after determining that the data page Page_no=3 of the SRAM space in the DDR memory is rewritten, the memory management device obtains the free page in the data block Y of the SRAM replacement area in the Flash memory. Then, the memory management device synchronizes the data page Page_no=3 of the SRAM space in the DDR memory to the free page and writes it to a sequence number plus 1 (i.e., changes from write_cnt=18 to write_cnt=19). Figure 3B shown.

[0071] When the relay protection device is powered on, the memory management device first detects whether the multiple data blocks in the DDR memory can store data.

[0072] According to some embodiments, each time the relay protection device is powered on, the memory management device regenerates the linked list based on the multiple data blocks in the DDR memory to save the data blocks that are damaged after multiple uses.

[0073] The linked lists generated by the memory management device include a bad block linked list, a to-be-erased block linked list, a free block linked list, and a set of blocks in use. Among them, the to-be-erased linked list is a set of blocks with invalid data when powered on, or a set of blocks removed from the blocks in use when the process triggers a write-back operation. The free block linked list is a set of all unused blocks. The set of blocks in use is the blocks that currently store data.

[0074] During the operation of the relay protection device, the memory management device recycles usable data blocks and adds the reclaimed data blocks to a linked list of blocks to be erased.

[0075] According to some embodiments, the usable data blocks include data blocks that have changed from a non-idle state to an idle state (ie, there are no data pages in use in the data blocks) and data blocks whose page programming has failed.

[0076] The memory management device erases the data blocks in the to-be-erased block list. The successfully erased data blocks enter the free block list for data storage. The failed erased data blocks enter the bad block list and are no longer used for data storage.

[0077] When the relay protection device loses power, the memory management device saves the SRAM data not saved in the DDR memory to the Flash memory, so as to complete the power-off retention operation within the time period when the power drops to the point where the system CPU of the relay protection device completely stops executing instructions.

[0078] According to the embodiments of the present application, effective management of the memory of the relay protection device can be achieved in the form of a software program by establishing a mapping between the physical memory and the user space memory, and between the physical memory and the kernel space memory.

[0079] Figure 4 A block diagram of a memory management device applied to a relay protection device according to an exemplary embodiment of the present application is shown.

[0080] like Figure 4 As shown, the memory management device 400 includes a mapping module 410 , a driving module 420 and a management module 430 .

[0081] The mapping module 410 determines the SRAM space in the DDR memory of the physical memory.

[0082] The mapping module 410 maps the SRAM space in the DDR memory to the user space memory to implement the read and write operations of the process running on the user space memory to the physical memory.

[0083] The mapping module 410 maps the SRAM space in the DDR memory to the kernel space memory, so that the kernel driver running in the kernel space memory maintains the consistency of data between the user space memory and the Flash memory in the physical memory.

[0084] When the relay protection device is powered on, the driving module 420 obtains the SRAM data stored in the Flash memory of the physical memory.

[0085] The driver module 420 saves the SRAM data stored in the Flash memory to the kernel space memory.

[0086] Based on the mapping relationship between the physical memory and the kernel space memory, the driver module 420 saves the SRAM data in the kernel space memory to the SRAM space in the DDR memory.

[0087] Based on the mapping relationship between the physical memory and the user space memory, the driver module 420 saves the SRAM data in the SRAM space in the DDR memory to the user space memory.

[0088] When the relay protection device is running, the driver module 420 executes the access of the process running on the user space memory to the DDR memory, and based on the mapping relationship between the physical memory and the user space memory, executes the read and write operations of the process running on the user space memory on the SRAM space in the DDR memory.

[0089] When a process running on the user space memory performs read and write operations on the physical memory, the management module 430 detects whether a plurality of data blocks and data pages in the data blocks in the SRAM space in the DDR memory are rewritten by the process.

[0090] The management module 430 synchronously stores the modified data page in the Flash memory.

[0091] When the relay protection device is powered on, the management module 430 detects whether the multiple data blocks in the DDR memory can store data.

[0092] When the relay protection device loses power, the management module 430 saves the SRAM data that has not been saved to the DDR memory to the Flash memory.

[0093] Figure 5 A block diagram of an electronic device according to an exemplary embodiment of the present application is shown.

[0094] like Figure 5 As shown, the electronic device 600 is merely an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0095] like Figure 5 As shown, the electronic device 600 is in the form of a general-purpose computing device. The components of the electronic device 600 may include, but are not limited to: at least one processing unit 610, at least one storage unit 620, a bus 630 connecting different system components (including the storage unit 620 and the processing unit 610), a display unit 640, etc. The storage unit stores program codes, which can be executed by the processing unit 610, so that the processing unit 610 executes the methods described in this specification according to various exemplary embodiments of the present application. For example, the processing unit 610 may execute the following: Figure 2 The method shown in .

[0096] The storage unit 620 may include a readable medium in the form of a volatile storage unit, such as a random access memory unit (RAM) 6201 and / or a cache memory unit 6202 , and may further include a read-only memory unit (ROM) 6203 .

[0097] The storage unit 620 may also include a program / utility 6204 having a set (at least one) of program modules 6205, such program modules 6205 including but not limited to: an operating system, one or more application programs, other program modules, and program data, each of which or some combination may include an implementation of a network environment.

[0098] Bus 630 may represent one or more of several types of bus structures, including a memory unit bus or memory unit controller, a peripheral bus, an accelerated graphics port, a processing unit, or a local bus using any of a variety of bus architectures.

[0099] The electronic device 600 may also communicate with one or more external devices 700 (e.g., keyboards, pointing devices, Bluetooth devices, etc.), may also communicate with one or more devices that enable a user to interact with the electronic device 600, and / or communicate with any device that enables the electronic device 600 to communicate with one or more other computing devices (e.g., routers, modems, etc.). Such communication may be performed via an input / output (I / O) interface 650. Furthermore, the electronic device 600 may also communicate with one or more networks (e.g., a local area network (LAN), a wide area network (WAN), and / or a public network, such as the Internet) via a network adapter 660. The network adapter 660 may communicate with other modules of the electronic device 600 via a bus 630. It should be understood that, although not shown in the figure, other hardware and / or software modules may be used in conjunction with the electronic device 600, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems.

[0100] Through the description of the above implementation methods, it is easy for those skilled in the art to understand that the example embodiments described here can be implemented by software, or by combining software with necessary hardware. The technical solution according to the embodiment of the present application can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (which can be a CD-ROM, a USB flash drive, a mobile hard disk, etc.) or on a network, including several instructions to enable a computing device (which can be a personal computer, a server, a mobile terminal or a network device, etc.) to execute the method according to the embodiment of the present application.

[0101] The software product may use any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. The readable storage medium may be, for example, but not limited to, a system, device or device of electricity, magnetism, light, electromagnetic, infrared, or semiconductor, or any combination thereof. More specific examples (non-exhaustive list) of readable storage media include: an electrical connection with one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof.

[0102] Computer readable storage media may include data signals propagated in baseband or as part of a carrier wave, wherein readable program codes are carried. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. The readable storage medium may also be any readable medium other than a readable storage medium, which may send, propagate, or transmit a program for use by or in conjunction with an instruction execution system, device, or device. The program codes contained on the readable storage medium may be transmitted using any suitable medium, including but not limited to wireless, wired, optical cable, RF, etc., or any suitable combination thereof.

[0103] Program code for performing the operations of the present application may be written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java, C++, etc., and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user computing device, partially on the user device, as a separate software package, partially on the user computing device and partially on a remote computing device, or entirely on a remote computing device or server. In the case of a remote computing device, the remote computing device may be connected to the user computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0104] The computer-readable medium carries one or more programs. When the one or more programs are executed by a device, the computer-readable medium implements the aforementioned functions.

[0105] Those skilled in the art will appreciate that the above modules can be distributed in the device according to the description of the embodiment, or can be changed accordingly and only used in one or more devices different from the embodiment. The modules of the above embodiments can be combined into one module, or further divided into multiple sub-modules.

[0106] The embodiments of the present application are described in detail above, and the description of the above embodiments is only used to help understand the method and core idea of ​​the present application. At the same time, changes or deformations made by those skilled in the art based on the idea of ​​the present application, the specific implementation method and the scope of application of the present application, all belong to the scope of protection of the present application. In summary, the content of this specification should not be construed as limiting the present application.

Claims

1. A memory management method applied to a relay protection device, characterized in that: The memory of the relay protection device includes user space memory, kernel space memory and physical memory, and the method includes: Constructing mapping relationships between the physical memory and the user space memory and the kernel space memory respectively; Based on the mapping relationship, executing read and write operations of the process running on the user space memory on the physical memory through the kernel space memory; Based on the read and write operations, the physical memory is detected.

2. The method according to claim 1, characterized in that The physical memory includes a Flash memory and a DDR memory; Constructing a mapping relationship between the physical memory and the user space memory and the kernel space memory, respectively, including: Acquire the SRAM space in the DDR memory; Mapping the SRAM space in the DDR memory to the user space memory; and The SRAM space in the DDR memory is mapped to the kernel space memory.

3. The method according to claim 2, characterized in that Before executing the read and write operations of the process running on the user space memory on the physical memory through the kernel space memory based on the mapping relationship, the method further includes: When the relay protection device is powered on, acquiring the SRAM data stored in the Flash memory; Saving the SRAM data to the kernel space memory; Based on the mapping relationship between the physical memory and the kernel space memory, the SRAM data in the kernel space memory is saved to the SRAM space in the DDR memory; Based on the mapping relationship between the physical memory and the user space memory, the SRAM data in the SRAM space in the DDR memory is saved to the user space memory.

4. The method according to claim 3, characterized in that The SRAM space in the DDR memory is divided into a plurality of data blocks, each of the plurality of data blocks includes a plurality of data pages, and the plurality of data pages are backed up in the Flash memory; When the relay protection device is powered on, obtaining SRAM data stored in the Flash memory includes: Traversing the data pages in the backup, and obtaining the write sequence numbers corresponding to the data pages in the backup; According to a preset rule, a corresponding data page is obtained according to the write sequence number to generate the SRAM data.

5. The method according to claim 2, characterized in that: Based on the mapping relationship, executing the read and write operations of the process running on the user space memory on the physical memory through the kernel space memory includes: When the relay protection device is running, based on the mapping relationship between the physical memory and the user space memory, the process running on the user space memory performs read and write operations on the SRAM space in the DDR memory.

6. The method according to claim 5, characterized in that The SRAM space in the DDR memory is divided into a plurality of data blocks, each of the plurality of data blocks includes a plurality of data pages, and the plurality of data pages are backed up in the Flash memory; Based on the read and write operations, the physical memory is detected, including: detecting the plurality of data blocks to determine whether the plurality of data blocks are overwritten by a process running on the user space memory; Acquire a rewritten data page corresponding to a rewritten data block among the multiple data blocks; The rewritten data page is synchronized to the Flash memory.

7. The method according to claim 6, characterized in that Also includes: When the relay protection device is powered on, detecting usage of the multiple data blocks to determine whether the multiple data blocks can be used to store data; as well as When the relay protection device loses power, the SRAM data that has not been saved in the DDR memory is saved in the Flash memory.

8. A memory management device applied to a relay protection device, characterized in that: The memory of the relay protection device includes user space memory, kernel space memory and physical memory, and the memory management device includes: A mapping module, used to construct a mapping relationship between the physical memory and the user space memory and the kernel space memory respectively; A driver module, configured to execute, based on the mapping relationship, read and write operations of the process running on the user space memory on the physical memory through the kernel space memory; A management module is used to detect the physical memory based on the read and write operations.

9. An electronic device, characterized in that: include: one or more processors; A storage device for storing one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors implement the method according to any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program or instruction stored thereon, characterized in that: When the computer program or instruction is executed by a processor, the method according to any one of claims 1 to 7 is implemented.

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