Electronic device

Abstract

The invention discloses an electronic device which is provided with a plurality of light-emitting units, a plurality of sensing units and a sensing driving unit. The plurality of light-emitting units are disposed on the base plate. The plurality of sensing units are arranged corresponding to the plurality of light-emitting units, and the plurality of light-emitting units and the plurality of sensing units are arranged in the same area. The sensing driving unit is coupled to at least a part of the plurality of sensing units, and the plurality of light emitting units and the sensing driving unit are partially overlapped with each other.

Description

[0001] This application is a divisional application of the invention patent application with application date of March 12, 2020, application number 202010169047.6, and invention name “Display Device”. Technical Field

[0002] The present invention relates to a touch device, and in particular to an electronic device with a biometric recognition sensor. Background Art

[0003] The growing demand for information security and confidentiality has driven the use of biometrics in electronic devices such as smartphones, laptops, tablets, banking devices, and gaming consoles. Fingerprint recognition is a commonly used method for biometrics. In recent years, various electronic devices have adopted fingerprint sensors to allow device owners to unlock electronic devices through fingerprint authentication, protecting electronic devices from unauthorized access.

[0004] Conventionally, the fingerprint sensor is separated from the display screen on the display device, so that the display device can be unlocked by directly touching the fingerprint sensor on the screen-locked display device. However, display device manufacturers and users are very interested in integrating the fingerprint sensor into the display screen to increase the display area of ​​the display device and provide a display device with a narrow frame or frameless design.

[0005] Therefore, there is a need for a biometric sensor integrated into a display device to reduce the frame size of the display device while providing biometric identification to prevent unauthorized access to the display device. Summary of the invention

[0006] An embodiment of the present invention provides an electronic device having a plurality of light-emitting units, a plurality of sensing units, and a sensing driving unit. The plurality of light-emitting units are disposed on a substrate. The plurality of sensing units are disposed corresponding to the plurality of light-emitting units, and the plurality of light-emitting units and the plurality of sensing units are disposed in the same area. The sensing driving unit is coupled to at least a portion of the plurality of sensing units, and the plurality of light-emitting units and the sensing driving unit partially overlap each other. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 FIG. 4 is a block diagram of a display device according to an embodiment of the present invention.

[0008] Figure 2 show Figure 1 FIG. 1 is a top view of an embodiment of a circuit layout of a display device.

[0009] Figure 3 show Figure 2 FIG. 4 is a cross-sectional view of a circuit layout embodiment of a display device along the cutting line 3 - 3 ′.

[0010] Figure 4 show Figure 1 A top view of another circuit layout embodiment of a display device is shown in FIG.

[0011] Figure 5 show Figure 1 A top view of another circuit layout embodiment of a display device is shown in FIG.

[0012] Figure 6 show Figure 1 A top view of another circuit layout embodiment of a display device is shown in FIG.

[0013] Figure 7 show Figure 6 FIG. 4 is a cross-sectional view of a circuit layout embodiment of a display device along the cutting line 7 - 7 ′.

[0014] Figure 8 show Figure 6 FIG. 8 is a cross-sectional view of an embodiment of a circuit layout of a display device along the cutting line 8 - 8 ′.

[0015] Fig. 9 FIG. 4 is a circuit diagram of a gate driver according to an embodiment of the present invention.

[0016] Fig.10 show Figure 1 A top view of another circuit layout embodiment of overlapping transistors.

[0017] Fig.11 show Fig.10 FIG. 1 is a cross-sectional view of an embodiment of a circuit layout of a display device along a cutting line 11 - 11 ′.

[0018] Fig.12 show Figure 1 A top view of another circuit layout embodiment of overlapping transistors.

[0019] Fig.13 show Fig.12 FIG. 1 is a cross-sectional view of a circuit layout embodiment of a display device along a cutting line 13 - 13 ′.

[0020] Fig.14 show Figure 1 A cross-sectional view of a selected device of the device is shown in FIG.

[0021] Figures 15 to 17 show Figure 1 Three cross-sectional views of an embodiment of a circuit layout of a display device.

[0022] Explanation of reference numerals: 1-display device; 10-display area; 100-display unit; 102-display driving unit; 102a, 102b-display driving unit; 104-sensing unit; 106-sensing driving unit; 11-bottom edge; 12-side area; 12a to 12c-side sub-areas; 120-display gate driver; 120a, 120b-display sub-gate driver; 122-sensing gate driver; 122a, 122b-sensing sub-gate driver; 124-display data driver; 126-sensing data driver; 128-control circuit; 14, 70, 1160, 1400, Sa, Sb-substrate; 30-second insulating layer; 32-first insulating layer; 3-3', 7-7', 8-8', 11-11', 13-13'-cutting line; 400, 401, 420, 421, 500, 501, 520, 521-connectors; 628-integrated circuit; 71a, 71b, 110-shielding layer; 72, 74, 76-insulating layer; 80-anisotropic conductive adhesive; 81-first insulating layer; 82-contact pad; 83-second insulating layer; 84-anisotropic conductive adhesive particles; 85-connectors; 9-gate driver; 110a, 110b-shielding pattern; 1120a, 1120b, 1140a, 1140b-channel region; 1122a to 1122d, 1142a to 1142d-semiconductor layer; 1124, 1144-connectors; 1126a to 1126d, 1146a to 1146d - source / gate member; 1128a, 1128b, 1148a, 1148b - gate insulator; 1162, 1402 - buffer layer; 1164 - first insulating layer; 1166 - first gate insulating layer; 1168 - first interlayer dielectric; 1170 - second interlayer dielectric; 1172 - second insulating layer; 1174 - second gate insulating layer; 1176 - third interlayer dielectric; 1178 - fourth interlayer dielectric; 1180 - third insulating layer; 1404 - first gate insulator; 1406 - interlayer dielectric; 1408 - first back passivation layer; 1410 - second gate insulator; 1412 - second back Passivation layer; 1414-planarization layer; 1416-pixel positioning layer; 1418-cathode layer; 1419-inorganic layer; 1420-organic layer; 1421-inorganic layer; 1422-N+ doped layer; 1424-P doped layer; 1426-second gate electrode; 1428-second semiconductor layer; 1430-source / drain member; 1432-light shielding layer; 1434-semiconductor layer; 1436-second source / drain member; 1438-gate electrode; 1440-anode layer; 1442-inorganic light emitting diode layer; Cc-capacitor; Ldd[1] to Ldd[3]-display data lines; Ldr[1] and Ldr[2]-display gate lines; Lsd[1] and Lsd[2]-sense data lines;Lsr[1] and Lsr[2] - sensing gate lines; M1 to M4, 112a, 112b, 114a, 114b, 112a to 112d, 114a to 114d - transistors; Pd(1,1) to Pd(2,3) - display sub-pixels; Ps(1,1) to Ps(2,2) - sensing pixels; Q(1) - node; STV, CKV, GL1, GL2 and VGL - signals; X, Y, Z - directions. ; DETAILED DESCRIPTION

[0023] The following embodiments, in conjunction with the accompanying drawings, can clearly show the above and other technical contents, features and effects of the present invention. The specific implementation of the device will further understand the technical means and effects of achieving the above purposes. In addition, it should be understood that the present invention can be implemented by those skilled in the art, and all equivalent changes or modifications do not depart from the concept of the present invention covered by the claims.

[0024] In addition, the numbers used in the specification and claims, such as "first", "second" to "sixth", etc., are only used to describe the elements claimed for protection, and do not imply or indicate that the elements claimed for protection have previous numbers, nor do they imply or indicate the sequence between the elements of the claims and another element claimed for protection or the sequence between the steps of the manufacturing method. These numbers are used only to distinguish elements with the same name in the claims. When an element or layer is referred to as being "disposed on" another element or layer, it can be directly disposed on the other element or layer or there may be an intermediate element. Conversely, when an element is referred to as being "directly disposed on" another element or layer, the intermediate element or layer does not exist. The term "coupled to" used in the embodiment is equivalent to "electrically connected" in the present invention.

[0025] Figure 11 is a block diagram of a display device 1 in an embodiment of the present invention. The display device 1 has a display area 10 and a side area 12 adjacent to the display area 10. The display device 1 has a biometric sensor, which combines the functions of image display and image sensing on the display area 10. In one embodiment, the display device 1 can be a liquid crystal display (LCD) device, an organic light-emitting diode (OLED) display device, an inorganic light-emitting diode display device, a mini light-emitting diode display device (such as a mini light-emitting diode panel device, a micro light-emitting diode panel device or a quantum dot light-emitting diode panel device), but is not limited thereto. In another embodiment, the shape of the display area 10 or the display device 1 can be a square, a quadratic, a circular or any shape, but is not limited thereto. The display area 10 can be a display screen area of ​​the display device 1, and the side area 12 can be at least a part of a non-display area outside the display area 10. Specifically, the display device 1 includes multiple display units 100, multiple display driving units 102, multiple sensing units 104 and multiple sensing driving units 106, which are arranged in the display area 10, and a display gate driver 120, a sensing gate driver 122, a display data driver 124, a sensing data driver 126 and a control circuit 128, which are arranged in the side area 12.

[0026] The plurality of display driving units 102 may be thin film transistors, respectively used to drive the plurality of display units 100 to display images on the display area 10. The plurality of sensing driving units 106 may be thin film transistors, respectively used to drive the plurality of sensing units 104 to detect images, such as fingerprints, on the display area 10. In one embodiment, at least one thin film transistor includes an amorphous thin film transistor, a low-temperature polycrystalline silicon thin film transistor, or a metal oxide thin film transistor, but is not limited thereto. The display gate driver 120 may be coupled to a portion of the plurality of display units 100, and may include a plurality of first thin film transistors to select the display unit 100 through the corresponding display driving unit 102. The display data driver 124 may be coupled to the portion of the plurality of display units 100, and may include a plurality of multiplexers or switches to load image data to the selected display unit 100. Similarly, the sensing gate driver 122 may be coupled to a portion of the plurality of sensing units 104, and may include a plurality of second thin film transistors to select the sensing unit 104 through the corresponding sensing driving unit 106. The sensing data driver 126 may be coupled to the portion of the plurality of sensing units 104 and may include a plurality of multiplexers or switches to read detection signals from the selected sensing units 104. The control circuit 128 may be an image processor, a digital signal processor, a central processing unit, or a microprocessor. The control circuit 128 may be coupled to the display gate driver 120, the sensing gate driver 122, the display data driver 124, and the sensing data driver 126 to control the plurality of display units 100 and the plurality of sensing units 104. At least a portion of the plurality of first thin film transistors and at least a portion of the plurality of second thin film transistors are disposed in the side area 12.

[0027] In the present invention, the display driver may be a display gate driver 120 or a display data driver 124 , and the sensing driver may be a sensing gate driver 122 or a sensing data driver 126 . Figures 2 to 5 and Figures 7 to 10 Various circuit layout embodiments of the display device 1 are provided to show how the display driver and the sensing driver can effectively share the side area 12 while providing the required signal quality.

[0028] Figure 2 A top view showing an embodiment of a circuit layout of the display device 1 is shown, Figure 3 A cross-sectional view along the cutting line 3 - 3 ′ of an embodiment of the circuit layout of the display device 1 is shown. Figure 2The display device 1 further includes an array substrate 14. The display data driver 124, the sensing data driver 126, and the control circuit 128 share a side region 12. The side region 12 is a portion of a non-display region surrounding the display region 10, such as a portion adjacent to a bottom edge 11 of the display region 10. From a top view of the display device 1, the sensing data driver 126 may be disposed above the display data driver 124. Figure 3 The display device 1 further includes a first insulating layer 32 and a second insulating layer 30 which are sequentially disposed on the array substrate 14 . Figure 3 The cross-sectional view also shows that the sensing data driver 126 and the display data driver 124 are disposed on the array substrate 14 and at least partially overlap in a top view of the display device 1. The first insulating layer 32 and the second insulating layer 30 may include silicon nitrides (SiNx), silicon oxides (SiOx) or a combination thereof, and may have multiple layers.

[0029] exist Figure 2 , the top view shows that the display sub-pixels Pd(1,1), Pd(1,2), Pd(1,3), Pd(2,1), Pd(2,2), Pd(2,3) and the sensing pixels Ps(1,1), Ps(1,2), Ps(2,1), Ps(2,2) can be arranged in an array form, a free form or a combination thereof in the display area 10. Each display sub-pixel Pd(M,N) may include a display unit 100 and a display driving unit 102, and may be one of red, green, blue (RGB) sub-pixels, where M and N are positive integers and represent row and column indices of the display sub-pixel array, respectively. Specifically, the RGB sub-pixels may be arranged according to a fixed alternating sub-pixel layout. The control circuit 128 and the display data driver 124 may be coupled to the display sub-pixels Pd(1,1) and Pd(2,1) of the first column through the display data line Ldd[1], to the display sub-pixels Pd(1,2) and Pd(2,2) of the second column through the display data line Ldd[2], and to the display sub-pixels Pd(1,3) and Pd(2,3) of the third column through the display data line Ldd[3]. Similarly, each sensing pixel Ps(P,Q) may include a sensing unit 104 and a sensing driving unit 106, where P and Q are positive integers and represent the row and column indexes of the sensing sub-pixel array, respectively. The control circuit 128 and the sensing data driver 126 may be coupled to the sensing pixels Ps(1,1) and Ps(2,1) of the first column through the sensing data line Lsd[1], and to the sensing pixels Ps(1,2) and Ps(2,2) of the second column through the sensing data line Lsd[2]. The display sub-pixels Pd(M,N) and the sensing pixels Ps(P,Q) may be alternately arranged along each row of the array, but is not limited thereto.

[0030] The overlapping arrangement of the sensing data driver 126 and the display data driver 124 reduces the area of ​​the side region 12, thereby reducing the size of the display device 1. Note that the circuit layout of the display device 1 is not limited to Figure 2 and 3 The sensing data driver 126 and the display data driver 124 may not overlap each other when viewed from above the display device 1. Figure 2 In addition, when viewed from above the display device 1, the sensing data driver 126 and the display data driver 124 may be disposed between the display region 10 and the control circuit 128. In addition to the data line switching circuit for transmitting display data and the read switching circuit for reading sensing data, other circuits of the display data driver 124 and the sensing data driver 126 may be integrated with the control circuit 128 to form an integrated circuit. The data line switching circuit of the display data driver 124 and the read switching circuit of the sensing data driver 126 may be disposed above the display region 10. The number of display sub-pixels Pd (M, N) and the number of sensing pixels Ps (P, Q) are not limited to Figure 2 and Figure 3 As shown, the display device 1 may adopt other numbers of display sub-pixels Pd(M,N) and sensing pixels Ps(P,Q), and the areas of the display sub-pixel Pd(M,N) array and the sensing pixel Ps(P,Q) array may be the same or different.

[0031] Figure 4 and Figure 5 Two circuit layout embodiments of the display device 1 are shown, wherein the display gate driver 120 and the sensing gate driver 122 share the side region 12 and do not overlap each other, and the side region 12 is disposed on one side (e.g., the left side) of the display device 1. The internal circuit layout of the display sub-pixel Pd (M, N) and the sensing pixel Ps (P, Q) is similar to Figure 2 The top view of the display device 1 has an x ​​direction (e.g., a first direction) and a y direction (e.g., a second direction) perpendicular to the x direction. The x direction and the y direction are substantially perpendicular, and can be considered vertical. The angle between the x direction and the y direction can be between 80 degrees and 100 degrees. Figure 4 and Figure 5 observation surface.

[0032] exist Figure 4, the display gate driver 120 and the sensing gate driver 122 are arranged along the y direction. The display gate driver 120 can be coupled to the display sub-pixels Pd(M,N) of the first row through the display gate line Ldr[1], and coupled to the display sub-pixels Pd(M,N) of the second row through the display gate line Ldr[2]. Similarly, the sensing gate driver 122 can be coupled to the sensing pixels Ps(P,Q) of the first row through the sensing gate line Lsr[1], and coupled to the sensing pixels Ps(P,Q) of the second row through the sensing gate line Lsr[2]. The control circuit 128 is coupled to the display gate driver 120 and the sensing gate driver 122 through the connectors 400, 401, 420, 421 to respectively select each row of display sub-pixels Pd(M,N) and each row of sensing pixels Ps(P,Q).

[0033] In some embodiments, the display gate line Ldr may be a scan line. In some embodiments, the display gate line Ldr may extend along the x direction (first direction), and in another embodiment, the display gate line Ldr may extend along the y direction (second direction). Figure 5 In the embodiment, the display gate driver 120 and the sensing gate driver 122 are respectively divided into display sub-gate drivers 120a, 120b and sensing sub-gate drivers 122a, 122b. The display sub-gate drivers 120a, 120b and the sensing sub-gate drivers 122a, 122b are alternately arranged and aligned along the y direction. In some embodiments, the display sub-gate drivers 120a, 120b and the sensing sub-gate drivers 122a, 122b are alternately arranged and aligned along the x direction (first direction). The display sub-gate drivers 120a, 120b and the sensing sub-gate drivers 122a, 122b can be alternately arranged in different quantities. For example, 3 display sub-gate drivers and 2 sensing sub-gate drivers can be alternately arranged. The display sub-gate driver 120a can be coupled to the display sub-pixels Pd(M, N) of the first row through the display gate line Ldr[1], and the display sub-gate driver 120b can be coupled to the display sub-pixels Pd(M, N) of the second row through the display gate line Ldr[2]. Similarly, the sensing sub-gate driver 122a can be coupled to the sensing pixels Ps(P, Q) of the first row through the sensing gate line Lsr[1], and the sensing sub-gate driver 122b can be coupled to the sensing pixels Ps(P, Q) of the second row through the sensing gate line Lsr[2]. The control circuit 128 is coupled to the display sub-gate drivers 120a, 120b and the sensing sub-gate drivers 122a, 122b through the connectors 500, 501, 520, 521 respectively to select each row of display sub-pixels Pd(M, N) and each row of sensing pixels Ps(P, Q).

[0034] Figure 4 and Figure 5The circuit layout of the sensing data driver 126 and the display data driver 124 provides a narrow frame design (smaller non-display area or side area 12) of the display device 1. Note that the circuit layout of the display device 1 is not limited to Figure 4 and Figure 5 , and the display gate driver 120 and the sensing gate driver 122 may also be stacked. In addition, the side region 12 may be divided into a first side sub-region and a second side sub-region, which are respectively disposed at opposite sides of the display region 10, and the display gate driver 120 and the sensing gate driver 122 may be respectively divided into two parts, so that the first part of the display gate driver 120 and the first part of the sensing gate driver 122 may be disposed within the first side sub-region to control the scanning data of half of the display units 100 and half of the sensing units 104, and the second part of the display gate driver 120 and the second part of the sensing gate driver 122 may be disposed within the second side sub-region to control the scanning data of the other half of the display units 100 and the other half of the sensing units 104. The circuit layout of the separated parts of the display gate driver 120 and the sensing gate driver 122 is disposed in one of the two side sub-regions, and may Figure 4 and Figure 5 In addition, in addition to the data line switching circuit and the read switching circuit, other circuits of the display data driver 124 and the sensing data driver 126 can be integrated into an integrated circuit with the control circuit 128. The data line switching circuit of the display data driver 124 and the read switching circuit of the sensing data driver 126 can be arranged on the display area 10. The number of display sub-pixels Pd (M, N) and the number of sensing pixels Ps (P, Q) are not limited to Figure 4 and Figure 5 , the display device 1 may use other numbers of display sub-pixels Pd(M,N) and sensing pixels Ps(P,Q), and the areas of the display sub-pixel Pd(M,N) array and the sensing pixel Ps(P,Q) array may be the same or different. Figures 2 to 5 Any combination of the circuit layouts of the display gate driver 120 , the sensing gate driver 122 , the display data driver 124 , and the sensing data driver 126 is shown.

[0035] Figure 6 A top view of another circuit layout embodiment of the display device 1 is shown. Figure 7 show Figure 6 FIG. 1 is a cross-sectional view of the circuit layout embodiment of the display device 1 along the cutting line 7 - 7 ′. Figure 8 show Figure 6 The circuit layout embodiment of the display device 1 is a cross-sectional view along the tangent line 8-8'. The side sub-regions 12a and 12b are aligned along the x-direction and disposed at opposite sides of the display region 10, and the side sub-region 12c is aligned with the display region 10 along the y-direction. Figure 6In the embodiment, the display sub-gate driver 120a and the sensing sub-gate driver 122a overlap each other in the side sub-region 12a, and the display sub-gate driver 120b and the sensing sub-gate driver 122b overlap each other in the side sub-region 12b. The display data driver 124, the sensing data driver 126 and the control circuit 128 are integrated into an integrated circuit 628, and the integrated circuit 628 is disposed in the side sub-region 12c. The integrated circuit 628 can be coupled to the display sub-pixels Pd(1,1) and Pd(2,1) through the display data line Ldd[1], coupled to the display sub-pixels Pd(1,2) and Pd(2,2) through the display data line Ldd[2], and coupled to the display sub-pixels Pd(1,3) and Pd(2,3) through the display data line Ldd[3]. In addition, the integrated circuit 628 can be coupled to the sensing pixels Ps(1,1) and Ps(2,1) through the sensing data line Lsd[1], and can be coupled to the sensing pixels Ps(1,2) and Ps(2,2) through the sensing data line Lsd[2]. The internal circuits of the display sub-pixels Pd(M,N) and the sensing pixels Ps(P,Q) are configured similar to the Figure 2 Similar, no further elaboration is needed here.

[0036] Although overlapping circuit layouts can produce compact circuit configurations, they may cause interference and degrade signal quality when overlapping circuits switch states. Figure 7 As shown, in order to reduce interference, shielding layers 71a, 71b and / or insulating layers 72, 74, 76 are provided between the overlapping display sub-gate driver 120a and the sensing sub-gate driver 122a and between the display sub-gate driver 120b and the sensing sub-gate driver 122b. The insulating layers 76, 74, 72 can be sequentially disposed on the substrate 70 and include organic materials, inorganic materials or a combination thereof. The shielding layer 71a is disposed between at least a portion of the plurality of first thin film transistors in the display sub-gate driver 120a and at least a portion of the plurality of second thin film transistors in the sensing sub-gate driver 122a. Similarly, the shielding layer 71b is disposed between at least a portion of the plurality of first thin film transistors in the display sub-gate driver 120b and at least a portion of the plurality of second thin film transistors in the sensing sub-gate driver 122b. Specifically, the shielding layers 71a and 71b may extend between at least a portion of the plurality of first thin film transistors in the display sub-gate drivers 120a and 120b and at least a portion of the plurality of second thin film transistors in the sensing sub-gate drivers 122a and 122b. Figure 7In other embodiments, the shielding layers 71a, 71b may be disposed between each of at least a portion of the plurality of first thin film transistors and its corresponding second thin film transistor. In other embodiments, the shielding layers 71a, 71b may be disposed between the channel regions of at least a portion of the plurality of first thin film transistors and the channel regions of at least a portion of the plurality of second thin film transistors. Figure 8 In the embodiment, the display device 1 may further include an anisotropic conductive film (ACF) 80, a first insulating layer 81, a second insulating layer 83, and a connector 85. The second insulating layer 83, the first insulating layer 81, the ACF 80, and the integrated circuit 628 may be sequentially disposed on the substrate 70. The first insulating layer 81 and the second insulating layer 83 may include silicon nitrides (SiNx), silicon oxides (SiOx), or a combination thereof, and may have multiple layers.

[0037] The display data lines Ldd[1], Ldd[2], Ldd[3] and the sensing data lines Lsd[1], Lsd[2] pass through different layers and are coupled to the integrated circuit 628 through the connectors 85 in the through holes, the contact pads 82 and the ACF particles 84. The contact pads 82 include metal materials, such as copper, tungsten, silver, tin, nickel, chromium, titanium, lead, gold, bismuth, antimony, zinc, zirconium, magnesium, indium, tellurium, gallium, other suitable metal materials, alloys or combinations thereof, but are not limited thereto. Each ACF particle 84 includes a core and a shell, the core is formed of a macromolecule, and the shell is formed of a metal or a metal alloy. The metal of the shell can be the same as the metal of the contact pad 82.

[0038] Fig. 91 is a circuit diagram of a gate driver 9 according to an embodiment of the present invention. The gate driver 9 can be used as a display gate driver 120 or a sensing gate driver 122, can generate gate line signals for the display unit 100 or the sensing unit 104 of the current row, and can include transistors M1 to M4 and a capacitor Cc. The signals STV, CKV, GL1, GL2 and VGL are respectively the previous row gate line signal, the clock signal, the current row gate line signal, the subsequent row gate line signal and the ground reference signal. The source or drain of the transistor M1 is coupled to the gate of the transistor M2 via the node Q(1). After the transistor M1 receives the high voltage level of the signal STV, the node Q(1) is precharged to a high voltage level. Then, when the signal CKV switches to a logic high state, the transistor M2 is turned on to pull the signal GL1 to a high voltage level, and at the same time, the voltage of the node Q(1) is pushed to a higher voltage via the capacitor Cc. The high voltage of the signal GL1 is sent to the next gate driver 9 to allow the subsequent row to pull the signal GL2 to a high voltage level. After detecting the high voltage level of the signal GL2, transistors M3 and M4 are turned on to pull the voltage of the node Q(1) and the voltage of the signal GL1 to a low voltage level to complete the pulse of the signal GL1. The signal GL1 can be used to select the display unit 100 or the sensing unit 104 of the current row.

[0039] Fig.10 and Fig.12 A top view of overlapping transistors is shown for another circuit layout embodiment. Fig.11 show Fig.10 FIG. 1 is a cross-sectional view of the circuit layout embodiment of the display device 1 along the cutting line 11 - 11 ′. Fig.13 show Fig.12 10 and 11 show a shielding layer 110 between overlapping circuits, and FIG. 12 and 13 show overlapping circuits slightly staggered and without a shielding layer between overlapping circuits.

[0040] exist Fig.10 In the embodiment, the shielding layer 110 is inserted between the display gate driver 120 and the sensing gate driver 122. The display gate driver 120 includes two transistors 114a and 114b, and the sensing gate driver 122 includes two transistors 112a and 112b.

[0041] exist Fig.11In the embodiment, transistor 112a is disposed on transistor 114a, and shielding pattern 110a is directly disposed between channel region 1120a of transistor 112a and channel region 1140a of transistor 114a to shield signal coupling between transistor 112a and transistor 114a. Transistor 112b is disposed on transistor 114b, and shielding pattern 110b is directly disposed between channel region 1120b of transistor 112b and channel region 1140b of transistor 114b to shield signal coupling between transistor 112b and transistor 114b. Channel regions of all transistors of sensing gate driver 122 form a first channel layer, and channel regions of all transistors of display gate driver 120 form a second channel layer. In addition, all shielding patterns 110a / 110b between channel regions of sensing gate driver 122 and channel regions of display gate driver 120 form shielding layer 110. The transistor 112a includes source / drain 1126a, 1126b, a gate insulating layer 1128a, and semiconductor layers 1122a, 1122b. The transistor 112b includes source / drain 1126c, 1126d, a gate insulating layer 1128b, and semiconductor layers 1122c, 1122d. The source / drain 1126b is coupled to the source / drain 1126c via a connector 1124. The connector 1124 may include aluminum, copper, indium tin oxide (ITO), titanium, and combinations thereof. The transistor 114a includes source / drain 1146a, 1146b, a gate insulating layer 1148a, and semiconductor layers 1142a, 1142b. The transistor 114b includes a source / drain 1146c, 1146d, a gate insulating layer 1148b and semiconductor layers 1142c, 1142d. The source / drain 1146b is coupled to the source / drain 1146c via a connector 1144. The connector 1144 may include aluminum, copper, indium tin oxide, titanium and a combination thereof. The display device 1 also includes a substrate 1160, a buffer layer 1162, a first insulating layer 1164, a first gate insulating layer 1166, a first interlayer dielectric 1168, a second interlayer dielectric 1170, a second insulating layer 1172, a second gate insulating layer 1174, a third interlayer dielectric 1176, a fourth interlayer dielectric 1178 and a third insulating layer 1180, which are sequentially arranged. The third insulating layer 1180 may include an organic material.

[0042] exist Fig.12 In FIG. 1 , the four transistors 112a, 112b, 112c, 112d of the sensing gate driver 122 and the four transistors 114a, 114b, 114c, 114d of the display gate driver 120 are interleaved. Fig.13 The transistors 112a, 112b are interleaved with the transistors 114a, 114b, respectively. Fig.13 and Fig.11 The transistors 112a, 112b, 114a, 114b and the display device 1 have similar structures, so the signal switching of the transistors 112a, 112b and the transistors 114a, 114b will not interfere with each other, and no shielding layer is required. In addition, the channel regions of all transistors of the sensing gate driver 122 forming the first channel layer and the channel regions of all transistors of the display gate driver 120 forming the second channel layer may not overlap with each other, or may overlap with each other, but is not limited thereto.

[0043] Fig.14 A cross-sectional view of a selected device of the display device 1 is shown, including a display area 10 and a side area 12. The display unit 100, the display driving units 102a, 102b, the sensing unit 104 and the sensing driving unit 106 are located in the display area 10. The display data driver 124 and the sensing data driver 126 are located in the side area 12. The third channel layer of the display driving unit 102a or 102b, and at least one of the first channel layer of the display data driver 124 and the second channel layer of the sensing data driver 126 are formed by the same process to simplify the process and reduce the manufacturing cost. For example, the material of the third channel layer of the display driving unit 102a or 102b includes indium gallium zinc oxide (IGZO), low temperature polysilicon or a combination thereof. The material of the first channel layer of the display data driver 124 includes low temperature polysilicon. The material of the second channel layer of the sensing data driver 126 includes indium gallium zinc oxide. The display device 1 includes a substrate 1400, a buffer layer 1402, a first gate insulator 1404, an interlayer dielectric 1406, a first back passivation layer 1408, a second gate insulator 1410, a second back passivation layer 1412, a planarization layer 1414, a pixel positioning layer 1416, a cathode layer 1418, an inorganic layer 1419, an organic layer 1420, an inorganic layer 1421, an N+ doped layer 1422, a P doped layer 1424, a second gate electrode 1426, a second semiconductor layer 1428, a source / drain 1430, a light shielding layer 1432, a semiconductor layer 1434, a second source / drain 1436, a gate electrode 1438, an anode layer 1440 and an inorganic light-emitting diode (OLED) layer 1442.

[0044] Figures 15 to 17 Three cross-sectional views showing circuit layout embodiments of the display device 1, showing three circuit layouts of the thin film transistor array relative to the substrate. Fig.15In the embodiment, a plurality of display units 100, a plurality of sensing units 104, display sub-gate drivers 120a, 120b and sensing sub-gate drivers 122a, 122b are disposed on a first substrate Sa and between the first substrate Sa and a second substrate Sb. Fig.16 In the embodiment, a plurality of sensing units 104, a plurality of display units 100, display sub-gate drivers 120a, 120b and sensing sub-gate drivers 122a, 122b are disposed on the first substrate Sa. Fig.17 In the present invention, a plurality of sensing units 104 are disposed above a plurality of display units 100, and display sub-gate drivers 120a, 120b are disposed below sensing sub-gate drivers 122a, 122b, and a plurality of display units 100, a plurality of sensing units 104, display sub-gate drivers 120a, 120b and sensing sub-gate drivers 122a, 122b are disposed between two substrates Sa, Sb.

[0045] Figures 2 to 8 , Figures 10 to 17 The display device 1 can be configured to integrate a biometric sensor into a display panel of the display device, thereby increasing the display area of ​​the display device or reducing the frame size of the display device, while providing biometric authentication.

[0046] The above description is only an embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. An electronic device, characterized in that: The electronic device comprises: A plurality of light-emitting units are arranged on a substrate; A plurality of sensing units are arranged corresponding to the plurality of light emitting units, and the plurality of light emitting units and the plurality of sensing units are arranged in a same area; as well as The sensing driving unit is coupled to at least a portion of the plurality of sensing units, and the plurality of light emitting units and the sensing driving unit partially overlap each other.

2. The electronic device according to claim 1, wherein: The sensing driving unit is disposed between the plurality of light emitting units and the substrate.

3. The electronic device according to claim 1, wherein: The plurality of light emitting units and the plurality of sensing units are alternately arranged in the same area.

4. The electronic device according to claim 1, wherein: From a top view of the electronic device, the plurality of light emitting units and the sensing driving unit partially overlap each other.

5. The electronic device according to claim 1, wherein: The plurality of light emitting units and the plurality of sensing units partially overlap each other.

6. The electronic device as claimed in claim 1, wherein: From a top view of the electronic device, the plurality of light emitting units and the plurality of sensing units partially overlap each other.

7. The electronic device as claimed in claim 1, characterized in that: Also included is a shielding layer, which includes a shielding pattern.

8. The electronic device as claimed in claim 1, wherein: The plurality of light emitting units are a plurality of display units.

9. The electronic device as claimed in claim 1, wherein: The electronic device is a display device.

10. The electronic device according to claim 1, wherein: The same area is the display area of ​​the electronic device.

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