Storage device and method of operating storage device

By using temperature sensors and read counters in the storage device to calculate the compensated read count and transfer data when the threshold is reached, the problem of reading interference in low-temperature or high-temperature environments is solved, and the stability and data reliability of the storage device are improved. sex.

CN119207494APending Publication Date: 2024-12-27SK HYNIX INC
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Patent Information

Application Number
CN202410536041.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-06-27
Filing Date
2024-04-30
Publication Date
2024-12-27

AI Technical Summary

Technical Problem

In low or high temperature environments, storage devices are susceptible to reading interference, and the prior art is difficult to effectively prevent such interference.

Method used

By introducing a temperature sensor and a read counter in the storage device, the compensation read count is calculated based on the temperature measurement value per unit time and the number of read operations, and the data is transferred from one memory block to another when the compensation count reaches a threshold. block to reduce interference.

Benefits of technology

It effectively reduces read interference caused by temperature changes, and improves the stability of the storage device in extreme environments and data storage reliability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to a memory device and a method of operating the memory device. The memory device may include: a memory device including a plurality of memory blocks; and a memory controller configured to control the memory device to perform a read operation of reading data stored in a memory block selected from among the plurality of memory blocks, and to obtain a compensated read count based on a unit read count indicating a number of times the read operation is performed within a unit time and a temperature measured within the unit time.
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Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to Korean Patent Application No. 10-2023-0082706, filed on June 27, 2023, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] Various embodiments of the present disclosure relate to an electronic device, and more particularly, to a storage device and a method of operating the storage device. Background Art

[0004] The storage device may include a memory device for storing data therein and a memory controller for controlling the memory device. The memory controller may control the memory device to perform operations related to data storage, data reading, or data erasure according to a request received from a host (ie, an external device).

[0005] A memory device may operate in various environments such as polar regions, space environments, and vehicles. When a memory device operates in a low temperature environment or a high temperature environment, the memory device may become susceptible to read disturbance, and thus a solution to prevent read disturbance depending on such a temperature environment is required. Summary of the invention

[0006] Various embodiments of the present disclosure are directed to a memory device which compensates a read count according to temperature to prevent read disturbance and a method of operating the memory device.

[0007] Embodiments of the present disclosure may provide a storage device. The storage device may include: a memory device including a plurality of storage blocks; and a memory controller configured to control the memory device to perform a read operation of reading data stored in a storage block selected from the plurality of storage blocks, and obtain a compensated read count based on a unit read count and a temperature measured within a unit time, wherein the unit read count indicates the number of times the read operation is performed within a unit time.

[0008] Embodiments of the present disclosure may provide a method for operating a storage device. The method may include: performing a read operation of reading data stored in a storage block selected from a plurality of storage blocks, obtaining a unit read count indicating the number of times the read operation is performed per unit time, and obtaining a compensated read count based on a weighted sum of the unit read count and a weight value corresponding to a temperature measured per unit time.

[0009] An embodiment of the present disclosure may provide a storage device. The storage device may include: a memory device including a plurality of storage blocks; and a memory controller configured to control the memory device to perform a read operation of reading data stored in a storage block selected from the plurality of storage blocks, obtain a compensated read count based on a weighted sum of a unit read count and a weight value corresponding to an initial temperature measured within a unit time, and control the memory device to store the data stored in the selected storage block among the plurality of storage blocks in another storage block when the compensated read count is a threshold count or greater, wherein the unit read count indicates the number of times the read operation is performed within a unit time.

[0010] Embodiments of the present disclosure may provide a storage device. The storage device may include a plurality of storage blocks; a temperature sensor configured to measure a temperature within a unit time; and a read counter configured to count the number of times a read operation is performed on a storage block selected from the plurality of storage blocks within the unit time as a unit read count, wherein the unit read count is compensated according to the temperature. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 is a diagram illustrating a storage device according to an embodiment of the present disclosure.

[0012] Figure 2 is a diagram illustrating an embodiment in which a temperature sensor is included in a memory controller.

[0013] Figure 3A is a diagram illustrating a temperature-voltage table according to an embodiment of the present disclosure.

[0014] Figure 3B is a diagram illustrating a temperature weight table according to an embodiment of the present disclosure.

[0015] Figure 4 is a diagram illustrating a compensated read count according to an embodiment of the present disclosure.

[0016] Figure 5A is a diagram illustrating a unit read count of each memory block according to an embodiment of the present disclosure.

[0017] Figure 5B is a diagram illustrating a compensation unit read count of each memory block according to an embodiment of the present disclosure.

[0018] Figure 6 is a diagram illustrating a read reclaim operation according to an embodiment of the present disclosure.

[0019] Figure 7 is a diagram illustrating a temperature sensor included in a memory device according to an embodiment of the present disclosure.

[0020] Fig. 8Ais a diagram illustrating a temperature sensor included in a memory device according to an embodiment of the present disclosure.

[0021] Figure 8B is a diagram illustrating a temperature table according to an embodiment of the present disclosure.

[0022] Fig. 9 is a flowchart illustrating a method of operating a storage device according to an embodiment of the present disclosure.

[0023] Fig.10 is a flowchart illustrating in detail a method of operating a storage device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0024] The specific structural or functional description of the embodiments according to the concept of the present disclosure introduced in this specification is only used to illustrate the embodiments according to the concept of the present disclosure. The embodiments according to the concept of the present disclosure can be practiced in various forms and should not be interpreted as being limited to the embodiments described in this specification.

[0025] Figure 1 is a diagram illustrating a storage device 100 according to an embodiment of the present disclosure.

[0026] Reference Figure 1 , the memory device 100 may include a memory device 110 and a memory controller 130. The memory controller 130 may control the memory device 110. In an embodiment, the memory device 110 and the memory controller 130 may be implemented as a single integrated semiconductor package chip or separate semiconductor package chips.

[0027] The memory device 110 may include control logic 111 and a memory cell array 113 .

[0028] The control logic 111 may control the internal operation of the memory device 110. The memory cell array 113 may include a plurality of memory blocks BLK1 to BLKn. In an embodiment, each of the memory blocks BLK1 to BLKn may include a plurality of pages PG1 to PGk. Here, each page may be a unit for performing a write operation or a read operation, and each memory block may be a unit for performing an erase operation. Each of the pages PG1 to PGk may include a plurality of memory cells. Each memory cell may store data bit by bit. In an embodiment, the memory cell may be, but is not limited to, a NAND flash memory cell, and may be implemented as a cell of any of various types of memories such as a dynamic random access memory (DRAM), a static RAM (SRAM), a magnetic RAM (MRAM), a ferroelectric RAM (FeRAM), a phase change RAM (PRAM), and a resistive RAM (RRAM).

[0029] The control logic 111 may perform an operation corresponding to a command and an address received from the memory controller 130. For example, the address may be a physical address indicating a storage area in the memory cell array 113.

[0030] In an embodiment, when a write command, an address, and data are received from the memory controller 130, the control logic 111 may perform a write operation to store data in a storage area selected by an address in the memory cell array 113. For example, when a write operation is performed on a first page PG1 of a first memory block BLK1, the control logic 111 may apply a program voltage to the first page PG1 of the first memory block BLK1, and apply a program pass voltage to the remaining pages PG2 to PGk of the first memory block BLK1.

[0031] In an embodiment, when a read command and an address are received from the memory controller 130, the control logic 111 may perform a read operation of reading data from a storage area selected by an address in the memory cell array 113. For example, when the storage block selected by the address is the first storage block BLK1 and the page selected by the address is the first page PG1, the control logic 111 may perform a read operation on the first page PG1 of the first storage block BLK1. During the read operation, the control logic 111 may apply a read voltage to the first page PG1 of the first storage block BLK1, and apply a read pass voltage to the remaining pages PG2 to PGk of the first storage block BLK1.

[0032] The memory controller 130 may include a processor 131 and a read counter 133 .

[0033] The processor 131 may control the internal operation of the memory controller 130. In an embodiment, the processor 131 may perform the function of a flash translation layer (FTL). For example, the processor 131 may convert a logical address into a physical address through an address mapping table. The address mapping table may be information including a mapping relationship between a logical address and a physical address. The processor 131 may generate a command for controlling the operation of the memory device 110. For example, the processor 131 may generate a read command for controlling a read operation or a write command for controlling a write operation. The processor 131 may provide the generated command to the memory device 110.

[0034] The read counter 133 may store a read count. The read count may be a value indicating the number of times the memory device 110 performs a read operation. For example, whenever the memory device 110 performs a read operation on the first page PG1 of the first memory block BLK1, the read counter 133 may update (i.e., increase) the read count of the first memory block BLK1. According to various embodiments, the functions of the read counter 133 described in the present disclosure may be performed by the processor 131.

[0035] In an embodiment, the temperature sensor 115 or 135 may be included in the memory device 110 or the memory controller 130 .

[0036] Each of the temperature sensors 115 and 135 can measure temperature. For example, each of the temperature sensors 115 and 135 can be a thermistor circuit including an element whose resistance changes with respect to temperature. Each of the temperature sensors 115 and 135 can measure resistance (corresponding to the slope of voltage and current) and can sense the temperature corresponding to the resistance. This is only an embodiment, and each of the temperature sensors 115 and 135 can be implemented as a sensor that measures temperature in various ways, such as a thermocouple or an infrared temperature sensor.

[0037] In an embodiment, the memory controller 130 may obtain a compensated read count. The compensated read count may be a value that compensates the read count according to the temperature. The compensated read count may be a value that is greater or less than the number of times the read operation is actually performed.

[0038] The present disclosure may provide a memory device 100 that compensates a read count according to temperature and prevents read disturbance, and a method of operating the memory device 100. Hereinafter, the present disclosure will be described in detail with reference to the accompanying drawings.

[0039] Figure 2 is a diagram illustrating an embodiment in which a temperature sensor is included in a memory controller.

[0040] Reference Figure 2 The memory controller 130 of the memory device 100 may include a processor 131 , a read counter 133 , a temperature sensor 135 , and a buffer memory 137 . The memory device 110 of the memory device 100 may include a control logic 111 and a memory cell array 113 .

[0041] The temperature sensor 135 may measure the temperature Temp. In an embodiment, the temperature sensor 135 may measure the temperature Temp at intervals of a unit time. For example, the unit time may be a time set to any one of various values ​​such as 10 seconds, 1 second, 0.1 seconds, and 0.01 seconds. The temperature sensor 135 may transmit the temperature Temp to the processor 131 and the read counter 133.

[0042] The processor 131 may control the memory device 110 to perform a read operation of reading data stored in a memory block selected from a plurality of memory blocks BLK1 to BLKn included in the memory cell array 113. For example, the processor 131 may transmit a read command rCMD for controlling a read operation to be performed to the memory device 110. The processor 131 may transmit an address indicating the selected memory block to the memory device 110. In an embodiment, the processor 131 may transmit a temperature Temp first sensed by the temperature sensor 135 to the memory device 110.

[0043] The control logic 111 may receive a read command rCMD from the memory controller 130. The control logic 111 may receive an address from the memory controller 130.

[0044] The control logic 111 may perform a read operation by applying a read voltage VR and a read pass voltage Vpass to the memory cell array 113. For example, by applying the read voltage VR to the selected page of the selected memory block and by applying the read pass voltage Vpass to the unselected pages of the selected memory block, the control logic 111 may read the data DATA stored in the selected page of the selected memory block indicated by the address. The read data DATA may be transmitted to the memory controller 130 and then may be stored in the buffer memory 137.

[0045] In an embodiment, the control logic 111 may adjust the level of the read pass voltage Vpass according to the temperature Temp. For example, the control logic 111 may determine a voltage level corresponding to the temperature Temp among a plurality of preset voltage levels as the level of the read pass voltage Vpass. The temperature Temp may be received from the memory controller 130 together with the read command rCMD.

[0046] In an embodiment, the control logic 111 may include a temperature voltage table 111a and a voltage generator 111b. The temperature voltage table 111a may include a plurality of temperature ranges and a plurality of voltage levels corresponding to each other. That is, the control logic 111 may store the temperature voltage table 111a, in which the corresponding relationship between the temperature range and the voltage level is set. The voltage generator 111b may generate a read voltage VR and a read pass voltage Vpass. The voltage generator 111b may determine the voltage level corresponding to the temperature Temp in the temperature voltage table 111a as the level of the read pass voltage Vpass. During a read operation, the voltage generator 111b may apply the read voltage VR to the selected page of the selected storage block, and apply the adjusted read pass voltage Vpass to the unselected pages of the selected storage block.

[0047] When a read operation is performed on the selected storage block, the read counter 133 can increase the read count of the selected storage block. For example, the read count of the selected storage block can be the number of times the read operation is performed on the selected storage block since the data is stored in the selected storage block. The read count can be divided into unit read counts according to the unit time. Each read count of the selected storage block can be the number of times the read operation is performed on the selected storage block in the corresponding unit time.

[0048] The read counter 133 can obtain the compensated read count based on each unit read count and the temperature Temp per unit time. In an embodiment, the read counter 133 may include a temperature weight table 133a. The temperature weight table 133a may include multiple temperature ranges and multiple values ​​corresponding to each other. That is, the read counter 133 may store a temperature weight table 133a, in which the corresponding relationship between the temperature range and the weight value is set. The read counter 133 may determine the weight value corresponding to the temperature Temp in the temperature weight table 133a. The read counter 133 may perform weighted summation on the weight value corresponding to the temperature Temp of each unit time and the unit read count, and then the compensated read count may be obtained.

[0049] The buffer memory 137 may store data to be stored in the memory device 110 or data read from the memory device 110. For example, the buffer memory 137 may store data DATA read from the memory cell array 113 when performing a read operation. The buffer memory 137 may be, but is not limited to, an SRAM or a DRAM, and may be implemented as various types of memories. According to various embodiments, the temperature weight table 133a in the present disclosure may be stored and managed in the buffer memory 137.

[0050] Figure 3A is a diagram illustrating a temperature-voltage table according to an embodiment of the present disclosure. Figure 3B is a diagram illustrating a temperature weight table according to an embodiment of the present disclosure.

[0051] Reference Figure 3A , the temperature voltage table 111a may include a plurality of temperature ranges C10 to C11, C20 to C21, and C30 to C31 and a plurality of voltage levels Va10, Va20, and Va30 corresponding to each other. Figure 3B , the temperature weight table 133 a may include a plurality of temperature ranges C10 to C11 , C20 to C21 , and C30 to C31 corresponding to each other and a plurality of weight values ​​Wa10 , Wa20 , and Wa30 .

[0052] In an embodiment, the temperature ranges C10 to C11, C20 to C21, and C30 to C31 may not overlap with each other. In an example, each temperature range C10 to C11, C20 to C21, and C30 to C31 may be a range equal to or greater than the lower limit C10, C20, and C30 and less than the upper limit C11, C21, and C31. In an example, each temperature range C10 to C11, C20 to C21, and C30 to C31 may be a range greater than the lower limit C10, C20, and C30 and less than or equal to the upper limit C11, C21, and C31. The temperature ranges C10 to C11, C20 to C21, and C30 to C31 may be classified into a range of low temperature (cold condition), a range of normal temperature (normal condition) higher than a lower temperature, and a range of high temperature (hot condition) higher than the normal range. One voltage level Va10 , Va20 , or Va30 may correspond to one temperature range C10 to C11 , C20 to C21 , or C30 to C31 .

[0053] Reference Figure 3A In an embodiment, when a read command is received, the control logic (eg, Figure 2 The control logic 111 may use the temperature voltage table 111a to determine the level of the read pass voltage Vpass corresponding to the temperature Temp. For example, when the temperature Temp falls within the first temperature range C10 to C11 in the temperature voltage table 111a, the control logic 111 may determine the first voltage level Va10 corresponding to the first temperature range C10 to C11 in the temperature voltage table 111a. The control logic 111 may determine the first voltage level Va10 as the level of the read pass voltage Vpass. That is, the control logic 111 may adjust the read pass voltage Vpass so that the level of the read pass voltage Vpass becomes the first voltage level Va10.

[0054] Reference Figure 3B In an embodiment, when a read operation is performed on a selected storage block within a unit time, a read counter (eg, Figure 2 The read counter 133 may use the temperature weight table 133a to determine a weight value corresponding to the temperature Temp. For example, when the temperature Temp falls within the first temperature range C10 to C11 in the temperature weight table 133a, the read counter 133 may determine a first weight value Wa10 corresponding to the first temperature range C10 to C11 in the temperature weight table 133a.

[0055] The read counter 133 may compensate the unit read count according to the weight value. Here, the unit read count may indicate the number of times a read operation is performed on the selected memory block within a unit time.

[0056] In an embodiment, a first weight value Wa10 corresponding to a first temperature range C10 to C11 of a low temperature may be greater than a second weight value Wa20 corresponding to a second temperature range C20 to C21 of a normal temperature. In an embodiment, a third weight value Wa30 corresponding to a third temperature range C30 to C31 of a high temperature may be greater than a second weight value Wa20 corresponding to a second temperature range C20 to C21 of a normal temperature. In an embodiment, the second weight value Wa20 may be a value of 1, or a value less than 1. That is, in the case of a low temperature or a high temperature, the degree to which the unit read count is compensated may be higher than that in the case of a normal temperature.

[0057] In an embodiment, the first weight value Wa10 corresponding to the first temperature range C10 to C11 of low temperature may be greater than the third weight value Wa30 corresponding to the third temperature range C30 to C31 of high temperature. That is, at low temperature, the unit read count may be compensated to a greater extent than at high temperature.

[0058] Figure 4 is a diagram illustrating a compensated read count according to an embodiment of the present disclosure.

[0059] Reference Figure 4 , the table 410 indicates the read counts RC1 to RC5 , the temperatures T1 to T5 , and the weight values ​​W1 to W5 at specific time points t1 to t5 .

[0060] Each of the read counts RC1 to RC5 in the table 410 represents the number of times a read operation is performed on the selected storage block from the time point when data is stored in the selected storage block to the corresponding specific time point among the specific time points t1 to t5. For example, the first read count RC1 may be the number of times a read operation is performed from the time point when data is stored to the first time point t1, and the second read count RC2 may be the number of times a read operation is performed from the time point when data is stored to the second time point t2.

[0061] The temperatures T1 to T5 in Table 410 represent values ​​sensed by the temperature sensor at specific time points t1 to t5. For example, the first temperature T1 may be a value sensed by the temperature sensor at the first time point t1, and the second temperature T2 may be a value sensed by the temperature sensor at the second time point t2. The weight values ​​W1 to W5 in Table 410 represent values ​​corresponding to the respective temperatures. For example, the first weight value W1 may be a value corresponding to the first temperature T1, and the second weight value W2 may be a value corresponding to the second temperature T2. Figure 3B The weight values ​​W1 to W5 are determined by the scheme described in FIG.

[0062] Reference Figure 4In an embodiment, the compensated read count cRC may be calculated based on equation 420. In an embodiment, the compensated read count cRC may be calculated by a memory controller (eg, Figure 2 130) calculation.

[0063] The compensation read count cRC may be a value calculated by summing a plurality of compensation unit read counts cU1 to cUn. The plurality of compensation unit read counts cU1 to cUn may include first to nth compensation unit read counts cU1 to cUn.

[0064] The nth compensation unit read count cUn may be a value obtained by multiplying the nth weight value Wn by the nth unit read count Un. Here, the nth unit read count Un may be the number of times a read operation is performed in the nth unit time. The nth unit time may be a period from the nth time point to the n+1th time point. The nth weight value Wn may be a weight value corresponding to an initial temperature of the nth unit time. The initial temperature of the nth unit time may be a temperature sensed for the first time in the nth unit time. For example, the initial temperature of the nth unit time may be a temperature sensed at the nth time point.

[0065] In an embodiment, when the n+1th weight value Wn+1 is greater than the nth weight value Wn, the nth compensation unit read count cUn may be a value obtained by multiplying the n+1th weight value Wn+1 by the nth unit read count Un.

[0066] In an embodiment, when the nth temperature at the nth time point is higher than the n+1th temperature at the n+1th time point, the nth compensation unit read count cUn may be a value obtained by multiplying the n+1th weight value Wn+1 by the nth unit read count Un.

[0067] The nth unit read count Un may be the difference between the n+1th read count RCn+1 and the nth read count RCn. The n+1th read count RCn+1 may be the number of times a read operation is performed from the time point when data is stored to the n+1th time point, and the nth read count RCn may be the number of times a read operation is performed from the time point when data is stored to the nth time point. That is, the nth unit read count Un may be a change in the read count or the number of times a read operation is performed from the nth time point to the n+1th time point.

[0068] Figure 5A is a diagram illustrating a unit read count of each memory block according to an embodiment of the present disclosure. Figure 5B is a diagram illustrating a compensation unit read count of each memory block according to an embodiment of the present disclosure.

[0069] Reference Figure 5A, a first table 510 shows read counts RC1_1 to RC1_3 and RC2_1 to RC2_3 of each memory block BLK1 and BLK2 at specific time points t1 to t3. A second table 520 shows unit read counts U1_1 to U1_2 and U2_1 to U2_2 of each memory block BLK1 and BLK2 within unit times P1 and P2.

[0070] Here, the read counts RC1_1 to RC1_3 and RC2_1 to RC2_3 may be updated on a memory block basis over time. Unit read counts U1_1 to U1_2 and U2_1 to U2_2 determined according to unit times P1 and P2 may be obtained through the read counts RC1_1 to RC1_3 and RC2_1 to RC2_3 for the respective memory blocks BLK1 and BLK2.

[0071] For example, the first unit time P1 may be a period from the first time point t1 to the second time point t2, and the second unit time P2 may be a period from the second time point t2 to the third time point t3. In this case, the first unit read count U1_1 of the first storage block BLK1 may be a difference between the second read count RC1_2 at the second time point t2 and the first read count RC1_1 at the first time point t1. That is, the first unit read count U1_1 of the first storage block BLK1 may represent the number of times a read operation is performed on the first storage block BLK1 during the first unit time P1 from the first time point t1 to the second time point t2. In the same manner, the unit read count of each storage block may be calculated.

[0072] Reference Figure 5B , the third table 530 shows the compensated unit read counts cU1_1 to cU1_2 and cU2_1 to cU2_2 of the respective memory blocks BLK1 and BLK2 within the unit times P1 and P2.

[0073] By multiplying the weight values ​​W1 and W2 corresponding to the temperature measured within the unit time by the unit read counts U1_1 to U1_2 and U2_1 to U2_2 of the corresponding memory blocks BLK1 and BLK2 , the compensated unit read counts cU1_1 to cU1_2 and cU2_1 to cU2_2 may be obtained.

[0074] Each of the compensation read counts cRC1 and cRC2 of the respective memory blocks BLK1 and BLK2 may be calculated by summing the compensation unit read counts cU1_1 to cU1_2 or cU2_1 to cU2_2 of the corresponding memory block BLK1 or BLK2 .

[0075] Figure 6 is a diagram illustrating a read reclaim operation according to an embodiment of the present disclosure.

[0076] Reference Figure 6 When the compensated read count cRC is equal to or greater than the threshold count, the memory controller 130 may control the memory device 110 to store data stored in a memory block (eg, BLK1 and BLK2 ) selected from among the plurality of memory blocks in another memory block.

[0077] In an embodiment, the read counter 133 may obtain the compensated read count cRC of each of the memory blocks BLK1 and BLK2. The compensated read count cRC may be calculated by the memory controller 130 or the memory device 110 based on the weighted sum of the temperature and the unit read count in each unit time. The read counter 133 may transmit the compensated read count cRC to the processor 131.

[0078] The processor 131 may determine whether the compensation read count cRC of each of the memory blocks BLK1 and BLK2 is equal to or greater than the threshold count. Here, the threshold count may be a preset value. The processor 131 may select a memory block whose compensation read count cRC is equal to or greater than the threshold count from the memory blocks BLK1 and BLK2. The processor 131 may control the memory device 110 to perform a read recovery operation of storing data stored in a memory block whose compensation read count cRC is equal to or greater than the threshold count in another memory block.

[0079] exist Figure 6 In the embodiment, the first memory block BLK1 may be a memory block whose compensation read count cRC is equal to or greater than the threshold count, and the second memory block BLK2 is a free block. In this case, the processor 131 may control the memory device 110 to store the data stored in the first memory block BLK1 in the second memory block BLK2.

[0080] In detail, the processor 131 may transmit a read command rCMD for controlling the reading of the data DATA stored in the first storage block BLK1 to the memory device 110. Here, the data DATA may be valid data. For example, the processor 131 may transmit the addresses of the pages PG1 and PG2 of the first storage block BLK1 storing the data DATA together with the read command rCMD to the memory device 110, so that only the data DATA other than the invalid data IVD is read from the first storage block BLK1. In this case, the control logic 111 may read the data DATA stored in the first storage block BLK1, and may transmit the data DATA to the memory controller 130. The memory controller 130 may store the received data DATA in the buffer memory 137.

[0081] Further, when the reception of the data DATA stored in the first memory block BLK1 is completed, the processor 131 may transmit a write command wCMD for controlling the data DATA to be stored in the second memory block BLK2 together with the address to the memory device 110. The buffer memory 137 may transmit the data DATA to the second memory block BLK2. In this case, the control logic 111 may control the memory cell array 113 to store the data DATA received from the memory controller 130 in the second memory block BLK2.

[0082] According to an embodiment of the present disclosure, a compensated read count can be obtained by adjusting the degree of increase of the unit read count according to the temperature measured in the unit time, wherein the influence of the temperature measured in each unit period is reflected in the unit read count. Therefore, the load of the storage device 100 can be reduced by adjusting the time of performing the read recovery operation while preventing read interference.

[0083] Figure 7 is a diagram illustrating a temperature sensor included in a memory device according to an embodiment of the present disclosure.

[0084] Reference Figure 7 , the memory controller 130 may include a processor 131, a read counter 133, and a buffer memory 137. The memory device 110 may include a control logic 111, a memory cell array 113, a temperature sensor 115, and a register 117. The memory controller 130 may access information stored in the register 117.

[0085] The temperature sensor 115 may measure the temperature Temp at intervals of a unit time. The temperature sensor 115 may transmit the temperature Temp to the control logic 111 and the register 117. The register 117 may store the temperature Temp. The read counter 133 may obtain the temperature Temp from the register 117.

[0086] The processor 131 may transmit a read command rCMD to the memory device 110 so that the memory device 110 performs a read operation of reading data DATA stored in a memory block selected from among a plurality of memory blocks BLK1 to BLKn included in the memory cell array 113. In this case, the processor 131 may transmit an address to the memory device 110 together with the read command rCMD.

[0087] The control logic 111 may receive a read command rCMD from the memory controller 130. In this case, the control logic 111 may receive an address and the read command rCMD from the memory controller 130. By applying a read voltage VR to a selected page of a selected memory block and by applying a read pass voltage Vpass to unselected pages of the selected memory block, the control logic 111 may read data DATA stored in a selected page of a selected memory block indicated by the address. The read data DATA may be transmitted to the memory controller 130 and may then be stored in the buffer memory 137.

[0088] In an embodiment, the control logic 111 may include a temperature voltage table 111a and a voltage generator 111b. The temperature voltage table 111a may include a plurality of temperature ranges and a plurality of voltage levels corresponding to each other. The voltage generator 111b may generate a read voltage VR and a read pass voltage Vpass. The voltage generator 111b may determine a voltage level corresponding to a temperature Temp in the temperature voltage table 111a as a level of the read pass voltage Vpass.

[0089] The read counter 133 includes a temperature weight table 133a, which includes multiple temperature ranges and multiple values ​​corresponding to each other. The read counter 133 can receive the temperature Temp from the register 117. The read counter 133 can determine the temperature range in which the temperature Temp falls among the multiple temperature ranges in the temperature weight table 133a. The read counter 133 can determine the value corresponding to the temperature range determined in the temperature weight table 133a as the weight value. The read counter 133 can obtain a compensation unit read count, which is a value obtained by multiplying the weight value by the unit read count. The read counter 133 can obtain a compensation read count, which is a value calculated by summing multiple compensation unit read counts. According to various embodiments, the operation of the read counter 133 described in the present disclosure can be performed by the processor 131. According to various embodiments, the temperature weight table 133a in the present disclosure can be stored and managed in the buffer memory 137.

[0090] Fig. 8A is a diagram illustrating a temperature sensor included in a memory device according to an embodiment of the present disclosure. Figure 8B is a diagram illustrating a temperature table according to an embodiment of the present disclosure.

[0091] Reference Fig. 8A, the memory controller 130 may include a processor 131, a read counter 133, and a buffer memory 137. The memory device 110 may include a control logic 111, a memory cell array 113, a temperature sensor 115, and a register 117. The above description may be equally applied to each component, and thus a repeated description thereof will be omitted.

[0092] Reference Fig. 8A and Figure 8B In an embodiment, the control logic 111 may include a temperature table 111c. The temperature table 111c may include a plurality of temperature ranges C10 to C11, C20 to C21, and C30 to C31 corresponding to each other, a plurality of voltage levels Va10, Va20, and Va30, and a plurality of values ​​Wa10, Wa20, and Wa30.

[0093] The control logic 111 may determine a temperature range in which the temperature Temp falls among a plurality of temperature ranges included in the temperature table 111c. The control logic 111 may determine a value corresponding to the determined temperature range as a weight value W corresponding to the temperature Temp. The control logic 111 may determine a voltage level corresponding to the determined temperature range as a level of the read pass voltage Vpass.

[0094] In an embodiment, the control logic 111 may transmit the weight value W to the register 117. The register 117 may store the weight value W and transmit the weight value W to the read counter 133. The read counter 133 may obtain the compensation unit read count cU by performing a multiplication of the weight value W by the unit read count. The read counter 133 may obtain the compensation read count by summing the respective compensation unit read counts cU.

[0095] In an embodiment, the control logic 111 may update the unit read count whenever a read operation is performed within a unit time. The control logic 111 may obtain the compensation unit read count cU by performing a multiplication of the weight value W by the unit read count. The control logic 111 may transmit the compensation unit read count cU to the register 117. The register 117 may store the compensation unit read count cU, and may transmit the compensation unit read count cU to the read counter 133. The read counter 133 may obtain the compensation read count by summing the individual compensation unit read counts cU received from the register 117.

[0096] In an embodiment, the control logic 111 may obtain the compensated read count by summing the compensation unit read count cU. The control logic 111 may transmit the compensated read count to the register 117. The read counter 133 may receive and obtain the compensated read count from the register 117.

[0097] Fig. 9 is a flowchart illustrating a method of operating a storage device according to an embodiment of the present disclosure.

[0098] Reference Fig. 9 In operation S910, the method of operating a storage device may perform a read operation of reading data stored in a storage block selected from a plurality of storage blocks. Here, the storage device may include a memory device and a memory controller. The memory device may include a plurality of storage blocks. Each storage block may be selected by an address.

[0099] In addition, in operation S920, the method of operating the memory device may obtain a unit read count. The read count of the selected memory block may be the number of times a read operation is performed on the selected memory block within a unit time.

[0100] In addition, in operation S930, the method of operating the storage device may obtain a compensated read count based on a weight value corresponding to the temperature of each unit time and a weighted sum of each unit read count. The temperature of each unit time may be a temperature obtained for the first time in the corresponding unit time. The weighted sum may be an operation of adding result values ​​obtained by multiplying each unit read count by the weight value.

[0101] Fig.10 is a flowchart illustrating in detail a method of operating a storage device according to an embodiment of the present disclosure.

[0102] Reference Fig.10 In operation S1010, the method of operating a memory device may adjust the level of a read pass voltage according to a temperature. In an embodiment, the temperature may be measured per unit time by a temperature sensor, and the temperature may be stored. The temperature sensor may be included in a memory device or a memory controller.

[0103] In operation S1020, the method of operating the memory device may perform a read operation based on a read pass voltage. The read operation may be an operation of applying a read voltage and a read pass voltage. In an embodiment, the memory device may include a plurality of memory blocks. Each of the memory blocks may include a plurality of pages. The read pass voltage may be applied to unselected pages of the selected memory block. When the read pass voltage is applied, the read voltage may be applied to the selected page of the selected memory block.

[0104] Furthermore, in operation S1030 , the method of operating a memory device may obtain a compensated read count based on a weighted sum of a weight value corresponding to a temperature for each unit time and each unit read count.

[0105] In an embodiment, the weighted summation may include a multiplication of a weight value corresponding to the temperature by a unit read count and a summation of the result values ​​of each multiplication. The compensated read count may be a result value of the weighted summation. Each unit read count may be obtained by a memory controller or a memory device.

[0106] In an embodiment, the method of operating a storage device may further include an operation of storing a temperature weight table and an operation of determining a weight value corresponding to a temperature among a plurality of weight values ​​included in the temperature weight table. The temperature weight table may include a plurality of temperature ranges and a plurality of values ​​corresponding to each other. The temperature weight table may be stored in a memory device or a memory controller.

[0107] In an embodiment, the plurality of weight values ​​included in the temperature weight table may include a first weight value corresponding to a low temperature, a second weight value corresponding to a normal temperature higher than the low temperature, and a third weight value corresponding to a high temperature higher than the normal temperature. Here, the first weight value may be greater than the second weight value, and the third weight value may be greater than the second weight value. In an embodiment, the first weight value may be greater than the third weight value.

[0108] Furthermore, in operation S1040 , the method of operating the memory device may determine whether the compensated read count is equal to or greater than a threshold value.

[0109] When the compensation read count of the selected storage block is equal to or greater than the threshold value (i.e., in the case of "yes" in operation S1040), in operation S1050, the method of operating the storage device may store the data stored in the selected storage block in another storage block. On the other hand, when the compensation read count is not equal to or greater than the threshold value (i.e., in the case of "no" in operation S1040), the method of operating the storage device may terminate the operation.

[0110] According to an embodiment of the present disclosure, the influence of temperature varying over time can be reflected in the read count. Further, the amount of stress applied to the memory block due to the temperature-dependent read pass voltage can be reflected in the read count.

[0111] According to an embodiment of the present disclosure, the increment of the read count can be adjusted according to the temperature per unit time, so that the speed at which the read count reaches the threshold can be dynamically adjusted. Therefore, the load of the storage device can be reduced by adjusting the time of performing the read recovery operation while preventing read interference.

[0112] Embodiments of the present disclosure may provide a memory device that compensates for a read count according to temperature and a method of operating the memory device. Embodiments of the present disclosure may provide a memory device that prevents read disturbance and a method of operating the memory device.

Claims

1. A storage device, comprising: A memory device including a plurality of memory blocks; as well as Memory Controller: controlling the memory device to perform a read operation of reading data stored in a memory block selected from the plurality of memory blocks; and A compensated read count is obtained based on a unit read count indicating the number of times the read operation is performed within the unit time and a temperature measured within the unit time.

2. The storage device according to claim 1, wherein: When the compensated read count is a threshold count or more, the memory controller controls the memory device to store data stored in a selected memory block among the plurality of memory blocks in another memory block.

3. The storage device according to claim 1, wherein: The selected memory block includes a plurality of pages, and The memory device includes control logic that adjusts a level of a read pass voltage according to the temperature and applies the read voltage to a page selected from the plurality of pages and applies the adjusted read pass voltage to unselected pages during the read operation.

4. The storage device according to claim 1, wherein: The memory controller includes a read counter that obtains the compensated read count by summing values, each of which is obtained by multiplying the unit read count by a weight value corresponding to the temperature.

5. The storage device according to claim 4, wherein: The weight value is a value corresponding to a temperature range within which the temperature falls in a temperature weight table, the temperature weight table including a plurality of temperature ranges and a plurality of values ​​corresponding to each other, the temperature weight table being stored in the memory device or the memory controller.

6. The storage device according to claim 5, wherein: The plurality of weight values ​​included in the temperature weight table include a first weight value corresponding to a low temperature, a second weight value corresponding to a normal temperature higher than the low temperature, and a third weight value corresponding to a high temperature higher than the normal temperature, and The first weight value is greater than the second weight value, and the third weight value is greater than the second weight value.

7. The storage device according to claim 6, wherein: The first weight value is greater than the third weight value.

8. The storage device according to claim 4, wherein: The memory controller further includes a temperature sensor that measures the temperature, and The read counter includes a temperature weight table including a plurality of temperature ranges and a plurality of values ​​corresponding to each other and determines a value corresponding to a temperature range in which the temperature falls in the temperature weight table as the weight value.

9. The storage device according to claim 4, wherein: The memory device further comprises: a temperature sensor to measure the temperature; and register, storing the temperature, and The read counter includes a temperature weight table and determines a value corresponding to a temperature range in which the temperature falls in the temperature weight table as the weight value when the temperature is received from the register, the temperature weight table including a plurality of temperature ranges and a plurality of values ​​corresponding to each other.

10. The storage device according to claim 4, wherein: The memory device further comprises: a temperature sensor to measure the temperature; and control logic, storing a temperature weight table and determining a value corresponding to the temperature in the temperature weight table as the weight value, the temperature weight table including a plurality of temperature ranges and a plurality of values ​​corresponding to each other, and The read counter receives the weight value from the control logic.

11. A method of operating a memory device, the memory device comprising a memory controller and a memory device having a plurality of memory blocks, the method comprising: performing a read operation of reading data stored in a storage block selected from the plurality of storage blocks; Obtaining a unit read count representing the number of times the read operation is performed per unit time; and Based on the weighted sum of the unit reading count and a weight value corresponding to the temperature measured within the unit time, a compensated reading count is obtained.

12. The method according to claim 11, wherein: Obtaining the compensated read count includes: performing, for each of a plurality of unit times, multiplying the unit read count by a weight value corresponding to the temperature; and A value calculated by summing the result values ​​of the respective multiplications is obtained as the compensated read count.

13. The method according to claim 12, further comprising: storing a temperature weight table, the temperature weight table including a plurality of temperature ranges and a plurality of values ​​corresponding to each other; and For each of the plurality of unit times, a value corresponding to the temperature among a plurality of values ​​included in the temperature weight table is determined as the weight value.

14. The method according to claim 13, wherein: The plurality of weight values ​​included in the temperature weight table include a first weight value corresponding to a low temperature, a second weight value corresponding to a normal temperature higher than the low temperature, and a third weight value corresponding to a high temperature higher than the normal temperature, and The first weight value is greater than the second weight value, and the third weight value is greater than the second weight value.

15. The method according to claim 14, wherein: The first weight value is greater than the third weight value.

16. The method according to claim 11, further comprising: The temperature per unit time is measured and stored by the temperature sensor. The temperature sensor is included in the memory device or the memory controller.

17. The method according to claim 11, further comprising: When the compensated read count is a threshold count or more, data stored in a selected memory block among the plurality of memory blocks is stored in another memory block.

18. The method according to claim 11, wherein: Executing the read operation includes: adjusting a level of a read pass voltage according to the temperature; and A read voltage is applied to a page selected from a plurality of pages included in the selected memory block, and a read pass voltage having an adjusted level is applied to unselected pages.

19. A storage device, comprising: A memory device including a plurality of memory blocks; as well as Memory Controller: controlling the memory device to perform a read operation of reading data stored in a memory block selected from the plurality of memory blocks; obtaining a compensated read count based on a unit read count and a weighted sum of a weight value corresponding to an initial temperature measured within a unit time, the unit read count indicating a number of times the read operation is performed within the unit time; and When the compensated read count is a threshold count or more, the memory device is controlled to store data stored in a selected memory block among the plurality of memory blocks in another memory block.

20. The storage device according to claim 19, wherein: The compensation read count is a value calculated by summing a plurality of compensation unit read counts, The plurality of compensation unit read counts include a first compensation unit read count and a second compensation unit read count, The first compensation unit read count is a value obtained by multiplying a first weight value corresponding to an initial temperature measured within a first unit time by a first unit read count indicating the number of times a read operation is performed within the first unit time, and The second compensated unit read count is a value obtained by multiplying a second weight value corresponding to an initial temperature measured within a second unit time by a second unit read count indicating the number of times a read operation is performed within the second unit time.