Flying capacitor type multi-level circuit capable of greatly reducing flying capacitor series

Abstract

The invention provides a flying capacitor type multi-level circuit capable of greatly reducing flying capacitor series, which is used for solving the problems that the flying capacitor series of the existing flying capacitor type multi-level circuit is more, the voltage borne by the flying capacitor is increased step by step, the number of sub-flying capacitors is increased along with the increase of the voltage borne by the flying capacitor, and the voltage borne by the flying capacitor is increased. And the size and the weight of the whole circuit are greatly increased. Compared with an existing flying capacitor type multi-level circuit, the flying capacitor type multi-level circuit capable of greatly reducing the flying capacitor series has the advantages that on the premise that the same function is achieved, the voltage is equalized through the two sets of bus capacitors, reasonable topological layout is matched, and the flying capacitor series can be greatly reduced. The series of flying capacitors and the overall number of sub flying capacitors are greatly reduced, the product cost, the power consumption and the size are effectively reduced, and the product reliability is improved.

Description

Technical Field

[0001] The present invention relates to a flying capacitor type multi-level circuit, and in particular to a flying capacitor type multi-level circuit capable of greatly reducing the number of flying capacitor stages. Background Art

[0002] At present, the bus voltage of DCDC converters is getting higher and higher, and the power density is getting higher and higher. In order to meet the voltage resistance of devices and reduce the size of magnetic devices and capacitors, the application of multi-level topology is becoming more and more extensive. Among them, the flying capacitor type multi-level circuit has been widely used because of its simple topology when realizing more levels and easy solution to the voltage balancing problem.

[0003] However, the biggest disadvantage of the flying capacitor type multi-level circuit is that as the number of levels increases, the number of flying capacitors used increases exponentially. For example, a flying capacitor type three-level circuit requires one flying capacitor, while a flying capacitor type five-level circuit requires three flying capacitors, a flying capacitor type seven-level circuit requires five flying capacitors, and a flying capacitor type nine-level circuit requires seven flying capacitors. At the same time, the voltage that the flying capacitor withstands also increases step by step, and as the voltage that the flying capacitor withstands increases, the number of sub-flying capacitors will increase accordingly. Figure 1 As shown, taking the existing flying capacitor type five-level circuit as an example, the voltage borne by the second-level flying capacitor Cf2 is twice that of the first-level flying capacitor Cf1, and the voltage borne by the third-level flying capacitor Cf3 is three times that of the first-level flying capacitor Cf1, which is equivalent to the second-level flying capacitor Cf2 using two sub-flying capacitors Cf1 in series, and the third-level flying capacitor Cf3 using three sub-flying capacitors Cf1 in series. Six sub-flying capacitors will actually be used in the flying capacitor type five-level circuit engineering. Correspondingly, 15 sub-flying capacitors will actually be used in the flying capacitor type seven-level circuit engineering, and 28 sub-flying capacitors will actually be used in the flying capacitor type nine-level circuit engineering, which will greatly increase the volume and weight of the entire circuit, thereby reducing the reliability of the product. Summary of the invention

[0004] The purpose of the present invention is to solve the technical problem that the existing flying capacitor type multi-level circuit has a large number of flying capacitor levels, and the voltage borne by the flying capacitor increases step by step. As the voltage borne by the flying capacitor increases, the number of sub-flying capacitors also increases, resulting in a significant increase in the volume and weight of the entire circuit. A flying capacitor type multi-level circuit is provided that can significantly reduce the number of flying capacitor levels.

[0005] In order to achieve the above purpose, the technical solution provided by the present invention is as follows:

[0006] A flying capacitor type multi-level circuit which can significantly reduce the number of flying capacitor stages, wherein the circuit comprises two groups of bus capacitors, 2N groups of switch tubes and 2N-2 groups of flying capacitors, where N≥2;

[0007] Each group of bus capacitors includes P sub-bus capacitors connected in series, where P≥1; the two groups of bus capacitors are connected in series, and the other ends of the two groups of bus capacitors are connected to the high voltage end and the low voltage end of the bus voltage respectively;

[0008] Each group of switch tubes includes a switch tube SA and a switch tube SB; the 2N groups of switch tubes are equally divided into two units; the N switch tubes SA of the first unit are sequentially connected in series, and the corresponding N switch tubes SB are sequentially connected in series; the first switch tube SA and the first switch tube SB of the first unit are both connected to the high end of the output, and the Nth switch tube SA is connected to the high end of the bus voltage; the N switch tubes SA in the second unit are sequentially connected in series, and the corresponding N switch tubes SB are sequentially connected in series; the first switch tube SA and the first switch tube SB in the second unit are both connected to the low end of the output, and the Nth switch tube SA is connected to the low end of the bus voltage; the Nth switch tube SB of the first unit and the Nth switch tube SB of the second unit are both connected between the first group of bus capacitors and the second group of bus capacitors;

[0009] The phase shift angle between the i-th switch tube SA of the second unit and the i-th switch tube SA of the first unit, the phase shift angle between the j-th switch tube SA of the first unit and the j-1-th switch tube SA of the second unit, and the phase shift angle between the first switch tube SA of the first unit and the N-th switch tube SA of the second unit are all 360°÷2N, i=1,2,…,N, j=2,3,…,N;

[0010] The 2N-2 groups of flying capacitors are equally divided into two units; one end of the kth flying capacitor of the two units is connected between the kth switch tube SA and the k+1th switch tube SA of the corresponding unit, and the other end is connected between the kth switch tube SB and the k+1th switch tube SB of the corresponding unit, k=1,2,…,N-1.

[0011] Furthermore, it also includes 2N-2 groups of pre-charge resistors;

[0012] The 2N-2 group of pre-charging resistors are equally divided into two units; the qth level pre-charging resistors of the two units are connected in parallel to both ends of the q+1th level flying capacitor of the corresponding unit, q=1,2,…,N-2, and the N-1th level pre-charging resistor is connected in parallel to both ends of a corresponding group of busbar capacitors;

[0013] Each level of pre-charging resistors includes three sub-pre-charging resistors connected in series, and the second sub-pre-charging resistor in the k-th level of pre-charging resistors is connected in parallel to both ends of the k-th level flying capacitor of the corresponding unit;

[0014] The resistance ratio of the three sub-pre-charging resistors of the first-level pre-charging resistors in the two units is 1:2:1, and the resistance ratio of the first sub-pre-charging resistor, the second sub-pre-charging resistor and the equivalent resistance of the k-1-level pre-charging resistor in parallel with the corresponding unit, and the third sub-pre-charging resistor are all 1:2k:1.

[0015] Furthermore, the switch tube SA and the switch tube SB are both MOSFETs;

[0016] Alternatively, the switch tube SA and the switch tube SB are both IGBTs.

[0017] Furthermore, the switch tube SA and the switch tube SB are both NMOS tubes; the N switch tubes SA of the first unit are connected in sequence at the drain and the source, and the corresponding N switch tubes SB are connected in sequence at the source and the drain; the N switch tubes SA of the second unit are connected in sequence at the drain and the source, and the corresponding N switch tubes SB are connected in sequence at the source and the drain;

[0018] The source of the first switch tube SA of the first unit and the drain of the first switch tube SB are both connected to the high end of the output, and the drain of the Nth switch tube SA is connected to the high end of the bus voltage; the drain of the first switch tube SA of the second unit and the source of the first switch tube SB are both connected to the low end of the output, and the source of the Nth switch tube SA is connected to the low end of the bus voltage; the source of the Nth switch tube SB of the first unit and the drain of the Nth switch tube SB of the second unit are both connected between the first group of bus capacitors and the second group of bus capacitors;

[0019] One end of the kth flying capacitor of the first unit is connected to the source of the k+1th switch tube SA of the corresponding unit, and the other end is connected to the drain of the k+1th switch tube SB of the corresponding unit; one end of the kth flying capacitor of the second unit is connected to the drain of the k+1th switch tube SA of the corresponding unit, and the other end is connected to the source of the k+1th switch tube SB of the corresponding unit.

[0020] Furthermore, each flying capacitor stage includes Q sub-flying capacitors connected in series, Q≤k. It should be noted that each flying capacitor stage can select one sub-flying capacitor or multiple sub-flying capacitors connected in series as needed.

[0021] Furthermore, P≤N, it is worth noting that each group of bus capacitors can be provided with one sub-bus capacitor or a plurality of sub-bus capacitors connected in series as required.

[0022] Furthermore, a diode is connected in parallel to the switch tube SA and the switch tube SB respectively.

[0023] Compared with the prior art, the present invention has the following beneficial effects:

[0024] 1. The present invention provides a flying capacitor type multi-level circuit that can significantly reduce the number of flying capacitor stages. Compared with the existing flying capacitor type multi-level circuit, under the premise of achieving the same function, the voltage is balanced through two groups of bus capacitors, and with a reasonable topological layout, the number of flying capacitor stages and the overall number of sub-flying capacitors are greatly reduced, which effectively reduces product cost, power consumption and volume, and improves product reliability.

[0025] 2. The present invention provides a flying capacitor type multi-level circuit that can significantly reduce the number of flying capacitors. On the basis of reducing the number of flying capacitors, the number of pre-charging resistors is also reduced accordingly. At the same time, the present invention greatly reduces the voltage borne by the pre-charging resistors, thereby reducing the withstand voltage requirements and resistance losses of the pre-charging resistors. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 is a topological diagram of an existing flying capacitor type five-level circuit;

[0027] Figure 2 A circuit topology diagram of a flying capacitor type multi-level circuit embodiment 1 of the present invention that can significantly reduce the number of flying capacitor stages;

[0028] Figure 3 A topological diagram for setting pre-charging resistance in the first embodiment of the present invention;

[0029] Figure 4 This is a control timing waveform diagram of the first embodiment of the present invention;

[0030] Figure 5 The waveform diagram of the switch tube conduction and system output in the first embodiment of the present invention;

[0031] Figure 6 A circuit topology diagram of a flying capacitor type multi-level circuit embodiment 2 of the present invention that can significantly reduce the number of flying capacitor stages. DETAILED DESCRIPTION

[0032] In order to make the advantages and features of the present invention more clear, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0033] Embodiment 1

[0034] like Figure 2 As shown, a flying capacitor type five-level circuit that can greatly reduce the number of flying capacitor levels includes two groups of bus capacitors, 2N groups of switch tubes, and 2N-2 groups of flying capacitors, where N≥2, and 2N+1 is the number of levels. Since this embodiment is a five-level circuit, there are four groups of switch tubes, and two groups of pre-charging resistors and flying capacitors respectively.

[0035] In this embodiment, each group of bus capacitors includes two sub-bus capacitors, and the two sub-bus capacitors of the first group of bus capacitors are respectively recorded as sub-bus capacitor Cbus11 and sub-bus capacitor Cbus12, and the two sub-bus capacitors of the second group of bus capacitors are respectively recorded as sub-bus capacitor Cbus21 and sub-bus capacitor Cbus22. Sub-bus capacitor Cbus11, sub-bus capacitor Cbus12, sub-bus capacitor Cbus21, and sub-bus capacitor Cbus22 are sequentially connected in series, and the other end of sub-bus capacitor Cbus11 is connected to the high-voltage end Bus+ of the bus voltage, and the other end of sub-bus capacitor Cbus22 is connected to the low-voltage end Bus- of the bus voltage.

[0036] Each group of switch tubes includes a switch tube SA and a switch tube SB. When the circuit is powered on, the switch tubes SA and SB need to be controlled to be complementary and turned on. The switch tubes SA and SB can be MOSFETs, IGBTs, or other types of switch tubes. In this embodiment, the switch tubes SA and SB are both NMOS tubes. At the same time, each switch tube SA and switch tube SB is connected in parallel with a diode for freewheeling of the switch tube.

[0037] The four groups of switch tubes are equally divided into two units. The first unit includes two switch tubes SA and two switch tubes SB, which are respectively denoted as switch tube S1A, switch tube S3A, switch tube S1B, and switch tube S3B. The second unit includes another two switch tubes SA and two switch tubes SB, which are respectively denoted as switch tube S2A, switch tube S4A, switch tube S2B, and switch tube S4B.

[0038] The drain of switch tube S3A is connected to the high voltage end Bus+ of the bus voltage, and its source is connected to the drain of switch tube S1A. The source of switch tube S1A and the drain of switch tube S1B are both connected to the output high end DC+, and the source of switch tube S1B is connected to the drain of switch tube S3B. The source of switch tube S4A is connected to the low voltage end Bus- of the bus voltage, and its drain is connected to the source of switch tube S2A. The drain of switch tube S2A and the source of switch tube S2B are both connected to the output low end DC-, and the drain of switch tube S2B is connected to the source of switch tube S4B. The source of switch tube S3B and the drain of switch tube S4B are both connected between the sub-bus capacitor Cbus12 and the sub-bus capacitor Cbus21.

[0039] Among them, the phase angle of switch tube S2A lagging or leading switch tube S1A, the phase angle of switch tube S3A lagging or leading switch tube S2A, the phase angle of switch tube S4A lagging or leading switch tube S3A, and the phase angle of switch tube S1A lagging or leading switch tube S4A are all 360°÷2N, that is, the phase misalignment angles between the above switch tubes are all 360°÷4=90°. Correspondingly, the phase angle of switch tube S2B lagging or leading switch tube S1B, the phase angle of switch tube S3B lagging or leading switch tube S2B, the phase angle of switch tube S4B lagging or leading switch tube S3B, and the phase angle of switch tube S1B lagging or leading switch tube S4B are all 90°.

[0040] The two groups of flying capacitors are divided into two units, that is, each unit includes N-1 groups of flying capacitors, and N=2 in this embodiment, that is, each unit in this embodiment includes only one group of flying capacitors, and this group of flying capacitors is used as the first-level flying capacitor. Each level of flying capacitor can use a sub-flying capacitor, or it can use multiple sub-flying capacitors connected in series when the voltage is large according to the size of the withstand voltage. In this embodiment, the first-level flying capacitors of the two units include a sub-flying capacitor, the first unit is the sub-flying capacitor Cf11, and the second unit is the sub-flying capacitor Cf21. One end of the sub-flying capacitor Cf11 is connected to the source of the switch tube S3A, and the other end is connected to the drain of the switch tube S3B. One end of the sub-flying capacitor Cf21 is connected to the drain of the switch tube S4A, and the other end is connected to the source of the switch tube S4B.

[0041] In addition, if Figure 3 As shown, the present embodiment also includes two groups of pre-charging resistors for charging the corresponding flying capacitors. The two groups of pre-charging resistors are also divided into two units, that is, each unit includes a group of pre-charging resistors, and this group of pre-charging resistors is used as the first-level pre-charging resistors. Each level of pre-charging resistors includes three sub-pre-charging resistors connected in series. In the present embodiment, the first unit includes sub-pre-charging resistors Rf11, sub-pre-charging resistors Rf12, and sub-pre-charging resistors Rf13 connected in series, and the second unit includes sub-pre-charging resistors Rf21, sub-pre-charging resistors Rf22, and sub-pre-charging resistors Rf23 connected in series. The first-level pre-charging resistor of the first unit is connected in parallel at both ends of the first group of bus capacitors, that is, the other end of the sub-pre-charging resistor Rf11 is connected to the other end of the bus capacitor Cbus11, and the other end of the sub-pre-charging resistor Rf13 is connected between the bus capacitor Cbus12 and the bus capacitor Cbus21; the first-level pre-charging resistor of the second unit is connected in parallel at both ends of the second group of bus capacitors, that is, the other end of the sub-pre-charging resistor Rf21 is connected between the bus capacitor Cbus12 and the bus capacitor Cbus21, and the other end of the sub-pre-charging resistor Rf23 is connected to the other end of the bus capacitor Cbus22. At the same time, the sub-pre-charging resistor Rf12 is connected in parallel at both ends of the sub-flying capacitor Cf11, and the sub-pre-charging resistor Rf22 is connected in parallel at both ends of the sub-flying capacitor Cf21.

[0042] In the existing flying capacitor type five-level topology, the third-level pre-charging resistor (Rf31+Rf32+Rf33) needs to withstand the full bus voltage, the second-level pre-charging resistor (Rf21+Rf22+Rf23) needs to withstand 3 / 4 of the bus voltage, and the first-level pre-charging resistor (Rf11+Rf12+Rf13) needs to withstand 1 / 2 of the bus voltage, and the voltage resistance requirement of the resistor is relatively high, and the loss of the resistor is also relatively large during operation. In the present invention, the voltage is evenly divided by two groups of bus capacitors, that is, each group of bus capacitors bears 1 / 2 of the bus voltage, and in this embodiment, both units have only the first-level pre-charging resistor, and the resistance ratio of the sub-pre-charging resistor Rf11, the sub-pre-charging resistor Rf12, and the sub-pre-charging resistor Rf13 in the first unit is 1:2:1, and the resistance ratio of the sub-pre-charging resistor Rf21, the sub-pre-charging resistor Rf22, and the sub-pre-charging resistor Rf23 in the second unit is also 1:2:1. Since the first-stage flying capacitors in the two units bear 1 / 4 of the bus voltage respectively, each set of pre-charging resistors in the two units only needs to withstand 1 / 2 of the bus voltage, which is equivalent to the voltage borne by the first-stage pre-charging resistors of the existing flying capacitor type five-level topology.

[0043] The control timing waveform diagram in the flying capacitor type five-level circuit embodiment of the present invention is as follows: Figure 4 As shown, the dotted line represents the modulation wave Vset, Vtr1 is the carrier of the switch tube S1A and the switch tube S1B, Vtr2 is the carrier of the switch tube S2A and the switch tube S2B, Vtr3 is the carrier of the switch tube S3A and the switch tube S3B, Vtr4 is the carrier of the switch tube S4A and the switch tube S4B, G1A is the driving waveform of the switch tube S1A, G1B is the driving waveform of the switch tube S1B, G2A is the driving waveform of the switch tube S2A, G2B is the driving waveform of the switch tube S2B, G3A is the driving waveform of the switch tube S3A, G3B is the driving waveform of the switch tube S3B, G4A is the driving waveform of the switch tube S4A, and G4B is the driving waveform of the switch tube S4B. The working principle is: control the switch tubes SA and SB in each group of switch tubes to be complementary and turned on. At the same time, all switch tubes SB are turned on at level 0, one switch tube SA is turned on at level 1, two switch tubes SA are turned on at level 2, and so on. The four switch tubes SA in the two units are turned on at the same time at level 4, plus level 0, a total of five levels. The switch tube conduction and system output waveform are shown in the figure below. Figure 5 shown.

[0044] Compared with the existing flying capacitor type five-level topology, the flying capacitor type five-level topology of the present invention reduces the number of sub-flying capacitors from 6 to 2 while achieving the same effect, and the pre-charging circuit of the flying capacitor (the number of pre-charging resistors) is also reduced from 3 to 2.

[0045] Embodiment 2

[0046] like Figure 6 As shown, a flying capacitor type nine-level topology that can significantly reduce the number of flying capacitor stages includes two groups of bus capacitors, eight groups of switching tubes, six groups of pre-charging resistors and six groups of flying capacitors.

[0047] In this embodiment, each group of bus capacitors includes four sub-bus capacitors, and the four sub-bus capacitors of the first group of bus capacitors are respectively recorded as sub-bus capacitor Cbus11, sub-bus capacitor Cbus12, sub-bus capacitor Cbus13 and sub-bus capacitor Cbus14, and the four sub-bus capacitors of the second group of bus capacitors are respectively recorded as sub-bus capacitor Cbus21, sub-bus capacitor Cbus22, sub-bus capacitor Cbus23 and sub-bus capacitor Cbus24. Sub-bus capacitor Cbus11, sub-bus capacitor Cbus12, sub-bus capacitor Cbus13, sub-bus capacitor Cbus14, sub-bus capacitor Cbus21, sub-bus capacitor Cbus22, sub-bus capacitor Cbus23 and sub-bus capacitor Cbus24 are connected in series in sequence, and the other end of sub-bus capacitor Cbus11 is connected to the high-voltage end Bus+ of the bus voltage, and the other end of sub-bus capacitor Cbus24 is connected to the low-voltage end Bus- of the bus voltage.

[0048] Each group of switch tubes includes a switch tube SA and a switch tube SB. When the circuit is powered on, the switch tubes SA and SB need to be controlled to be complementary and turned on. In this embodiment, the switch tubes SA and SB are both NMOS tubes. At the same time, each switch tube SA and switch tube SB is connected in parallel with a diode for freewheeling of the switch tube.

[0049] The eight groups of switch tubes are divided into two units. The first unit includes four switch tubes SA and four switch tubes SB, which are respectively denoted as switch tube S1A, switch tube S3A, switch tube S5A, switch tube S7A, switch tube S1B, switch tube S3B, switch tube S5B and switch tube S7B. The second unit includes another four switch tubes SA and four switch tubes SB, which are respectively denoted as switch tube S2A, switch tube S4A, switch tube S6A, switch tube S8A, switch tube S2B, switch tube S4B, switch tube S6B and switch tube S8B.

[0050] The switch tube S1A, the switch tube S3A, the switch tube S5A, and the switch tube S7A in the first unit are connected in series in sequence, and the corresponding switch tubes S1B, the switch tube S3B, the switch tube S5B, and the switch tube S7B are connected in series in sequence, that is, the source of the switch tube S3A is connected to the drain of the switch tube S1A, the source of the switch tube S5A is connected to the drain of the switch tube S3A, the source of the switch tube S7A is connected to the drain of the switch tube S5A, the drain of the switch tube S3B is connected to the source of the switch tube S1B, the drain of the switch tube S5B is connected to the source of the switch tube S3B, and the drain of the switch tube S7B is connected to the source of the switch tube S5B; at the same time, the source of the switch tube S1A and the drain of the switch tube S1B are both connected to the output high-end DC+, and the drain of the switch tube S7A is connected to the high-voltage end Bus+ of the bus voltage.

[0051] The switch tube S2A, the switch tube S4A, the switch tube S6A, and the switch tube S8A in the second unit are connected in series in sequence, and the corresponding switch tubes S2B, the switch tube S4B, the switch tube S6B, and the switch tube S8B are connected in series in sequence, that is, the drain of the switch tube S4A is connected to the source of the switch tube S2A, the drain of the switch tube S6A is connected to the source of the switch tube S4A, the drain of the switch tube S8A is connected to the source of the switch tube S6A, the source of the switch tube S4B is connected to the drain of the switch tube S2B, the source of the switch tube S6B is connected to the drain of the switch tube S4B, and the source of the switch tube S8A is connected to the drain of the switch tube S6B; at the same time, the drain of the switch tube S2A and the source of the switch tube S2B are both connected to the output low end DC-, and the source of the switch tube S8A is connected to the low voltage end Bus- of the bus voltage. The source of the switch tube S7B in the first unit and the drain of the switch tube S8B in the second unit are both connected between the sub-bus capacitor Cbus14 and the sub-bus capacitor Cbus21.

[0052] Among them, the phase angle of switch tube S2A lagging or leading switch tube S1A, the phase angle of switch tube S3A lagging or leading switch tube S2A, the phase angle of switch tube S4A lagging or leading switch tube S3A, the phase angle of switch tube S5A lagging or leading switch tube S4A, the phase angle of switch tube S6A lagging or leading switch tube S5A, the phase angle of switch tube S7A lagging or leading switch tube S6A, the phase angle of switch tube S8A lagging or leading switch tube S7A, and the phase angle of switch tube S1A lagging or leading switch tube S8A are all 360°÷2N, that is, the phase shift angles between the above switch tubes are all 360°÷8=45°. Correspondingly, the phase shift angles between the corresponding switch tubes SB are also set according to the above rule.

[0053] The six groups of flying capacitors are divided into two units, that is, each unit includes three groups of flying capacitors, and is used as a three-level flying capacitor. The first-level flying capacitor of the first unit includes only one sub-flying capacitor Cf11, the second-level flying capacitor includes two sub-flying capacitors Cf31 and sub-flying capacitors Cf32 connected in series, and the third-level flying capacitor includes sub-flying capacitors Cf51, sub-flying capacitors Cf52 and sub-flying capacitors Cf53 connected in series in sequence. The first-level flying capacitor of the second unit includes only one sub-flying capacitor Cf21, the second-level flying capacitor includes two sub-flying capacitors Cf41 and sub-flying capacitors Cf42 connected in series, and the third-level flying capacitor includes sub-flying capacitors Cf61, sub-flying capacitors Cf62 and sub-flying capacitors Cf63 connected in series in sequence.

[0054] In the first unit, one end of the sub-flying capacitor Cf11 is connected to the source of the switch tube S3A, and the other end is connected to the drain of the switch tube S3B. The other end of the sub-flying capacitor Cf31 is connected to the source of the switch tube S5A, and the other end of the sub-flying capacitor Cf32 is connected to the drain of the switch tube S5B. The other end of the sub-flying capacitor Cf51 is connected to the source of the switch tube S7A, and the other end of the sub-flying capacitor Cf53 is connected to the drain of the switch tube S7B. In the second unit, one end of the sub-flying capacitor Cf21 is connected to the drain of the switch tube S4A, and the other end is connected to the source of the switch tube S4B. The other end of the sub-flying capacitor Cf42 is connected to the drain of the switch tube S6A, and the other end of the sub-flying capacitor Cf41 is connected to the source of the switch tube S6B. The other end of the sub-flying capacitor Cf63 is connected to the drain of the switch tube S8A, and the other end of the sub-flying capacitor Cf61 is connected to the source of the switch tube S8B.

[0055] The six groups of pre-charging resistors are also divided into two units, that is, each unit includes three groups of pre-charging resistors and is used as a three-level pre-charging resistor. Each level of pre-charging resistors includes three sub-pre-charging resistors connected in series. In this embodiment, the first level of pre-charging resistors of the first unit include sub-pre-charging resistors Rf11, Rf12, and Rf13 connected in series, the second level of pre-charging resistors include sub-pre-charging resistors Rf31, Rf32, and Rf33 connected in series, the third level of pre-charging resistors include sub-pre-charging resistors Rf51, Rf52, and Rf53 connected in series, the first level of pre-charging resistors of the second unit include sub-pre-charging resistors Rf21, Rf22, and Rf23 connected in series, the second level of pre-charging resistors include sub-pre-charging resistors Rf41, Rf42, and Rf43 connected in series, and the third level of pre-charging resistors include sub-pre-charging resistors Rf61, Rf62, and Rf63 connected in series.

[0056] The first-level pre-charging resistor in the first unit is connected in parallel across the second-level flying capacitor of the corresponding unit, the second-level pre-charging resistor is connected in parallel across the third-level flying capacitor of the corresponding unit, and the third-level pre-charging resistor is connected in parallel across the first group of bus capacitors, that is, the other end of the sub-pre-charging resistor Rf11 is connected to the other end of the sub-flying capacitor Cf31, the other end of the sub-pre-charging resistor Rf13 is connected to the other end of the sub-flying capacitor Cf32, the other end of the sub-pre-charging resistor Rf31 is connected to the other end of the sub-flying capacitor Cf51, the other end of the sub-pre-charging resistor Rf33 is connected to the other end of the sub-flying capacitor Cf53, the other end of the sub-pre-charging resistor Rf51 is connected to the other end of the sub-bus capacitor Cbus11, and the other end of the sub-pre-charging resistor Rf53 is connected between the sub-bus capacitor Cbus14 and the sub-bus capacitor Cbus21. In the second unit, the first-level pre-charging resistor is connected in parallel across the second-level flying capacitor of the corresponding unit, the second-level pre-charging resistor is connected in parallel across the third-level flying capacitor of the corresponding unit, and the third-level pre-charging resistor is connected in parallel across the second group of bus capacitors, that is, the other end of the sub-pre-charging resistor Rf21 is connected to the other end of the sub-flying capacitor Cf41, the other end of the sub-pre-charging resistor Rf23 is connected to the other end of the sub-flying capacitor Cf42, the other end of the sub-pre-charging resistor Rf41 is connected to the other end of the sub-flying capacitor Cf61, the other end of the sub-pre-charging resistor Rf43 is connected to the other end of the sub-flying capacitor Cf63, the other end of the sub-pre-charging resistor Rf61 is connected between the sub-bus capacitor Cbus14 and the sub-bus capacitor Cbus21, and the other end of the sub-pre-charging resistor Rf63 is connected to the other end of the sub-bus capacitor Cbus24. At the same time, in the first unit, the sub-pre-charging resistor Rf12 is connected in parallel to the two ends of the sub-flying capacitor Cf11, the sub-pre-charging resistor Rf32 is connected in parallel to the two ends of the corresponding second-level flying capacitor, that is, one end of the sub-pre-charging resistor Rf32 is connected to the other end of the sub-flying capacitor Cf31, and the other end thereof is connected to the other end of the sub-flying capacitor Cf32, and the two ends of the sub-pre-charging resistor Rf52 are connected in parallel to the two ends of the corresponding third-level flying capacitor, that is, one end of the sub-pre-charging resistor Rf52 is connected to the other end of the sub-flying capacitor Cf51, and the other end thereof is connected to the other end of the sub-flying capacitor Cf53; in the second unit, the two ends of the sub-pre-charging resistor Rf22 are connected in parallel to the two ends of the sub-flying capacitor Cf21, one end of the sub-pre-charging resistor Rf42 is connected to the other end of the sub-flying capacitor Cf41, and the other end thereof is connected to the other end of the sub-flying capacitor Cf42, and one end of the sub-pre-charging resistor Rf62 is connected to the other end of the sub-flying capacitor Cf61, and the other end thereof is connected to the other end of the sub-flying capacitor Cf63.

[0057] The resistance ratio of the sub-pre-charging resistor Rf11, the sub-pre-charging resistor Rf12, and the sub-pre-charging resistor Rf13, and the resistance ratio of the sub-pre-charging resistor Rf21, the sub-pre-charging resistor Rf22, and the sub-pre-charging resistor Rf23 are all 1:2:1; the resistance ratio of the sub-pre-charging resistor Rf31, the sub-pre-charging resistor Rf32 and the equivalent resistance after being connected in parallel with the first-stage pre-charging resistor of the corresponding unit, and the resistance ratio of the sub-pre-charging resistor Rf33, and the resistance ratio of the sub-pre-charging resistor Rf41, the sub-pre-charging resistor Rf42 and the corresponding unit The equivalent resistance of the first-stage pre-charging resistors of the unit after being connected in parallel and the resistance ratio of the sub-pre-charging resistor Rf43 are both 1:4:1; the equivalent resistance of the sub-pre-charging resistors Rf51 and Rf52 after being connected in parallel with the second-stage pre-charging resistors of the corresponding unit and the resistance ratio of the sub-pre-charging resistor Rf53, the equivalent resistance of the sub-pre-charging resistors Rf61 and Rf62 after being connected in parallel with the second-stage pre-charging resistors of the corresponding unit and the resistance ratio of the sub-pre-charging resistor Rf63 are both 1:6:1. Since each group of bus capacitors bears 1 / 2 of the bus voltage, the first-stage flying capacitors in the two units bear 1 / 8 of the bus voltage, the second-stage flying capacitors bear 2 / 8 of the bus voltage, and the third-stage flying capacitors bear 3 / 8 of the bus voltage.

[0058] Compared with the existing flying capacitor type multi-level circuit, the flying capacitor type multi-level circuit of the present invention reduces the number of sub-flying capacitors from 28 to 12 while achieving the same effect, and the pre-charging circuit of the flying capacitor (the number of pre-charging resistors) is also reduced from 7 to 6.

[0059] The present invention can be expanded to circuit topologies of more levels as needed. Among them, the number of sub-bus capacitors in each group of bus capacitors and the number of sub-flying capacitors in each flying capacitor level can be adjusted according to actual conditions. Preferably, the number of sub-flying capacitors in each flying capacitor level is less than or equal to the number of flying capacitor levels, and the number of sub-bus capacitors in the entire circuit is less than or equal to the value of the number of levels minus 1.

[0060] The above description is only used to illustrate the technical solution of the present invention rather than to limit it. For ordinary professional and technical personnel in the field, the specific technical solution recorded in the above embodiment can be modified, or some of the technical features therein can be replaced by equivalents, and these modifications or replacements do not make the essence of the corresponding technical solution deviate from the scope of the technical solution protected by the present invention.

Claims

1. A flying capacitor type multi-level circuit capable of significantly reducing the number of flying capacitor stages, characterized in that: It includes two groups of bus capacitors, 2N groups of switch tubes and 2N-2 groups of flying capacitors, where N≥2; Each group of bus capacitors includes P sub-bus capacitors connected in series, where P≥1; the two groups of bus capacitors are connected in series, and the other ends of the two groups of bus capacitors are connected to the high voltage end and the low voltage end of the bus voltage respectively; Each group of switch tubes includes a switch tube SA and a switch tube SB; the 2N groups of switch tubes are equally divided into two units; the N switch tubes SA of the first unit are sequentially connected in series, and the corresponding N switch tubes SB are sequentially connected in series; the first switch tube SA and the first switch tube SB of the first unit are both connected to the high end of the output, and the Nth switch tube SA is connected to the high end of the bus voltage; the N switch tubes SA in the second unit are sequentially connected in series, and the corresponding N switch tubes SB are sequentially connected in series; the first switch tube SA and the first switch tube SB in the second unit are both connected to the low end of the output, and the Nth switch tube SA is connected to the low end of the bus voltage; the Nth switch tube SB of the first unit and the Nth switch tube SB of the second unit are both connected between the first group of bus capacitors and the second group of bus capacitors; The phase shift angle between the i-th switch tube SA of the second unit and the i-th switch tube SA of the first unit, the phase shift angle between the j-th switch tube SA of the first unit and the j-1-th switch tube SA of the second unit, and the phase shift angle between the first switch tube SA of the first unit and the N-th switch tube SA of the second unit are all 360°÷2N, i=1,2,…,N, j=2,3,…,N; The 2N-2 groups of flying capacitors are equally divided into two units; one end of the kth flying capacitor of the two units is connected between the kth switch tube SA and the k+1th switch tube SA of the corresponding unit, and the other end is connected between the kth switch tube SB and the k+1th switch tube SB of the corresponding unit, k=1,2,…,N-1.

2. A flying capacitor type multi-level circuit capable of significantly reducing the number of flying capacitor stages according to claim 1, characterized in that: Also includes 2N-2 groups of pre-charge resistors; The 2N-2 group of pre-charging resistors are equally divided into two units; the qth level pre-charging resistors of the two units are connected in parallel to both ends of the q+1th level flying capacitor of the corresponding unit, q=1,2,…,N-2, and the N-1th level pre-charging resistor is connected in parallel to both ends of a corresponding group of busbar capacitors; Each level of pre-charging resistors includes three sub-pre-charging resistors connected in series, and the second sub-pre-charging resistor in the k-th level of pre-charging resistors is connected in parallel to both ends of the k-th level flying capacitor of the corresponding unit; The resistance ratio of the three sub-pre-charging resistors of the first-level pre-charging resistors in the two units is 1:2:1, and the resistance ratio of the first sub-pre-charging resistor, the second sub-pre-charging resistor and the equivalent resistance of the k-1-level pre-charging resistor in parallel with the corresponding unit, and the third sub-pre-charging resistor are all 1:2k:

1.

3. A flying capacitor type multi-level circuit capable of significantly reducing the number of flying capacitor stages according to claim 2, characterized in that: The switch tube SA and the switch tube SB are both MOSFETs; Alternatively, the switch tube SA and the switch tube SB are both IGBTs.

4. A flying capacitor type multi-level circuit capable of significantly reducing the number of flying capacitor stages according to claim 3, characterized in that: The switch tubes SA and SB are both NMOS tubes; the N switch tubes SA of the first unit are connected at the drain and source in sequence, and the corresponding N switch tubes SB are connected at the source and drain in sequence; the N switch tubes SA of the second unit are connected at the drain and source in sequence, and the corresponding N switch tubes SB are connected at the source and drain in sequence; The source of the first switch tube SA of the first unit and the drain of the first switch tube SB are both connected to the high end of the output, and the drain of the Nth switch tube SA is connected to the high end of the bus voltage; the drain of the first switch tube SA of the second unit and the source of the first switch tube SB are both connected to the low end of the output, and the source of the Nth switch tube SA is connected to the low end of the bus voltage; the source of the Nth switch tube SB of the first unit and the drain of the Nth switch tube SB of the second unit are both connected between the first group of bus capacitors and the second group of bus capacitors; One end of the kth flying capacitor of the first unit is connected to the source of the k+1th switch tube SA of the corresponding unit, and the other end is connected to the drain of the k+1th switch tube SB of the corresponding unit; one end of the kth flying capacitor of the second unit is connected to the drain of the k+1th switch tube SA of the corresponding unit, and the other end is connected to the source of the k+1th switch tube SB of the corresponding unit.

5. The flying capacitor type multi-level circuit capable of significantly reducing the number of flying capacitor stages according to claim 1, characterized in that: Each flying capacitor stage includes Q sub-flying capacitors connected in series, where Q≤k.

6. A flying capacitor type multi-level circuit capable of significantly reducing the number of flying capacitor stages according to claim 1, characterized in that: Said P≤N.

7. A flying capacitor type multi-level circuit capable of significantly reducing the number of flying capacitor stages according to any one of claims 1 to 6, characterized in that: The switch tube SA and the switch tube SB are respectively connected with diodes in parallel.

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