A primary switch control circuit based on tapped transformer

Abstract

The invention discloses a primary switch control circuit based on a tap transformer, comprising a plurality of operational amplifiers, a plurality of triodes, a plurality of resistors and capacitors; the first pin and the fourth pin of a trigger U1 in the plurality of operational amplifiers, the first pin and the fourth pin of a trigger U4, the collector of a triode Q2, the collector of a triode Q3, and one end of a resistor R1 are connected to a power supply; the second pin and the sixth pin of the trigger U1, the input end of an inverter U2, and the base of the triode Q1 are connected, the third pin and the emitter of the triode Q2, the emitter of the triode Q3, and one end of a resistor R6 are connected, and the fifth pin is connected to the third pin of the trigger U4; the in-phase end of the operational amplifier U3 is connected to one end of the resistor R2, one end of the capacitor C2, and the inverting end of the operational amplifier U6, and the output end is connected to the base of the triode Q2; the second pin and the sixth pin of the trigger U4 are connected to the first input end of an AND gate U5, and the fifth pin is connected to the first input end of an AND gate U7.

Description

Technical Field

[0001] The present invention relates to the technical field of signal control, and in particular to a primary switch control circuit based on a tap transformer. Background Art

[0002] A transformer with a center tap is generally used as an inverter to achieve specific power conversion. The primary winding is the DC input end. The MOSFET or IGBT switching element is driven by the control signal to perform switching actions at a specific frequency and timing. After coupling and filtering, the secondary winding can convert the DC voltage into AC voltage. The existing control method is to control the switch tube to conduct alternately through the PWM signal. Figure 4 The example shows the duty cycle of the two switches in an ideal state when the PWM wave is at a high level. In actual applications, due to the individual differences between the switches and the influence of the external environment on the junction capacitance inside the tube, the reaction time of the switches is not consistent. It is necessary to control the dead time to ensure that one switch is completely turned off before turning on the other to avoid a direct short circuit. The existing method is to avoid short circuits by delaying the opening during the alternating conduction process, and the waveforms of QA and QB after the delay will occupy the effective output part of the high level of the PWM wave. Summary of the invention

[0003] In view of the above technical problems, the object of the present invention is to provide a primary switch control circuit based on a tap transformer, comprising a plurality of triggers, a plurality of operational amplifiers, a plurality of triodes, a plurality of resistors, an inverter, and a capacitor;

[0004] The first pin and the fourth pin of the trigger U1, the first pin and the fourth pin of the trigger U4, the collector of the transistor Q2, the collector of the transistor Q3, and one end of the resistor R1 in the said plurality of triggers are connected to the power supply; the second pin and the sixth pin of the trigger U1, the input end of the inverter U2, and the base of the transistor Q1 are connected, the third pin is connected to the emitter of the transistor Q2, the emitter of the transistor Q3, and one end of the resistor R6, and the fifth pin is connected to the third pin of the trigger U4; the in-phase end of the operational amplifier U3 is connected to one end of the resistor R2, one end of the capacitor C2, and the inverting end of the operational amplifier U6, and the output end is connected to the base of the transistor Q2; the second pin and the sixth pin of the trigger U4, and the AND gate The first input terminal of U5 is connected, and the fifth pin is connected to the first input terminal of the AND gate U7; the output terminal of the inverter U2 is connected to the second input terminal of the AND gate U5 and the second input terminal of the AND gate U7; the output terminal of the AND gate U5 is connected to the QA terminal; the output terminal of the AND gate U7 is connected to the QB terminal; QA and QB are complementary control signals of the switch tube; the output terminal of the operational amplifier U6 is connected to the base of the transistor Q3; the collector of the transistor Q1 is connected to the other end of the resistor R1 and the other end of the resistor R2; the emitter of the transistor Q1, the other end of the capacitor C2, the other end of the resistor R6 and the ground terminal are connected; the in-phase terminal of the operational amplifier U6 and the inverting terminal of the operational amplifier U3 are input with different voltages through the power supply, and the voltage before and after is less than zero.

[0005] Furthermore, it also includes an operational amplifier, a triode, a tap transformer, a number of IGBT tubes, a number of diodes, and a number of resistors;

[0006] The in-phase end of the operational amplifier U8 is connected to one end of the resistor R9 and one end of the resistor R11, the inverting end is connected to one end of the resistor R10 and one end of the resistor R12, and the output end is connected to the base of the transistor Q4; the collector of the transistor Q4 is connected to one end of the resistor R7, and the emitter is connected to the other end of the resistor R9 and the tap end of the tap transformer T1; the gate of the IGBT tube Q5 is connected to one end of the resistor R8 and the QA end; the gate of the IGBT tube Q6 is connected to one end of the resistor R13 and the QB end; the primary end of the tap transformer T1 is connected to the collector of the IGBT tube Q5 and the cathode of the diode D3, and the primary end The other end is connected to the collector of IGBT tube Q6 and the cathode of diode D4, one end of the secondary side is connected to the anode of diode D1 and one end of RL, and the other end of the secondary side is connected to the anode of diode D2 and the other end of RL; the other end of resistor R10 is connected to the cathode of diode D1 and the cathode of diode D2; the other end of resistor R7 is connected to the power supply; the other end of resistor R8, the other end of resistor R11, the other end of resistor R12, the other end of resistor R13, the anode of diode D3, the anode of diode D4, the emitter of IGBT tube Q5, the emitter of IGBT tube Q6 and the ground are connected.

[0007] Furthermore, it also includes a voltage stabilizing chip, a transistor, a capacitor, and a number of resistors;

[0008] One end of the voltage stabilizing chip U9 is connected to the base of the transistor Q7 and one end of the resistor R14, and the tap end is connected to one end of the resistor R15 and one end of the resistor R16; the collector and emitter of the transistor Q7, one end of the capacitor C3, the other end of the resistor R14, and the other end of the resistor R15 are connected to the power supply, and the other end of the voltage stabilizing chip U9, the other end of the capacitor C3, and the other end of the resistor R16 are connected to the ground.

[0009] Furthermore, a number of resistors are included;

[0010] One end of the resistor R3 among the resistors is connected to the power supply, and the other end is connected to one end of the resistor R4 and the inverting end of the operational amplifier U3; the other end of the resistor R4 is connected to one end of the resistor R5 and the non-inverting end of the operational amplifier U6; the other end of the resistor R5 is connected to the ground.

[0011] Furthermore, the capacitor C2 is a variable capacitor.

[0012] Furthermore, a driving amplifier circuit is provided between QA, QB and the IGBT tubes Q5 and Q6.

[0013] Furthermore, the resistor R12 is an adjustable resistor, and the voltage-dividing ratio between the resistor R12 and the resistor R10 is adjusted when the number of turns of the tap transformer T1 is changed.

[0014] The beneficial effects of the present invention compared with the prior art are:

[0015] The present invention can separate the dead time and the pulse output time and perform level compensation respectively, and occupy the PWM low-level output part with the dead time to avoid output deviation. At a specific frequency, the input circuit can be adjusted to realize constant-frequency voltage regulation. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the prior art and the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0017] Figure 1 This is a structural diagram of the compensation control circuit provided by the present invention.

[0018] Figure 2 This is a structural diagram of the input voltage regulation circuit provided by the present invention.

[0019] Figure 3 This is a structural diagram of the power supply stabilizing circuit provided by the present invention.

[0020] Figure 4 This is the IGBT switch tube control diagram provided by the present invention. DETAILED DESCRIPTION

[0021] In order to make the objects and advantages of the present invention more clearly understood, the present invention is specifically described below in conjunction with embodiments. It should be understood that the following text is only used to describe one or several specific implementations of the present invention, and does not strictly limit the scope of protection specifically requested by the present invention.

[0022] The present invention discloses a primary switch control circuit based on a tap transformer, such as Figure 1 As shown, specifically, it includes a number of triggers, a number of operational amplifiers, a number of triodes, a number of resistors, inverters, and capacitors;

[0023] The first pin and the fourth pin of the trigger U1, the first pin and the fourth pin of the trigger U4, the collector of the transistor Q2, the collector of the transistor Q3, and one end of the resistor R1 are connected to the power supply; the second pin and the sixth pin of the trigger U1, the input end of the inverter U2, and the base of the transistor Q1 are connected, the third pin and the emitter of the transistor Q2, the emitter of the transistor Q3, and one end of the resistor R6 are connected, and the fifth pin is connected to the third pin of the trigger U4; the in-phase end of the operational amplifier U3 is connected to one end of the resistor R2, one end of the capacitor C2, and the inverting end of the operational amplifier U6, and the output end and The base of transistor Q2 is connected; the second pin and the sixth pin of trigger U4 are connected to the first input terminal of AND gate U5, and the fifth pin is connected to the first input terminal of AND gate U7; the output terminal of inverter U2 is connected to the second input terminal of AND gate U5 and the second input terminal of AND gate U7; the output terminal of AND gate U5 is connected to the QA terminal; the output terminal of AND gate U7 is connected to the QB terminal; the output terminal of operational amplifier U6 is connected to the base of transistor Q3; the collector of transistor Q1 is connected to the other end of resistor R1 and the other end of resistor R2; the emitter of transistor Q1, the other end of capacitor C2, the other end of resistor R6 and the ground terminal are connected.

[0024] like Figure 2 As shown, specifically, it also includes an operational amplifier, a triode, a tap transformer, a plurality of IGBT tubes, a plurality of diodes, and a plurality of resistors;

[0025] The in-phase end of the operational amplifier U8 is connected to one end of the resistor R9 and one end of the resistor R11, the inverting end is connected to one end of the resistor R10 and one end of the resistor R12, and the output end is connected to the base of the transistor Q4; the collector of the transistor Q4 is connected to one end of the resistor R7, and the emitter is connected to the other end of the resistor R9 and the tap end of the tap transformer T1; the gate of the IGBT tube Q5 is connected to one end of the resistor R8 and the QA end; the gate of the IGBT tube Q6 is connected to one end of the resistor R13 and the QB end; the primary end of the tap transformer T1 is connected to the collector of the IGBT tube Q5 and the cathode of the diode D3, and the primary end The other end is connected to the collector of IGBT tube Q6 and the cathode of diode D4, one end of the secondary side is connected to the anode of diode D1 and one end of RL, and the other end of the secondary side is connected to the anode of diode D2 and the other end of RL; the other end of resistor R10 is connected to the cathode of diode D1 and the cathode of diode D2; the other end of resistor R7 is connected to the power supply; the other end of resistor R8, the other end of resistor R11, the other end of resistor R12, the other end of resistor R13, the anode of diode D3, the anode of diode D4, the emitter of IGBT tube Q5, the emitter of IGBT tube Q6 and the ground are connected.

[0026] like Figure 3 As shown, specifically, it also includes a voltage stabilizing chip, a triode, a capacitor, and several resistors;

[0027] One end of the voltage stabilizing chip U9 is connected to the base of the transistor Q7 and one end of the resistor R14, and the tap end is connected to one end of the resistor R15 and one end of the resistor R16; the collector and emitter of the transistor Q7, one end of the capacitor C3, the other end of the resistor R14, and the other end of the resistor R15 are connected to the power supply, and the other end of the voltage stabilizing chip U9, the other end of the capacitor C3, and the other end of the resistor R16 are connected to the ground.

[0028] like Figure 1 As shown, specifically, several resistors are also included;

[0029] One end of the resistor R3 among the resistors is connected to the power supply, and the other end is connected to one end of the resistor R4 and the inverting end of the operational amplifier U3; the other end of the resistor R4 is connected to one end of the resistor R5 and the non-inverting end of the operational amplifier U6; the other end of the resistor R5 is connected to the ground.

[0030] like Figure 1 As shown, specifically, the capacitor C2 is a variable capacitor.

[0031] like Figure 2 As shown, specifically, a driving amplifier circuit is also provided between QA, QB and the IGBT tubes Q5 and Q6.

[0032] like Figure 2 As shown, specifically, the resistor R12 is an adjustable resistor, and the voltage-dividing ratio between the resistor R12 and the resistor R10 is adjusted when the number of turns of the tap transformer T1 is changed.

[0033] See also Figure 1 , Figure 1For the compensation control circuit, what needs to be achieved in the circuit is to separate the dead zone signal from the pulse output signal, and compensate the dead zone signal separately to the complementary output waveform to complete the final output, where QA and QB are complementary control signals of the switch tube, resistor R1 is the pulse frequency adjustment resistor, resistor R2 is the dead time adjustment resistor, resistor R2 is connected to the in-phase end of op amp U3 and the inverting end of op amp U6, resistor R3 and resistor R4 are used for the reference signal input of the inverting end of op amp U3, resistor R4 and resistor R5 are used for the reference signal input of the in-phase end of op amp U6, resistor R3, resistor R4, resistor R5 are proportional output, and the input can also be controlled by the power supply. The input voltage satisfies the voltage difference between the in-phase end of op amp U6 and the inverting end of op amp U3, which is less than zero, so that the initial In the initial state, the operational amplifier U6 can output a signal to the base of the transistor Q3, the transistor Q3 is turned on, the collector power supply of the transistor Q3 is connected to the ground loop through the transistor Q3 emitter and the resistor R6, and the voltage at the resistor R6 end is fed back to the third pin clock pin of the trigger U1, the second pin output pin of the trigger U1 is cut off, the base of the transistor Q1 has no input, the power supply is fed back to the capacitor C2 through the resistor R1 and the resistor R2, the voltage at the capacitor C2 end is gradually pulled up, the operational amplifier U6 is cut off, and the third pin of the trigger U1 is a low level. When the potential at the capacitor C2 end rises to the voltage at the inverting end of the operational amplifier U3, the output end of the operational amplifier U3 outputs a signal to the base of the transistor Q2, the transistor Q2 is turned on, and the power supply is fed back to the trigger after passing through the collector, emitter, and resistor R6 loop of the transistor Q2. The third pin of trigger U1, the second pin of trigger U1 outputs, transistor Q1 is turned on, the voltage at the capacitor C2 end passes through the resistor R2 and the transistor Q1 loop, when the potential of the capacitor C2 end is pulled down to the inverting terminal voltage of the operational amplifier U3, the operational amplifier U3 is cut off, the third pin of trigger U1 is low level, the potential of the capacitor C2 end is pulled down to the potential of the in-phase terminal of the operational amplifier U6, the operational amplifier U6 outputs again, when adjusting the resistor R2 knob, the voltage pull-down speed of the capacitor C2 through the resistor R2, the transistor Q1, and the grounding loop is changed, and when changing the resistor R1 knob, the potential pull-up speed of the capacitor C2 is changed. When the trigger U1 outputs a high level at the second pin, the sixth pin outputs a dead zone signal corresponding to the time. When the trigger U1 outputs a low level at the second pin, the fifth pin outputs a corresponding current frequency. The half-frequency signal, the sixth pin of the trigger U1 is input to the inverter U2 for inversion, the output of the inverter U2 is fed back to an input pin of the AND gate U5 and the AND gate U7, and the dead zone signal output by the sixth pin of the trigger U1 is prepared to be introduced. At the same time, the half-frequency signal output by the fifth pin of the trigger U1 is synchronized to the third pin of the trigger U4, and the fifth pin or the sixth pin of the trigger U4 is asynchronously output with the trigger U1. When the sixth pin of the trigger U1 is cut off, the AND gate U5 outputs, and when the output is output to the sixth pin of the trigger U1, the AND gate U5 is cut off and the dead zone signal is supplemented. When the sixth pin of the trigger U1 is cut off again, the AND gate U7 outputs, until the sixth pin of the trigger U1 outputs, the AND gate U7 supplements the dead zone signal, completing the separate compensation and complementation.

[0034] See also Figure 2 and Figure 3 , Figure 2 For the input voltage regulation circuit, Figure 3 For the power supply voltage stabilization circuit, Figure 2 What needs to be achieved is the secondary fine-tuning after transformer coupling. The primary regulation is adjusted through the tap end of the tap transformer T1. When a multi-tap transformer is used, a multiplexer and power supply connection are added to the tap end, and the secondary winding is connected to Figure 2 The same, where QA, QB are connected to IGBT tube Q5 and IGBT tube Q6. When the gate U5 and the gate U7 use COMS devices, a driving circuit can be added. The diode D3 and the diode D4 are freewheeling diodes to prevent the tap transformer T1 from breaking down the switch tube due to a sudden voltage change when it is turned off. The resistor R8 and the resistor R13 are corresponding current limiting resistors. The diode D1 and the diode D2 are used to feedback the voltage of the secondary winding of the tap transformer T1. The voltage is divided equally by the resistor R10 and the resistor R12 and then fed back to the inverting terminal of the operational amplifier U8. The voltage division coefficient is the inverse of the amplification factor of the tap transformer T1. When the load RL voltage is too high, the driving of the transistor Q4 is stopped until the voltage coupled to the RL load is lower than the reference voltage of the operational amplifier U8 and then the output is performed again to complete the voltage regulation. Figure 3 It is a voltage stabilizing circuit, using transformer tap power input, resistor R14 for current limiting, resistors R15 and R16 for adjusting the reference point of the voltage stabilizing chip U9 to control the base voltage of the transistor Q7, capacitor C3 for power filtering, and resistors R1, R2, and R15 are adjustable resistors.

[0035] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations within the meaning and scope of the equivalent elements of the claims be included in the invention. Any marking in a claim should not be considered as limiting the claim to which it relates.

Claims

1. A primary switch control circuit based on a tapped transformer, characterized in that: It includes several triggers, several operational amplifiers, several transistors, several resistors, inverters, and capacitors; The first pin and the fourth pin of the trigger U1, the first pin and the fourth pin of the trigger U4, the collector of the transistor Q2, the collector of the transistor Q3, and one end of the resistor R1 in the said plurality of triggers are connected to the power supply; the second pin and the sixth pin of the trigger U1, the input end of the inverter U2, and the base of the transistor Q1 are connected, the third pin is connected to the emitter of the transistor Q2, the emitter of the transistor Q3, and one end of the resistor R6, and the fifth pin is connected to the third pin of the trigger U4; the in-phase end of the operational amplifier U3 is connected to one end of the resistor R2, one end of the capacitor C2, and the inverting end of the operational amplifier U6, and the output end is connected to the base of the transistor Q2; the second pin and the sixth pin of the trigger U4 are connected to the first input end of the AND gate U5, and the fifth pin is connected to the first input end of the AND gate U7 The output end of inverter U2 is connected to the second input end of AND gate U5 and the second input end of gate U7; the output end of AND gate U5 is connected to QA end; the output end of AND gate U7 is connected to QB end; QA and QB are complementary control signals for the switch tube; the output end of operational amplifier U6 is connected to the base of transistor Q3; the collector of transistor Q1 is connected to the other end of resistor R1 and the other end of resistor R2; the emitter of transistor Q1, the other end of capacitor C2, the other end of resistor R6 and the ground end are connected; the in-phase end of operational amplifier U6 and the inverting end of operational amplifier U3 are input with different voltages through the power supply, and the voltage satisfies that the voltage phase between the in-phase end of operational amplifier U6 and the inverting end of operational amplifier U3 is less than zero, so that in the initial state, operational amplifier U6 can output a signal to the base of transistor Q3 to turn it on.

2. The primary switch control circuit based on the tapped transformer according to claim 1, characterized in that: It also includes operational amplifiers, triodes, tap transformers, several IGBT tubes, several diodes, and several resistors; The in-phase end of the operational amplifier U8 is connected to one end of the resistor R9 and one end of the resistor R11, the inverting end is connected to one end of the resistor R10 and one end of the resistor R12, and the output end is connected to the base of the transistor Q4; the collector of the transistor Q4 is connected to one end of the resistor R7, and the emitter is connected to the other end of the resistor R9 and the tap end of the tap transformer; the gate of the IGBT tube Q5 is connected to one end of the resistor R8 and the QA end; the gate of the IGBT tube Q6 is connected to one end of the resistor R13 and the QB end; one end of the primary side of the tap transformer is connected to the collector of the IGBT tube Q5 and the cathode of the diode D3, and the other end of the primary side is connected to the collector of the IGBT tube Q5 and the cathode of the diode D3. The second end is connected to the collector of IGBT tube Q6 and the cathode of diode D4, one end of the secondary side is connected to the anode of diode D1 and one end of RL, and the other end of the secondary side is connected to the anode of diode D2 and the other end of RL; the other end of resistor R10 is connected to the cathode of diode D1 and the cathode of diode D2; the other end of resistor R7 is connected to the power supply; the other end of resistor R8, the other end of resistor R11, the other end of resistor R12, the other end of resistor R13, the anode of diode D3, the anode of diode D4, the emitter of IGBT tube Q5, the emitter of IGBT tube Q6 and the ground terminal are connected.

3. The primary switch control circuit based on the tapped transformer according to claim 1, characterized in that: It also includes voltage stabilizing chips, transistors, capacitors, and several resistors; One end of the voltage stabilizing chip U9 is connected to the base of the transistor Q7 and one end of the resistor R14, and the tap end is connected to one end of the resistor R15 and one end of the resistor R16; the collector and emitter of the transistor Q7, one end of the capacitor C3, the other end of the resistor R14, and the other end of the resistor R15 are connected to the power supply, and the other end of the voltage stabilizing chip U9, the other end of the capacitor C3, and the other end of the resistor R16 are connected to the ground.

4. The primary switch control circuit based on the tapped transformer according to claim 1, characterized in that: Also included are several resistors; One end of the resistor R3 among the resistors is connected to the power supply, and the other end is connected to one end of the resistor R4 and the inverting end of the operational amplifier U3; the other end of the resistor R4 is connected to one end of the resistor R5 and the non-inverting end of the operational amplifier U6; the other end of the resistor R5 is connected to the ground.

5. The primary switch control circuit based on the tapped transformer according to claim 1, characterized in that: The capacitor C2 is a variable capacitor.

6. The primary switch control circuit based on the tapped transformer according to claim 2, characterized in that: A driving amplifier circuit is also provided between the QA, QB and the IGBT tubes Q5 and Q6.

7. The primary switch control circuit based on the tapped transformer according to claim 2, characterized in that: The resistor R12 is an adjustable resistor, and the voltage-dividing ratio between the resistor R12 and the resistor R10 is adjusted when the number of turns of the tap transformer is changed.

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