High-frequency oscillation circuit and modulation and demodulation device

Abstract

The invention discloses a high-frequency oscillation circuit and a modulation and demodulation device. The high-frequency oscillation circuit comprises a switch MOS tube, a first capacitor, an oscillation generator and a control module. The input end of the control module is connected with the output end of the oscillation generator, and the output end of the control module is connected with the grid electrode of the switch MOS tube; the first end of the first capacitor is connected with a voltage source, and the second end of the first capacitor is connected with the grid electrode of the switch MOS tube. The source electrode of the switch MOS tube is connected with a voltage source; and the drain electrode of the switch MOS tube is connected with the power supply end of the oscillation generator. When the voltage source is powered on, the first capacitor raises the voltage at the grid electrode of the switch MOS tube, so that the switch MOS tube is conducted, the process that the voltage source is powered on and finally output through the control module is omitted, the oscillation generator is rapidly started, and oscillation signals are rapidly generated.

Description

Technical Field

[0001] The present application relates to the field of circuits, and in particular to a high-frequency oscillation circuit and a modulation and demodulation device. Background Art

[0002] There are some difficulties and challenges in designing and implementing a ring oscillator. The ring oscillator needs to reach a stable oscillation state at startup. At the initial startup, due to the small amplitude of the oscillation signal, the gain of the amplifier may not be sufficient to produce stable oscillation.

[0003] Secondly, the frequency of the ring oscillator is determined by the delay time of the delay element. However, the actual device delay may be affected by factors such as temperature, process variation, and fluctuations in device parameters. These uncertainties may cause oscillator frequency offset or instability, which needs to be considered and compensated in the design.

[0004] Finally, ring oscillators are often used to generate high-frequency clock signals, which require a higher output frequency. However, high-frequency oscillation signals may be affected by factors such as circuit wiring, capacitance and inductance effects, resulting in signal distortion, amplitude attenuation, or increased phase noise. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide a high-frequency oscillation circuit in order to overcome the defect in the prior art that the oscillator needs a long start-up time during initial start-up.

[0006] The present invention solves the above technical problems through the following technical solutions:

[0007] The present invention provides a high-frequency oscillation circuit, which includes a switch MOS tube, a first capacitor, an oscillation generator and a control module;

[0008] The input end of the control module is connected to the output end of the oscillator generator, and the output end of the control module is connected to the gate of the switch MOS tube;

[0009] A first end of the first capacitor is connected to a voltage source, and a second end of the first capacitor is connected to a gate of the switch MOS tube;

[0010] The source of the switch MOS tube is connected to the voltage source;

[0011] The drain of the switch MOS tube is connected to the power supply end of the oscillator generator;

[0012] The first capacitor is used to raise the voltage at the gate of the switch MOS tube when the voltage source is powered on, so as to turn on the switch MOS tube;

[0013] The control module is used to continuously output a signal to change the voltage at the gate of the switch MOS tube, thereby changing the current output by the switch MOS tube, and further changing the frequency of the oscillation signal output by the oscillation generator.

[0014] Optionally, the high-frequency oscillation circuit further includes a second capacitor, and a capacitance value of the second capacitor is smaller than a capacitance value of the first capacitor;

[0015] A first end of the second capacitor is connected to the gate of the switch MOS tube, and a second end of the second capacitor is connected to the voltage source;

[0016] The second capacitor is used to perform frequency compensation on the signal output by the control module.

[0017] Optionally, the high-frequency oscillation circuit further includes a filter capacitor, a first end of the filter capacitor is connected to a power supply end of the oscillation generator, and a second end of the filter capacitor is grounded.

[0018] Optionally, the control module includes an RC circuit and an operational amplifier;

[0019] The first input end of the RC circuit is connected to a voltage source, the second input end of the RC circuit is connected to the output end of the oscillator generator, and the output end of the RC circuit is connected to the inverting input end of the operational amplifier;

[0020] The RC circuit is used to input a first signal to the operational amplifier, and the operational amplifier is used to output a second signal to the switch MOS tube according to the first signal;

[0021] The RC circuit is further used to determine the voltage of the second signal according to the total resistance value and the total capacitance value of the RC circuit.

[0022] Optionally, the RC circuit includes a fine-tuning resistor, a third capacitor, a fourth capacitor, a first NOT gate and a second NOT gate;

[0023] The first end of the fine-tuning resistor is connected to the voltage source, and the second end of the fine-tuning resistor is connected to the inverting input end of the operational amplifier;

[0024] The inverting input terminal of the operational amplifier is connected to ground in sequence through the first terminal of the third capacitor, the second terminal of the third capacitor, the first terminal of the fourth capacitor and the second terminal of the fourth capacitor;

[0025] The output end of the oscillator generator is connected to the first end of the fourth capacitor via the input end of the second NOT gate, the output end of the second NOT gate, the input end of the first NOT gate and the output end of the first NOT gate in sequence;

[0026] The power supply terminal of the first NOT gate is connected to the inverting input terminal of the operational amplifier;

[0027] The fine-tuning resistor is used to pull down the voltage of the reverse input terminal of the operational amplifier;

[0028] The first NOT gate and the second NOT gate are both used to enhance the driving capability of the oscillation signal input to the operational amplifier;

[0029] The first NOT gate and the second NOT gate are also used to perform level conversion on the oscillation signal input to the operational amplifier;

[0030] The second NOT gate is also used to reduce the peak-to-peak value of the oscillation signal input to the operational amplifier;

[0031] The third capacitor and the fourth capacitor are used to adjust the voltage value of the second signal.

[0032] Optionally, the operational amplifier includes a latch, a first current mirror, a second current mirror, a third current mirror, a first N-type MOS transistor and a second N-type MOS transistor;

[0033] The first input end of the latch is connected to a voltage source, the second input end of the latch is connected to the voltage source via a first resistor, the first output end of the latch is connected to the first input end of the first current mirror, and the second output end of the latch is connected to the second input end of the first current mirror;

[0034] A first output end of the first current mirror is connected to a first input end of the second current mirror through a second resistor;

[0035] The first input terminal and the second input terminal of the third current mirror are both connected to a voltage source, the first output terminal of the third current mirror is connected to the source of the first N-type MOS transistor, and the second output terminal of the third current mirror is connected to the source of the second N-type MOS transistor and the output terminal of the operational amplifier;

[0036] The gate of the first N-type MOS transistor is connected to the working voltage, and the drain of the first N-type MOS transistor is connected to the drain of the second N-type MOS transistor;

[0037] The gate of the second N-type MOS transistor is connected to the input end of the operational amplifier, and the drain of the second N-type MOS transistor is also connected to the second input end of the second current mirror;

[0038] The first output terminal and the second output terminal of the second current mirror are both grounded;

[0039] The latch is used to latch the signal generated by the voltage source;

[0040] The first current mirror, the second current mirror, the third current mirror and the fourth current mirror are used to output the input current in proportion.

[0041] Optionally, the first current mirror includes a first P-type MOS transistor and a second P-type MOS transistor;

[0042] The gate of the first P-type MOS transistor is connected to the gate of the second P-type MOS transistor, and the gate of the first P-type MOS transistor is also connected to the drain of the first P-type MOS transistor;

[0043] The source of the first P-type MOS tube serves as the first input terminal of the first current mirror;

[0044] The source of the second P-type MOS tube serves as the second input terminal of the first current mirror;

[0045] The drain of the first P-type MOS tube serves as the first output end of the first current mirror;

[0046] The drain of the second P-type MOS tube serves as the second output end of the first current mirror;

[0047] And / or, the third current mirror includes a third P-type MOS transistor and a fourth P-type MOS transistor;

[0048] The gate of the third P-type MOS tube is connected to the gate of the fourth P-type MOS tube, and the gate of the third P-type MOS tube is also connected to the drain of the third P-type MOS tube;

[0049] The source of the third P-type MOS tube is connected to the first input terminal of the third current mirror;

[0050] The source of the fourth P-type MOS tube is connected to the second input end of the third current mirror;

[0051] The drain of the third P-type MOS tube is connected to the first output end of the third current mirror;

[0052] The drain of the fourth P-type MOS tube is connected to the second output end of the third current mirror;

[0053] And / or, the second current mirror includes a third N-type MOS transistor and a fourth N-type MOS transistor;

[0054] The gate of the third N-type MOS transistor is connected to the gate of the fourth N-type MOS transistor, and the drain of the third N-type MOS transistor is connected to the gate of the third N-type MOS transistor;

[0055] The drain of the third N-type MOS tube is connected to the first input terminal of the second current mirror;

[0056] The drain of the fourth N-type MOS tube is connected to the second input end of the second current mirror;

[0057] The source of the third N-type MOS tube is connected to the first output end of the second current mirror;

[0058] The source of the fourth N-type MOS transistor is connected to the second output end of the second current mirror.

[0059] Optionally, the oscillator generator comprises a third NOT gate, a fourth NOT gate and a fifth NOT gate which are connected end to end in sequence;

[0060] The output end of the fifth NOT gate is connected to the output end of the oscillator generator and the input end of the third NOT gate respectively;

[0061] The power supply ends of the third NOT gate, the fourth NOT gate and the fifth NOT gate are connected to the drain of the switch MOS tube.

[0062] Optionally, the voltage output by the voltage source ranges from 1.4V to 1.8V.

[0063] As a second aspect of the present invention, the present invention provides a modulation and demodulation device, comprising a modulator, a demodulator and the high-frequency oscillation circuit as described in the first aspect of the present invention;

[0064] The output end of the high frequency oscillation circuit is connected to the first input end of the modulator, the second input end of the modulator is connected to the input signal, and the output end of the modulator is connected to the input end of the demodulator;

[0065] The output end of the demodulator outputs a demodulated signal.

[0066] On the basis of being in accordance with the common sense in the art, the above-mentioned preferred conditions can be arbitrarily combined to obtain the preferred embodiments of the present invention.

[0067] The positive and progressive effect of the present invention is that when the voltage source is powered on, the first capacitor raises the voltage at the gate of the switch MOS tube to turn on the switch MOS tube, eliminating the process of powering on the voltage source and finally outputting through the control module, quickly starting the oscillation generator, and quickly generating an oscillation signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0068] Figure 1 Schematic diagram of the first structure of the high-frequency oscillation circuit in Embodiment 1 of the present invention.

[0069] Figure 2 Schematic diagram of the frequency-time relationship of the high-frequency oscillation circuit in Example 1 of the present invention.

[0070] Figure 3 Schematic diagram of the second structure of the high-frequency oscillation circuit in Embodiment 1 of the present invention.

[0071] Figure 4 Schematic diagram of the structure of the operational amplifier of the high-frequency oscillation circuit in Example 1 of the present invention.

[0072] Figure 5 It is a schematic diagram of the structure of the modulation and demodulation device in embodiment 2 of the present invention. DETAILED DESCRIPTION

[0073] The present invention is further described below by way of examples, but the present invention is not limited to the scope of the examples.

[0074] Example 1

[0075] See also Figure 1 , this embodiment provides a high-frequency oscillation circuit, the high-frequency oscillation circuit comprising a switch MOS tube 1, a first capacitor C1, an oscillation generator 2 and a control module 3;

[0076] The input end of the control module 3 is connected to the output end of the oscillator generator 2, and the output end of the control module 3 is connected to the gate of the switch MOS tube 1;

[0077] A first end of the first capacitor C1 is connected to a voltage source VDD, and a second end of the first capacitor C1 is connected to a gate of the switch MOS tube 1;

[0078] The source of the switch MOS tube 1 is connected to the voltage source VDD;

[0079] The drain of the switch MOS tube 1 is connected to the power supply end of the oscillator generator 2;

[0080] The first capacitor C1 is used to raise the voltage at the gate of the switch MOS tube 1 when the voltage source VDD is powered on, so as to turn on the switch MOS tube 1;

[0081] The control module 3 is used to continuously output a signal to change the voltage at the gate of the switch MOS tube 1 , thereby changing the current output by the switch MOS tube 1 , and further changing the frequency of the oscillation signal output by the oscillation generator 2 .

[0082] See also Figure 2The first curve and the second curve, the first curve is the time-frequency relationship curve of the circuit without the first capacitor C1 in this application; the second curve is the time-frequency relationship curve with the first capacitor C1. Through the first capacitor C1 in this embodiment, when the voltage source VDD is powered on, the gate voltage in the switch MOS tube 1 can be directly raised, and finally the switch MOS tube 1 is turned on, and the oscillator generator 2 is directly made to work immediately through the voltage source VDD, and the output terminal Vout of the oscillator generator 2 outputs the required signal, eliminating the traditional method of first making the control module 3 work through the voltage source VDD, waiting for the control module 3 to send a signal, and then turning on the switch MOS tube 1 according to the signal sent by the working module to make the oscillator generator 2 work. This allows the oscillator generator 2 to start quickly.

[0083] Optionally, the high-frequency oscillation circuit further includes a second capacitor C2, and the capacitance value of the second capacitor C2 is smaller than the capacitance value of the first capacitor C1;

[0084] A first end of the second capacitor C2 is connected to the gate of the switch MOS tube 1, and a second end of the second capacitor C2 is connected to the voltage source VDD;

[0085] The second capacitor C2 is used to perform frequency compensation on the signal output by the control module 3 .

[0086] In this embodiment, since the second capacitor C2 can make the frequency of the signal output by the control module 3 more stable, the phase margin of the control module 3 is higher.

[0087] Optionally, the oscillation circuit further includes a filter capacitor C101 , a first end of the filter capacitor C101 is connected to a power supply end of the oscillation generator 2 , and a second end of the filter capacitor C101 is grounded.

[0088] Optionally, the control module 3 includes an RC circuit 31 and an operational amplifier 32;

[0089] A first input terminal of the RC circuit 31 is connected to a voltage source VDD, a second input terminal of the RC circuit 31 is connected to an output terminal of the oscillator generator 2, and an output terminal of the RC circuit 31 is connected to an inverting input terminal of an operational amplifier 32;

[0090] The RC circuit 31 is used to input a first signal to the operational amplifier 32, and the operational amplifier 32 is used to output a second signal to the switch MOS tube 1 according to the first signal;

[0091] The RC circuit 31 is further used to determine the voltage of the second signal according to the total resistance value and the total capacitance value of the RC circuit 31 .

[0092] Optionally, see Figure 3, the RC circuit 31 includes a fine-tuning resistor R1, a third capacitor C3, a fourth capacitor C4, a first NOT gate A1 and a second NOT gate A2;

[0093] A first end of the fine-tuning resistor R1 is connected to a voltage source VDD, and a second end of the fine-tuning resistor R1 is connected to a reverse input end of the operational amplifier 32;

[0094] The inverting input terminal of the operational amplifier 32 is grounded through the first terminal of the third capacitor C3, the second terminal of the third capacitor C3, the first terminal of the fourth capacitor C4 and the second terminal of the fourth capacitor C4 in sequence;

[0095] The output end of the oscillator generator 2 is connected to the first end of the fourth capacitor C4 through the input end of the second NOT gate A2, the output end of the second NOT gate A2, the input end of the first NOT gate A1 and the output end of the first NOT gate A1 in sequence;

[0096] The power supply terminal of the first NOT gate A1 is connected to the inverting input terminal of the operational amplifier 32;

[0097] The trimming resistor R1 is used to pull down the voltage at the inverting input terminal of the operational amplifier 32;

[0098] The first NOT gate A1 and the second NOT gate A2 are also used to perform level conversion on the oscillation signal input to the operational amplifier 32;

[0099] The second NOT gate A2 is also used to reduce the peak-to-peak value of the oscillation signal input to the operational amplifier 32;

[0100] The third capacitor C3 and the fourth capacitor C4 are used to adjust the voltage value of the second signal.

[0101] In this embodiment, the peak-to-peak value of the oscillation signal can be reduced by the first NOT gate A1 to meet the requirement of the input end of the operational amplifier 32 .

[0102] The oscillation signal that has not been processed by the third capacitor C3 and the fourth capacitor C4 is difficult to meet the reverse input requirement of the operational amplifier 32 . The peak-to-peak value of the oscillation signal is reduced to meet the input requirement of the operational amplifier 32 .

[0103] See also Figure 1 In this embodiment 1, the first capacitor C1 and the second capacitor C2 can both be polar capacitors. The positive electrode of the first capacitor C1 is connected to the voltage source VDD, and the negative electrode of the first capacitor C1 is connected to the switch MOS tube 1; the negative electrode of the second capacitor C2 is connected to the voltage source VDD, and the positive electrode of the second capacitor C2 is connected to the switch MOS tube 1.

[0104] See also Figure 3In this embodiment 1, the third capacitor C3 and the fourth capacitor C4 can both be polarized capacitors. The inverting input terminal of the operational amplifier can be grounded in sequence through the positive electrode of the third polarized capacitor C3, the negative electrode of the third polarized capacitor C4, the positive electrode of the fourth polarized capacitor C4, and the negative electrode of the fourth polarized capacitor C4.

[0105] Optionally, see Figure 4 The operational amplifier includes a latch 3101, a first current mirror 31021, a second current mirror 31022, a third current mirror 31023, a first N-type MOS transistor N1 and a second N-type MOS transistor N2;

[0106] A first input terminal of the latch 3101 is connected to a voltage source, a second input terminal of the latch 3101 is connected to the voltage source via a first resistor, a first output terminal of the latch 3101 is connected to a first input terminal of a first current mirror 31021, and a second output terminal of the latch 3101 is connected to a second input terminal of the first current mirror 31021;

[0107] A first output end of the first current mirror 31021 is connected to a first input end of the second current mirror 31022 via a second resistor; a second output end of the first current mirror 31021 is connected to a first input end of the second current mirror 31022;

[0108] The first input terminal and the second input terminal of the third current mirror 31023 are both connected to the voltage source, the first output terminal of the third current mirror 31023 is connected to the source of the first N-type MOS transistor N1, and the second output terminal of the third current mirror 31023 is connected to the source of the second N-type MOS transistor N2 and the output terminal of the operational amplifier;

[0109] The gate of the first N-type MOS transistor N1 is connected to the working voltage, and the drain of the first N-type MOS transistor N1 is connected to the drain of the second N-type MOS transistor N2;

[0110] The gate of the second N-type MOS transistor N2 is connected to the input end of the operational amplifier, and the drain of the second N-type MOS transistor N2 is also connected to the second input end of the second current mirror 31022;

[0111] The first output terminal and the second output terminal of the second current mirror 31022 are both grounded;

[0112] The latch 3101 is used to latch the signal generated by the voltage source;

[0113] The first current mirror 31021 , the second current mirror 31022 , the third current mirror 31023 and the fourth current mirror are used to output the input current in proportion.

[0114] See also Figure 2The third curve in the circuit adds a first capacitor C1, and the operational amplifier includes a latch 3101, a first current mirror 31021, a second current mirror 31022, a third current mirror 31023, a first N-type MOS tube N1, and a second N-type MOS tube N2. The operational amplifier 32 in the above embodiment is directly connected to the voltage source VDD, and a current source is formed through the latch 3101 and the first current mirror 31021. The traditional current source is replaced by the current source. The signal overshoot generated by the operational amplifier 32 is small, and the signal output by the operational amplifier 32 can be quickly adjusted to the required value.

[0115] Optionally, see Figure 4 , the first current mirror 31021 includes a first P-type MOS transistor P1 and a second P-type MOS transistor P2;

[0116] The gate of the first P-type MOS transistor P1 is connected to the gate of the second P-type MOS transistor P2, and the gate of the first P-type MOS transistor P1 is also connected to the drain of the first P-type MOS transistor P1;

[0117] The source of the first P-type MOS transistor P1 serves as the first input terminal of the first current mirror 31021;

[0118] The source of the second P-type MOS transistor P2 serves as the second input terminal of the first current mirror 31021;

[0119] The drain of the first P-type MOS transistor P1 serves as the first output terminal of the first current mirror 31021;

[0120] The drain of the second P-type MOS transistor P2 serves as the second output terminal of the first current mirror 31021;

[0121] In an optional embodiment, the third current mirror includes a third P-type MOS transistor P3 and a fourth P-type MOS transistor P4;

[0122] The gate of the third P-type MOS transistor P3 is connected to the gate of the fourth P-type MOS transistor P4, and the gate of the third P-type MOS transistor P3 is also connected to the drain of the third P-type MOS transistor P3;

[0123] The source of the third P-type MOS transistor P3 serves as the first input terminal of the third current mirror 31023;

[0124] The source of the fourth P-type MOS transistor P4 serves as the second input terminal of the third current mirror 31023;

[0125] The drain of the third P-type MOS tube P3 serves as the first output terminal of the third current mirror 31023;

[0126] The drain of the fourth P-type MOS transistor P4 serves as the second output terminal of the third current mirror 31023;

[0127] In an optional embodiment, the second current mirror 31022 includes a third N-type MOS transistor N3 and a fourth N-type MOS transistor N4;

[0128] The gate of the third N-type MOS transistor N3 is connected to the gate of the fourth N-type MOS transistor N4, and the drain of the third N-type MOS transistor N3 is connected to the gate of the third N-type MOS transistor N3;

[0129] The drain of the third N-type MOS tube N3 serves as the first input terminal of the second current mirror 31022;

[0130] The drain of the fourth N-type MOS transistor N4 serves as the second input terminal of the second current mirror 31022;

[0131] The source of the third N-type MOS transistor N3 serves as the first output terminal of the second current mirror 31022;

[0132] The source of the fourth N-type MOS transistor N4 serves as the second output terminal of the second current mirror 31022 .

[0133] In an optional embodiment, the latch 3101 includes a fifth P-type MOS transistor P5 and a sixth P-type MOS transistor P6;

[0134] The source of the fifth P-type MOS transistor P5 is connected to the first input terminal of the latch 3101, the gate of the fifth P-type MOS transistor P5 is connected to the gate of the sixth P-type MOS transistor P6, and the drain of the fifth P-type MOS transistor P5 is connected to the first output terminal of the latch 3101;

[0135] A source of the sixth P-type MOS transistor P6 is connected to the second input terminal of the latch 3101 , and a drain of the sixth P-type MOS transistor P6 is connected to the second output terminal of the latch 3101 .

[0136] Optionally, the oscillator generator 2 includes a third NOT gate A3, a fourth NOT gate A4 and a fifth NOT gate A5 which are connected end to end in sequence;

[0137] The output end of the fifth NOT gate A5 is respectively connected to the output end of the oscillator generator 2 and the input end of the third NOT gate A3;

[0138] The power supply ends of the third NOT gate A3 , the fourth NOT gate A4 and the fifth NOT gate A5 are connected to the drain of the switch MOS tube 1 .

[0139] Optionally, the voltage output by the voltage source VDD ranges from 1.4V to 1.8V.

[0140] Optionally, see Figure 3 The oscillation circuit may further include a sixth NOT gate A6 and a seventh NOT gate A7 connected end to end. The input end of the sixth NOT gate A6 is connected to the output end of the oscillation generator 2.

[0141] By using the high-frequency oscillation circuit of the present invention, when the voltage source is powered on, the first capacitor C1 raises the voltage at the gate of the switch MOS tube 1 to turn on the switch MOS tube 1, thereby eliminating the process of powering on the voltage source and finally outputting through the control module 3, quickly starting the oscillation generator 2, and quickly generating an oscillation signal.

[0142] Example 2

[0143] See also Figure 5 , this embodiment provides a modulation and demodulation device, including a modulator 201, a demodulator 202 and a high-frequency oscillation circuit as in Embodiment 1;

[0144] The output end of the high frequency oscillation circuit is connected to the first input end of the modulator 201, the second input end of the modulator 201 is connected to the input signal, and the output end of the modulator 201 is connected to the input end of the demodulator 202;

[0145] The output terminal of the demodulator 202 outputs a demodulated signal.

[0146] In this embodiment, the above-mentioned modulation and demodulation device is used to quickly start the oscillation generator, quickly generate an oscillation signal, and quickly perform modulation and demodulation.

[0147] Although the specific embodiments of the present invention are described above, it should be understood by those skilled in the art that this is only for illustration and the protection scope of the present invention is defined by the appended claims. Those skilled in the art may make various changes or modifications to these embodiments without departing from the principles and essence of the present invention, but these changes and modifications all fall within the protection scope of the present invention.

Claims

1. A high frequency oscillation circuit, characterized in that: The high-frequency oscillation circuit includes a switch MOS tube, a first capacitor, an oscillation generator and a control module; The input end of the control module is connected to the output end of the oscillator generator, and the output end of the control module is connected to the gate of the switch MOS tube; A first end of the first capacitor is connected to a voltage source, and a second end of the first capacitor is connected to a gate of the switch MOS tube; The source of the switch MOS tube is connected to the voltage source; The drain of the switch MOS tube is connected to the power supply end of the oscillator generator; The first capacitor is used to raise the voltage at the gate of the switch MOS tube when the voltage source is powered on, so as to turn on the switch MOS tube; The control module is used to continuously output a signal to change the voltage at the gate of the switch MOS tube, thereby changing the current output by the switch MOS tube, and further changing the frequency of the oscillation signal output by the oscillation generator.

2. The high frequency oscillation circuit according to claim 1, characterized in that: The high frequency oscillation circuit further includes a second capacitor; A first end of the second capacitor is connected to the gate of the switch MOS tube, and a second end of the second capacitor is connected to the voltage source; The second capacitor is used to perform frequency compensation on the signal output by the control module.

3. The high frequency oscillation circuit according to claim 1, characterized in that: The high-frequency oscillation circuit further includes a filter capacitor, a first end of the filter capacitor is connected to the power supply end of the oscillation generator, and a second end of the filter capacitor is grounded.

4. The high frequency oscillation circuit according to claim 1, characterized in that: The control module includes an RC circuit and an operational amplifier; The first input end of the RC circuit is connected to a voltage source, the second input end of the RC circuit is connected to the output end of the oscillator generator, and the output end of the RC circuit is connected to the inverting input end of the operational amplifier; The RC circuit is used to input a first signal to the operational amplifier, and the operational amplifier is used to output a second signal to the switch MOS tube according to the first signal; The RC circuit is further used to determine the voltage of the second signal according to the total resistance value and the total capacitance value of the RC circuit.

5. The high frequency oscillation circuit according to claim 4, characterized in that: The RC circuit includes a fine-tuning resistor, a third capacitor, a fourth capacitor, a first NOT gate and a second NOT gate; The first end of the fine-tuning resistor is connected to the voltage source, and the second end of the fine-tuning resistor is connected to the inverting input end of the operational amplifier; The inverting input terminal of the operational amplifier is connected to ground in sequence through the first terminal of the third capacitor, the second terminal of the third capacitor, the first terminal of the fourth capacitor and the second terminal of the fourth capacitor; The output end of the oscillator generator is connected to the first end of the fourth capacitor via the input end of the second NOT gate, the output end of the second NOT gate, the input end of the first NOT gate and the output end of the first NOT gate in sequence; The power supply terminal of the first NOT gate is connected to the inverting input terminal of the operational amplifier; The fine-tuning resistor is used to pull down the voltage of the reverse input terminal of the operational amplifier; The first NOT gate and the second NOT gate are both used to enhance the driving capability of the oscillation signal input to the operational amplifier; The first NOT gate and the second NOT gate are also used to perform level conversion on the oscillation signal input to the operational amplifier; The second NOT gate is also used to reduce the peak-to-peak value of the oscillation signal input to the operational amplifier; The third capacitor and the fourth capacitor are used to adjust the voltage value of the second signal.

6. The high frequency oscillation circuit according to claim 4 or 5, characterized in that: The operational amplifier comprises a latch, a first current mirror, a second current mirror, a third current mirror, a first N-type MOS transistor and a second N-type MOS transistor; The first input end of the latch is connected to a voltage source, the second input end of the latch is connected to the voltage source via a first resistor, the first output end of the latch is connected to the first input end of the first current mirror, and the second output end of the latch is connected to the second input end of the first current mirror; A first output end of the first current mirror is connected to a first input end of the second current mirror through a second resistor; The first input terminal and the second input terminal of the third current mirror are both connected to a voltage source, the first output terminal of the third current mirror is connected to the source of the first N-type MOS transistor, and the second output terminal of the third current mirror is connected to the source of the second N-type MOS transistor and the output terminal of the operational amplifier; The gate of the first N-type MOS transistor is connected to the working voltage, and the drain of the first N-type MOS transistor is connected to the drain of the second N-type MOS transistor; The gate of the second N-type MOS transistor is connected to the input end of the operational amplifier, and the drain of the second N-type MOS transistor is also connected to the second input end of the second current mirror; The first output terminal and the second output terminal of the second current mirror are both grounded; The latch is used to latch the signal generated by the voltage source; The first current mirror, the second current mirror, the third current mirror and the fourth current mirror are used to output the input current in proportion.

7. The high frequency oscillation circuit according to claim 6, characterized in that: The first current mirror includes a first P-type MOS transistor and a second P-type MOS transistor; The gate of the first P-type MOS transistor is connected to the gate of the second P-type MOS transistor, and the gate of the first P-type MOS transistor is also connected to the drain of the first P-type MOS transistor; The source of the first P-type MOS tube serves as the first input terminal of the first current mirror; The source of the second P-type MOS tube serves as the second input terminal of the first current mirror; The drain of the first P-type MOS tube serves as the first output end of the first current mirror; The drain of the second P-type MOS tube serves as the second output end of the first current mirror; And / or, the third current mirror includes a third P-type MOS transistor and a fourth P-type MOS transistor; The gate of the third P-type MOS tube is connected to the gate of the fourth P-type MOS tube, and the gate of the third P-type MOS tube is also connected to the drain of the third P-type MOS tube; The source of the third P-type MOS tube serves as the first input terminal of the third current mirror; The source of the fourth P-type MOS tube serves as the second input terminal of the third current mirror; The drain of the third P-type MOS tube serves as the first output end of the third current mirror; The drain of the fourth P-type MOS tube serves as the second output end of the third current mirror; And / or, the second current mirror includes a third N-type MOS transistor and a fourth N-type MOS transistor; The gate of the third N-type MOS transistor is connected to the gate of the fourth N-type MOS transistor, and the drain of the third N-type MOS transistor is connected to the gate of the third N-type MOS transistor; The drain of the third N-type MOS transistor serves as the first input terminal of the second current mirror; The drain of the fourth N-type MOS transistor serves as the second input terminal of the second current mirror; The source of the third N-type MOS transistor serves as the first output end of the second current mirror; The source of the fourth N-type MOS transistor serves as the second output end of the second current mirror.

8. The high frequency oscillation circuit according to claim 1, characterized in that: The oscillator generator comprises a third NOT gate, a fourth NOT gate and a fifth NOT gate which are connected end to end in sequence; The output end of the fifth NOT gate is connected to the output end of the oscillator generator and the input end of the third NOT gate respectively; The power supply ends of the third NOT gate, the fourth NOT gate and the fifth NOT gate are connected to the drain of the switch MOS tube.

9. The high frequency oscillation circuit according to claim 1, characterized in that: The voltage output by the voltage source ranges from 1.4V to 1.8V.

10. A modulation and demodulation device, characterized in that: The device comprises a modulator, a demodulator and a high-frequency oscillation circuit as claimed in any one of claims 1 to 9; The output end of the high frequency oscillation circuit is connected to the first input end of the modulator, the second input end of the modulator is connected to the input signal, and the output end of the modulator is connected to the input end of the demodulator; The output end of the demodulator outputs a demodulated signal.

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