IGBT, method of operating RC IGBT, circuit including IGBT

Abstract

The invention discloses an IGBT, a method of operating an RC IGBT, and a circuit including the IGBT. An IGBT includes, in a single chip, an active region configured to conduct a forward load current between a first load terminal at a front side of a semiconductor body of the IGBT and a second load terminal at a back side of the semiconductor body. The active region is separated into at least: a first IGBT region, at least 90% of which is configured to conduct a forward load current based on a first control signal; and a second IGBT region, at least 90% of which is configured to conduct a forward load current based on a second control signal. The first MOS channel conductivity-to-area ratio is determined by a total channel width in the first IGBT region divided by a total lateral area of the first IGBT region. The second MOS channel conductivity-to-area ratio is determined by a total channel width in the second IGBT region divided by a total lateral area of the second IGBT region. The second MOS channel conductivity to area ratio is less than 80% of the first MOS channel conductivity to area ratio in total.

Description

Technical Field

[0001] The present description relates to embodiments of an IGBT, to embodiments of operating an IGBT, and to embodiments of a circuit including an IGBT. Background Art

[0002] Many functions of modern devices in automotive, consumer and industrial applications - such as converting electrical energy and driving electric motors or electric machines - rely on power semiconductor devices. For example, insulated gate bipolar transistors (IGBTs), metal oxide semiconductor field effect transistors (MOSFETs) and diodes, to name a few, have been used in a variety of applications including but not limited to switches in power supplies and power converters.

[0003] A power semiconductor device typically includes a semiconductor body configured to conduct a forward load current along a load current path between two load terminals of the device. The load current is typically conducted by means of an active region of the power semiconductor device. The active region is typically surrounded by an edge termination region that is terminated by the edge of the chip.

[0004] In the case of a controllable power semiconductor device such as a transistor, the load current path may be controlled by means of an insulated electrode, which is usually referred to as a gate electrode. For example, upon receiving a corresponding control signal, for example from a driver unit, via a control terminal of the device, the control electrode may set the power semiconductor device in one of a forward conducting state and a forward blocking state.

[0005] Furthermore, some devices provide reverse load current capability. In these devices, the active region of the semiconductor body is further configured to conduct a reverse load current along a reverse load current path between two load terminals of the device. For example, an RC (reverse current) IGBT is a representative of such a device. In an RC IGBT, a single chip accommodates an IGBT structure and a diode structure. Compared to a diode and an IGBT on a separate chip connected in anti-parallel to each other, the RC IGBT presents some advantages, such as in terms of turn-on loss, reverse recovery loss and / or thermal behavior, but it may also be more complex to control.

[0006] Furthermore, in order to more accurately influence the switching behavior of the transistor, two control signals or more than two control signals may be provided to control the transistor, for example, a dual-gate IGBT (or dual-gate RC IGBT) may be controlled based on two control signals. Summary of the invention

[0007] The subject matter of the independent claims is set out. Features of the exemplary embodiments are defined in the dependent claims.

[0008] According to a first embodiment, an IGBT includes an active region in a single chip, the active region being configured to conduct a forward load current between a first load terminal at a front side of a semiconductor body of the IGBT and a second load terminal at a back side of the semiconductor body. The active region is separated into at least a first IGBT region, at least 90% of which is configured to conduct a forward load current based on a first control signal, and a second IGBT region, at least 90% of which is configured to conduct a forward load current based on a second control signal. A first MOS channel conductivity to area ratio is determined by a total channel width in the first IGBT region divided by a total lateral area of ​​the first IGBT region. A second MOS channel conductivity to area ratio is determined by a total channel width in the second IGBT region divided by a total lateral area of ​​the second IGBT region. The second MOS channel conductivity to area ratio is less than 80% of the first MOS channel conductivity to area ratio in total.

[0009] According to a second embodiment, an IGBT includes an active region in a single chip, the active region being configured to conduct a forward load current between a first load terminal at a front side of a semiconductor body of the IGBT and a second load terminal at a back side of the semiconductor body. The active region is separated into at least: a first IGBT region including a first MOS channel exhibiting a first threshold voltage, wherein at least 90% of the first IGBT region is configured to conduct the forward load current based on a first control signal; and a second IGBT region including a second MOS channel exhibiting a second threshold voltage, the second threshold voltage amounting to at least 115% of the first threshold voltage, wherein at least 90% of the second IGBT region is configured to conduct the forward load current based on a second control signal.

[0010] According to a further embodiment, a method of operating an IGBT according to the first embodiment or according to the second embodiment is proposed. The method comprises: controlling a first IGBT region based on a first control signal; and controlling a second IGBT region based on a second control signal.

[0011] According to yet another further embodiment, a circuit is provided. The circuit includes: an IGBT according to the first embodiment or according to the second embodiment; and a MOSFET connected in parallel with the IGBT.

[0012] Those skilled in the art will recognize additional features and advantages upon reading the following detailed description, and upon viewing the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The parts in the drawings are not necessarily to scale, instead emphasis is placed on illustrating the principles of the present invention. In addition, in the drawings, similar reference numerals designate corresponding parts. In the drawings:

[0014] Figure 1 schematically and exemplarily illustrates a section of a horizontal projection of an IGBT according to one or more embodiments;

[0015] Figure 2 schematically and exemplarily illustrates a section of a horizontal projection of an active area of ​​an IGBT according to one or more embodiments;

[0016] Figure 3 schematically and exemplarily illustrates a section of a vertical cross section of an IGBT according to one or more embodiments;

[0017] Figure 4 schematically and exemplarily illustrates a section of a vertical cross-section of a second IGBT region of an IGBT according to one or more embodiments;

[0018] Figure 5 schematically and exemplarily illustrates a section of a vertical cross-section of a first IGBT region of an IGBT according to one or more embodiments;

[0019] Figure 6 schematically and exemplarily illustrate two variants of a section of a perspective projection of a second IGBT region of an IGBT according to one or more embodiments;

[0020] Figure 7 schematically illustrates some examples of methods of operating an IGBT according to one or more embodiments; and

[0021] Figure 8 schematically and exemplarily illustrates transfer characteristics of a first IGBT region and a second IGBT region of an IGBT according to one or more embodiments;

[0022] Fig. 9 schematically and exemplarily illustrates output characteristics of a first IGBT region and a second IGBT region of an IGBT during a turn-off operation according to one or more embodiments; and

[0023] Fig.10 Circuits according to one or more embodiments are schematically and exemplarily illustrated. DETAILED DESCRIPTION

[0024] In the following detailed description, reference is made to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration specific embodiments in which the invention may be practiced.

[0025] In this regard, directional terms, such as "top", "bottom", "below", "front", "back", "dorsal", "front end", "end", "above", etc., may be used with reference to the orientation of the various figures described. Because the various portions of the embodiments may be positioned in a plurality of different orientations, the directional terms are used for illustrative purposes and are in no way limiting. It is to be understood that other embodiments may be utilized and that structural or logical changes may be made without departing from the scope of the present invention. The following detailed description is therefore not to be taken in a limiting sense, and the scope of the present invention is defined by the appended claims.

[0026] Reference will now be made in detail to various embodiments, one or more examples of which are illustrated in the various figures. Each example is provided by way of explanation and is not intended to be a limitation of the present invention. For example, a feature illustrated or described as part of one embodiment may be used in other embodiments or used in combination with other embodiments to produce yet another further embodiment. The present invention is intended to include such modifications and variations. The examples are described using specific language, which should not be construed as limiting the scope of the appended claims. The accompanying drawings are not to scale and are for illustration purposes only. For clarity, if not otherwise stated, the same elements or manufacturing steps have been designated by the same reference in different drawings.

[0027] The term "horizontal" as used in this specification is intended to describe an orientation substantially parallel to a horizontal surface of a semiconductor structure or semiconductor substrate. For example, this may be a surface of a semiconductor wafer or die or chip. For example, both the first lateral direction X and the second lateral direction Y mentioned below may be horizontal directions, wherein the first lateral direction X and the second lateral direction Y may be perpendicular to each other.

[0028] The term "vertical" as used in this specification is intended to describe an orientation that is arranged substantially perpendicular to a horizontal surface, i.e. parallel to the normal direction of the surface of the semiconductor wafer / chip / die. For example, the extension direction Z mentioned below may be an extension direction perpendicular to both the first lateral direction X and the second lateral direction Y. The extension direction Z is also referred to herein as the "vertical direction Z".

[0029] In this specification, n-doping is referred to as the “first conductivity type” and p-doping is referred to as the “second conductivity type.” Alternatively, the opposite doping relationship may be adopted so that the first conductivity type may be p-doped and the second conductivity type may be n-doped.

[0030] In the context of this specification, the terms "ohmic contact", "electrical contact", "ohmic connection" and "electrical connection" are intended to describe the presence of a low-ohmic electrical connection or a low-ohmic current path between two regions, sections, zones, parts or locations of a semiconductor device or between different terminals of one or more devices or between a terminal or metallization or electrode of a semiconductor device and a part or location of a semiconductor device, where "low ohmic" may mean that the characteristics of the corresponding contact are essentially unaffected by ohmic resistance. Further, in the context of this specification, the term "contact" is intended to describe the presence of a direct physical connection between two elements of the corresponding semiconductor device; for example, the transition between two elements that are in contact with each other may not include additional intermediate elements, etc.

[0031] Furthermore, in the context of this specification, if not stated otherwise, the term "electrically insulated" is used in its generally validly understood context and is therefore intended to describe that two or more components are located separately from each other and there is no ohmic connection connecting those components. However, components that are electrically insulated from each other can still be coupled to each other, such as mechanically and / or capacitively and / or inductively and / or electrostatically (e.g., in the case of a junction). To give an example, for example, with the aid of an insulator, such as a dielectric, two electrodes of a capacitor can be electrically insulated from each other and simultaneously mechanically and capacitively coupled to each other.

[0032] The specific embodiments described in this specification relate to but are not limited to IGBTs, such as power semiconductor devices that can be used in power converters or power supplies. Therefore, in an embodiment, such an IGBT can be configured to carry a load current, which is fed to a load and / or is provided by a power source accordingly. For example, the IGBT may include one or more active power semiconductor unit cells, such as a monolithically integrated diode cell, a derivative of a monolithically integrated diode cell, a monolithically integrated transistor cell, such as a monolithically integrated IGBT cell and / or its derivatives. Such a diode / transistor cell can be integrated in a power semiconductor module. A plurality of such cells can constitute a cell field arranged in an active region of a power semiconductor device.

[0033] The term "blocking state" of an IGBT may refer to a condition when the RC IGBT is in a state configured to block the flow of load current when an external voltage is applied. More particularly, the IGBT may be configured to block a forward load current through the RC IGBT when a forward voltage bias is applied. In contrast, the IGBT may be configured to conduct a forward load current in the "on-state" of the IGBT when a forward voltage bias is applied. The transition between the blocking state and the on-state may be controlled by a control electrode or more particularly by the potential of the control electrode. Of course, the electrical characteristics may only apply within a predetermined operating range of current density and external voltage within the IGBT. Therefore, the term "forward biased blocking state" may refer to a condition in which the IGBT is in a blocking state when a forward voltage bias is applied.

[0034] The term "IGBT" as used in this specification is intended to describe an IGBT with high voltage blocking capability and / or high current carrying capability on a single chip. In other words, such an IGBT is intended for high currents and / or high voltages, the high currents being typically in the ampere range, e.g. up to tens or hundreds of amperes, and the high voltages being typically above 15V, more typically 100V and above, e.g. up to at least 400V or even more, e.g. up to at least 3kV or even up to 10kV or more, depending on the respective application.

[0035] For example, the term "IGBT" as used in this specification does not refer to a logic semiconductor device that is used, for example, to store data, calculate data, and / or other types of semiconductor-based data processing.

[0036] For example, the IGBT described below may be a single semiconductor chip, for example, exhibiting a stripe cell configuration (or a honeycomb / pin cell configuration), and may be configured to be employed as a power component in low voltage, medium voltage, and / or high voltage applications.

[0037] Figure 1 Schematically and exemplarily, a horizontally projected section of an IGBT 1 according to one or more embodiments is shown. Figure 3 The exemplary vertical cross section shown in Figure 2 A more detailed illustration of an exemplary active region 1-2.

[0038] The IGBT 1 comprises a semiconductor body 10 coupled to a first load terminal at a front side (also referred to as a first side) 110 and to a second load terminal 12 at a back side (also referred to as a second side) 120, which is opposite to the front side 110 with respect to a vertical direction Z. The semiconductor body 10 is part of a single chip, which comprises an active region 1-2, which is configured to conduct a forward load current between the first load terminal 11 and the second load terminal 12. In an embodiment, the IGBT 1 may be configured as an RC IGBT; in this case, the active region 1-2 is configured to conduct both a forward load current and a reverse load current between the first load terminal 11 and the second load terminal 12.

[0039] A vertical thickness d of the semiconductor body 10 may be defined as a distance between the front side 110 and the back side 120 along a vertical direction Z, measured, for example, at a horizontal center of the active regions 1 - 2 .

[0040] The IGBT 1 may present a vertical configuration according to which a forward load current (optionally both, in case of said RCIGBT configuration, and a reverse load current) flows substantially parallel to the vertical direction Z.

[0041] For example, the first load terminal 11 may be a source (or emitter) terminal, and the second load terminal 12 may be a drain (collector) terminal.

[0042] The active region 1-2 is surrounded by an edge termination region 1-3 which is terminated by a chip edge 1-4. Herein, the terms "active region" (sometimes also referred to as "cell field"), "edge termination region" and "chip edge" have the technical meanings that a skilled person typically associates with them in the context of an IGBT and are therefore not explained in further detail.

[0043] According to the embodiments disclosed herein, the active region 1 - 2 of the IGBT 1 is separated into at least a first IGBT region 1 - 21 and a second IGBT region 1 - 22 .

[0044] For example, at least 90% of the first IGBT regions 1-21 are configured to conduct a forward load current based on the first control signal 13-21. The share may even be greater than 90%, such as at least 95%, at least 98% or even total 100%.

[0045] For example, at least 90% of the second IGBT regions 1-22 are configured to conduct a forward load current based on the second control signals 13-22. The share may even be greater than 90%, such as at least 95%, at least 98% or even total 100%.

[0046] As in Figure 2As schematically illustrated in FIG. 1 , the IGBT 1 may include a first control terminal 13-A and a second control terminal 13-B. In an embodiment, the first control terminal 13-A is electrically insulated from the second control terminal 13-B. The first control signal 13-21 may be provided via the first control terminal 13-A, and the second control signal 13-22 may be provided via the second control terminal 13-B. Figure 2 In contrast to the schematic illustration in FIG. 1 , according to which the control terminals 13-A and 13-B are arranged in the IGBT regions 1-21, 1-22, respectively, the control terminals 13-A and 13-B can be configured outside thereof, for example in another part of the active region 1-2 or in the edge termination region 1-3 or also in some other place. The manner in which an electrical connection is achieved between the control electrodes associated with the first control terminal 13-A and between the control electrodes associated with the second control terminal 13-B is known to the skilled person and is therefore not explained in this document.

[0047] For example, the second control signal 13-22 is independent of the first control signal 13-21. For example, the second control signal 13-22 may be at least temporarily different from the first control signal 13-21. For example, the second control signal 13-22 is generated separately from the first control signal 13-21. Thus, the control of the forward load current in the first IGBT region 1-21 may be independent of the control of the forward load current in the second IGBT region 1-22. Having said that, it should be understood that in some embodiments, the second IGBT region 1-22 may be controlled based on both the first control signal 13-21 and the second control signal 13-22.

[0048] According to embodiments described herein, the first IGBT region 1 - 21 may exhibit a configuration different from that of the second IGBT region 1 - 22 .

[0049] For example:

[0050] - determining a first MOS channel conductivity to area ratio by a total channel width in the first IGBT region 1 - 21 and a total lateral area of ​​the first IGBT region 1 - 21 ; and

[0051] - determining a second MOS channel conductivity to area ratio by the total channel width in the second IGBT region 1 - 22 and the total lateral area of ​​the second IGBT region 1 - 22; and

[0052] - The second MOS channel conductivity to area ratio is less than 80% of the first MOS channel conductivity to area ratio in total.

[0053] The above condition may apply if both the first control signal 13-21 and the second control signal 13-22 present respective voltage values ​​corresponding to the (nominal) ON state, i.e. the forward conduction state, of the IGBT 1. For example, the above condition applies if both the first control signal 13-21 and the second control signal 13-22 present values ​​such as +15 V or +8 V, etc.

[0054] That is, the second MOS channel conductivity to area ratio may be different from the first MOS channel conductivity to area ratio. For example, the second MOS channel conductivity to area ratio amounts to less than 80% of the first MOS channel conductivity to area ratio or even less than 60% of the first MOS channel conductivity to area ratio.

[0055] Additionally or alternatively to the examples explained in the previous two paragraphs, the following may apply:

[0056] - the first IGBT region 1 - 21 comprises a first MOS channel exhibiting a first threshold voltage; and

[0057] - the second IGBT region 1 - 22 comprises a second MOS channel exhibiting a second threshold voltage, the second threshold voltage amounting to at least 115% of the first threshold voltage.

[0058] Therefore, the second threshold voltage occurring in the second IGBT region 1-22 may be greater than the first threshold voltage occurring in the first IGBT region 1-21. For example, the second threshold voltage amounts to at least 120% of the first threshold voltage or even greater than 130% of the first threshold voltage.

[0059] Based on the different configurations of the two IGBT regions 1-21 and 1-22 and based on the two control signals 13-21 and 12-22, a beneficial switching behavior can be achieved together with improved device robustness. For example, the second IGBT region 1-22 is configured to temporarily conduct up to three times the nominal forward load current of the IGBT when the second control signal 13-22 corresponds to the nominal ON state of the IGBT 1 and when the first control signal 13-21 transitions to or corresponds to the disconnection (OFF) state of the IGBT 1. That is, when the first IGBT region 1-21 is turned off to block the flow of the forward load current in the first IGBT region 1-21, even in the case where the overload current totals up to three times the nominal forward load current of the IGBT, the forward load current of the entire device can be temporarily conducted only through the second IGBT region 1-22, and the second IGBT region 1-22 can be turned off after the first IGBT region 1-21 is turned off. For example, this can reduce the total amount of charge carriers stored in the IGBT 1 before the current is finally turned off. This reduces the turn-off losses.

[0060] For example, another possible difference in the configuration of the two IGBT regions 1-21 and 1-22 can be realized based on the body region 102 (see Figure 3 ). For example, the body region 102 extends in both the first IGBT region 1-21 and the second IGBT region 1-22, wherein the average dopant dose of the body region of the second IGBT region amounts to at least 120% of the body region dopant dose of the first IGBT region. The difference may be even more significant; for example, the average dopant dose of the body region of the second IGBT region amounts to at least 140% of the body region dopant dose of the first IGBT region. For example, the first MOS channel and the second MOS channel described above may be induced in the body region 102 based on the first control signal 13-21 and the second control signal 13-22. Such a difference in body dose may also produce a corresponding difference in threshold voltages in the IGBT regions 1-21 and 1-22, as exemplarily described above.

[0061] Compared to the first IGBT region 1-21, increasing the dopant concentration of the body region 102 in the second IGBT region 1-22 can reduce the impedance to holes (charge carriers) in the body region 102 of the second IGBT region 1-22, which can produce increased latching robustness and improved ability to temporarily conduct overload current in the second IGBT region 1-22. Portions of the second IGBT region 1-22 can have the same body dopant as in the first IGBT region 1-21. However, the source region 101 is placed in the higher doped p body portion. In addition, in the first IGBT region 1-21, the dopant concentration of the body region 102 can be locally increased to achieve such increased latching robustness. For the structured p body dose in the first IGBT region 1-21, if the n source region 101 is located in two parts, different threshold voltages can be present. There can be a larger area 1-21 with a lower p body dose and another large area with a higher p body dose. In case of overcurrent shutdown with G1 voltage return (explained later in Abs. 121), there is a certain voltage window where only the portion with lower p-body dose is turned on.

[0062] It should be understood that the first IGBT region 1-21 and the second IGBT region 1-22 form a major portion of the active area 1-2. For example, the sum of the first IGBT region 1-21 and the second IGBT region 1-22 totals at least 80%, at least 90%, or even greater than 95% of the active area 1-2. Further, each of the first IGBT region 1-21 and the second IGBT region 1-22 may total at least 30% of the active area 1-2.

[0063] The first IGBT region 1-21 may be larger than the second IGBT region 1-22. For example, the first IGBT region 1-21 is at least twice as large as the second IGBT region 1-22.

[0064] According to an example, the first IGBT region 1-21 is configured to be controlled based only on the first control signal 13-21 and the second IGBT region 1-22 is configured to be controlled based on the second control signal 13-22. Optionally, the second IGBT region 1-22 may be configured to be controlled based on the first control signal 13-21 and the second control signal 13-22. In this example, the forward saturation current of the second IGBT region 1-22 may be limited by the chip design. For example, the saturation current of the forward load current of the IGBT 1 in the case where only the second IGBT region 1-22 is in the forward conduction state may be at most three times or even at most two times the nominal value of the forward load current of the IGBT 1 in the case where both the IGBT regions 1-21 and 1-22 are in the forward conduction state. In other words, the saturation current of the forward load current of the IGBT 1 in the case where only the second control signal 13-22 is in the forward conduction state may be at most three times or even at most two times the nominal value of the forward load current of the IGBT 1. Alternatively or additionally, the forward saturation current of the second IGBT region 1-22 (when only the second control signal 13-22 is in the on-state) may be limited to a smaller value by the chip design compared to the first IGBT region 1-21 (when the first control signal 13-21 is in the on-state). For example, the share of the forward saturation current of the second IGBT region 1-22 (when only the second control signal 13-22 is in the on-state) may be at least 10% lower or even less than 20% lower than the share of the second IGBT region 1-22 to the total active IGBT area of ​​the IGBT 1.

[0065] As will be further explained below, based on the first control signal 13-21 and the second control signal 13-22, the first IGBT region 1-21 and the second IGBT region 1-22 may be switched asynchronously. For example, the second IGBT region 1-22 may be switched on before or after switching on the first IGBT region 1-21 with a specific time delay. In addition, the second IGBT region 1-22 may be switched off after switching on the first IGBT region 1-21 with a specific time delay. This situation may be problematic to some extent because the second IGBT region 1-22 may be relatively small, and if the first IGBT region 1-21 is switched off before switching off the second IGBT region 1-22, the current density may increase above a critical level because all or almost all of the load current must be temporarily conducted by the second IGBT region 1-22.

[0066] To this end, it is proposed herein to design the second IGBT region 1-22 so that it exhibits high robustness, for example by limiting the second MOS channel conductivity to area ratio as exemplarily explained above. There are many possibilities to limit the second MOS channel conductivity to area ratio, some of which are described below, such as a corresponding configuration of at least one of the source region, the body region and the trench-mesa pattern in the second IGBT region 1-22.

[0067] Each of the first IGBT region 1-21 and the second IGBT region 1-22 may present a total lateral extension of at least 60% of the vertical thickness d of the semiconductor body 10. One or both of the total lateral extensions may be even greater, such as at least 100%, 150% or even more than 200% of the vertical thickness d of the semiconductor body 10.

[0068] The first IGBT region 1-21 is spatially separated from the second IGBT region 1-22; for example, there is no spatial overlap between the first IGBT region 1-21 and the second IGBT region 1-22. The first IGBT region 1-21 may be a (single) first continuous region and the second IGBT region 1-22 may be a (single) second continuous region. In other embodiments, the first IGBT region 1-21 is divided into two or more spatially distributed first sub-regions, and the second IGBT region 1-22 is divided into two or more spatially distributed second sub-regions. Even in the latter case, there is no lateral overlap between the first sub-regions constituting the first IGBT region 1-21 and the second sub-regions constituting the second IGBT region 1-22.

[0069] In addition to the first IGBT region 1 - 21 and the second IGBT region 1 - 22 , the active region 1 - 2 may optionally also include only a diode region 1 - 23 , eg if the IGBT 1 is configured as a RC IGBT, as will be explained in more detail below.

[0070] If only a diode region 1-23 is provided, only the diode region 1-23 may be smaller than each of the first IGBT region 1-21 and the second IGBT region 1-22. Only the diode region 1-23 may have a total lateral extension of at least 40% of the vertical thickness d of the semiconductor body 10. For example, at least 90% of the optional only diode region 1-23 is configured to conduct only reverse load current (but, for example, not conduct forward load current). In an embodiment, only the diode region 1-23 is not subjected to the first control signal 13-21 or the second control signal 13-22. For example, only the diode region 1-23 does not include any control trench. Further, it can be provided that only the diode region 1-23 does not include any semiconductor source region 101 electrically connected to the first load terminal 11.

[0071] It should be understood that, if Figure 2 The arrangement of the first IGBT region 1-21, the second IGBT region 1-22 and the optional diode-only region 1-23 illustrated in the figure is merely exemplary. For example, the regions 1-21, 1-22 and 1-23 need not necessarily be continuous regions but may also consist of spatially distributed sub-regions, as explained above. In addition, instead of being centrally arranged, the first IGBT region 1-21 may alternatively or additionally be arranged in a peripheral portion of the active region 1-2. For example, the regions 1-21, 1-22 and (optionally) 1-23 may present corresponding rectangular lateral perimeters and may be arranged according to a strip pattern in the active region 1-2. The latter variant may be advantageous for providing control signals to the regions 1-21 and 1-22.

[0072] Therefore, a skilled person may size and arrange the three regions 1 - 21 , 1 - 22 , and 1 - 23 within the active region 1 - 2 according to the characteristics of a given IGBT 1 and other conditions.

[0073] Furthermore, the expression "at least 90%" used in the context of describing these zones should express that the main purpose of the respective zone is to conduct only forward load current (in the case of the first IGBT zone 1-21) or only reverse load current (in the case of the optional diode-only zone 1-23), or to conduct, for example, both forward and reverse load current (in the case of the specific configuration of the second IGBT zone 1-22).

[0074] In an embodiment, the characteristics of the zones may deviate in corresponding smaller sub-portions of 10% or less of the zones, such as in a transition zone where one of the zones 1-21, 1-22 and 1-23 adjoins another of these zones. Such transitions will be further described in more detail below.

[0075] We will now refer in more detail to Figure 3 , Figure 3 A section of a vertical cross section of an exemplary embodiment of an active region 1-2 is illustrated, the active region 1-2 comprising a first IGBT region 1-21, a second IGBT region 1-22 and a diode-only region 1-23. It is again emphasized that the diode-only region 1-23 is optional. In other embodiments, the diode-only region 1-23 is not provided.

[0076] As illustrated, the active region 1-2 presents a vertical configuration in which the first load terminal 11 is arranged at the semiconductor body front side 110 and the second load terminal 12 is arranged at the semiconductor body back side 120. The first load terminal 11 and the second load terminal 12 may be shared by each of the first IGBT region 1-21, the second IGBT region 1-22, and the diode-only region 1-23.

[0077] The drift zone 100 of the first conductivity type may form a major central portion of the semiconductor body 10 with respect to the vertical direction Z. The drift zone 100 may be shared by each of the first IGBT region 1 - 21 , the second IGBT region 1 - 22 and, if present, the diode-only region 1 - 23 .

[0078] Depending on the distribution of the first IGBT region 1 - 21 , the second IGBT region 1 - 22 and, if present, only the diode region 1 - 23 , the active region 1 - 2 may be configured both at the front side 110 and at the back side 120 .

[0079] For example, with respect to the back side 120 which is in electrical connection with the second load terminal 12, a back side emitter 108 coupled to the drift region 100 is arranged, wherein the back side emitter 108 is configured according to the separation of the active region 1-2 into at least a first IGBT region 1-21, a second IGBT region 1-22 and (if present) only a diode region 1-23.

[0080] The illustrated exemplary IGBT 1 presents an RC IGBT configuration. In such a case, the following may apply:

[0081] - the first IGBT region 1 - 21 presents an IGBT-only configuration for conducting only forward load current; and

[0082] - the second IGBT region 1-22 presents an RCIGBT configuration for conducting both forward and reverse load currents; and optionally, wherein

[0083] -Diode-only zone 1-23 presents a diode-only configuration for conducting only reverse load current.

[0084] Thus, the ability to conduct reverse load current is established through the second IGBT region 1-22 and the optional diode-only region 1-23. In an embodiment, the backside emitter 108 may reflect this configuration and may include:

[0085] - a first section 108 - 21 of the second conductivity type in a portion of the active area 1 - 2 in which the first IGBT area 1 - 21 (and only the IGBT area 1 - 21 ) is present;

[0086] a second section 108-22, comprising both a first sub-section 108-221 of the first conductivity type and a second sub-section 108-222 of the second conductivity type, in a portion of the active region 1-2 in which the second IGBT region 1-22 (RC IGBT region 1-22) is present;

[0087] - and optionally, if a diode-only region 1-23 is implemented, a third section 108-23 of the first conductivity type in the portion of the active region 1-2 in which the diode-only region 1-23 is present.

[0088] For example, the first segment 108 - 21 of the backside emitter 108 is only of the second conductivity type. That is, in an embodiment, the first segment 108 - 21 does not include any portion of the first conductivity type.

[0089] Furthermore, the first section 108 - 21 of the backside emitter 108 may have a horizontal area of ​​at least 5*10 12 cm -2 The average dopant dose may be even greater, for example amounting to at least 1*10 13 cm -2 or 1*10 14 cm -2 Nevertheless, in embodiments, the first segment 108 - 21 of the backside emitter 108 may exhibit a variation in dopant concentration and / or dopant dosage along at least one of the first X and second Y lateral directions.

[0090] Now with respect to the second section 108-22 of the backside emitter 108, in the embodiment where the second IGBT region 1-22 presents an RC IGBT configuration, each of the first subsections 108-221 of the second section 108-22 of the backside emitter 108 presents at least 1*10 14 cm -2 The average dopant dose may be even greater, for example, totaling at least 5*10 14 cm -2 or 1*10 15 cm -2 .

[0091] In another embodiment in which the second IGBT region 1-22 exhibits a regular IGBT (i.e., non-RC IGBT) configuration, the second section 108-22 of the backside emitter 108 may be configured identically to the first section 108-21 in terms of thickness and dopant concentration. However, for lower turn-off losses it may be advantageous to provide the second section 108-22 of the backside emitter 108 with a lower average dopant dose than the average dopant dose of the first section 108-21 of the backside emitter 108. For such a structure, it may be beneficial to extend the second section 108-22 into the low saturation IGBT region 1-21 in such a way that the overlap between 108-22 and 1-21 is in the range between 0.3d and 3d, for example between 0.5d and d.

[0092] Further, each of the first subsections 108-221 may be moved away from the diode-only region 1-23 by a second distance d2 of at least 20% of the thickness d of the semiconductor body 10. For example, based on the second distance d2, it may be ensured that the influence of both the first control signal 13-21 and the second control signal 13-22 on the diode-only region 1-23 is small.

[0093] In the case where only diode regions 1-23 are provided, the third section 108-23 of the backside emitter 108 may be a region of only the first conductivity type. In another embodiment, the third section 108-23 may include a sub-section of the second conductivity type (not shown) which is also electrically connected to the second load terminal, such as a "n-short" of the first conductivity type / a "p-short" of the first sub-section 108-221 similar to the second section 108-22 of the backside emitter 108.

[0094] In an embodiment, the IGBT 1 further comprises a field stop zone 107 of the first conductivity type, which is coupled to both the drift zone 100 and the back emitter 108. The dopant concentration of the field stop zone 107 may be greater than the dopant concentration of the drift zone 100. For example, the dopant concentration of the field stop zone 107 amounts to at least 10 times the dopant concentration of the drift zone 100.

[0095] As shown, the thickness of the first section 108-21, the second section 108-22, and (if implemented) the third section 108-23 of the backside emitter 108 can vary. For example, the third section 108-23 of the backside emitter 108 in the optional diode-only region 1-23 can be thinner than the remaining sections 108-21 and 108-22 of the backside emitter 108. There, the field stop region 107 can be thicker than the rest of its portions that laterally overlap with the sections 108-21 and 108-22 of the backside emitter 108. The described configuration of the backside emitter 108 and the field stop layer 107 in the optional diode-only region 1-23 can extend into the second IGBT region 1-22 along a path corresponding to the distance d2, as shown.

[0096] As indicated above, the configuration of the active area 1 - 2 may also reflect at the front side 110 a separation of the active area 1 - 2 into at least a first IGBT area 1 - 21 , a second IGBT area 1 - 22 and, if implemented, only a diode area 1 - 23 .

[0097] For example, the RC IGBT 1 further comprises a trench-mesa pattern between the first load terminal 11 and the drift region 100, wherein the trench-mesa pattern is configured according to separating the active region 1-2 into at least a first IGBT region 1-21, a second IGBT region 1-22 and (if implemented) only a diode region 1-23. This will be described in more detail below:

[0098] exist Figure 3 1 shows an exemplary configuration of a groove-mesa pattern at the front side 110. The illustrated groove-mesa pattern includes a first control groove 14-21 and a second control groove 14-22, the first control groove 14-21 being configured to receive a first control signal 13-21, and the second control groove 14-22 being configured to receive a second control signal 13-22. In terms of structure, the first control groove 14-21 and the second control groove 14-22 may be configured identically.

[0099] exist Figure 4 and Figure 5 1 and 2. For example, each second control trench 14-22 includes a second control trench electrode 141-22 (gate 2) configured to receive a second control signal 13-22. The second control trench electrode 141-22 is isolated from the semiconductor body 10 based on a second control trench insulator 142-22. Like the second control trench 14-22, each first control trench 14-21 may include a first control trench electrode 141-21 (gate 1) configured to receive a first control signal 13-21. The first control trench electrode 141-21 is isolated from the semiconductor body 10 based on a first control trench insulator 142-21.

[0100] For example, each first control trench electrode 141 - 21 is electrically connected to the first control terminal 13 -A. Similarly, each second control trench electrode 141 - 22 is electrically connected to the second control terminal 13 -B.

[0101] For example, the first IGBT region 1-21 includes a plurality of first control trenches 14-21, but optionally has no second control trenches 14-22. That is, in an embodiment, the first IGBT region 1-21 is controlled solely based on the first control trenches 14-21 because the second control trenches 14-22 do not exist in the first IGBT region 1-21.

[0102] Further, the second IGBT region 1-22 may include a plurality of second control trenches 14-22, but optionally without the first control trench 14-21. That is, in an embodiment, the second IGBT region 1-22 is controlled solely based on the second control trenches 14-22, because the first control trenches 14-21 are not present in the RC IGBT region 1-22. In another embodiment, a subset of the first control trenches 14-21 are arranged in the second IGBT region 1-22; then the second IGBT region 1-22 can be controlled based on both the first control signal 13-21 and the second control signal 13-22. According to one embodiment, the source region 101 is only placed next to 14-22. In another embodiment, the source region 101 exists next to both the second control trenches 14-22 and the first control trenches 14-21.

[0103] In an embodiment, the trench-mesa pattern further comprises a source trench 16 which is electrically connected to the first load terminal 11 and is arranged at least in the first IGBT region 1-21. Figure 5 Each source trench 16 may include a source trench electrode 161 electrically connected to the first load terminal 11 . The source trench electrode 161 is isolated from the semiconductor body 10 based on a source trench insulator 162 .

[0104] In an embodiment, a subset of the source trenches 16 may also be arranged in the second IGBT region 1 - 22 and (if implemented) only the diode region 1 - 23 .

[0105] In another embodiment, as in Figure 3 As illustrated in FIG. 1 , the second IGBT region 1 - 22 does not include any source trench 16 .

[0106] For example, only the diode region 1 - 23 includes only the source trench 16 without the control trench.

[0107] For example, with Figure 3 In contrast to the illustration in FIG. 1 , in the second IGBT region 1 - 22 , the first control trenches 14 - 21 and the second control trenches 14 - 22 may be arranged in an alternating manner along the first lateral direction X, with one or more source trenches 16 arranged between each pair of control trenches 14 - 21 / 14 - 22 .

[0108] In the first IGBT region 1 - 21 , for example, one, two or more source trenches 16 may be arranged between corresponding two adjacent first control trenches 14 - 21 .

[0109] Also refer to Figure 4 and Figure 5In an embodiment, the trench-mesa pattern further includes a first type mesa 17, which is arranged in both the first IGBT region 1-21 and the second IGBT region 1-22. Each first type mesa 17 includes a source region 101 of the first conductivity type and a portion of the body region 102 of the second conductivity type. For the purpose of clear representation, only a few source regions 101 present in the second IGBT region 1-22 are provided with corresponding reference symbols. Each bold small square represents a source region 101. Further, each illustrated trench in the RC IGBT region 1-22 represents one of the plurality of first control trenches 14-21, second control trenches 14-22 and source trenches 16, wherein each of the second control trenches 14-22 is arranged adjacent to one of the first type mesas 17 in the second IGBT region 1-22.

[0110] In each first type mesa 17 , both the source region 101 and the body region 102 are electrically connected to the first load terminal 11 . For example, a first contact plug 111 may be employed for this purpose. At least the body region 102 isolates the source region 101 from the drift region 100 .

[0111] In the first IGBT region 1-21, each first type mesa 17 is arranged adjacent to at least one of the first control trenches 14-21. There, each first control trench 14-21 is configured to induce a conductive channel (i.e., one of the first MOS channels) in the adjacent first type mesa 17 for conducting a forward load current in response to receiving a corresponding configuration of the first control signal 13-21. Such conductive channel induction is generally known to the skilled person and is therefore not further explained in detail here.

[0112] In the second IGBT region 1-22, each first type mesa 17 is arranged adjacent to at least one of the second control trench 14-22 or (if present in the second IGBT region 1-22) the first control trench 14-21. There, each first control trench 14-21 / second control trench 14-22 is configured to induce a conductive channel (i.e., one of the second MOS channels) in the adjacent first type mesa 17 for conducting a forward load current in response to receiving a corresponding configuration of the first control signal 13-22 / second control signal 13-211. As indicated above, such conductive channel induction is generally known to the skilled person and is therefore not explained in further detail here.

[0113] If the first control trenches 14-21 are provided in the second IGBT region 1-22, the number of the second control trenches 14-22 present in the second IGBT region 1-22 may be at least 40% of the number of the first control trenches 14-21 present in the second IGBT region 1-22. For example, in the second IGBT region 1-22, the first control trenches 14-21 and the second control trenches 14-22 are arranged in an alternating manner with respect to the first lateral direction X. For example, a plurality of (zero, one or more than one) source trenches 16 are arranged between each pair of control trenches 14-21 / 14-22.

[0114] For example, at least in the first IGBT region 1-21 and optionally in the second IGBT region 1-22, the trench-mesa pattern may further include a second type of mesa 18, which is not provided with a source region 101 and which may or may not be electrically connected to the first load terminal 11. Further, additional trench types may be provided, such as a floating trench (whose trench electrode is not electrically connected to a defined potential) or an additional control trench. In another embodiment, each mesa in the first IGBT region 1-21 is a first type of mesa 17.

[0115] For example, in the optionally provided diode-only region 1-23, only source trenches 16 are provided without control trenches. These source trenches 16 can laterally delimit a diode mesa 19 in the diode-only region 1-23, where the body region 102 is electrically connected to the first load terminal 11. The diode mesa 19 is laterally delimited by the source trenches 16.

[0116] exist Figure 3 The groove-land pattern shown in FIG is an example. In another embodiment, a groove-land pattern different from it can be provided.

[0117] Here, it should be understood that the configuration of the front side 110 and the back side 120, i.e. the trench-mesa pattern at the front side 110 and the back side emitter 108 at the back side 120, can be aligned with each other according to the separation of the active area 1-2 into the second IGBT area 1-22, the first IGBT area 1-21 and the optional diode-only area 1-23.

[0118] That is, in the embodiment:

[0119] - the trench-mesa configuration explained above in the first IGBT region 1 - 21 laterally overlaps with the configuration of the first section 108 - 21 of the backside emitter 108 in the first IGBT region 1 - 21 explained above;

[0120] the trench-mesa configuration explained above in the second IGBT region 1 - 22 laterally overlaps with the configuration of the second section 108 - 22 of the backside emitter 108 in the second IGBT region 1 - 22 explained above; and

[0121] The trench-mesa configuration explained above in the diode-only region 1 - 23 laterally overlaps with the configuration of the third section 108 - 23 of the backside emitter 108 in the diode-only region 1 - 23 explained above.

[0122] In an embodiment, the IGBT 1 further includes a barrier region 105 of the first conductivity type, which couples the trench-mesa pattern in the first IGBT region 1-21 to the drift region 100. For example, the dopant concentration of the barrier region 105 is greater than the dopant concentration of the drift region 100.

[0123] As in Figure 3 As illustrated in FIG. 1 , the barrier region 105 is provided, for example, only in the first IGBT region 1 - 21 , and is provided neither in the second IGBT region 1 - 22 nor in the optional diode-only region 1 - 23 .

[0124] Based on the exemplary design described above, the first IGBT region 1-21 can constitute a low saturation IGBT controlled based on the first control signal 13-21 (gate 1), and the second IGBT region 1-22 can constitute an RCDC IGBT region with reverse conduction (RC) and diode control (DC) characteristics, which is controlled based on the second control signal 13-22 (gate 2) and optionally also based on the first control signal 13-21 (gate 1).

[0125] Figure 4 A more detailed example of a segment of the second IGBT region 1-22 is illustrated. Thus, the first type mesa 17 is arranged between two of the second control trenches 14-22. A corresponding source region 101 is provided adjacent to each of the second control trenches 14-22, so that each of the two second control trenches 14-22 can induce a corresponding second MOS channel in the first type mesa 17. However, in another embodiment, only one source region 101 (e.g., arranged to only one control trench) is provided in the first type mesa 17 in the second IGBT region 1-22, for example to ensure that the second MOS channel conductivity to area ratio in the second IGBT region 1-22 is less than 80% of the first MOS channel conductivity to area ratio in the first IGBT region 1-21.

[0126] Figure 5A more detailed example of a segment of the first IGBT region 1-21 is illustrated. There, the first type mesas 17 are, for example, laterally flanked by only one of the first control grooves 14-21. The other grooves that laterally bound the first type mesas 17 can, for example, be one of the source grooves 16. Therefore, in each first type mesa 17, the source region 101 is laterally arranged adjacent only to the first control grooves 14-21. Therefore, instead of two first MOS channels in the first type mesas, there is only one first MOS channel in each first type mesa 17 in the first IGBT region 1-21. In addition there, two second type mesas 18 or one of the second type mesas 18 and one of the first type mesas 17 can be arranged adjacent to each source groove 16. In another embodiment, two source regions are provided in the first type mesas 17 in the first IGBT region 1-21 (or, respectively, one source region 101 extending along the entire width of the first type mesas 17), for example to ensure that the second MOS channel conductivity to area ratio in the second IGBT region 1-22 is in total less than 80% of the first MOS channel conductivity to area ratio in the first IGBT region 1-21.

[0127] As in Figure 6 As illustrated in , the first type mesas 17 may be electrically contacted based on contact plugs 111 (cf. variant (2)) extending below the first surface 110 and adjoining the insulating region 191. Alternatively, a planar contact 112 (cf. variant (1)) terminating approximately at the surface 120 may be used.

[0128] Regardless of the manner of electrically contacting the first type mesas 17, the first type mesas 17 in the second IGBT region 1-22 may be configured such that the active channel is divided into a plurality of second MOS channels that are relatively small in width. Figure 6 As illustrated in FIG. 1 , such a configuration, which can be realized, for example, based on the corresponding lateral structure of the source region 101 in each first type mesa 17, is an additional possibility to limit the conductivity to area ratio of the second MOS channel in the second IGBT region 1-22 to a specified value. Further, similar to the possible increased dopant concentration of the body region 102 in the first type mesa 17 of the second IGBT region 1-22, dividing the active channel into the plurality of second MOS channels of small width and spatially separated along the second lateral direction Y can also produce an increased latch robustness of the second IGBT region 1-22.

[0129] Figure 6The illustration in is only exemplary. The source region 101 can, for example, be laterally structured in different ways. For example, the source region 101 is provided only at one side of the first type mesa 17 (for example, on the left side of the contact plug or on the right side of the contact plug), or the source region 101 can be arranged at the left and right sides in an alternating manner along the second lateral direction Y.

[0130] According to further embodiments, in the second IGBT region 1-22, the body region 102 in one or more of the first type mesas 17 presents a variation of the dopant concentration along the second lateral extension of the respective first type mesas 17. For example, the source region 101 in the respective first type mesas 17 laterally overlaps those sections of the body region 102 presenting a relatively high dopant concentration. For example, based on such a configuration of the body region 102, the load current dependency of the anode efficiency during reverse load current conduction can be adjusted.

[0131] The above-described difference between the first IGBT region 1 - 21 and the second IGBT region 1 - 22 can be achieved or supported accordingly, for example, if it is provided that the percentage area share occupied by the source region 101 in the first IGBT region 1 - 21 is greater than the percentage area share occupied by the source region 101 in the second IGBT region 1 - 22.

[0132] Due to their differences in configuration, the second region 1-22 may exhibit transfer characteristics and output characteristics that are different from those of the first IGBT region 1-21. Figures 8 to 10 This aspect is exemplarily illustrated in FIG.

[0133] exist Figure 8 In the figure, the horizontal axis indicates the voltage V of the first control signal and the second control signal. GE (which are the same in the illustrated example), and Fig. 9 and Fig.10 , the corresponding horizontal axis indicates the voltage V across the first load terminal 11 and the second load terminal 12 CE .exist Figures 8 to 10 In each of the above, the vertical axis indicates the positive load current I C .

[0134] exist Figure 8 In the embodiment, the IGBT 1 is forward biased, that is, the voltage V across the first load terminal 11 and the second load terminal 12 is CE is positive to allow positive load current I C Flow. Fig. 9 and Fig.10, both the first control signal 13 - 21 (gate 1 ) and the second control signal 13 - 22 (gate 2 ) assume a configuration corresponding to the ON state of the RC IGBT 1 .

[0135] According to the example shown in the figure, Figure 8 It can be concluded that the second MOS channel in the second IGBT region 1-22 exhibits a second threshold voltage, which amounts to at least 115% of the first threshold voltage of the first MOS channel in the first IGBT region 1-21. That is, at the same voltage level of the first control signal 13-21 and the second control signal 13-22, the share of the forward load current in the second IGBT region 1-22 is smaller than the share of the forward load current in the first IGBT region 1-21. Further, the second IGBT region 1-22 can be arranged so that for values ​​where only the second control signal 13-22 corresponds to the ON state (while the first control signal 13-21 corresponds to the OFF state), the forward load current is the nominal load current (I max_nom ) or only up to 200% or even less than the nominal load current (I max_nom In contrast, under corresponding conditions, the forward load current in the first IGBT region 1-21 will be much larger, for example at a level corresponding to an overload situation (I th_overload ).

[0136] - the unit cell pattern of the trench-mesa pattern in the first IGBT region 1-21 has the same pitch as the trench-mesa pattern in the second IGBT region 1-22; and / or

[0137] - the mesa width in the trench-mesa pattern in the first IGBT region 1 - 21 is the same as the mesa width in the trench-mesa pattern in the second IGBT region 1 - 22 ; and / or

[0138] - The trench width in the trench-mesa pattern in the first IGBT region 1 - 21 is the same as the trench width in the trench-mesa pattern in the second IGBT region 1 - 22 .

[0139] For example, the geometric dimensions associated with the mesas 17 and 18 and the trenches 14 - 21 , 14 - 22 , and 17 in the first IGBT region 1 - 21 may be the same as the corresponding geometric dimensions in the second IGBT region 1 - 22 .

[0140] Also proposed herein is a method of operating an IGBT 1 according to one of the aforementioned embodiments. The method comprises controlling the IGBT 1 based on a first control signal 13-21 (gate 1) and a second control signal 13-22 (gate 2).

[0141] Now we will refer to Figure 7Some examples of such methods (1) to (3) are illustrated in FIG. 1 . In each example, the first control signal 13 - 21 is V indicated by a solid line. G1 (ie, the voltage of the first control signal 13-21 (gate 1)) is shown, and the second control signal 13-22 is V indicated by a dotted line. G2 (ie, the voltage of the second control signal 13 - 22 (Gate 2 )) is illustrated.

[0142] As usual, the first control signal 13-21 can be generated by providing a voltage between the first control terminal 13-A and the first load terminal 11, wherein the first control terminal 13-A is electrically connected to the first control trench electrode 141-21. Similarly, the second control signal 13-22 can be generated by providing a voltage between the first load terminal 11 and the second control terminal 13-B and the first load terminal 11, wherein the second control terminal 13-B is electrically connected to the second control trench electrode 141-22.

[0143] The vertical axis indicates voltage, and the horizontal axis in each example indicates time. A positive value of voltage V G_ON (e.g., +15V) corresponds to the ON state (forward conduction state) of the IGBT 1 and a negative or zero voltage value V G_OFF (For example, -8V or -15V) corresponds to the OFF state (forward blocking state). Although the voltage values ​​V corresponding to these states G_ON 、V G_OFF The same may be true for both the first control signal 13 - 21 and the second control signal 13 - 22 , but the timing of changing the value from one to the other to cause the switching operation between the first control signal 13 - 21 and the second control signal 13 - 22 may be different.

[0144] According to example (1), the second IGBT region 1-22 is mainly used to improve the turn-off process. For example, the second IGBT region 1-22 is turned off with a certain time delay t delay 1 is turned on, for example shortly before the first IGBT region 1-21 is turned off. When the first IGBT region 1-21 is turned off, the second IGBT region 1-22 remains in the ON state. As explained above, the load current is then temporarily - completely or only partially, depending on the load current level - carried by the second IGBT region 1-22. The IGBT 1 is then desaturated (with reference to the time period t desat ) until it is also based on changing the second control signal 13-22 to V G_OFF Depending on the application, as illustrated in example (3), the delay t with which the second IGBT region 1-22 is turned on is delayCan be reduced or even turned negative with reference to example (2), meaning that the second IGBT region 1-22 is turned on before the first IGBT region 1-21 is turned on. Examples (2) and (3) can be beneficial for low on-state voltages but may result in higher turn-off losses. Example (2) can allow better control of the turn-on process. However, in each of these three examples, the second control signal 13-22 is provided so that the second IGBT region 1-22 is in a forward conduction state while the first IGBT region 1-21 is switched into a forward blocking state based on the first control signal 13-21; for example, the second IGBT region 1-22 is turned off after the first IGBT region 1-21 is turned off to allow the IGBT 1 to desaturate.

[0145] Fig.10 A circuit 1000 according to one or more embodiments is schematically and exemplarily illustrated. The circuit 1000 includes an IGBT 1 according to one of the embodiments described above and a MOSFET 500 connected in parallel with the IGBT 1. For example, a first load terminal 11 of the IGBT 1 is electrically connected to a first load terminal 511 of the MOSFET 500, and a second load terminal 12 of the IGBT 1 is electrically connected to a second load terminal 512 of the MOSFET 500.

[0146] In the example, the IGBT 1 presents an RC IGBT configuration, such as described exemplarily above. Further, the MOSFET 500 may be based on a wide bandgap semiconductor material. For example, the MOSFET 500 is a silicon carbide (SiC) MOSFET. However, the IGBT 1 may be based on silicon (Si). In general, a unipolar transistor may be placed instead of 500, which may be a GaN HEMT instead of a MOSFET.

[0147] The MOSFET 500 may be controlled based on the first control signal 13-21. To this end, the control terminal 513 of the MOSFET 500 may be electrically connected to the first control terminal 13-A of the IGBT 1.

[0148] As explained above, the design of circuit 500 includes the recognition that in such an arrangement the switching losses can be mainly limited to the IGBT 1, especially in the case of example (2) of the operating method described above. In the case of an RC IGBT configuration of the IGBT 1, the RC functionality can also be used to take over the reverse current in overload situations.

[0149] In the above, embodiments of IGBTs and corresponding operating methods are explained. For example, these IGBTs are based on silicon (Si). Therefore, a single crystal semiconductor region or layer (e.g., a semiconductor body and its regions / regional zones, such as regions, etc.) may be a single crystal Si region or Si layer. In other embodiments, polycrystalline or amorphous silicon may be used.

[0150] However, it should be understood that the semiconductor body and its regions / zones can be made of any semiconductor material suitable for use in the manufacture of semiconductor devices. Examples of such materials include, but are not limited to, elemental semiconductor materials such as silicon (Si) or germanium (Ge), group IV compound semiconductor materials such as silicon carbide (SiC) or silicon germanium (SiGe), binary, ternary or quaternary III-V semiconductor materials such as gallium nitride (GaN), gallium arsenide (GaAs), gallium phosphide (GaP), indium phosphide (InP), indium gallium phosphide (InGaPa), aluminum gallium nitride (AlGaN), aluminum indium nitride (AlInN), indium gallium nitride (InGaN), aluminum gallium indium nitride (AlGaInN) or indium gallium arsenide phosphide (InGaAsP), and binary or ternary II-VI semiconductor materials such as cadmium telluride (CdTe) and mercury cadmium telluride (HgCdTe). The aforementioned semiconductor materials are also referred to as "homojunction semiconductor materials". A heterojunction semiconductor material is formed when two different semiconductor materials are combined. Examples of heterojunction semiconductor materials include, but are not limited to: aluminum gallium nitride (AlGaN)-aluminum gallium indium nitride (AlGaInN), indium gallium nitride (InGaN)-aluminum gallium indium nitride (AlGaInN), indium gallium nitride (InGaN)-gallium nitride (GaN), aluminum gallium nitride (AlGaN)-gallium nitride (GaN), indium gallium nitride (InGaN)-aluminum gallium nitride (AlGaN)), silicon-silicon carbide (Si x C 1-x ) and silicon-SiGe heterojunction semiconductor materials. For power semiconductor switch applications, Si, SiC, GaAs and GaN materials are currently used.

[0151] Spatially relative terms such as "under", "below", "lower", "above", "upper", etc. are used for ease of description to explain the positioning of one element relative to a second element. These terms are intended to cover different orientations of the corresponding devices in addition to those depicted in the figures. Further, terms such as "first", "second", etc. are also used to describe various elements, regions, sections, etc. and are not intended to be limiting. Throughout this description, similar terms may refer to similar elements.

[0152] As used herein, the terms “having,” “comprising,” “including,” “including,” “presenting,” and the like are open-ended terms that indicate the presence of claimed elements or features, but do not preclude additional elements or features.

[0153] With the above range of variations and applications in mind, it should be understood that the present invention is limited neither by the foregoing description nor by the accompanying drawings. Instead, the present invention is limited only by the following claims and their legal equivalents.

Claims

1. An IGBT (1) comprising an active region (1-2) in a single chip, the active region (1-2) being configured to conduct a forward load current between a first load terminal (11) at a front side (110) of a semiconductor body (10) of the IGBT (1) and a second load terminal (12) at a back side (120) of the semiconductor body (10), wherein the active region (1-2) is separated into at least: - a first IGBT region (1-21), at least 90% of the first IGBT region (1-21) being configured to conduct a forward load current based on a first control signal (13-21); - a second IGBT region (1-22), at least 90% of the second IGBT region (1-22) being configured to conduct a forward load current based on a second control signal (13-22); in: - a first MOS channel conductivity to area ratio is determined by dividing the total channel width in the first IGBT region (1-21) by the total lateral area of ​​the first IGBT region (1-21); and - a second MOS channel conductivity to area ratio is determined by dividing the total channel width in the second IGBT region (1-22) by the total lateral area of ​​the second IGBT region (1-21); and - The second MOS channel conductivity to area ratio is in total less than 80% of the first MOS channel conductivity to area ratio.

2. An IGBT (1) comprising an active region (1-2) in a single chip, the active region (1-2) being configured to conduct a forward load current between a first load terminal (11) at a front side (110) of a semiconductor body (10) of the IGBT (1) and a second load terminal (12) at a back side (120) of the semiconductor body (10), wherein the active region (1-2) is separated into at least: - a first IGBT region (1-21) comprising a first MOS channel exhibiting a first threshold voltage, wherein at least 90% of the first IGBT region (1-21) is configured to conduct a forward load current based on a first control signal (13-21); - a second IGBT region (1-22) comprising a second MOS channel exhibiting a second threshold voltage, the second threshold voltage amounting to at least 115% of the first threshold voltage, wherein at least 90% of the second IGBT region (1-22) is configured to conduct a forward load current based on a second control signal (13-22).

3. An IGBT (1) comprising an active region (1-2) in a single chip, the active region (1-2) being configured to conduct a forward load current between a first load terminal (11) at a front side (110) of a semiconductor body (10) of the IGBT (1) and a second load terminal (12) at a back side (120) of the semiconductor body (10), wherein the active region (1-2) is separated into at least: - a first IGBT region (1-21), at least 90% of the first IGBT region (1-21) being configured to conduct a forward load current only based on a first control signal (13-21); and a second IGBT region (1-22), at least 90% of the second IGBT region (1-22) being configured to conduct a forward load current based on a second control signal (13-22), - wherein a saturation current of a forward load current in a case where only the second IGBT region (1-22) is in a forward conduction state is at most three times (twice) a nominal value of the forward load current for the IGBT (1).

4. The IGBT (1) according to one or more of the preceding claims, further comprising a body region (102) extending in both the first IGBT region (1-21) and the second IGBT region (1-22), wherein an average dopant dose of the body region in the second IGBT region (1-22) amounts to at least 120% of the average dopant dose of the body region in the first IGBT region (1-21).

5. An IGBT (1) according to one or more of the preceding claims, wherein the second IGBT region (1-22) is configured to temporarily conduct up to three times the nominal forward load current of the IGBT when the second control signal (13-22) corresponds to the nominal on-state of the IGBT (1) and when the first control signal (13-21) transitions to or corresponds to the off-state of the IGBT (1).

6. The IGBT (1) according to one or more of the preceding claims, wherein the second control signal (13-22) is independent of the first control signal (13-21).

7. The IGBT (1) according to one or more of the preceding claims, wherein at least one of the following applies: - the sum of the first IGBT region (1-21) and the second IGBT region (1-22) amounts to at least 80% of the active region (1-2); - Each of the first IGBT region (1-21) and the second IGBT region (1-22) amounts to at least 30% of the active area (1-2).

8. The IGBT (1) according to one or more of the preceding claims, wherein the first IGBT region (1-21) is spatially separated from the second IGBT region (1-22), and optionally wherein: - the first IGBT region (1-21) is a first continuous region; and / or - The second IGBT region (1-22) is a second continuous region.

9. The IGBT (1) according to one or more of the preceding claims, further comprising a drift region (100) of the first conductivity type in the semiconductor body (10), wherein the drift region (100) is shared by both the first IGBT region (1-21) and the second IGBT region (1-22).

10. The IGBT (1) according to claim 9, further comprising a back side emitter (108) in electrical connection with the second load terminal (12), which is coupled to the drift region (100), wherein the back side emitter (108) is configured according to the separation of the active region (1-2) into at least a first IGBT region (1-21) and a second IGBT region (1-22).

11. The IGBT (1) according to one or more of the preceding claims, wherein the IGBT (1) exhibits an RC IGBT configuration, and wherein - the first IGBT region (1-21) presents an IGBT-only configuration for conducting only forward load current; - the second IGBT region (1-22) exhibits an RCIGBT configuration for conducting both forward and reverse load currents; and optionally, wherein - the IGBT (1) further comprises a diode-only region (1-23), at least 90% of the diode-only region (1-23) being configured to conduct only reverse load current.

12. The IGBT (1) according to claim 11, wherein the back side emitter (108) is configured with: - a first section (108-21) of a second conductivity type in a portion of the active area (1-2) in which the first IGBT area (1-21) is present; and a second section (108-22) comprising both a first sub-section (108-221) of the first conductivity type and a second sub-section (108-222) of the second conductivity type in a portion of the active area (1-2) in which the second IGBT area (1-22) is present; and optionally, if a diode-only area (1-23) is implemented, having - A third section (108-23) of the first conductivity type in a portion of the active area (1-2) in which only the diode area (1-23) is present.

13. The IGBT (1) according to claim 12, wherein the first section (108-21) of the back emitter (108) exhibits a horizontal area of ​​at least 5*10 12 cm -2 The average dopant dose is 14. An IGBT (1) according to one or more of the preceding claims 10 to 13, further comprising a field stop zone (107) of the first conductivity type and coupled to both the drift zone (100) and the back emitter (108), wherein the dopant concentration of the field stop zone (107) is greater than the dopant concentration of the drift zone (100).

15. The IGBT (1) according to one or more of the preceding claims, further comprising a trench-mesa pattern between the first load terminal (11) and the drift region (100), wherein the trench-mesa pattern is configured according to separating the active region (1-2) into at least a first IGBT region (1-21) and a second IGBT region (1-22), and wherein optionally, - the pitch of the trench-mesa pattern in the first IGBT region (1-21) is the same as the pitch of the trench-mesa pattern in the second IGBT region (1-22); and / or - the mesa width in the trench-mesa pattern in the first IGBT region (1-21) is the same as the mesa width in the trench-mesa pattern in the second IGBT region (1-22); and / or - The trench width in the trench-mesa pattern in the first IGBT region (1-21) is the same as the trench width in the trench-mesa pattern in the second IGBT region (1-22).

16. The IGBT (1) according to claim 15, wherein the trench-mesa pattern comprises: - first control trenches (14-21) arranged in the first IGBT region (1-21) and configured to receive a first control signal (13-21), wherein optionally a subset of the first control trenches (14-21) are arranged in the second IGBT region (1-22); as well as - a second control trench (14-22) arranged in the second IGBT region (1-22) and configured to receive a second control signal (13-22).

17. An IGBT (1) according to claim 15 or claim 16, wherein the trench-mesa pattern comprises: A source trench (16) which is electrically connected to the first load terminal (11) and is arranged at least in the first IGBT region (1-21).

18. The IGBT (1) according to claim 4 and one or more of the preceding claims 15 to 17, wherein the trench-mesa pattern comprises: - first type mesas (17) arranged in both the first IGBT region (1-21) and the second IGBT region (1-22), wherein each first type mesa (17) comprises a source region (101) of a first conductivity type and a portion of said body region (102) of a second conductivity type, wherein both the source region (101) and the body region (102) are electrically connected to the first load terminal (11), and wherein at least the body region (102) isolates the source region (101) from the drift region (100).

19. The IGBT (1) according to claim 18, wherein the percentage area share occupied by the source region (101) in the first IGBT region (1-21) is greater than the percentage area share occupied by the source region (101) in the second IGBT region (1-22).

20. An IGBT (1) according to one or more of the preceding claims 15 to 19, further comprising a barrier region (105) of the first conductivity type, which couples the trench-mesa pattern in the first IGBT region (1-21) to the drift region (100), wherein the dopant concentration of the barrier region (105) is greater than the dopant concentration of the drift region (100), and wherein optionally, the barrier region (105) does not extend into the second IGBT region (1-22).

21. A method of operating an IGBT (1) according to any one of the preceding claims 1 to 19, the method comprising: - controlling the first IGBT region (1-21) based on the first control signal (13-21); as well as - controlling the second IGBT region (1-22) based on the second control signal (13-22).

22. The method according to claim 21, wherein the second control signal (13-22) is provided so that the second IGBT region (1-22) is in a forward conducting state when the first IGBT region (1-21) is switched to a forward blocking state based on the first control signal (13-21).

23. A circuit (1000), comprising: - An IGBT (1) according to any one of the preceding claims 1 to 20; - A MOSFET (500) connected in parallel with the IGBT (1).

24. The circuit (1000) of claim 23, wherein at least one of the following applies: - the IGBT (1) has an RCIGBT configuration; - The MOSFET (500) is based on a wide bandgap semiconductor material.

25. The circuit (1000) of claim 23 or claim 24, wherein the MOSFET (500) is controlled based on a first control signal (13-21).

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