Active transponder C interface validity detection and message conversion delay circuit and method

Abstract

The invention relates to an active transponder C interface effectiveness detection and message conversion delay circuit and method. An input end of a C interface protection and code element extraction circuit is an active transponder C interface signal and inputs an active part of an active transponder, and an output end is an extracted C6 signal and an extracted C1 signal; the active part power supply circuit converts a C6 signal input by the C interface into a power supply required by the active part and supplies the power supply to the energy storage circuit; the active part CPLD decodes a C1 signal according to an input signal and outputs a working state clock; the broken code detection circuit detects the validity of the input C1 signal; the message conversion delay circuit outputs a transient signal equivalent to 75-bit to 128-bit data transmission time according to the effectiveness of the C interface; and the passive part power supply circuit converts radio frequency energy obtained by the active transponder energy receiving antenna into a power supply required by the passive part. According to the invention, the effectiveness of the C interface can be detected in real time, the availability of the active transponder is increased, and the adverse effect generated by data transmission of the C interface is reduced.

Description

Technical Field

[0001] The present invention relates to the field of rail transit technology, in particular to ground equipment of train operation control equipment, specifically to an active transponder C interface validity detection and message conversion delay circuit and method. Background Art

[0002] Balise Transmission Subsystem (BTS) is widely used in various types of rail transit as a safe point information transmission system. Active balise (Controlled Balise) is a component of ground equipment, which transmits ground information such as train route information to on-board equipment in real time through an electromagnetic interface. The active balise is connected to the ground electronic unit (Line i de Electronic Unit) through a pair of shielded twisted pair cables dedicated to the balise, forming the transmission of C interface signals. The signals transmitted by this interface include 8.82kHz (C6 signal) AC energy signals and 564.48kHz (C1 signal) data signals after differential two-phase conversion.

[0003] When the active transponder is working normally, it should be able to perform DBPL decoding operations on the C interface data, check the validity of the data signal and energy signal input to the C interface, and select the output of the C interface serial data or default message according to the validity of the C interface signal. The active transponder should be able to detect the failure of the C interface signal and switch the message after the C interface fails. When switching the message, a transient signal equivalent to the 75-bit to 128-bit data transmission time is inserted to insert all "0" data or all "1" data, and transmit the message conversion information to the vehicle-mounted equipment.

[0004] At present, the validity check of the C interface is limited to the methods of cable open circuit and data analysis, and it cannot be effectively checked and judged in real time, which has an adverse impact on the transmission of the C interface data of the active balise. At present, the message switching method after the failure of the C interface is mainly through the failure of the active part power supply and the method of not processing the data. The above method has many disadvantages. When the active part power supply suddenly fails, the active balise will directly switch from the C interface data to the default message, and the on-board equipment cannot well identify the reason for the message switching and identify the valid data; when the C interface energy signal is valid but the data signal is invalid, the active balise will transmit an undecodable message to the on-board equipment, causing adverse driving failures. If the data management of the C interface validity check and message switching process cannot be effectively solved, it will affect the on-board equipment's choice of data validity, which will further affect the driving safety of the train. Summary of the invention

[0005] The present invention designs an active transponder C-interface validity detection and message conversion delay circuit and method to solve the problems proposed in the above background technology that the C-interface cannot be detected in real time for validity, and message switching management cannot be performed after the C-interface fails; it cannot reduce the bit error rate of the active transponder upload signal, increase the availability of the active transponder C-interface after failure, and cannot increase the safety and availability of the train control system.

[0006] In order to solve the above-mentioned technical problems, the present invention adopts the following solutions:

[0007] An active transponder C interface validity detection and message conversion delay circuit comprises an active part and a passive part, wherein the active part comprises a C interface protection and code element extraction circuit, a message conversion delay circuit, an active part power supply circuit, an active part CPLD and a broken code detection circuit; the passive part comprises a passive part power supply circuit; the C interface protection and code element extraction circuit has an input end of an active transponder C interface signal, which is input into the active part of the active transponder, and an output end of the extracted C6 signal and C1 signal; the active part power supply circuit converts the C6 signal input from the C interface into a power supply required by the active part and provides an energy storage circuit; the active part CPLD decodes the C1 signal according to the input signal and outputs a working state clock; the broken code detection circuit detects the validity of the input C1 signal; the message conversion delay circuit outputs a transient signal equivalent to the data transmission time of 75 bits to 128 bits according to the validity of the C interface; the passive part power supply circuit converts the radio frequency energy obtained by the energy receiving antenna of the active transponder into the power supply required by the passive part.

[0008] Preferably, the passive part also includes a passive part CPLD, which determines whether the output message is C interface data or an internally stored default message based on a valid signal of the active part input by the message conversion delay circuit. The maximum data transmission time equivalent to 128 bits inserted during message switching is maintained by the RC charge and discharge time of the message conversion delay circuit.

[0009] Preferably, the active part CPLD decodes the C1 signal according to the input code element signal, outputs the C interface data to the passive part CPLD according to the code element status signal, and outputs the periodic square wave signal to the message conversion delay circuit at the same time; when the code element status signal is at a high level, the C interface data is output, and the periodic square wave signal is output to the message conversion delay circuit at the same time; when the code element status signal is at a low level, a stable low level or high level is output, and the output of the periodic square wave signal to the message conversion delay circuit is stopped at the same time. This process inserts all "0" data or all "1" data when the message is switched, and transmits the message conversion information to the vehicle-mounted equipment.

[0010] Preferably, the active part CPLD outputs a periodic square wave signal according to the state signal output by the code break detection circuit and the result of whether the DBPL signal is decoded normally; the code break detection circuit performs code break detection according to the input C1 signal, maintains a monostable state by setting a reasonable RC charge and discharge time, outputs a transient high level to the active part CPLD when the code element is continuously valid, and outputs a steady low level to the active part CPLD when the code element is broken or does not comply with the DBPL encoding rule, and the active part CPLD determines whether the C1 signal is valid according to the signal;

[0011] The active part CPLD outputs a periodic square wave signal or a continuous low-level signal according to the state signal input by the code break detection circuit and the DBPL decoding result; when the code break detection circuit inputs a high level and the DBPL can decode normally, it outputs a periodic square wave signal, and when other states appear, it outputs a low-level signal, which is output to the message conversion delay circuit. The message conversion delay circuit includes a monostable circuit, and a reasonable RC charging and discharging time is designed according to the frequency of the input periodic square wave signal. The time is equivalent to a transient signal of 75-bit to 128-bit data transmission time, which is used to generate a transient high level for the active part to work effectively; when the periodic square wave is continuously input, the monostable circuit outputs a transient high level, indicating that the active part is working effectively; when the periodic square wave signal stops, the monostable circuit outputs a steady low level, indicating that the active part fails to work.

[0012] Preferably, a comparator is added to the message conversion delay circuit, and the working power supply of the comparator is provided by the passive part power supply and the active part power supply at the same time, so as to ensure the stability of the output state of the comparator; the periodic square wave signal output by the active part CPLD outputs a stable level to the comparator after passing through the monostable circuit, and the signal after shaping by the comparator is output to the passive part CPLD, and the passive part CPLD determines whether the active part works effectively according to this state signal. If this state signal is at a high level, it proves that the active part works effectively, and the passive part CPLD continues to send C interface data; if this state signal is at a low level, it proves that the active part works invalidly, and the passive part CPLD switches the data to the default message stored internally.

[0013] Preferably, the message conversion delay circuit generates a monostable signal according to the periodic square wave signal output by the active part CPLD, and the monostable signal outputs a stable state signal to the passive part CPLD as a valid state signal of the C interface after passing through the comparator; the signal outputs a transient high level as a valid state signal of the C interface under continuous periodic square wave drive; the signal can output a transient high level equivalent to 75-bit to 128-bit data transmission time according to the validity of the C interface.

[0014] Preferably, the code break detection circuit determines whether there is a code element break based on the input C1 signal, the C1 signal is a signal that satisfies the DBPL encoding rule, the code break detection circuit outputs a transient high level based on the DBPL square wave signal, and outputs a low level when the DBPL signal has a code element interruption or a code element stop; the code break detection circuit outputs a code element status signal to the active part CPLD.

[0015] Preferably, the code break detection circuit collects code element signals from the C interface protection and code element extraction circuit, removes the DC component of the collected code element signals, amplifies and shapes the waveform, and then outputs them to the monostable circuit. The monostable circuit designs a reasonable RC charge and discharge time according to the frequency of the DBPL code element to generate a transient high level. It outputs a high level when the code element continues and outputs a low level when a code element interruption occurs. This process can detect the code element continuity of the C1 signal in real time, and the code break detection circuit outputs the C1 signal code element state to the active part CPLD.

[0016] Preferably, the passive part power supply circuit also provides power for the message conversion delay circuit of the active part, so as to ensure that after the passive part of the active transponder obtains sufficient power, it can immediately determine whether the C interface of the active transponder is valid, thereby ensuring real-time performance; the message conversion delay circuit is powered by the passive part power supply circuit and the active part power supply circuit at the same time, so as to ensure that the output of the message conversion delay circuit is in a stable state; when the C interface is disconnected or fails, the electric energy stored in the active part power supply circuit ensures that the active part is provided with a data transmission time equivalent to 700 bits after the C interface cable is open or fails; when the power supply of the active part completely fails after exceeding 700 bits of data transmission time, the power supply is provided by the passive part, and at this time, the signal input to the comparator in the message conversion delay circuit is at a low level, and powering the comparator with the passive part power supply can ensure that the message conversion delay circuit outputs a stable C interface failure state signal.

[0017] Preferably, the passive part also includes a passive part working circuit that FSK modulates the message, then amplifies and sends it wirelessly, which modulates and sends the data of the active part, the inserted 75-128 bit time full "0" or full "1" data and the default message of the passive part.

[0018] A ground device for train operation control equipment, characterized by comprising the above-mentioned active transponder C interface validity detection and message conversion delay circuit.

[0019] A method for detecting the validity of an active transponder C interface and converting a message comprises the following steps:

[0020] Step 1, after the C interface signal of the active transponder is input into the active part of the active transponder, it first passes through the C interface protection and code element extraction circuit, and the C interface protection and code element extraction circuit respectively outputs the extracted C6 signal to the active part power supply circuit and the C1 signal to the active part CPLD circuit; the code break detection circuit collects the code element signal from the C interface protection and code element extraction circuit, removes the DC component, amplifies, and shapes the waveform of the collected code element signal, and then outputs it to the monostable circuit. The monostable circuit designs a reasonable RC charge and discharge time according to the frequency of the DBPL code element to generate a transient high level, outputs a high level when the code element continues, and outputs a low level when the code element is interrupted; this process can detect the code element continuity of the C1 signal in real time, and the code break detection circuit outputs the C1 signal code element state to the active part CPLD;

[0021] Step 2, the active part CPLD outputs a periodic square wave to the message conversion delay circuit according to the input code element and code element status signal, and outputs the decoded C interface data to the passive part CPLD at the same time; when the code element status signal is at a high level, the active part CPLD outputs a periodic square wave signal to the message conversion delay circuit and outputs the C interface data to the passive part CPLD; when the code element status signal is at a low level, the active part CPLD stops outputting the periodic square wave signal to the message conversion delay circuit, sets the pin output to the passive part CPLD to a high level or a low level, representing data "1" or "0", and outputs all "1" or all "0" data to the passive part CPLD, so that the on-board equipment can recognize that the active transponder has performed message conversion;

[0022] Among them, the active part CPLD outputs a periodic square wave signal which is directly input into the message conversion delay circuit. The message conversion delay circuit is composed of a monostable circuit and a comparator. The monostable circuit designs a reasonable RC charge and discharge time according to the input periodic square wave signal frequency. The time is equivalent to a transient signal of 75-bit to 128-bit data transmission time, which is used to generate a transient high level for the active part to work effectively. When the periodic square wave is continuously input, the monostable circuit outputs a transient high level, indicating that the active part is working effectively. When the periodic square wave signal stops, the monostable circuit outputs a steady low level, indicating that the active part fails to work.

[0023] The output signal of the monostable circuit is directly input into the comparator. The working power supply of the comparator is provided by the passive part power supply and the active part power supply at the same time. When the C interface is disconnected, the comparator can output a stable state signal. The signal after passing through the comparator is output to the passive part CPLD. The passive part CPLD judges whether the active part works effectively according to this state signal. If this state signal is at a high level, it proves that the active part works effectively, and the passive part CPLD continues to send C interface data; if this state signal is at a low level, it proves that the active part works invalidly, and the passive part CPLD switches the data to the default message stored internally.

[0024] Step 3, the passive part CPLD determines whether the output message is C interface data or the default message stored internally according to the signal of whether the active part is working effectively input by the message conversion delay circuit. The maximum data transmission time equivalent to 128 bits inserted during message switching is maintained by the RC charging and discharging time of the message conversion delay circuit; the full "1" or full "0" data inserted into the C interface data output by the passive part is determined by the active part CPLD according to the code element state signal output by the broken code detection circuit. When the code element state is high, the active part CPLD outputs the C interface data, and when the code element state is low, the active part CPLD sets the data pin high or low; data management during active transponder message switching is realized through the broken code detection circuit and the message conversion delay circuit.

[0025] The active transponder C interface validity detection and message conversion delay circuit and method have the following beneficial effects:

[0026] (1) The active transponder C-interface validity detection and method of the present invention can perform real-time detection of the validity of the C-interface, thereby increasing the availability of the active transponder and reducing the adverse effects of C-interface data transmission;

[0027] (2) The message conversion delay circuit and method of the present invention can perform data management on message switching after the C interface fails, reduce the bit error rate of the active transponder upload signal, increase the availability of the active transponder after the C interface fails, and increase the safety and availability of the train control system. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 : Block connection diagram of the active transponder C interface validity detection and message conversion delay circuit of the present invention;

[0029] Figure 2 It is a schematic diagram of the active part power supply circuit of the present invention.

[0030] Figure 3 This is a schematic diagram of an interrupt code detection circuit of the present invention.

[0031] Figure 4It is a schematic diagram of the message conversion delay circuit in the present invention.

[0032] Figure 5 This is a schematic diagram of the C interface protection and code element extraction circuit in the present invention. DETAILED DESCRIPTION

[0033] Combine the following Figures 1 to 5 , the present invention is further described:

[0034] like Figure 1 As shown, the active transponder C-interface validity detection and message conversion delay circuit of the present invention includes an active part and a passive part, wherein the active part includes a C-interface protection and code element extraction circuit, a message conversion delay circuit, an active part power supply circuit, an active part CPLD and a broken code detection circuit; the passive part includes a passive part power supply circuit.

[0035] like Figure 2 As shown, the active part power supply circuit converts the C6 signal input from the C interface into the power required by the active part and provides a storage circuit; the active part CPLD decodes the C1 signal according to the input signal and outputs the working status clock; Figure 3 As shown, the code break detection circuit detects the validity of the input C1 signal; Figure 4 As shown in the figure, the message conversion delay circuit outputs a transient signal equivalent to the 75-bit to 128-bit data transmission time according to the validity of the C interface; the passive part power supply circuit converts the RF energy obtained by the active transponder energy receiving antenna into the power required by the passive part. Among them, VCCY is the active part power supply; VCC is the passive part power supply; TEL_OK is the square wave output by the active CPLD; CTRL_OK outputs the transient signal of the message validity.

[0036] like Figure 5 As shown, the input end of the C interface protection and code element extraction circuit is the active part of the active transponder C interface signal input active transponder, and the output end is the extracted C6 signal and C1 signal. Among them, C_I N1 and C_I N 2 are C interface signal inputs; DMJ is to the broken code detection circuit; I N_DBPL is to the active CPLD.

[0037] After the C-interface signal of the active transponder is input into the active part of the active transponder, it first passes through the C-interface protection and code element extraction circuit. The C-interface protection and code element extraction circuit outputs the extracted C6 signal to the active part power supply circuit and the C1 signal to the active part CPLD circuit respectively. The broken code detection circuit collects the code element signal from the C-interface protection and code element extraction circuit, removes the DC component, amplifies, and shapes the waveform of the collected code element signal, and then outputs it to the monostable circuit. The monostable circuit designs a reasonable RC charge and discharge time according to the frequency of the DBPL code element to generate a transient high level. When the code element continues, it outputs a high level, and when the code element is interrupted, it outputs a low level. This process can detect the code element continuity of the C1 signal in real time. The broken code detection circuit outputs the C1 signal code element state to the active part CPLD.

[0038] The active part CPLD outputs a periodic square wave to the message conversion delay circuit according to the input code element and code element status signal, and outputs the decoded C interface data to the passive part CPLD at the same time.

[0039] When the symbol status signal is high and the DBPL signal is decoded successfully, the active part CPLD outputs a periodic square wave signal to the message conversion delay circuit, and the active part CPLD outputs C interface data to the passive part CPLD; when the symbol status signal is low or the DBPL signal decoding fails, the active part CPLD stops outputting the periodic square wave signal to the message conversion delay circuit, sets the pin output to the passive part CPLD to a high level or a low level, representing data "1" or "0", and outputs all "1" or all "0" data to the passive part CPLD, so that the on-board equipment can recognize that the active transponder has performed message conversion.

[0040] The active part power supply circuit converts the C6 signal into the power required by the active part. A large-capacity capacitor is added to the power supply circuit as an energy storage device. The capacitor capacity ensures that the active part can work effectively for a time equivalent to 700 bits of data transmission time.

[0041] The power supply of the message conversion delay circuit is provided by the passive part power supply circuit and the active part power supply circuit at the same time, which can ensure the stability of the working power supply of the message conversion delay circuit in the event of a failure of the active part power supply circuit, and can provide the passive part with an effective and reliable active part working state.

[0042] The periodic square wave signal is directly input to the monostable circuit. The monostable circuit designs a reasonable RC charge and discharge time according to the frequency of the input periodic square wave signal. This time is equivalent to a transient signal of 75-bit to 128-bit data transmission time, which is used to generate a transient high level for the active part to work effectively. When the periodic square wave is continuously input, the monostable circuit outputs a transient high level, indicating that the active part works effectively; when the periodic square wave signal stops, the monostable circuit outputs a steady low level, indicating that the active part fails to work. The signal is output to the comparator, and the signal after shaping by the comparator is output to the passive part CPLD. The passive part CPLD determines whether the active part works effectively based on this state signal. If this state signal is a high level, it proves that the active part works effectively, and the passive part CPLD continues to send C interface data; if this state signal is a low level, it proves that the active part works invalidly, and the passive part CPLD switches the data to the default message stored internally.

[0043] The passive part CPLD determines whether the output message is C interface data or the default message stored internally based on the active part working valid signal input by the message conversion delay circuit. The maximum equivalent to 128-bit data transmission time inserted during message switching is maintained by the RC charge and discharge time of the message conversion delay circuit. The full "1" or full "0" data inserted in the C interface data output by the passive part is determined by the active part CPLD based on the code element state signal output by the code break detection circuit and the DBPL decoding result. When the code element state is high, the active part CPLD outputs the C interface data, and when the code element state is low, the active part CPLD sets the data pin high or low. Data management during active transponder message switching is achieved through the code break detection circuit and the message conversion delay circuit.

[0044] The present invention is described above by way of example in conjunction with the accompanying drawings. It is obvious that the implementation of the present invention is not limited to the above-mentioned method. As long as various improvements are made using the method concept and technical solution of the present invention, or the concept and technical solution of the present invention are directly applied to other occasions without improvement, they are all within the protection scope of the present invention.

Claims

1. An active transponder C interface validity detection and message conversion delay circuit, comprising an active part and a passive part, wherein: The active part includes C interface protection and code element extraction circuit, message conversion delay circuit, active part power supply circuit, active part CPLD and broken code detection circuit; the passive part includes passive part power supply circuit; The input end of the C interface protection and code element extraction circuit is the C interface signal of the active transponder, which is input into the active part of the active transponder, and the output end is the extracted C6 signal and C1 signal; The active part power supply circuit converts the C6 signal input from the C interface into the power required by the active part and provides the energy storage circuit; The active part CPLD decodes the C1 signal according to the input signal and outputs the working status clock; The code break detection circuit detects the validity of the input C1 signal; The message conversion delay circuit outputs a transient signal equivalent to 75-bit to 128-bit data transmission time according to the validity of the C interface; The passive part power supply circuit converts the radio frequency energy obtained by the active transponder energy receiving antenna into the power required by the passive part.

2. The active transponder C interface validity detection and message conversion delay circuit according to claim 1, characterized in that: The passive part also includes a passive part CPLD. The passive part CPLD determines whether the output message is C interface data or an internally stored default message based on a valid signal of the active part input to the message conversion delay circuit. The maximum data transmission time equivalent to 128 bits inserted during message switching is maintained by the RC charge and discharge time of the message conversion delay circuit.

3. The active transponder C interface validity detection and message conversion delay circuit according to claim 2, characterized in that: The active part CPLD decodes the C1 signal according to the input code element signal, outputs the C interface data to the passive part CPLD according to the code element status signal, and outputs the periodic square wave signal to the message conversion delay circuit; when the code element status signal is high, it outputs the C interface data, and outputs the periodic square wave signal to the message conversion delay circuit; when the code element status signal is low, it outputs a stable low level or high level, and stops outputting the periodic square wave signal to the message conversion delay circuit. This process is used to insert all "0" data or all "1" data when switching messages, and transmit message conversion information to the on-board equipment.

4. The active transponder C interface validity detection and message conversion delay circuit according to claim 3, characterized in that: The active part CPLD outputs a periodic square wave signal according to the state signal output by the code break detection circuit and the result of whether the DBPL signal is decoded normally; the code break detection circuit performs code break detection according to the input C1 signal, and maintains a monostable state by setting a reasonable RC charge and discharge time. When the code element is continuously valid, it outputs a transient high level to the active part CPLD, and when the code element is broken or does not meet the DBPL encoding rules, it outputs a steady low level to the active part CPLD. The active part CPLD determines whether the C1 signal is valid according to the signal; The active part CPLD outputs a periodic square wave signal or a continuous low-level signal according to the state signal input by the code break detection circuit and the DBPL decoding result; when the code break detection circuit inputs a high level and the DBPL can decode normally, it outputs a periodic square wave signal, and when other states appear, it outputs a low-level signal, which is output to the message conversion delay circuit. The message conversion delay circuit includes a monostable circuit, and a reasonable RC charging and discharging time is designed according to the frequency of the input periodic square wave signal. The time is equivalent to a transient signal of 75-bit to 128-bit data transmission time, which is used to generate a transient high level for the active part to work effectively; when the periodic square wave is continuously input, the monostable circuit outputs a transient high level, indicating that the active part is working effectively; when the periodic square wave signal stops, the monostable circuit outputs a steady low level, indicating that the active part fails to work.

5. The active transponder C interface validity detection and message conversion delay circuit according to claim 3, characterized in that: A comparator is added to the message conversion delay circuit, and the working power of the comparator is provided by both the passive part power supply and the active part power supply to ensure the stability of the output state of the comparator; The periodic square wave signal output by the active part CPLD outputs a stable level to the comparator after passing through the monostable circuit. The signal shaped by the comparator is output to the passive part CPLD. The passive part CPLD determines whether the active part is working effectively based on this status signal. If this status signal is at a high level, it proves that the active part is working effectively, and the passive part CPLD continues to send C interface data; if this status signal is at a low level, it proves that the active part is working invalidly, and the passive part CPLD switches the data to the default message stored internally.

6. The active transponder C interface validity detection and message conversion delay circuit according to claim 5, characterized in that: The message conversion delay circuit generates a monostable signal according to the periodic square wave signal output by the active part CPLD. After passing through the comparator, the monostable signal outputs a stable state signal to the passive part CPLD as a valid state signal of the C interface; the signal outputs a transient high level as a valid state signal of the C interface under continuous periodic square wave driving; the signal can output a transient high level equivalent to 75-bit to 128-bit data transmission time according to the validity of the C interface.

7. The active transponder C interface validity detection and message conversion delay circuit according to claim 6, characterized in that: The code break detection circuit determines whether there is a code break based on the input C1 signal. The C1 signal is a signal that meets the DBPL encoding rule. The code break detection circuit outputs a transient high level based on the DBPL square wave signal, and outputs a low level when the DBPL signal has a code break or a code stop. The code break detection circuit outputs a code state signal to the active part CPLD.

8. The active transponder C interface validity detection and message conversion delay circuit according to claim 7, characterized in that: The code break detection circuit collects code element signals from the C interface protection and code element extraction circuit, removes the DC component of the collected code element signals, amplifies and shapes the waveform, and then outputs them to the monostable circuit. The monostable circuit designs a reasonable RC charge and discharge time according to the frequency of the DBPL code element to generate a transient high level. It outputs a high level when the code element continues and outputs a low level when the code element is interrupted. This process can detect the code element continuity of the C1 signal in real time, and the code break detection circuit outputs the C1 signal code element status to the active part CPLD.

9. The active transponder C interface validity detection and message conversion delay circuit according to claim 1, characterized in that: The passive part power supply circuit also provides power for the message conversion delay circuit of the active part, so as to ensure that after the passive part of the active transponder obtains sufficient power, it can immediately determine whether the C interface of the active transponder is valid, so as to ensure real-time performance; the message conversion delay circuit is powered by both the passive part power supply circuit and the active part power supply circuit, so as to ensure that the message conversion delay circuit outputs a stable state; When the C interface is disconnected or fails, the power stored in the power circuit of the active part ensures that the active part can be provided with the equivalent of 700 bits of data transmission time after the C interface cable is open or fails; When the active part power supply fails completely after more than 700 bits of data transmission time, the power supply is provided by the passive part. At this time, the signal of the comparator in the input message conversion delay circuit is low level. Powering the comparator with the passive part power supply can ensure that the message conversion delay circuit outputs a stable C interface failure status signal.

10. The active transponder C interface validity detection and message conversion delay circuit according to claim 1, characterized in that: The passive part also includes a passive part working circuit that performs FSK modulation on the message, then amplifies and sends it wirelessly, which modulates and sends the data of the active part, the inserted 75-128 bit time full "0" or full "1" data, and the default message of the passive part.

11. A ground device for a train operation control device, characterized in that: The invention comprises the active transponder C interface validity detection and message conversion delay circuit as described in any one of claims 1-10.

12. A method for detecting the validity of an active transponder C interface and converting a message, comprising the following steps: Step 1, after the C interface signal of the active transponder is input into the active part of the active transponder, it first passes through the C interface protection and code element extraction circuit, and the C interface protection and code element extraction circuit respectively outputs the extracted C6 signal to the active part power supply circuit and the C1 signal to the active part CPLD circuit; The code break detection circuit collects the code element signal from the C interface protection and code element extraction circuit, removes the DC component of the collected code element signal, amplifies it, and shapes the waveform before outputting it to the monostable circuit. The monostable circuit designs a reasonable RC charge and discharge time according to the frequency of the DBPL code element to generate a transient high level. It outputs a high level when the code element continues, and outputs a low level when the code element is interrupted. This process can detect the code element continuity of the C1 signal in real time, and the code break detection circuit outputs the C1 signal code element state to the active part CPLD. Step 2, the active part CPLD outputs a periodic square wave to the message conversion delay circuit according to the input code element and code element status signal, and outputs the decoded C interface data to the passive part CPLD at the same time; when the code element status signal is at a high level, the active part CPLD outputs a periodic square wave signal to the message conversion delay circuit and outputs the C interface data to the passive part CPLD; when the code element status signal is at a low level, the active part CPLD stops outputting the periodic square wave signal to the message conversion delay circuit, sets the pin output to the passive part CPLD to a high level or a low level, representing data "1" or "0", and outputs all "1" or all "0" data to the passive part CPLD, so that the on-board equipment can recognize that the active transponder has performed message conversion; Among them, the active part CPLD outputs a periodic square wave signal which is directly input into the message conversion delay circuit. The message conversion delay circuit is composed of a monostable circuit and a comparator. The monostable circuit designs a reasonable RC charge and discharge time according to the input periodic square wave signal frequency. The time is equivalent to a transient signal of 75-bit to 128-bit data transmission time, which is used to generate a transient high level for the active part to work effectively. When the periodic square wave is continuously input, the monostable circuit outputs a transient high level, indicating that the active part is working effectively. When the periodic square wave signal stops, the monostable circuit outputs a steady low level, indicating that the active part fails to work. The output signal of the monostable circuit is directly input into the comparator. The working power supply of the comparator is provided by the passive part power supply and the active part power supply at the same time. When the C interface is disconnected, the comparator can output a stable state signal. The signal after passing through the comparator is output to the passive part CPLD. The passive part CPLD judges whether the active part works effectively according to this state signal. If this state signal is at a high level, it proves that the active part works effectively, and the passive part CPLD continues to send C interface data; if this state signal is at a low level, it proves that the active part works invalidly, and the passive part CPLD switches the data to the default message stored internally. Step 3, the passive part CPLD determines whether the output message is C interface data or the default message stored internally according to the signal of whether the active part is working effectively input by the message conversion delay circuit. The maximum data transmission time equivalent to 128 bits inserted during message switching is maintained by the RC charging and discharging time of the message conversion delay circuit; the full "1" or full "0" data inserted into the C interface data output by the passive part is determined by the active part CPLD according to the code element state signal output by the broken code detection circuit. When the code element state is high, the active part CPLD outputs the C interface data, and when the code element state is low, the active part CPLD sets the data pin high or low; data management during active transponder message switching is realized through the broken code detection circuit and the message conversion delay circuit.

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