Maintenance packet processing device and method suitable for RapidIO switching chip

Abstract

The invention provides a maintenance packet processing device and method suitable for a RapidIO switching chip. In the device, a plurality of endpoints and a switching module connected with the endpoints are arranged in a switching chip, and only one MPM (maintenance packet processing module) is arranged in the switching module; the MPM is used for receiving a local maintenance request packet from an end point through the switching module, responding to the local maintenance request packet and returning a local maintenance response packet responding to the local maintenance request packet to the end point through the switching module; wherein the local maintenance request packet refers to a maintenance request packet of which the hopcount field is 0. According to the method and the device, the maintenance packet processing requirement of the RapidIO exchange chip with more endpoint numbers can be met, and meanwhile, the problems that the utilization rate of the maintenance packet processing logic is not high and the local maintenance packet processing logic redundancy is serious under a distributed maintenance packet processing architecture are effectively solved.

Description

Technical Field

[0001] The present invention relates to the technical field of data processing and switching forwarding, and in particular to a maintenance packet processing device and method suitable for a RapidIO switching chip. Background Art

[0002] RapidIO is a high-performance, low-pin-count, packet-switching-based interconnect architecture. It is an open interconnect technology standard designed to meet the needs of future high-performance embedded systems. RapidIO is mainly used for internal interconnection in embedded systems, supporting chip-to-chip and board-to-board communication, and can be used as a backplane connection for embedded devices.

[0003] RapidIO maintenance packets are divided into local maintenance packets (hop_count field is 0) and non-local maintenance packets (hop_count field is not 0). After receiving a local maintenance packet, a RapidIO device directly processes it locally and no longer forwards it to the downstream stage; after receiving a non-local maintenance packet, a RapidIO device decrements the hop_count by one and then forwards it to the downstream stage. The device that receives the maintenance packet with hop_count=0 is the target device of the maintenance packet.

[0004] The goal of RapidIO devices to process local maintenance packets is to bridge maintenance packet read / write transactions to the register access bus, thereby enabling read / write access to registers of the chip or system through maintenance packets.

[0005] The local maintenance packet processing function of RapidIO endpoint devices such as CPU, DSP and FPGA integrated with RapidIO controller is integrated inside the RapidIO controller. The number of RapidIO endpoints integrated in the endpoint device is usually small, and each endpoint controller corresponds to a local maintenance packet processing logic (generally a separate local maintenance packet processing module), that is, a distributed local maintenance packet processing architecture is adopted. Under this architecture, each RapidIO endpoint can process the local maintenance packet in time after receiving it. In the case of multiple endpoints, the local maintenance packets received by each endpoint can be processed independently and in parallel, with high processing efficiency. However, in RapidIO switching devices (RapidIO switching chips) containing more endpoints, considering that the number of local maintenance packets is small and the requirements for local maintenance packet processing efficiency are not high (the chip configuration bus operating frequency is low), at this time, if the distributed local maintenance packet processing architecture with the local maintenance packet processing module integrated in the RapidIO controller of each endpoint is still adopted, the utilization rate of the local maintenance packet processing logic is not high, and the problem of local maintenance packet processing logic redundancy becomes prominent. Summary of the invention

[0006] Aiming at the local maintenance packet processing requirements of RapidIO switching chips with a large number of ports and in order to overcome the problem of local maintenance packet processing logic redundancy, the present invention designs a centralized local maintenance packet processing architecture suitable for RapidIO switching chips, improves the utilization rate of local maintenance packet processing logic, reduces its overall logic resource consumption in the whole chip, and ultimately achieves the purpose of saving chip area and power consumption.

[0007] On the one hand, the present invention provides a maintenance packet processing device suitable for a RapidIO switching chip, wherein the switching chip comprises a plurality of endpoints and a switching module connected to the endpoints, and only one maintenance packet processing module MPM is arranged inside the switching module; the MPM is used to receive a local maintenance request packet from the endpoint through the switching module and respond to it, and return a local maintenance response packet in response to the local maintenance request packet to the endpoint through the switching module; wherein the local maintenance request packet refers to a maintenance request packet whose hop_count field is 0.

[0008] Furthermore, the MPM is internally provided with a maintenance package core processing module, an AMBA bus and a register connected to the AMBA bus; wherein the maintenance package core processing module includes: A packet processing unit, used for parsing the local maintenance request packet and encapsulating the local maintenance response packet according to the access result of the MPM internal register or the MPM external register; An interface signal conversion unit, used to generate and drive an address signal to a preceding address decoding unit according to a parsing result of a local maintenance request packet, and to generate and drive a data signal and a read / write control signal to a MUX unit; A front-stage address decoding unit, used to determine whether a read / write request is to access an MPM internal register or an MPM external register according to an address signal; The MUX unit is used to determine whether data signals and read / write control signals enter the AMBA bus inside the MPM based on the output results of the previous address decoding unit.

[0009] Furthermore, the maintenance package core processing module also includes: The hsel processing unit is used to determine whether the hsel signal entering the NoC bridge unit is valid according to the output result of the previous address decoding unit; NoC bridge unit, used to connect with NoC main network and MPM internal AMBA bus; Correspondingly, the interface signal conversion unit is also used to drive the data signal and the read / write control signal to the HSEL processing unit.

[0010] Furthermore, the switching module adopts a crossbar structure; Correspondingly, an OB scheduling unit, an IB scheduling unit and several MIB caches are also provided inside the MPM; wherein, one end of the OB scheduling unit and the IB scheduling unit are both connected to the maintenance package core processing module; the other end of the OB scheduling unit is connected to several MIB caches, and the several MIB caches are respectively located in different rows of the crossbar structure to respectively correspond to different input ports in the crossbar structure; the other end of the IB scheduling unit is connected to several MOB caches located outside the MPM, and the several MOB caches are located in different columns of the crossbar structure to respectively correspond to different output ports in the crossbar structure.

[0011] On the other hand, the present invention provides a maintenance packet processing method applicable to a RapidIO switching chip, wherein the switching chip internally includes a plurality of endpoints and a switching module connected to the endpoints, and only one maintenance packet processing module MPM is arranged inside the switching module; When the endpoint receives a local maintenance request packet sent by the link peer, the local maintenance request packet is sent to the MPM through the switching module. The MPM responds to the local maintenance request packet and returns a local maintenance response packet in response to the local maintenance request packet to the endpoint through the interaction module; the local maintenance request packet refers to a maintenance request packet whose hop_count field is 0.

[0012] Further, the MPM responds to the local maintenance request packet and returns the local maintenance response packet in response to the local maintenance request packet to the endpoint through the interaction module, specifically including: Parsing the received local maintenance request packet; generating an address signal, a data signal and a read / write control signal according to the parsing result of the local maintenance request packet; Determine whether the read / write request is to access an MPM internal register or an MPM external register according to the address signal; According to the judgment result of the read / write request, it is determined whether the data signal and the read / write control signal enter the AMBA bus inside the MPM; The access result of the MPM internal register or the MPM external register is returned along the original path so as to encapsulate the local maintenance response packet according to the access result.

[0013] Further, the MPM responds to the local maintenance request packet and returns the local maintenance response packet in response to the local maintenance request packet to the endpoint through the interaction module, specifically including: According to the judgment result of the read / write request, it is decided whether to generate a valid hsel signal, so as to decide whether to interconnect with the NoC main network through the MPM internal AMBA bus according to the hsel signal, data signal and read / write control signal.

[0014] Furthermore, the switching module adopts a crossbar structure; Correspondingly, sending the local maintenance request packet to the MPM through the interaction module specifically includes: Sending local request maintenance packets at different input ports in the crossbar structure to corresponding multiple MIB caches in the MPM according to a preset scheduling method; wherein the multiple MIB caches are respectively located in different rows of the crossbar structure to correspond to different input ports in the crossbar structure; Correspondingly, the MPM returns a local maintenance response packet in response to the local maintenance request packet to the endpoint through the interaction module, specifically including: The local maintenance response packet is sent to a plurality of MOB caches outside the MPM according to a preset scheduling method; wherein the plurality of MOB caches are located in different columns of the crossbar structure to respectively correspond to different output ports in the crossbar structure.

[0015] Beneficial effects of the present invention: The maintenance packet processing device and method proposed in the present invention are a centralized local maintenance packet processing architecture and method suitable for RapidIO switching chips. The entire architecture only includes one maintenance packet processing module. While meeting the maintenance packet processing requirements of RapidIO switching chips (also called RapidIO switching devices) with a large number of endpoints, it effectively solves the problems of low maintenance packet processing logic utilization and serious local maintenance packet processing logic redundancy under the distributed maintenance packet processing architecture, which is conducive to reducing the overall logic of the RapidIO switching chip, thereby reducing its area and power consumption. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 One of the structural schematic diagrams of a maintenance package processing device applicable to a RapidIO switch chip provided in an embodiment of the present invention; Figure 2 A structural block diagram of a core processing module of a maintenance package provided by an embodiment of the present invention; Figure 3 The second structural diagram of a maintenance package processing device applicable to a RapidIO switch chip provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0017] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution in the embodiment of the present invention will be clearly described below in conjunction with the drawings in the embodiment of the present invention. Obviously, the described embodiment is a part of the embodiment of the present invention, not all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0018] like Figure 1 As shown, an embodiment of the present invention provides a maintenance packet processing device suitable for a RapidIO switching chip, wherein the switching chip includes a plurality of endpoints and a switching module connected to the endpoints, and only one maintenance packet processing module MPM (Maintenance Processing Module) is arranged inside the switching module; the MPM is used to receive a local maintenance request packet from the endpoint through the switching module and respond to it, and return a local maintenance response packet in response to the local maintenance request packet to the endpoint through the switching module; wherein the local maintenance request packet refers to a maintenance request packet whose hop_count field is 0.

[0019] It can be understood that the main function of the MPM is to bridge the maintenance package read / write transaction to the register access bus, and realize the read / write access to the full chip register through the maintenance package. The MPM of this embodiment is centrally integrated inside the switching module, and receives the maintenance package from each endpoint through the switching module, and can also send the maintenance package to each endpoint. Specifically, the receiving part of the MPM receives the maintenance request packet from the switching module, and the sending part of the MPM sends the maintenance response packet to the switching module.

[0020] In this embodiment, the maintenance packet processing method of the device specifically includes: when the endpoint receives a local maintenance request packet sent by the link peer, the local maintenance request packet is sent to the MPM through the switching module, and the MPM responds to the local maintenance request packet and returns a local maintenance response packet in response to the local maintenance request packet to the endpoint through the interaction module.

[0021] like Figure 2 As shown, in one embodiment, the MPM is internally provided with a maintenance package core processing module, an AMBA bus and a register connected to the AMBA bus; wherein the maintenance package core processing module includes: a packet processing unit, an interface signal conversion unit, a front-stage address decoding unit, a MUX unit, an hsel processing unit and a NoC bridge unit.

[0022] The packet processing unit is used to parse the local maintenance request packet and encapsulate the local maintenance response packet according to the access result of the MPM internal register or the MPM external register; An interface signal conversion unit, used to generate and drive an address signal to a preceding address decoding unit according to the parsing result of the local maintenance request packet, and to generate and drive a data signal and a read / write control signal to a MUX unit and an hsel processing unit; A front-stage address decoding unit, used to determine whether a read / write request is to access an MPM internal register or an MPM external register according to an address signal; The MUX unit is used to determine whether data signals and read / write control signals enter the AMBA bus inside the MPM according to the output result of the previous address decoding unit; The hsel processing unit is used to determine whether the hsel signal entering the NoC bridge unit is valid according to the output result of the previous address decoding unit; The NoC bridge unit is used to connect the NoC main network and the MPM internal AMBA bus.

[0023] In this embodiment, the maintenance packet processing method of the device specifically includes: the packet processing unit parses the received local maintenance request packet; the interface signal conversion unit generates an address signal, a data signal and a read / write control signal according to the parsing result of the local maintenance request packet; and drives the address signal to the front-stage address decoding unit, drives the data signal and the read / write control signal to the MUX unit and the hsel processing unit; the front-stage address decoding unit determines whether the read / write request is to access the MPM internal register or the MPM external register according to the address signal; the MUX unit determines whether the data signal and the read / write control signal enter the MPM internal AMBA bus according to the judgment result of the front-stage address decoding unit on the read / write request; the hsel processing unit determines whether to generate a valid hsel signal to enter the NoC bridge unit according to the judgment result of the front-stage address decoding unit on the read / write request; finally, the access result of the MPM internal register or the MPM external register is returned to the packet processing unit according to the original path, and the packet processing unit encapsulates the local maintenance response packet according to the access result. The local maintenance response packet is then returned to the endpoint through the switching module.

[0024] It can be understood that if the MUX unit knows from the judgment result of the previous address decoding unit on the read / write request that the read / write request needs to access the MPM internal register, the MUX unit determines whether the data signal and the read / write control signal enter the MPM internal AMBA bus. If the hsel processing unit knows from the judgment result of the previous address decoding unit on the read / write request that the read / write request wants to connect to the NoC main network, it decides to generate a valid hsel signal to enter the NoC bridge unit, and interconnect with the NoC main network through the MPM internal AMBA bus according to the data signal and the read / write control signal.

[0025] It can be understood that, within the MPM, the internal register bus provides an MPM internal register access path to respond to a maintenance request packet from a link object or an access request from an external register bus master module.

[0026] It can be understood that inside the MPM, the MPM can be connected to the full-chip register access bus NoC through a set of AMBA-AHB master-slave interfaces. Through this set of interfaces, the maintenance request packet from the link object can access the registers outside the MPM, and the external register access request can also access the MPM internal registers. Among them, the register access request from the NoC (initiated by JTAG, I2C) accesses the MPM internal registers through the internal AMBA bus. The NoC bridge unit is connected to the NoC main network through a set of AHB Master and Slave interfaces. MPM can achieve read and write access to all registers on the NoC network.

[0027] like Figure 3 As shown, in one embodiment, the switching module adopts a crossbar structure; correspondingly, an OB scheduling unit, an IB scheduling unit and several MIB caches are also provided inside the MPM; wherein one end of the OB scheduling unit and the IB scheduling unit are both connected to the maintenance package core processing module; the other end of the OB scheduling unit is connected to several MIB caches, and the several MIB caches are respectively located in different rows of the crossbar structure to respectively correspond to different input ports in the crossbar structure; the other end of the IB scheduling unit is connected to several MOB caches located outside the MPM, and the several MOB caches are located in different columns of the crossbar structure to respectively correspond to different output ports in the crossbar structure.

[0028] In this embodiment, in order to facilitate scheduling, two levels of cache are set in the crossbar structure, IB is the first level cache of the crossbar structure, and the CXB array is the second level cache of the crossbar structure. Among them, the front level of IB is connected to the transport layer and routing module of the RapidIO protocol controller, and the back level is connected to the CXB array; in the CXB array, each CXB row corresponds to an input port of the crossbar structure, and each CXB column corresponds to an output port of the crossbar structure, and data packets are transmitted from the input port to the output port.

[0029] It can be understood that the data packets received by the RapidIO protocol controller from the network will first enter the IB; in the IB, a VOQ (Virtual Output Queue) is established according to the routing results transmitted together with the data packets. There is an input scheduling module in the IB, which generates scheduling results according to the status of the VOQ and the cache status in the CXB row, and transmits the data packets in the IB to one or several CXBs in the CXB row or to the MIB; then, the data packets in a certain MIB are transmitted to the maintenance package core processing module through the OB scheduling inside the MPM; or, the data packets in one or several CXBs are forwarded to the output port through the OB scheduling outside the MPM.

[0030] Similarly, the maintenance response packet generated by the maintenance packet core processing module will first be scheduled by IB to transmit the maintenance response packet to one or several MOBs in the CXB row; then, the data packets in one or several MOBs will be forwarded to the output port through OB scheduling outside the MPM.

[0031] The above data processing method in this embodiment can greatly reduce the complexity of scheduling processing.

[0032] It can be seen from the above data transmission process that in the centralized maintenance package processing device provided in this embodiment, the data flow of the switching module is divided into the following two types: The first is horizontal transmission, which is the transmission from IB to CXB. After receiving the data packet from the port controller, IB will establish a queue according to the routing information of the route, and finally transfer it to the corresponding CXB according to the destination port information under the control of the scheduling module. The CXB is located at the intersection of the input port and the destination port. For multicast messages, they will be dispersed to multiple CXBs corresponding to the destination port according to the number of destination ports. For maintenance packets, the local maintenance request packet before processing will be transmitted to the MIB corresponding to each input port, which is located in the CXB row corresponding to the IB. The processed local maintenance response packet will enter the MOB row.

[0033] The second is vertical transmission, which is the transmission from CXB column to OB. This CXB column not only contains the part of the CXB row corresponding to each IB, but also contains the MOB used to cache the maintenance response packet.

[0034] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A maintenance packet processing device suitable for a RapidIO switching chip, wherein the switching chip includes a plurality of endpoints and a switching module connected to the endpoints, characterized in that: Only one maintenance packet processing module MPM is set inside the switching module; the MPM is used to receive a local maintenance request packet from the endpoint through the switching module and respond to it, and return a local maintenance response packet in response to the local maintenance request packet to the endpoint through the switching module; wherein the local maintenance request packet refers to a maintenance request packet whose hop_count field is 0.

2. A maintenance packet processing device suitable for a RapidIO switch chip according to claim 1, characterized in that: The MPM is internally provided with a maintenance package core processing module, an AMBA bus and a register connected to the AMBA bus; wherein the maintenance package core processing module includes: A packet processing unit, used for parsing the local maintenance request packet and encapsulating the local maintenance response packet according to the access result of the MPM internal register or the MPM external register; An interface signal conversion unit, used to generate and drive an address signal to a preceding address decoding unit according to a parsing result of a local maintenance request packet, and to generate and drive a data signal and a read / write control signal to a MUX unit; A front-stage address decoding unit, used to determine whether a read / write request is to access an MPM internal register or an MPM external register according to an address signal; The MUX unit is used to determine whether data signals and read / write control signals enter the AMBA bus inside the MPM based on the output results of the previous address decoding unit.

3. A maintenance packet processing device suitable for a RapidIO switch chip according to claim 2, characterized in that: The maintenance package core processing module also includes: The hsel processing unit is used to determine whether the hsel signal entering the NoC bridge unit is valid according to the output result of the previous address decoding unit; NoC bridge unit, used to connect with NoC main network and MPM internal AMBA bus; Correspondingly, the interface signal conversion unit is also used to drive the data signal and the read / write control signal to the HSEL processing unit.

4. A maintenance package processing device applicable to a RapidIO switch chip according to any one of claims 1 to 3, characterized in that: The switching module adopts a crossbar structure; Correspondingly, an OB scheduling unit, an IB scheduling unit and several MIB caches are also provided inside the MPM; wherein, one end of the OB scheduling unit and the IB scheduling unit are both connected to the maintenance package core processing module; the other end of the OB scheduling unit is connected to several MIB caches, and the several MIB caches are respectively located in different rows of the crossbar structure to respectively correspond to different input ports in the crossbar structure; the other end of the IB scheduling unit is connected to several MOB caches located outside the MPM, and the several MOB caches are located in different columns of the crossbar structure to respectively correspond to different output ports in the crossbar structure.

5. A maintenance packet processing method applicable to a RapidIO switching chip, wherein the switching chip includes a plurality of endpoints and a switching module connected to the endpoints, characterized in that: Only one maintenance package processing module MPM is provided inside the switching module; When the endpoint receives a local maintenance request packet sent by the link peer, the local maintenance request packet is sent to the MPM through the switching module. The MPM responds to the local maintenance request packet and returns a local maintenance response packet in response to the local maintenance request packet to the endpoint through the interaction module; the local maintenance request packet refers to a maintenance request packet whose hop_count field is 0.

6. The maintenance package processing method applicable to RapidIO switch chip according to claim 4, characterized in that: The MPM responds to the local maintenance request packet and returns the local maintenance response packet in response to the local maintenance request packet to the endpoint through the interaction module, specifically including: Parsing the received local maintenance request packet; generating an address signal, a data signal and a read / write control signal according to the parsing result of the local maintenance request packet; Determine whether the read / write request is to access an MPM internal register or an MPM external register according to the address signal; According to the judgment result of the read / write request, it is determined whether the data signal and the read / write control signal enter the AMBA bus inside the MPM; The access result of the MPM internal register or the MPM external register is returned along the original path so as to encapsulate the local maintenance response packet according to the access result.

7. A maintenance package processing method applicable to a RapidIO switch chip according to claim 6, characterized in that: The MPM responds to the local maintenance request packet and returns the local maintenance response packet in response to the local maintenance request packet to the endpoint through the interaction module, specifically including: According to the judgment result of the read / write request, it is decided whether to generate a valid hsel signal, so as to decide whether to interconnect with the NoC main network through the MPM internal AMBA bus according to the hsel signal, data signal and read / write control signal.

8. A maintenance package processing method applicable to a RapidIO switch chip according to any one of claims 5 to 7, characterized in that: The switching module adopts a crossbar structure; Correspondingly, sending the local maintenance request packet to the MPM through the interaction module specifically includes: Sending local request maintenance packets at different input ports in the crossbar structure to corresponding multiple MIB caches in the MPM according to a preset scheduling method; wherein the multiple MIB caches are respectively located in different rows of the crossbar structure to correspond to different input ports in the crossbar structure; Correspondingly, the MPM returns a local maintenance response packet in response to the local maintenance request packet to the endpoint through the interaction module, specifically including: The local maintenance response packet is sent to a plurality of MOB caches outside the MPM according to a preset scheduling method; wherein the plurality of MOB caches are located in different columns of the crossbar structure to respectively correspond to different output ports in the crossbar structure.

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