A maintenance packet processing device and method for RapidIO switching chips

Abstract

This invention provides a maintenance packet processing apparatus and method suitable for RapidIO switching chips. In this apparatus, the switching chip internally includes several endpoints and a switching module connected to the endpoints. The switching module contains only one maintenance packet processing module (MPM). The MPM is used to receive local maintenance request packets from the endpoints through the switching module and respond to them, and to return local maintenance response packets in response to the local maintenance request packets to the endpoints through the switching module. The local maintenance request packet refers to a maintenance request packet where the hop_count field is 0. This invention can meet the maintenance packet processing needs of RapidIO switching chips with a large number of endpoints while effectively solving the problems of low utilization of maintenance packet processing logic and severe redundancy of local maintenance packet processing logic in distributed maintenance packet processing architectures.

Description

Technical Field

[0001] This invention relates to the field of data processing and switching technology, and in particular to a maintenance packet processing device and method suitable for RapidIO switching chips. Background Technology

[0002] RapidIO is a high-performance, low-pin-count, packet-switched interconnect architecture, an open interconnect technology standard designed to meet the needs of future high-performance embedded systems. RapidIO is primarily used for internal interconnects within embedded systems, supporting chip-to-chip and board-to-board communication, and can be used as a backplane connection for embedded devices.

[0003] RapidIO maintenance packets are divided into local maintenance packets (hop_count field is 0) and non-local maintenance packets (hop_count field is not 0). When a RapidIO device receives a local maintenance packet, it processes it locally without forwarding it to the next stage. When a RapidIO device receives a non-local maintenance packet, it decrements the hop_count by one before forwarding it to the next stage. Only the device that receives the maintenance packet with hop_count=0 is the target device for the maintenance packet.

[0004] The goal of RapidIO devices in handling local maintenance packages is to bridge maintenance package read / write transactions to the register access bus, enabling read / write access to chip or system registers via maintenance packages.

[0005] RapidIO endpoint devices such as CPUs, DSPs, and FPGAs, which integrate RapidIO controllers, have their local maintenance packet processing functionality integrated within the RapidIO controller. These devices typically integrate a small number of RapidIO endpoints, with each endpoint controller corresponding to a local maintenance packet processing logic (usually a separate local maintenance packet processing module), employing a distributed local maintenance packet processing architecture. Under this architecture, each RapidIO endpoint can process received local maintenance packets promptly. With multiple endpoints, the local maintenance packets received by each endpoint can be processed independently and in parallel, resulting in high processing efficiency. However, in RapidIO switching devices (RapidIO switching chips) with a large number of endpoints, considering the smaller number of local maintenance packets and the lower requirement for local maintenance packet processing efficiency (due to the low operating frequency of the chip configuration bus), if the distributed local maintenance packet processing architecture, which integrates a local maintenance packet processing module in the RapidIO controller of each endpoint, is still used, the utilization rate of the local maintenance packet processing logic becomes low, and the redundancy problem of the local maintenance packet processing logic becomes prominent. Summary of the Invention

[0006] To address the local maintenance packet processing requirements of RapidIO switching chips with a large number of ports, and to overcome the problem of redundant local maintenance packet processing logic, this invention designs a centralized local maintenance packet processing architecture suitable for RapidIO switching chips. This architecture improves the utilization rate of local maintenance packet processing logic, reduces its overall logic resource consumption in the entire chip, and ultimately achieves the goal of saving chip area and power consumption.

[0007] On one hand, the present invention provides a maintenance packet processing device suitable for RapidIO switching chips. The switching chip includes several endpoints and a switching module connected to the endpoints. Only one maintenance packet processing module (MPM) is set inside the switching module. The MPM is used to receive local maintenance request packets from the endpoints through the switching module and respond to them, and to return local maintenance response packets in response to the local maintenance request packets to the endpoints through the switching module. The local maintenance request packet refers to a maintenance request packet with a hop_count field of 0.

[0008] Furthermore, the MPM internally includes a maintenance package core processing module, an AMBA bus, and registers connected to the AMBA bus; wherein, the maintenance package core processing module includes:

[0009] The packet processing unit is used to parse local maintenance request packets and encapsulate local maintenance response packets based on the access results of MPM internal registers or MPM external registers.

[0010] The interface signal conversion unit is used to generate and drive address signals to the front-end address decoding unit based on the parsing result of the local maintenance request packet, and to generate and drive data signals and read / write control signals to the MUX unit.

[0011] The front-end address decoding unit is used to determine whether the read / write request needs to access the MPM internal register or the MPM external register based on the address signal;

[0012] The MUX unit is used to determine whether data signals and read / write control signals enter the internal AMBA bus of the MPM based on the output of the preceding address decoding unit.

[0013] Furthermore, the maintenance package core processing module also includes:

[0014] The hsel processing unit is used to determine whether the hsel signal entering the NoC bridging unit is valid based on the output of the previous address decoding unit.

[0015] The NoC bridging unit is used to connect to the NoC main network and the MPM internal AMBA bus;

[0016] Correspondingly, the interface signal conversion unit is also used to drive data signals and read / write control signals to the hsel processing unit.

[0017] Furthermore, the switching module adopts a crossbar structure;

[0018] Correspondingly, the MPM also includes an OB scheduling unit, an IB scheduling unit, and several MIB caches. One end of each of the OB and IB scheduling units is connected to the maintenance package core processing module. The other end of the OB scheduling unit is connected to several MIB caches, each located in a different row of the crossbar structure to correspond to a different input port within the crossbar structure. The other end of each IB scheduling unit is connected to several MOB caches located outside the MPM, each located in a different column of the crossbar structure to correspond to a different output port within the crossbar structure.

[0019] On the other hand, the present invention provides a maintenance packet processing method applicable to RapidIO switching chips, wherein the switching chip contains a plurality of endpoints and a switching module connected to the endpoints, and only a maintenance packet processing module (MPM) is provided inside the switching module;

[0020] When the endpoint receives a local maintenance request packet sent by the peer of the link, it sends the local maintenance request packet to the MPM through the switching module. The MPM responds to the local maintenance request packet and returns the local maintenance response packet in response to the local maintenance request packet to the endpoint through the interaction module. The local maintenance request packet refers to the maintenance request packet in which the hop_count field is 0.

[0021] Furthermore, the MPM responding to the local maintenance request packet and returning the local maintenance response packet to the endpoint through the interaction module specifically includes:

[0022] Parse the received local maintenance request packet;

[0023] The address signal, data signal, and read / write control signal are generated based on the parsing result of the local maintenance request packet;

[0024] The address signal is used to determine whether the read / write request needs to access the MPM internal register or the MPM external register.

[0025] Based on the result of the read / write request, it is determined whether the data signal and read / write control signal enter the MPM's internal AMBA bus;

[0026] The access results of the MPM internal registers or MPM external registers are returned along the original path so that a local maintenance response packet can be encapsulated based on the access results.

[0027] Furthermore, the MPM responding to the local maintenance request packet and returning the local maintenance response packet in response to the local maintenance request packet to the endpoint through the interaction module specifically includes:

[0028] Based on the result of the read / write request, a decision is made on whether to generate a valid HSEL signal, so that the MPM can determine whether to interconnect with the NoC main network through the internal AMBA bus based on the HSEL signal, data signal, and read / write control signal.

[0029] Furthermore, the switching module adopts a crossbar structure;

[0030] Correspondingly, the local maintenance request packet is sent to the MPM through the interaction module, specifically including:

[0031] According to a preset scheduling method, the local request maintenance packets at different input ports in the crossbar structure are sent to several corresponding MIB caches inside the MPM; wherein, the several MIB caches are located in different rows of the crossbar structure to correspond to different input ports in the crossbar structure.

[0032] Correspondingly, the MPM returns a local maintenance response packet in response to the local maintenance request packet to the endpoint through the interaction module, specifically including:

[0033] According to a preset scheduling method, the local maintenance response packet is sent to several MOB caches outside the bit MPM; wherein, the several MOB caches are located in different columns of the crossbar structure to correspond to different output ports in the crossbar structure.

[0034] The beneficial effects of this invention are:

[0035] The maintenance packet processing device and method proposed in this invention is a centralized local maintenance packet processing architecture and method suitable for RapidIO switching chips. The entire architecture contains only one maintenance packet processing module. While meeting the maintenance packet processing needs of RapidIO switching chips (also known as RapidIO switching devices) with a large number of endpoints, it effectively solves the problems of low utilization of maintenance packet processing logic and serious redundancy of local maintenance packet processing logic under distributed maintenance packet processing architecture. This is conducive to reducing the overall logic of RapidIO switching chips, thereby reducing their area and power consumption. Attached Figure Description

[0036] Figure 1 This is one of the structural schematic diagrams of a maintenance packet processing device suitable for RapidIO switching chips provided in an embodiment of the present invention;

[0037] Figure 2 This is a structural block diagram of the core processing module of the maintenance package provided in an embodiment of the present invention;

[0038] Figure 3 This is a second schematic diagram of a maintenance packet processing device for RapidIO switching chips, provided as an embodiment of the present invention. Detailed Implementation

[0039] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of the embodiments of this invention will be clearly described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0040] like Figure 1 As shown, this embodiment of the invention provides a maintenance packet processing device suitable for a RapidIO switching chip. The switching chip includes several endpoints and a switching module connected to the endpoints. The switching module contains only one maintenance packet processing module (MPM). The MPM is used to receive local maintenance request packets from the endpoints through the switching module and respond to them, and to return local maintenance response packets in response to the local maintenance request packets to the endpoints through the switching module. The local maintenance request packet refers to a maintenance request packet with a hop_count field of 0.

[0041] It is understandable that the main function of the MPM is to bridge maintenance package read / write transactions to the register access bus, enabling read / write access to all chip registers through maintenance packages. In this embodiment, the MPM is centrally integrated within the switching module. The switching module receives maintenance packages from various endpoints and can also send maintenance packages to various endpoints. Specifically, the receiving part of the MPM receives maintenance request packages from the switching module, and the sending part of the MPM sends maintenance response packages to the switching module.

[0042] In this embodiment, the maintenance packet processing method of the device specifically includes: when the endpoint receives a local maintenance request packet sent by the link peer, it sends the local maintenance request packet to the MPM through the switching module, the MPM responds to the local maintenance request packet and returns the local maintenance response packet in response to the local maintenance request packet to the endpoint through the interaction module.

[0043] like Figure 2 As shown, in one embodiment, the MPM internally includes a maintenance package core processing module, an AMBA bus, and registers connected to the AMBA bus; wherein, the maintenance package core processing module includes: a packet processing unit, an interface signal conversion unit, a front-end address decoding unit, a MUX unit, an hsel processing unit, and a NoC bridging unit.

[0044] The packet processing unit is used to parse the local maintenance request packet and encapsulate the local maintenance response packet according to the access results of the MPM internal register or MPM external register.

[0045] The interface signal conversion unit is used to generate and drive address signals to the front-end address decoding unit based on the parsing result of the local maintenance request packet, and to generate and drive data signals and read / write control signals to the MUX unit and the hsel processing unit.

[0046] The front-end address decoding unit is used to determine whether the read / write request needs to access the MPM internal register or the MPM external register based on the address signal;

[0047] The MUX unit is used to determine whether data signals and read / write control signals enter the internal AMBA bus of the MPM based on the output of the preceding address decoding unit.

[0048] The hsel processing unit is used to determine whether the hsel signal entering the NoC bridging unit is valid based on the output of the previous address decoding unit.

[0049] The NoC bridging unit is used to connect to the NoC main network and the MPM internal AMBA bus.

[0050] In this embodiment, the maintenance packet processing method of the device specifically includes: a packet processing unit parses the received local maintenance request packet; an interface signal conversion unit generates address signals, data signals, and read / write control signals based on the parsing result of the local maintenance request packet; and drives the address signal to the front-end address decoding unit, and drives the data signal and read / write control signal to the MUX unit and the hsel processing unit; the front-end address decoding unit determines whether the read / write request needs to access an MPM internal register or an MPM external register based on the address signal; the MUX unit determines whether the data signal and read / write control signal enter the MPM internal AMBA bus based on the determination result of the read / write request by the front-end address decoding unit; the hsel processing unit determines whether to generate a valid hsel signal to enter the NoC bridge unit based on the determination result of the read / write request by the front-end address decoding unit; finally, the access result of the MPM internal register or MPM external register is returned to the packet processing unit along the original path, and the packet processing unit encapsulates a local maintenance response packet based on the access result. This local maintenance response packet is then returned to the endpoint through the switching module.

[0051] It is understandable that if the MUX unit determines, based on the judgment result of the preceding address decoding unit, that the read / write request needs to access the MPM internal registers, the MUX unit will decide whether the data signal and read / write control signal enter the MPM internal AMBA bus. If the hsel processing unit determines, based on the judgment result of the preceding address decoding unit, that the read / write request wants to connect to the NoC main network, it will generate a valid hsel signal to enter the NoC bridge unit, and interconnect with the NoC main network through the MPM internal AMBA bus according to the data signal and read / write control signal.

[0052] It is understandable that within the MPM, the internal register bus provides access paths to the MPM's internal registers in response to maintenance request packets from link objects or access requests from the external register bus master module.

[0053] It is understandable that within the MPM, the MPM can connect to the NoC (No. 7 Register Access Bus) via a set of AMBA-AHB master-slave interfaces. Through this set of interfaces, maintenance request packets from linked objects can access registers external to the MPM, and external register access requests can also access internal registers within the MPM. Specifically, register access requests from the NoC (initiated by JTAG or I2C) access the MPM's internal registers via the internal AMBA bus. The NoC bridging unit connects to the NoC master network via a set of AHB Master and Slave interfaces. Read and write access to all registers on the NoC network can be achieved through the MPM.

[0054] like Figure 3As shown, in one embodiment, the switching module adopts a crossbar structure; correspondingly, the MPM also includes an OB scheduling unit, an IB scheduling unit, and several MIB caches; wherein, one end of the OB scheduling unit and the IB scheduling unit are both connected to the maintenance package core processing module; the other end of the OB scheduling unit is connected to several MIB caches, and the several MIB caches are located in different rows of the crossbar structure to correspond to different input ports in the crossbar structure; the other end of the IB scheduling unit is connected to several MOB caches located outside the MPM, and the several MOB caches are located in different columns of the crossbar structure to correspond to different output ports in the crossbar structure.

[0055] In this embodiment, to facilitate scheduling, a two-level buffer is set up in the crossbar structure. IB is the first-level buffer of the crossbar structure, and the CXB array is the second-level buffer. The front-end of IB is connected to the transport layer and routing module of the RapidIO protocol controller, and the back-end is connected to the CXB array. In the CXB array, each CXB row corresponds to an input port of the crossbar structure, and each CXB column corresponds to an output port of the crossbar structure, transmitting data packets from the input port to the output port.

[0056] It is understandable that the data packets received by the RapidIO protocol controller from the network first enter the IB; in the IB, a VOQ (Virtual Output Queue) is established based on the routing results transmitted along with the data packets. The IB contains an input scheduling module, which generates a scheduling result based on the VOQ status and the buffer status in the CXB row, and transmits the data packets in the IB to one or more CXB rows or the MIB; then, the data packets in a certain MIB are transmitted to the maintenance packet core processing module through the OB scheduling inside the MPM; or, the data packets in one or more CXBs are forwarded to the output port through the OB scheduling outside the MPM.

[0057] Similarly, the maintenance response packet generated by the maintenance packet core processing module is first scheduled by IB to be transmitted to one or more MOBs in the CXB line; then, it is forwarded to the output port by the OB scheduling outside the MPM.

[0058] The data processing method described in this embodiment can greatly reduce the complexity of scheduling.

[0059] As can be seen from the above data transmission process, in the centralized maintenance package processing device provided in this embodiment, the data stream of the switching module is divided into the following two types:

[0060] The first type is lateral transmission, which is the transmission from the IB to the CXB line. After receiving the data packet from the port controller, the IB establishes a queue based on the routing information along the route. Under the control of the scheduling module, it is finally transferred to the corresponding CXB according to the destination port information. This CXB is located at the intersection of the input port and the destination port. For multicast packets, they are distributed to multiple CXBs corresponding to the destination ports according to the number of destination ports. For maintenance packets, the local maintenance request packet before processing is transmitted to the MIB corresponding to each input port. This MIB is located in the CXB line corresponding to the IB. The local maintenance response packet after processing enters the MOB line.

[0061] The second type is vertical transfer, which is the transfer from the CXB column to the OB. This CXB column not only contains a portion of the CXB rows corresponding to each IB, but also includes the MOB used to cache and maintain response packets.

[0062] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A maintenance packet processing device for a RapidIO switching chip, wherein the switching chip internally includes a plurality of endpoints and a switching module connected to the endpoints, characterized in that, The exchange module contains only one maintenance packet processing module (MPM). The MPM is used to receive local maintenance request packets from the endpoint through the exchange module and respond to them, and to return local maintenance response packets in response to the local maintenance request packets to the endpoint through the exchange module. The local maintenance request packet refers to a maintenance request packet with a hop_count field of 0. The MPM internally includes a maintenance package core processing module, an AMBA bus, and registers connected to the AMBA bus; wherein, the maintenance package core processing module includes: The packet processing unit is used to parse local maintenance request packets and encapsulate local maintenance response packets based on the access results of MPM internal registers or MPM external registers. The interface signal conversion unit is used to generate and drive address signals to the front-end address decoding unit based on the parsing result of the local maintenance request packet, and to generate and drive data signals and read / write control signals to the MUX unit. The front-end address decoding unit is used to determine whether the read / write request needs to access the MPM internal register or the MPM external register based on the address signal; The MUX unit is used to determine whether data signals and read / write control signals enter the internal AMBA bus of the MPM based on the output of the preceding address decoding unit.

2. The maintenance packet processing device for RapidIO switching chips according to claim 1, characterized in that, The core processing module of the maintenance package also includes: The hsel processing unit is used to determine whether the hsel signal entering the NoC bridging unit is valid based on the output of the previous address decoding unit. The NoC bridging unit is used to connect to the NoC main network and the MPM internal AMBA bus; Correspondingly, the interface signal conversion unit is also used to drive data signals and read / write control signals to the hsel processing unit.

3. A maintenance packet processing device for RapidIO switching chips according to claim 1 or 2, characterized in that, The switching module adopts a crossbar structure; Correspondingly, the MPM also includes an OB scheduling unit, an IB scheduling unit, and several MIB caches. One end of each of the OB and IB scheduling units is connected to the maintenance package core processing module. The other end of the OB scheduling unit is connected to several MIB caches, each located in a different row of the crossbar structure to correspond to a different input port within the crossbar structure. The other end of each IB scheduling unit is connected to several MOB caches located outside the MPM, each located in a different column of the crossbar structure to correspond to a different output port within the crossbar structure.

4. A maintenance packet processing method for a RapidIO switching chip, wherein the switching chip internally includes a plurality of endpoints and a switching module connected to the endpoints, characterized in that: Only one maintenance package processing module (MPM) is installed inside the switching module; When an endpoint receives a local maintenance request packet from the peer of the link, it sends the local maintenance request packet to the MPM through the switching module. The MPM responds to the local maintenance request packet and returns a local maintenance response packet in response to the local maintenance request packet to the endpoint through the switching module. The local maintenance request packet refers to a maintenance request packet in which the hop_count field is 0. The MPM responds to the local maintenance request packet, and the process of returning the local maintenance response packet to the endpoint through the switching module specifically includes: Parse the received local maintenance request packet; The address signal, data signal, and read / write control signal are generated based on the parsing result of the local maintenance request packet; The address signal is used to determine whether the read / write request needs to access the MPM internal register or the MPM external register. Based on the result of the read / write request, it is determined whether the data signal and read / write control signal enter the MPM's internal AMBA bus; The access results of the MPM internal registers or MPM external registers are returned along the original path so that a local maintenance response packet can be encapsulated based on the access results.

5. A maintenance packet processing method for RapidIO switching chips according to claim 4, characterized in that, The MPM responds to the local maintenance request packet, and the step of returning the local maintenance response packet to the endpoint through the switching module further includes: Based on the result of the read / write request, a decision is made on whether to generate a valid HSEL signal, so that the MPM can determine whether to interconnect with the NoC main network through the internal AMBA bus based on the HSEL signal, data signal, and read / write control signal.

6. A maintenance packet processing method for RapidIO switching chips according to claim 4 or 5, characterized in that, The switching module adopts a crossbar structure; Correspondingly, the local maintenance request packet is sent to the MPM via the switching module, specifically including: According to a preset scheduling method, the local request maintenance packets at different input ports in the crossbar structure are sent to several corresponding MIB caches inside the MPM; wherein, the several MIB caches are located in different rows of the crossbar structure to correspond to different input ports in the crossbar structure. Correspondingly, the MPM returns a local maintenance response packet in response to the local maintenance request packet to the endpoint through the switching module, specifically including: According to a preset scheduling method, the local maintenance response packet is sent to several MOB caches outside the bit MPM; wherein, the several MOB caches are located in different columns of the crossbar structure to correspond to different output ports in the crossbar structure.

Images