Image forming apparatus and control method thereof

Abstract

The invention provides an image forming apparatus and a control method thereof. The image forming apparatus is controlled as follows. In a case where the first controller receives an end process event, the first controller that transitions the image forming apparatus to the power saving state transitions the image forming apparatus to the sleep state in a case where the transition to the sleep state is enabled, and transitions the image forming apparatus to the pause state in a case where the transition to the pause state is enabled. The program of the second controller is loaded into the memory and the image forming apparatus is transitioned to a suspended state.

Description

Technical Field

[0001] The present disclosure relates to an image forming apparatus and a power control method of the image forming apparatus. Background Art

[0002] Computers use power-saving techniques including suspend, hibernation, and hybrid sleep to provide multiple functions while waiting with low power consumption.

[0003] Suspend achieves low power consumption by putting peripheral devices into a stop state while applying current to the memory, and further putting the central processing unit (CPU) into a stop state such as stopping the clock, waiting for interrupt (WFI), or power off. Hibernate achieves low power consumption by saving information in memory or registers in a non-volatile storage device, stopping the application of current to the memory, peripheral devices, and CPU, and stopping the clock.

[0004] The computer receives a power saving transition event notification such as timer expiration in the waiting state, and performs a suspend process or hibernation process to transition to a power saving state such as a sleep state or an off state (waiting for a quick start state) to which the computer can quickly return. Conversely, the computer receives a power saving return event notification in the power saving state, and performs a resume process to return to the waiting state.

[0005] In addition, hybrid sleep is a function that combines suspend and hibernate, wherein the computer is suspended in a power saving state until a certain time has passed, and hibernates after the certain time has passed. Suspend, hibernate, and hybrid sleep are used appropriately according to the purpose or convenience of the user, which helps save power on the computer.

[0006] Japanese Patent Laid-Open No. 2015-022493 discusses a sleep return method of an electronic device including a main CPU and a sub-CPU, and a technique for retracting and restoring data in memories of the main CPU and the sub-CPU. Summary of the invention

[0007] Suspend, Hibernate, and Hybrid Sleep are collectively referred to as "Quick Start Modes."

[0008] Unlike the above-mentioned computer, the image forming apparatus includes two central processing units (CPUs), namely, a main CPU for controlling the system of the image forming apparatus and a sub-CPU for controlling image processing. Generally, the sub-CPU for controlling image processing is used only for executing jobs in image processing. Therefore, the sub-CPU can be transformed or returned faster than the system save time by starting from a power-off state than by returning from a quick start mode. Therefore, the image forming apparatus including the sub-CPU performs an operation different from the operation of returning from the quick start mode.

[0009] As a quick start mode of the image forming apparatus, conventionally, quick start is achieved by loading the program of the sub-CPU into the memory before the image forming apparatus is turned into the pause state. In this era of energy saving, quick start from a hibernation state in which the standby power is less than the pause state has attracted attention. The hibernation state is a sleep state in which current is not applied to the memory. Therefore, there is a problem that in the hibernation state, similar to the pause state, the timing return of the program loaded by the sub-CPU cannot be successfully operated.

[0010] Therefore, the timing of loading a program into the memory needs to be distinguished between a suspend state (ie, sleep in which current is applied to the memory) and a hibernate state (ie, sleep in which current is not applied to the memory).

[0011] Furthermore, hybrid sleep in which the image forming apparatus shifts to the hibernation state within a certain time after the image forming apparatus shifts to the pause state also involves controlling the timing of loading the program of the sub-CPU based on the state.

[0012] The present disclosure is directed to achieving transition to and return from the fast startup mode by controlling the timing of loading a program of a sub-CPU in a fast startup mode including suspend, hibernation, and hybrid sleep.

[0013] According to one aspect of the present disclosure, an image forming device includes: a first controller and a second controller for performing at least image processing, and a memory, the image forming device can be transformed into a standby state, a pause state, and a hibernation state, the pause state is a power saving state in which current is applied to the memory and a quick start can be performed, and the hibernation state is a power saving state in which no current is applied to the memory. The first controller is configured to cause the image forming device to transform into a power saving state when the first controller receives an end processing event. When the first controller determines that the transformation to the hibernation state is disabled, the first controller controls the image forming device to transform into the hibernation state, and when the first controller determines that the transformation to the pause state is enabled, the first controller controls to load a program of the second controller into the memory, and then causes the image forming device to transform into the pause state.

[0014] Further features of the present disclosure will become apparent from the following description of exemplary embodiments with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a block diagram of an image forming apparatus.

[0016] Figure 2 is the block diagram of the controller.

[0017] Figure 3 is a diagram showing a power supply system of the image forming apparatus.

[0018] Figure 4 is a flow chart according to one or more aspects of the present disclosure.

[0019] Figure 5 is a flow chart according to one or more aspects of the present disclosure.

[0020] Fig. 6A and Figure 6B is a flow chart according to one or more aspects of the present disclosure.

[0021] Figure 7 is a flow chart according to one or more aspects of the present disclosure. DETAILED DESCRIPTION

[0022] The suspend, hibernate, and hybrid sleep are each referred to as a “quick startup mode” or a “power saving state capable of quick startup.” The image forming apparatus according to the exemplary embodiment can transition to the suspend state and the hibernate state.

[0023] Since the image forming apparatus also has a server function, the system state of the image forming apparatus changes all the time even while the system is waiting. Therefore, the main central processing unit (CPU) saves the previous execution state of the system and transitions to and returns from the quick start mode, so that the user can use the system for a shorter time than normal startup. However, usually, the sub-CPU is used in image processing to perform jobs, and the sub-CPU is not used when the system is waiting. Therefore, the sub-CPU can transition or return faster than the system save time by saving the previous execution state of the system and transitioning to and returning from the quick start mode. In order to solve this situation, there are some problems in transitioning the main CPU to and returning from the quick start mode, and causing the sub-CPU to start normally.

[0024] For example, in the case of a pause, the main memory can refresh itself and maintain the data in itself during the pause, but the sub-memory is powered off to save power. Therefore, the execution program of the main CPU is stored in the operating system (OS) internal management area on the main memory, and the execution program of the sub-CPU is stored in the OS external management area on the main memory. Then, when the image forming apparatus returns from the pause, the execution program of the sub-CPU stored in the OS external management area on the main memory can be loaded into the sub-memory, and the sub-CPU can be started.

[0025] However, in the case of hibernation, the data in the main memory is recalled to the non-volatile storage device, but the data to be recalled is the data in the area managed by the OS (OS internal management area), and the data in the area not managed by the OS (OS external management area) is not recalled. Since both the main memory and the sub-memory are powered off, the continuous area storing the execution program of the sub-CPU in the OS external management area on the main memory is also erased. Therefore, in hibernation, there is a problem that the sub-CPU cannot be started after the image forming apparatus returns from hibernation.

[0026] Hybrid sleep is a function obtained by combining suspend and hibernate, in which the image forming apparatus is suspended in the quick start mode until a certain time has passed, and the image forming apparatus is hibernate after the certain time has passed. However, hybrid sleep is similar to hibernate in that both the main memory and the sub-memory are powered off. Therefore, there is the same problem as hibernate, that is, the execution program of the sub-CPU is erased.

[0027] Exemplary embodiments of the present disclosure carried out to solve the above-mentioned problems will be described with reference to the accompanying drawings.

[0028] <System Configuration>

[0029] Figure 1 1 is a block diagram showing a configuration of an image forming system according to a first exemplary embodiment. In the present exemplary embodiment, a multifunction peripheral having a printing function, a scanner function, and a data communication function is used as an example.

[0030] exist Figure 1, the image forming device 101 is configured to receive a job from a computer 109 via a local area network (LAN) 108. The number of computers connected to the image forming device 101 can be greater than or equal to 1. The scanner device 102 optically reads an image from an original and converts the read image into a digital image. The printer device 104 outputs the digital image to a paper called a "sheet". The operation unit 105 includes a touch panel and hardware keys for receiving settings of the image forming device 101 from a user and displaying the processing status of the image forming device 101. The hard disk (also called "HDD") 106 stores digital images and control programs. The HDD 106 is a non-volatile storage device such as a solid state drive (SSD) or an embedded multimedia card (eMMC). The fax device 107 sends and receives digital images to and from a telephone line. The controller 103 is connected to the scanner device 102 , the printer device 104 , the operation unit 105 , the hard disk 106 , and the facsimile device 107 , and issues instructions to the respective modules to execute a job on the image forming apparatus 101 .

[0031] A switch for setting a flag to enable and disable suspend, hibernate, and hybrid sleep is provided using the function of the operation unit 105 for receiving settings of the image forming apparatus 101 from the user, so that the set flag can be saved and referred to from an application.

[0032] The image forming apparatus 101 can also input and output digital images from and to a computer 109 via a LAN 108, issue jobs, and instruct devices. The scanner apparatus 102 includes: a document feeding unit 121 for automatically and sequentially replacing one document in a stack of documents with another document; and a scanner unit 122 for optically scanning each document and converting the scanned image into a digital image. Image data obtained by converting the scanned image is sent to the controller 103.

[0033] The printer device 104 includes a sheet feeding unit 142 that sequentially feeds sheets one by one from a stack of sheets, a marking unit 141 that prints image data on the fed sheets, and a sheet discharging unit 143 that discharges the sheets after printing. The finisher device 150 performs processing such as sheet discharging, sorting, stapling, punching, and cutting on paper output from the sheet discharging unit 143 of the printer device 104 of the image forming apparatus 101.

[0034] <System Function>

[0035] An example of a job (function) that can be executed by the image forming apparatus 101 is described below.

[0036] [Copy Function]

[0037] The image forming apparatus 101 has a copy function for recording an image read by the scanner apparatus 102 in the hard disk 106 and printing the image using the printer apparatus 104 at the same time.

[0038] [Image sending function]

[0039] The image forming apparatus 101 has an image transmission function of transmitting an image read by the scanner apparatus 102 to a computer 109 via a LAN 108 .

[0040] [Image saving function]

[0041] The image forming apparatus 101 has an image saving function for recording an image read by the scanner apparatus 102 in the hard disk 106 and transmitting the image or printing the image when necessary.

[0042] [Image printing function]

[0043] The image forming apparatus 101 has an image printing function for analyzing, for example, a page description language transmitted from the computer 109 and performing printing using the printer apparatus 104 .

[0044] <Block Diagram of Controller 103>

[0045] Now refer to Figure 2 A block diagram describing the controller 103 and peripheral devices.

[0046] The controller 103 includes a main board 200 and a sub-board 220 .

[0047] The mainboard 200 is a so-called general-purpose CPU system. The mainboard 200 includes: a CPU 340 that controls the entire mainboard 200, a boot read-only memory (ROM) 202 including a boot program, and a memory 341 used as a working memory by the CPU 340. The mainboard 200 also includes: a bus controller 204 having a bridging function between the mainboard 200 and an external bus, and a non-volatile memory 205 that will not erase data even if the non-volatile memory 205 is powered off. The memory 341 includes an OS internal management area and an OS external management area. The OS internal management area is a memory area from a start address to an end address defined by the kernel and includes parts such as text, data, bss, stacks, and heaps used by the kernel or a user. In other words, the OS external management area is a memory area outside the OS internal management area. For example, the OS external management area is used for a large-capacity continuous area that should not be divided in the memory 341, and is used for direct memory access (DMA).

[0048] CPU 340 also controls watchdog timer (also referred to as "WDT") 230 which resets controller 103. CPU 340 controls network controller 211 to send and receive data to and from computer 109 via LAN 108. CPU 340 controls real time clock (RTC) 212 to set current time and return time.

[0049] In addition, the main board 200 includes: a disk controller 206 that controls a storage device and a flash disk 207 such as an SSD or eMMC, which is a relatively small-capacity storage device including a semiconductor device. The main board 200 also includes: a USB controller 208 that controls a universal serial bus (USB) port. A USB memory 209, an operating unit 105, and a hard disk 106 are externally connected to the main board 200.

[0050] The sub-board 220 includes a relatively small general-purpose CPU system and image processing hardware. The sub-board 220 also includes: a CPU 221 that controls the entire sub-board 220, a memory 223 used as a working memory by the CPU 221, a bus controller 224 having a bridge function between the sub-board 220 and an external bus, and a non-volatile memory 225 whose data will not be erased even if the non-volatile memory 225 is powered off.

[0051] In addition, the sub-board 220 includes: a device controller 226 and an image processor 227 that performs real-time digital image processing. The scanner device 102 and the printer device 104 externally connected to the controller 103 send and receive digital image data to and from the image processor 227 via the device controller 226. Papers discharged from the printer device 104 are processed by the finisher device 150. The fax device 107 is directly controlled by the CPU 221.

[0052] Figure 2 The block diagram is shown in a simplified manner. For example, CPU 340 and CPU 221 each include multiple CPU peripheral hardware such as a chipset, a bus bridge, and a clock generator. However, considering the granularity of the description, these CPU peripheral hardware are not necessary, so CPU 340 and CPU 221 are shown in a simplified manner. Therefore, this block structure does not limit the present disclosure.

[0053] The operation of the controller 103 will now be described taking copying an image on paper as an example.

[0054] If the user gives an instruction to copy an image through the operation unit 105, the CPU 340 sends an image reading command to the scanner device 102 via the CPU 221. The scanner device 102 optically scans a paper document, converts the scanned image into digital image data, and inputs the digital image data to the image processor 227 via one of the device controllers 226. The image processor 227 DMA-transfers the digital image data to the memory 223 via the CPU 221 and temporarily stores the digital image data.

[0055] If the CPU 340 confirms that a certain amount or all of the digital image data is stored in the memory 223 , the CPU 340 issues an image output instruction to the printer device 104 via the CPU 221 .

[0056] The CPU 221 notifies the image processor 227 of the address of the image data in the memory 223. The image data in the memory 223 is sent to the printer apparatus 104 via the image processor 227 and another device controller 226 based on a synchronization signal from the printer apparatus 104.

[0057] The printer device 104 prints the digital image data on paper.

[0058] When printing multiple copies, the CPU 340 saves the image data in the memory 223 in the hard disk 106. From the second copy onwards, the CPU 340 can send the image data from the hard disk 106 or the memory 223 to the printer device 104 without receiving the image data from the scanner device 102.

[0059] <Power supply structure>

[0060] Figure 3 It is shown Figure 1 FIG. 1 is a block diagram of a power supply structure of the image forming apparatus 101 shown in FIG. Figure 3 , the configurations of the power supply 301, the power supply control unit 303, the controller 103, the operation unit 105, the scanner device 102, and the printer device 104 in the image forming device 101 related to the present disclosure will be described. Figure 3 In the present invention, the power source 301 always supplies power to the power source control unit 303 via the power line. However, in order to limit the power supply to a smaller power consumption, when the image forming apparatus 101 is powered off, the power is controlled by applying current only to the power source control unit 303.

[0061] If the power switch 110 is pressed, the power control unit 303 detects the pressing, and the image forming apparatus 101 controls the power switch P 310 to feed power to the CPU 340 of the controller 103. Similarly, the power control unit 303 controls the power switch Q 311 to feed power to the CPU 305 of the operation unit 105, controls the power switch R 312 to feed power to the scanner apparatus 102, and controls the power switch L 313 to feed power to the CPU 307 of the printer apparatus 104.

[0062] The CPU 340 of the controller 103 notifies the power control unit 303 to control the power switch Q 311 to feed power to the CPU 305 of the operation unit 105 alone. At the same time, the CPU 340 of the controller 103 can also control the power switch R 312 to feed power from the power supply 301 to the scanner device 102 alone, and control the power switch L 313 to feed power from the power supply 301 to the CPU 307 of the printer device 104 alone.

[0063] At this time, it is also possible to control the power supply to the marking unit 141, the sheet feeding unit 142, and the sheet discharging unit 143 of the printing device 104 individually. However, this is a digression and will not be described. Figure 3 As shown, the feeding of each block can be realized as follows: for example, two channels are provided for the power switch P 310, and in the dormant state, only the relay switch in one channel connected to the block to be powered off is disconnected, while the relay switch in the other channel is kept in the dormant state. In the shutdown state, the relay switches in both channels are disconnected. In this case, the power control signal is not a binary control signal, but a multi-value control signal according to the current application state. Although such a description is not particularly given in this example, power is supplied by such control in the power state including the dormant state and the shutdown state. In this control, the power control unit 303 can perform multi-value control on the power switch P 310 to feed power to each block of the controller 103. The control can be performed in any form. For example, the CPU 340 of the controller 103 can notify the power control unit 303 and perform multi-value control on the power switch P 310 to feed power to each block of the controller 103.

[0064] <Power Supply from Power Control Unit 303 When Image Forming Apparatus 101 Restarts>

[0065] Now, the restart process of the image forming apparatus 101 will be described. The CPU 340 of the controller 103 of the image forming apparatus 101 receives a restart event in a waiting state after startup. The restart event may be issued by an application running on the CPU 340, or may be received by the CPU 340 from the computer 109 via the LAN 108.

[0066] Next, the CPU 340 performs end processing of the application and processing for saving information in the memory 341 in the HDD 106. The CPU 340 also performs end processing of peripheral devices, and end processing of the printer device 104, the scanner device 102, the fax device 107, and the finisher device 150. The CPU 340 notifies the power control unit 303 and shifts to the power-off state.

[0067] In the power-off state, the power control unit 303 turns off the power switches 310, 311, 312, and 313. As a result, the power control unit 303 stops applying current to the controller 103, the printer device 104, the scanner device 102, the fax device 107, and the finisher device 150. The power control unit 303 waits until the analog signal of the power supply 301 becomes weak and the power supply 301 is completely disconnected. Regarding the power-off of the device, it is also possible to reset the device instead of powering off, thereby shortening the time to wait for the signal. However, this is a digression, so it is not described again.

[0068] Next, the power control unit 303 turns on the power switches 310, 311, 312, and 313, and applies current to the controller 103, the printer device 104, the scanner device 102, the fax device 107, and the finisher device 150. The CPU 340 of the controller 103 performs a startup process and performs an initialization process of the peripheral devices. The printer device 104, the scanner device 102, the fax device 107, and the finisher device 150 also perform their startup processes.

[0069] <Power Supply from the Power Control Unit 303 When the Image Forming Apparatus 101 Shifts to Sleep>

[0070] The sleep transition process of the controller 103 will now be described. If the active state in which the user does not use the image forming apparatus 101 continues for a certain time, the CPU 340 transitions to the sleep state using the automatic sleep timer. The CPU 340 notifies the power control unit 303 of the transition to the sleep state and changes the power supply to the controller 103.

[0071] As described above, the power supply to each block is realized by installing the relay switches 310 in two channels, for example, and in the sleep state, only one relay switch 310 connected to the block to be powered off is turned off, while the other relay switch 310 is kept on. At this time, the CPU 340 notifies the power supply control unit 303 to turn off the power switch Q311 and stop the power supply from the power supply 301 to the operation unit 105, thereby also shifting to the sleep state.

[0072] At this time, the CPU 340 also notifies the CPU 305 of the operating unit 105 through serial communication, and the CPU 305 of the operating unit 105 causes the operating panel or peripheral device to enter a power saving state, thereby also transitioning to a sleep state. Similarly, the scanner device 102 and the printer device 104 can also sleep. However, this is a digression, so it is not described again.

[0073] <Power Supply from the Power Control Unit 303 When the Image Forming Apparatus 101 Sleeps>

[0074] The sleep state of the image forming apparatus 101 will now be described. The sleep state is a state in which the startup time can be earlier than when normal startup is performed while reducing the amount of power consumption. When a certain time has passed in a state in which the user does not operate the image forming apparatus 101, when the touch panel or the power saving key of the operation unit 105 is pressed, or when a set time is reached, the image forming apparatus 101 transitions to the sleep state. In the sleep state, power is fed to the memory 341, the interrupt controller, the network controller 211, the RTC 212, and the USB controller 208 of the controller 103. Power is also fed to the power saving key of the operation unit 105, a part of the fax device 107, and various sensors. However, the sleep return trigger varies from system to system, and therefore, power feeding in the sleep state is not limited to this configuration.

[0075] <Power Supply from the Power Control Unit 303 When the Image Forming Apparatus 101 Returns from Sleep>

[0076] The operation of the software when the image forming apparatus 101 returns from sleep will now be described. During sleep, the power control unit 303 receives one or more interruptions from the network, the RTC 212 that detects timers and alarms, the fax device 107 that detects reception and off-hook states, the software switch, various sensors, and the USB port that detects insertion and removal and communication. Then, the power control unit 303 starts feeding power. More specifically, the interruption refers to the opening and closing of the front door cover of the printer device 104, the insertion and removal of print sheets into and from the manual feeding unit of the printer device 104, the opening and closing of the pressure plate of the scanner device 102, and the detection of the original by the automatic document feeder of the scanner device 102. In addition, the interruption refers to the detection of the card by the near field communication (NFC) card reader, the detection of the human body sensor, the off-hook state of the fax receiver, and the reception of the fax. The power control unit 303 notifies the CPU 340 of the source of the interruption, and the CPU 340 receives the notification and performs processing for returning the state of the software to the normal state, that is, sleep return processing.

[0077] The sleep return process of the controller 103 will now be described. If the power control unit 303 receives an event handler of a power saving key being pressed as one of the sleep return triggers during sleep, the power control unit 303 turns on the power switch 310 and causes the CPU 340 of the controller 103 to return from sleep. At this time, for example, the power control unit 303 performs multi-value control on the power switch 310 to feed power to the blocks of the controller 103. In addition, the power control unit 303 can also cause the CPU 340 to return from sleep by issuing an interrupt signal. However, this complicates the sequence and is off-topic, so it is not described again. The CPU 340 notifies the power control unit 303, and the power control unit 303 turns on the power switches 311, 312, 313, and feeds power to the operation unit 105, the scanner device 102, and the printer device 104. Although the feeding of power to devices such as the fax device 107 is not shown, it can also be prepared as a signal (not shown).

[0078] Although the above-mentioned sleep return trigger is pressing the power saving key, the image forming apparatus 101 can also return from sleep by a data packet on the network and process the data packet on the network in the middle of sleep. If the power control unit 303 receives a data packet on the network as a sleep return trigger during sleep, the power control unit 303 turns on the power switch 310 and causes the CPU 340 of the controller 103 to return from sleep. At this time, if the data packet received on the network is interpreted as a print job, the CPU 340 notifies the power control unit 303, and the power control unit 303 turns on the power switch 313 and feeds power to the printer device 104. In this case, the power control unit 303 can process without feeding power to the operation unit 105 or the scanner device 102. That is, when the user does not use the touch panel, it is sufficient for the power control unit 303 not to feed power to the operation unit 105. When a print job is not generated or it is not necessary to obtain device information, it is sufficient for the power control unit 303 not to feed power to the printer device 104 and the scanner device 102.

[0079] <Power Supply from the Power Control Unit 303 When the Image Forming Apparatus 101 Enters Sleep Again>

[0080] If the copying or printing job via the network performed by the user ends, the CPU 340 changes to the sleep state again. That is, the CPU 340 notifies the power control unit 303 to change to sleep. Based on the power control signal, the power control unit 303 turns off the power switches 311, 312 and 313 to stop feeding power to devices other than the controller 103. At this time, for example, the power control unit 303 puts the CPU 340 into a state of waiting for an interrupt signal, performs multi-value control on the power switch 310, and turns off the block of the controller 103 so that the CPU 340 also enters the sleep state. However, this will complicate the sequence and is off-topic, so it will not be described again.

[0081] <Power Supply from the Power Supply Control Unit 303 in Quick Start Mode>

[0082] Suspend is a power saving state in which a state is maintained by applying current to a memory, and can be used in a sleep state and a quick start mode. The CPU 340 of the main board 200 is referred to as a "main CPU 340". The memory 341 of the main board 200 is referred to as a "main memory 341". The CPU 221 of the sub-board 220 is referred to as a "sub-CPU 221". The memory 223 of the sub-board 220 is referred to as a "sub-memory 223".

[0083] The main memory 341 holds an OS internal management area and an OS external management area on the main memory 341 .

[0084] If the power switch 110 is turned off, the power control unit 303 notifies the CPU 340. The CPU 340 loads the execution program of the sub-CPU 221 from the non-volatile storage device 106 into the continuous area to DMA-transfer the execution program of the sub-CPU 221 to the OS external management area on the main memory 341, and notifies the power control unit 303. The power control unit 303 performs multi-value control on the power switch 310 to disconnect the sub-CPU 221 and the sub-memory 223. At the same time, the power control unit 303 also puts the main memory 341 into a self-refresh state, in which power is saved by reducing the refresh rate. Therefore, the CPU 340 puts the controller 103 into a suspended state.

[0085] Next, if the power switch 110 is turned on, the power control unit 303 releases the main memory 341 from the self-refresh state, and powers on the sub-CPU 221 and the sub-memory 223, returning from the suspended state. The main CPU 340 DMA-transfers the execution program of the sub-CPU 221 loaded into the OS external management area on the main memory 341 before the suspension to the sub-memory 223, and clears the reset of the sub-CPU 221. As a result, the sub-CPU 221 reads the program in the sub-memory 223 and starts.

[0086] The trigger for transitioning to or returning from the suspended state is not limited to turning on or off the power switch, and the image forming apparatus 101 can also make the transition based on a software event. However, this is off topic and will not be described.

[0087] <Description of Quick Start Mode as Sleep State and Disconnected State>

[0088] Reference Figure 3 The quick start mode described as the sleep state is a form of suspension that is triggered by receiving a state transition event. Figure 3 The quick start mode as the disconnected state is described as a form of suspension performed by turning off the power switch as a trigger. The suspension in the quick start mode as the sleep state and the suspension in the quick start mode as the disconnected state are different from each other in power value because the image forming apparatus 101 waits by stopping power supply to peripheral chips and IP cores (Intellectual Property Cores) not used for return and stopping the clock, but the same basic sequence is used.

[0089] Depending on the presence or absence of memory recall and restore times, the time to enter and return from Fastboot mode is shorter in Suspend and longer in Hibernate. Figure 3 The fast boot mode as a sleep state has been described as a form of suspend using a software event as a trigger. Figure 3 The fast start mode as the disconnected state has been described as a form of suspension using disconnection of the power switch as a trigger.

[0090] Fastboot mode is described as a form of suspend, hibernate, or hybrid sleep that is initiated using the disconnection of the power switch as a trigger. Figure 3 Description of the suspension, so will mainly refer to Figure 4 and Figure 5 Describes hibernation and will refer primarily to Fig. 6A , Figure 6B and Figure 7 Describe hybrid sleep.

[0091] Since the data in the memory is not withdrawn during suspension, the withdrawal and recovery time of the memory is short, while since the data in the memory is withdrawn during hibernation, the withdrawal and recovery time of the memory is long. Regarding power saving of the memory, since the data in the memory is not withdrawn during suspension and the power supply cannot be disconnected, the power consumption is high. During hibernation, since the data in the memory is withdrawn and the power supply is disconnected, the power consumption is low. As a trigger for startup, the reception of a state transition event and the disconnection of a power switch can be used. Therefore, the quick startup mode can be replaced according to a design strategy (such as giving priority to transition and return time, or giving priority to power consumption). However, this is off-topic and will not be described again.

[0092] <Description of Flowchart According to First Exemplary Embodiment>

[0093] Figure 4 A flowchart according to a first exemplary embodiment in which the image forming apparatus 101 shifts to sleep and suspend is shown. Figure 5 A flowchart of a first exemplary embodiment according to which the image forming apparatus 101 returns from hibernation and suspension is shown. The CPU 340 of the main board 200 is referred to as the "main CPU 340". The memory 341 of the main board 200 is referred to as the "main memory 341". The CPU 221 of the sub-board 220 is referred to as the "sub-CPU 221". The memory 223 of the sub-board 220 is referred to as the "sub-memory 223". The main memory 341 maintains an OS internal management area and an OS external management area on the main memory 341. Hibernation is a power saving state in which data and registers in the OS internal management area on the main memory 341 are withdrawn and the main memory 341 is powered off.

[0094] A sequence with a problem will be described. Similar to the pause, before the main CPU 340 transitions to the sleep state, the main CPU 340 loads the execution program of the sub-CPU 221 into the OS external management area on the main memory 341. The main CPU 340 does not save the execution program of the sub-CPU 221 in the OS external management area on the main memory 341 in the nonvolatile storage device 106. As a result, by transitioning the main CPU 340 to the sleep state while the main memory 341 is powered off, the execution program of the sub-CPU 221 is erased.

[0095] Therefore, the difference between returning from a sleep state and returning from a pause state is that when the image forming device 101 is started, the main CPU 340 determines whether the image forming device 101 has returned from sleep, and the main CPU 340 loads the execution program of the sub-CPU 221 into the OS external management area on the main memory 341, and further loads the execution program of the sub-CPU 221 into the sub-memory 223.

[0096] We will now describe Figure 4 . The main CPU 340 of the image forming apparatus 101 is started in a waiting state in which an end processing event can be received. In step S410, the main CPU 340 receives an end processing event of the system (such as detecting the disconnection of the power switch 110), which is one of the end processing events ("Yes" in step S410). The end processing event includes transition to a waiting state capable of quick startup, shutdown, and restart.

[0097] If the end processing event received by the main CPU 340 is a transition to a waiting state capable of quick startup, and in step S430, if hibernation is enabled (turned on) ("Yes" in step S430), then in step S431, the main CPU 340 saves data and information about the registers of the main CPU 340 in the OS internal management area on the main memory 341 in the nonvolatile storage device 106. The data saved in the nonvolatile storage device 106 is called a "hibernation image".

[0098] Then, in step S432, the main CPU 340 notifies the power control unit 303. The power control unit 303 performs multi-value control on the power switch 310 to power off the sub CPU 221 and the sub memory 223 and to power off the main memory 341. Thus, the CPU 340 causes the controller 103 to shift to the sleep state.

[0099] If the end processing event received by the main CPU 340 is an event corresponding to the transition to the waiting state capable of fast startup, and in step S430, if hibernation is disabled (off) ("No" in step S430), and in step S440, if pause is enabled (on) ("Yes" in step S440), the process proceeds to step S441. In step S441, the main CPU 340 loads the execution program of the sub-CPU 221 into the OS external management area on the main memory 341. Then, in step S442, the main CPU 340 notifies the power supply control unit 303 and causes the system to transition to the pause state. That is, before the system transitions to the pause state, the main CPU 340 loads the execution program of the sub-CPU 221 into the OS external management area on the main memory 341. In addition, in step S430 and step S440, if the received end processing event is not a transition to a waiting state capable of quick startup, but a shutdown or restart ("No" in step S430 and "No" in step S440), then in step S450, the main CPU 340 performs the end processing. Then, the main CPU 340 notifies the power supply control unit 303 and causes the system to transition to the end state.

[0100] right Figure 4 The flowchart of entering the dormant state in the system is supplemented with a description. The end processing event of the system (step S410) is not limited to the disconnection of the power switch 110. The end processing event can be in any form. For example, the CPU 340 can start processing based on system operation or based on an event received from the computer 109 via the LAN 108 or via a telephone line. Examples of system operations include: external remote shutdown and an automatic shutdown timer and automatic shutdown time through the RTC 212. However, the description of these examples is off-topic and is therefore omitted.

[0101] Whether sleep is enabled (turned on) can be determined by the main CPU 340 with reference to the flag for enabling and disabling sleep (step S430). The flag for enabling and disabling sleep is a system initial setting value, or is stored in the non-volatile storage device 106 or the memory by the user providing input to the operating unit 105. It is also possible to determine whether sleep is enabled (turned on) (step S430) using information related to the flag contained in the end processing event of the system received by the main CPU 340 (step S410). These determinations are not limited to sleep, and can also be similarly determined for other functions such as pause. However, this is off-topic and will not be described again.

[0102] Figure 5 A flowchart according to the first exemplary embodiment of the image forming apparatus 101 returning from sleep is shown, and the features of the present disclosure are most clearly shown. Figure 5 The main CPU 340 of the image forming apparatus 101 starts up in a waiting state where it can receive a start event, that is, in a quick start mode or in a power-off state.

[0103] In step S510 , the main CPU 340 receives a startup processing event of the system (“Yes” in step S510 ). If the power switch 110 is turned on, the power control unit 303 starts the startup processing of the main CPU 340 .

[0104] Next, in step S540, the main CPU 340 determines whether the image forming apparatus 101 has returned from the hibernation state. If the image forming apparatus 101 has returned from the hibernation state ("Yes" in step S540), then in step S541, the main CPU 340 loads the hibernation image saved in the nonvolatile storage device 106 before hibernation into the OS internal management area on the memory 341 of the main CPU 340, and restores the registers of the main CPU 340.

[0105] Next, in step S542, the main CPU 340 loads the execution program of the sub-CPU 221 into the OS external management area on the main memory 341. That is, if the image forming apparatus 101 returns from the sleep state, the main CPU 340 loads the execution program of the sub-CPU 221 into the main memory 341 after applying current to the main memory 341. Then, the main CPU 340 DMA-transfers the execution program of the sub-CPU 221 in the OS external management area to the sub-memory 223, and clears the reset of the sub-CPU 221. As a result, in step S550, the sub-CPU 221 reads the program in the sub-memory 223 and starts. On the other hand, if the image forming apparatus 101 does not return from the sleep state ("No" in step S540), the image forming apparatus 101 returns from the pause state. Therefore, the process enters step S550.

[0106] right Figure 5 The flowchart of returning from sleep in is supplemented with description. The system startup processing event (step S510) is not limited to the turning on of the power switch 110. The startup processing event can be in any form. For example, the CPU 340 can start processing based on system operation or based on an event received from the computer 109 via the LAN 108 or via a telephone line. Examples of system operations include: external remote startup and an automatic startup timer and automatic startup time through the RTC 212. However, the description of these examples is off-topic and is therefore omitted.

[0107] Examples of a method of determining whether the power state before returning is the hibernation state (step S540 ) include determining whether there is a setting for enabling or disabling hibernation, determining whether there is a hibernation image, and determining whether there is a flag in the nonvolatile storage device 106 .

[0108] (Effects of the First Exemplary Embodiment)

[0109] As an effect of the first exemplary embodiment, the main CPU 340 can return from hibernation so that the sub-CPU 221 can be normally started. As a result, the controller 103 can be quickly started from hibernation.

[0110] A second exemplary embodiment will be described.

[0111] <Description of Flowchart According to Second Embodiment>

[0112] Fig. 6A and Figure 6B A flowchart according to a second exemplary embodiment in which the image forming apparatus 101 shifts to hybrid sleep is shown. Figure 7 A flowchart according to a second exemplary embodiment in which the image forming apparatus 101 returns from hybrid sleep is shown.

[0113] Hybrid sleep is a function obtained by combining pause and hibernation. In hybrid sleep, if the main CPU 340 receives a power state conversion event, the main CPU 340 transitions to pause within a certain time, and transitions to hibernation after a certain time or longer has passed. Then, when the main CPU 340 receives a power state return event, if the main CPU 340 is disconnected within a short time, the main CPU 340 pauses, so that it can start faster. If the main CPU 340 is disconnected for a long time, the main CPU 340 hibernates, so that more power can be saved.

[0114] A sequence with a problem will be described. Similar to the pause, before the main CPU 340 transitions to the hybrid sleep state, the main CPU 340 loads the execution program of the sub-CPU 221 into the OS external management area on the main memory 341. When the image forming apparatus 101 returns from the pause state, the execution program of the sub-CPU 221 loaded into the OS external management area on the main memory 341 can be used, and therefore, the image forming apparatus 101 can return from the pause. However, if the image forming apparatus 101 returns from the sleep state, the execution program of the sub-CPU 221 loaded into the OS external management area on the main memory 341 is erased by powering off the main memory 341. Therefore, the image forming apparatus 101 cannot return from the sleep state.

[0115] Therefore, when the image forming apparatus 101 is started, the main CPU 340 determines whether the image forming apparatus 101 is returning from the pause in the hybrid sleep or returning from the hibernation. If the image forming apparatus 101 returns from the hibernation, the main CPU 340 loads the execution program of the sub-CPU 221 into the OS external management area of ​​the main memory 341, and further loads the execution program of the sub-CPU 221 into the sub-memory 223. As described above, this return from hibernation is different from a normal return from hibernation in that when the image forming apparatus 101 returns, the main CPU 340 determines whether the previous state is pause or hibernation.

[0116] We will now describe Fig. 6A Flowchart in .

[0117] The main CPU 340 of the image forming apparatus 101 is started in a waiting state in which an end processing event can be received. In step S610, the main CPU 340 receives an end processing event of the system (such as detecting the disconnection of the power switch 110), which is one of the end processing events ("Yes" in step S610). The end processing events include: transition to a waiting state capable of quick startup, shutdown, and restart.

[0118] In step S610 , if the received end processing event is a transition to a waiting state capable of quick startup, and in step S620 , if hybrid sleep is enabled (ON) (“YES” in step S620 ), the main CPU 340 performs the following processing.

[0119] In step S621 , the main CPU 340 loads the execution program of the sub CPU 221 into the OS external management area on the main memory 341 .

[0120] Next, in step S622, the main CPU 340 saves data and information about registers of the main CPU 340 in the OS internal management area on the main memory 341 in the nonvolatile storage device 106. The data saved in the nonvolatile storage device 106 is called a "hibernation image".

[0121] Next, in step S623, the main CPU 340 sets the time (such as four hours) at which the main CPU 340 receives the notification in the RTC alarm, and activates the RTC alarm.

[0122] Next, in step S624, the main CPU 340 notifies the power control unit 303. The power control unit 303 performs multi-value control on the power switch 310 to power off the sub CPU 221 and the sub memory 223 and put the main memory 341 into the self-refresh state. Therefore, the CPU 340 causes the controller 103 to shift to the suspended state.

[0123] In step S610, if the received end processing event is a transition to a waiting state capable of quick startup, and in step S620, if hybrid sleep is disabled (turned off) ("No" in step S620), and in step S630, if hibernation is enabled (turned on) ("Yes" in step S630), the main CPU 340 performs the following processing.

[0124] In step S631, the main CPU 340 saves data and information about registers of the main CPU 340 in the OS internal management area on the main memory 341 in the nonvolatile storage device 106. The data saved in the nonvolatile storage device 106 is called a "hibernation image".

[0125] Next, in step S632, the main CPU 340 notifies the power control unit 303. The power control unit 303 performs multi-value control on the power switch 310 to power off the sub CPU 221 and the sub memory 223 and to power off the main memory 341. Thus, the CPU 340 causes the controller 103 to shift to the sleep state.

[0126] In step S610, the main CPU 340 confirms whether the received end processing event is an event corresponding to the transition to the waiting state capable of fast startup. In step S620, the main CPU 340 confirms whether hybrid sleep is disabled (off). In step S630, the main CPU 340 confirms whether hibernation is disabled (off). In addition, in step S640, if pause is enabled (on) ("yes" in step S640), the main CPU 340 performs the following processing.

[0127] In step S641 , the main CPU 340 loads the execution program of the sub CPU 221 into the OS external management area on the main memory 341 .

[0128] Next, in step S642, the main CPU 340 notifies the power control unit 303. The power control unit 303 performs multi-value control on the power switch 310 to power off the sub CPU 221 and the sub memory 223 and put the main memory 341 into the self-refresh state. Therefore, the CPU 340 causes the controller 103 to shift to the suspended state.

[0129] If the received end processing event is not a transition to a waiting state capable of quick startup, but a shutdown or restart ("Yes" in step S610, "No" in step S620, "No" in step S630, and "No" in step S640), the main CPU 340 performs end processing.

[0130] In step S650, the main CPU 340 notifies the power control unit 303. The power control unit 303 powers off the sub CPU 221 and the sub memory 223, and powers off the main memory 341. Thus, the CPU 340 causes the controller 103 to shift to the end state.

[0131] right Fig. 6A The flowchart of entering hybrid sleep is supplemented in the description.

[0132] The end processing event of the system (step S610) is not limited to the disconnection of the power switch 110. The end processing event can be in any form. For example, the CPU 340 can start processing based on system operation or based on an event received from the computer 109 via the LAN 108 or via a telephone line. Examples of system operations include: external remote shutdown and automatic shutdown timer and automatic shutdown time by the RTC 212. However, the description of these examples is off-topic and is therefore omitted.

[0133] Whether the hybrid sleep function is enabled (turned on) can be determined by the main CPU 340 with reference to the flag for enabling and disabling the hybrid sleep function (step S620). The flag for enabling and disabling hybrid sleep is a system initial setting value, or is saved in the non-volatile storage device 106 or the memory by the user providing input to the operating unit 105. It is also possible to determine whether hybrid sleep is enabled (turned on) (step S620) using information related to the flag contained in the end processing event of the system received by the main CPU 340 (step S610). These determinations are not limited to hybrid sleep, and can also be similarly determined for other functions such as hibernation or suspension. However, this is off-topic and will not be described again.

[0134] We will now describe Figure 6B Flowchart in .

[0135] After the image forming apparatus 101 transitions to the pause state based on the hybrid sleep setting, the main CPU 340 of the image forming apparatus 101 is started in a waiting state where the RTC timer expiration event can be received. If the specified time has passed in the pause state, in step S680, the main CPU 340 receives the timer expiration event from the RTC 212 ("Yes" in step S680). Next, in step S690, the main CPU 340 disconnects the power supply to transition to hibernation. The main CPU 340 notifies the power control unit 303. The power control unit 303 powers off the sub-CPU 221 and the sub-memory 223, and powers off the main memory 341. Therefore, since the hibernation image has been saved in step S621, in step S690, the main CPU 340 causes the controller 103 to transition to the hibernation state. In the present exemplary embodiment, the use of the timer expiration event as an example of a trigger for transitioning from the pause state to the hibernation state is described. However, the present disclosure is not limited to this. For example, a configuration may be adopted in which a long press of a tactile switch which is a type of the power switch 110 is detected as a predetermined condition, whereby the image forming apparatus 101 shifts from the suspended state to the sleep state.

[0136] Examples of the power switch 110 include various switches, such as a push switch that can distinguish two states (on state and off state) from the outside, a toggle switch whose lever is pulled down, and a rocker switch whose rocker is pulled down in one direction. Examples of the power switch 110 also include tactile switches and sliding switches, which detect pressing or sliding, and return to the original state if the pressing or sliding is released, and they can represent the on state and the off state so that the on state and the off state cannot be distinguished from the outside, or can be long pressed or slid. The above-mentioned state transition can also be implemented using various types of power switches 110 such as tactile switches and sliding switches. However, this is off-topic and will not be described again.

[0137] right Figure 6B The flowchart of entering hybrid sleep is supplemented in the description.

[0138] A timer expiration event may be a return from an interrupt due to expiration of an RTC timer.

[0139] It is also possible to adopt a form in which the main CPU 340 does not receive a notification of the expiration of the RTC timer, but the power control unit 303 directly receives a signal notification and performs multi-value control on the power switch 310 to stop feeding power to the components of the controller 103. In this case, the RTC timer may be the RTC 212 (from which the CPU 340 receives a signal notification) or another RTC (from which the power control unit 303 receives a notification). However, this is off-topic and will not be described in detail.

[0140] Figure 7 A flowchart showing a second exemplary embodiment according to which the image forming apparatus 101 returns from hybrid sleep. Figure 7 Flowchart in .

[0141] The main CPU 340 of the image forming apparatus 101 starts up in a waiting state where it can receive a start event, that is, in a quick start mode or a power-off state.

[0142] In step S510 , the main CPU 340 receives a return processing event of the system (“Yes” in step S510 ). That is, in step S510 , if the power switch 110 is turned on, the power control unit 303 starts the startup processing of the main CPU 340 .

[0143] Next, in step S731, the main CPU 340 clears the setting of the RTC return time.

[0144] Next, in step S540, the main CPU 340 determines whether the image forming apparatus 101 has returned from the hibernation state. If the image forming apparatus 101 has returned from the hibernation state ("Yes" in step S540), then in step S541, the main CPU 340 loads the hibernation image saved in the nonvolatile storage device 106 before hibernation into the OS internal management area on the memory 341 of the main CPU 340, and restores the registers of the main CPU 340.

[0145] Next, in step S542, the main CPU 340 loads the execution program of the sub CPU 221 into the OS external management area on the main memory 341. Then, the main CPU 340 DMA-transfers the execution program of the sub CPU 221 in the OS external management area to the sub memory 223, and clears the reset of the sub CPU 221. As a result, in step S550, the sub CPU 221 reads the program in the sub memory 223 and starts.

[0146] On the other hand, if the image forming apparatus 101 has not returned from the sleep state (NO in step S540 ), the image forming apparatus 101 returns from the pause state. Therefore, the process proceeds to step S550 .

[0147] right Figure 7 The flowchart for returning from hybrid sleep is supplemented in the description.

[0148] The startup processing event (step S510) of the system is not limited to the turning on of the power switch 110. The startup processing event can be in any form. For example, the CPU 340 can start processing based on system operation or based on an event received from the computer 109 via the LAN 108 or via a telephone line. Examples of system operations include external remote startup and automatic startup timer and automatic startup time through the RTC 212. As for the RTC 212, a single RTC can give different interrupt notifications such as timers and alarms, and multiple RTCs can also be installed as hardware. Therefore, it can be distinguished that the RTC return of the elapsed time of the determination pause and the return of another RTC. However, the description of these examples is off-topic and is therefore omitted.

[0149] An example of a method for determining whether the power state before returning is a hibernation state (step S540) includes determining the time elapsed from the transition to a state capable of quick startup to returning. The example of the method also includes determining whether there is a setting for enabling or disabling hibernation, determining whether there is a hibernation image, and determining whether there is a flag in the non-volatile storage device 106.

[0150] (Effects of the Second Exemplary Embodiment)

[0151] As an effect of the second exemplary embodiment, with the configuration of the main CPU 340 and the sub-CPU 221, the main CPU 340 determines whether the image forming apparatus 101 returns from suspend or hibernation in hybrid sleep. The sub-CPU 221 normally starts executing the program, so that the controller 103 can quickly start from suspend and hibernation.

[0152] Other embodiments

[0153] The embodiments of the present disclosure may also be implemented by reading out and executing computer executable instructions (e.g., one or more programs) recorded on a storage medium (which may also be more completely referred to as a "non-transitory computer-readable storage medium") to perform one or more functions in the above-mentioned embodiments, and / or a computer of a system or device including one or more circuits (e.g., an application-specific integrated circuit (ASIC)) for performing one or more functions in the above-mentioned embodiments, and the embodiments of the present disclosure may be implemented by, for example, reading out and executing the computer executable instructions from the storage medium by the computer of the system or device to perform one or more functions in the above-mentioned embodiments, and / or controlling the one or more circuits to perform one or more functions in the above-mentioned embodiments. The computer may include one or more processors (e.g., a central processing unit (CPU), a microprocessing unit (MPU)), and may include a network of separate computers or separate processors to read out and execute the computer executable instructions. The computer executable instructions may be provided to the computer, for example, from a network or the storage medium. The storage medium may include, for example, a hard disk, a random access memory (RAM), a read-only memory (ROM), a memory of a distributed computing system, an optical disk (such as a compact disc (CD), a digital versatile disc (DVD), or a Blu-ray disc (BD) TM ), flash memory devices, memory cards, etc.

[0154] The embodiments of the present disclosure may also be implemented by the following method, that is, software (program) that performs the functions of the above embodiments is provided to a system or device through a network or various storage media, and a computer or a central processing unit (CPU) or a microprocessing unit (MPU) of the system or device reads and executes the program.

[0155] While the present disclosure has been described with reference to exemplary embodiments, it is to be understood that the present disclosure is not limited to the disclosed exemplary embodiments.The scope of the following claims is to be accorded the broadest interpretation so as to encompass all such modifications and equivalent structures and functions.

Claims

1. An image forming device, comprising: a first controller and a second controller for performing at least image processing, and a memory, wherein the image forming apparatus can be switched to a standby state, a pause state, and a sleep state, wherein the pause state is a power saving state in which current is applied to the memory and quick startup is possible, and the sleep state is a power saving state in which no current is applied to the memory, The first controller is configured to cause the image forming apparatus to shift to a power saving state if the first controller receives an end processing event. Wherein, when the first controller determines that the transition to the sleep state is enabled, the first controller controls the image forming device to transition to the sleep state, and when the first controller determines that the transition to the pause state is enabled, the first controller controls to load the program of the second controller into the memory and then transition the image forming device to the pause state.

2. The image forming apparatus according to claim 1, further comprising a nonvolatile storage unit, in, In the case where the first controller determines that transition to the hibernation state is enabled, the first controller controls to save data in an OS internal management area on a memory in the storage unit and disconnects application of current to the memory and the second controller.

3. The image forming apparatus according to claim 1, wherein: In a case where the first controller determines that transition to the suspended state is enabled, the first controller controls to load a program of the second controller into an OS management external area on the memory and disconnects application of current to the second controller.

4. The image forming apparatus according to claim 1, further comprising: a power supply controller configured to control at least power supply to the second controller and the memory, When the first controller notifies the power controller that the image forming apparatus is to be shifted to the sleep state, the power controller controls not to supply power to the second controller and the memory.

5. The image forming apparatus according to claim 4, wherein: In a case where the first controller notifies the power controller that the image forming apparatus is to shift to the pause state, the power controller controls not to supply power to the second controller.

6. The image forming apparatus according to claim 1, wherein the second controller is configured to return the image forming apparatus from the power saving state to the standby state when the second controller receives a return processing event, in, In a case where the image forming apparatus returns from the pause state, the second controller controls to return the image forming apparatus to the standby state by the second controller reading a program loaded into a memory before the image forming apparatus shifts to the pause state.

7. The image forming apparatus according to claim 1, wherein the second controller is configured to return the image forming apparatus from the power saving state to the standby state when the second controller receives a return processing event, in, When the image forming apparatus returns from the sleep state, the second controller controls to return the image forming apparatus to the standby state by loading a program of the second controller into the memory and reading the loaded program after applying current to the memory.

8. The image forming apparatus according to claim 1, further comprising a power switch, in, An end processing event is received by detecting turning off the power switch, and a return processing event is received by detecting turning on the power switch.

9. An image forming device, comprising: a first controller and a second controller for performing at least image processing, and a memory, wherein the image forming apparatus can be switched to a standby state, a pause state, and a sleep state, wherein the pause state is a power saving state in which current is applied to the memory and quick startup is possible, and the sleep state is a power saving state in which no current is applied to the memory, The first controller is configured to control to load a program of the second controller into a memory and to shift the image forming apparatus to a pause state if the first controller receives an end processing event; as well as The second controller is configured to control the image forming apparatus to shift to the sleep state if the image forming apparatus shifts to the pause state and a predetermined condition is satisfied.

10. The image forming apparatus according to claim 9, further comprising: a power supply controller configured to control at least power supply to the second controller and the memory, When the first controller receives the end processing event, the first controller controls to load the program of the second controller into the memory and informs the power controller that the image forming apparatus will be transferred to the pause state, and The power controller that receives the notification performs control so as not to supply power to the second controller.

11. The image forming apparatus according to claim 10, further comprising a nonvolatile storage unit, in, When the image forming apparatus is shifted to the suspended state and a predetermined condition is satisfied, the second controller controls to save data in an OS internal management area on a memory in a storage unit and to notify a power controller that the image forming apparatus will be shifted to the hibernation state, and The power controller that receives the notification performs control so as not to supply power to the second controller and the memory.

12. The image forming apparatus according to claim 9, further comprising: a third controller configured to return the image forming apparatus from the power saving state to the standby state when the third controller receives a return processing event; In which, when the third controller determines that the image forming device is to return from a sleep state, the third controller controls to load the program of the second controller into the memory after applying current to the memory, and reads the loaded program through the second controller to return the image forming device to a standby state.

13. The image forming apparatus according to claim 12, further comprising a timer, in, In case that the third controller receives the return processing event, the third controller controls to stop the timer.

14. The image forming apparatus according to claim 9, further comprising a third controller configured to return the image forming apparatus from the power saving state to the standby state when the third controller receives a return processing event, in, When the third controller determines that the image forming apparatus is to return from the pause state, the third controller controls to return the image forming apparatus to the standby state by the second controller reading a program loaded into a memory before the image forming apparatus shifts to the pause state.

15. The image forming apparatus according to claim 9, further comprising: a setting unit configured to set activation of a hybrid sleep function for transitioning to a hibernation state if a predetermined time has elapsed after the image forming apparatus transitions to a pause state; as well as Timer, Here, when the first controller receives the end processing event and when the hybrid sleep function is enabled, the first controller controls to start the timer immediately before the image forming apparatus transitions to the pause state.

16. The image forming apparatus according to claim 9, further comprising a power switch, in, An end processing event is received by detecting turning off the power switch, and a return processing event is received by detecting turning on the power switch.

17. A control method for controlling an image forming device, the image forming device comprising: At least a first controller and a second controller for performing image processing, and a memory, the image forming apparatus can be switched to a standby state, a pause state, and a sleep state, the pause state is a power saving state in which current is applied to the memory and quick startup is possible, and the sleep state is a power saving state in which current is not applied to the memory, and the control method includes: An end processing event is received, and when it is determined that the transition to the sleep state is enabled, control is performed to cause the image forming device to transition to the sleep state, and when it is determined that the transition to the pause state is enabled, control is performed to load the program of the second controller into the memory and cause the image forming device to transition to the pause state.

18. A control method for controlling an image forming device, the image forming device comprising: At least a first controller and a second controller for performing image processing, and a memory, the image forming apparatus can be switched to a standby state, a pause state, and a sleep state, the pause state is a power saving state in which current is applied to the memory and quick startup is possible, and the sleep state is a power saving state in which current is not applied to the memory, and the control method includes: In the case where the end processing event is received, controlling to load the program of the second controller into the memory and to shift the image forming apparatus to the pause state; and When a predetermined time has elapsed after the image forming apparatus has shifted to the pause state, control is performed so that the image forming apparatus shifts to the sleep state.

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