Substrates and related methods

Abstract

Particular implementations of a substrate may include: an electrically insulating layer (18) having a first maximum planar side (26) and a second maximum planar side (24) opposite the first maximum planar side (26); a first conductive layer (20) coupled to the first largest plane side (26) and including a first fan-shaped edge (28) having a first pattern; and a second conductive layer (22) coupled to the second largest plane side (24) and including a second fan-shaped edge (36) having a second pattern. The first and second patterns may alternate along at least one edge of the first largest planar side (26) and at least one edge of the second largest planar side (24), respectively.

Description

Technical Field

[0001] Aspects of this document generally relate to substrates, such as substrates for semiconductor devices. Background Art

[0002] Semiconductor devices are formed using semiconductor substrate materials. Semiconductor devices are packaged using various techniques designed to protect the semiconductor devices from moisture or electrostatic discharge. Various semiconductor packages provide mechanical support for semiconductor devices. Summary of the invention

[0003] A specific implementation of the substrate may include: an electrically insulating layer having a first maximum planar side and a second maximum planar side opposite the first maximum planar side; a first conductive layer coupled to the first maximum planar side and including a first scalloped edge having a first pattern; and a second conductive layer coupled to the second maximum planar side and including a second scalloped edge having a second pattern. The first pattern and the second pattern may alternate along at least one edge of the first maximum planar side and at least one edge of the second maximum planar side, respectively.

[0004] Specific implementations of the substrate may include one, all, or any of the following:

[0005] The first pattern may be periodic.

[0006] The second pattern may be periodic.

[0007] The first pattern may include repeating angular protrusions.

[0008] The second pattern may include repeating angular protrusions.

[0009] A specific implementation of the substrate may include: an electrically insulating layer having a first maximum planar side and a second maximum planar side opposite the first maximum planar side; a first conductive layer coupled to the first maximum planar side and including a first fan-shaped edge having a first pattern; and a second conductive layer coupled to the second maximum planar side and including a second fan-shaped edge having a second pattern, the second pattern alternating with the first pattern.

[0010] Specific implementations of the substrate may include one, all, or any of the following:

[0011] The first pattern may be periodic.

[0012] The second pattern may be periodic.

[0013] The first pattern may include repeating angular protrusions.

[0014] The second pattern may include repeating angular protrusions.

[0015] A specific implementation of the method for forming a substrate may include: providing an electrically insulating layer having a first maximum plane side and a second maximum plane side opposite to the first maximum plane side; coupling a first conductive layer to the first maximum plane side; coupling a second conductive layer to the second maximum plane side; forming a first fan-shaped edge having a first pattern in the first conductive layer; and forming a second fan-shaped edge having a second pattern in the first conductive layer.

[0016] Specific implementations of the method of forming a substrate may include one, all, or any of the following:

[0017] Forming the first scalloped edge and forming the second scalloped edge may occur simultaneously.

[0018] Forming the first scalloped edge and forming the second scalloped edge may occur separately.

[0019] The method may include applying a mask and patterning the mask prior to forming the first scalloped edge.

[0020] The method may include applying a mask and patterning the mask prior to forming the second scalloped edge.

[0021] The first conductive layer and the second conductive layer include copper.

[0022] The foregoing and other aspects, features and advantages will be apparent to those skilled in the art from the detailed description and accompanying drawings, and from the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Specific implementations will be described below in conjunction with the accompanying drawings, in which like reference numerals represent like elements, and:

[0024] Figure 1 is a top view of a portion of a direct bonded copper substrate showing section line AA;

[0025] Figure 2 It is along Figure 1 The section taken by section line AA in;

[0026] Figure 3 is a top view of the substrate showing section lines BB and CC;

[0027] Figure 4 It is along Figure 3 A cross-sectional view taken along section line BB;

[0028] Figure 5 It is along Figure 3 A cross-sectional view taken along section line CC;

[0029] Figure 6 is a perspective view of a specific implementation of a substrate having a conductive layer having scalloped edges formed by repeating angular protrusions;

[0030] Figure 7 is a top partial perspective view of a specific implementation of a substrate having a conductive layer having scalloped edges formed by repeating angular protrusions;

[0031] Figure 8 is a perspective view of a specific implementation of a substrate having a conductive layer having scalloped edges formed by a periodic pattern; and

[0032] Fig. 9 is a top partial perspective view of a specific implementation of a substrate having a conductive layer with scalloped edges formed by a periodic pattern. DETAILED DESCRIPTION

[0033] The present disclosure, its various aspects, and specific implementations are not limited to the specific components, assembly processes, or method elements disclosed herein. Many additional components, assembly processes, and / or method elements known in the art that are consistent with the intended substrate will be readily apparent for use with specific specific implementations of the present disclosure. Thus, for example, although specific specific implementations are disclosed, such specific implementations and implementation components may include any shape, size, style, type, model, version, measurement, concentration, material, quantity, method element, step, etc. known in the art for such substrates and implementation components and methods that are consistent with the intended operation and method.

[0034] Various substrates are used in conjunction with semiconductor devices to provide mechanical, thermal, and / or electrical connections to the semiconductor devices. In various substrate designs, a portion of the substrate may be made of a semiconductor material. However, in other substrate designs, a portion of the substrate may be made of a ceramic material that is electrically insulating and generally thermally conductive. For many substrates, the substrate is used to provide an electrical connection while allowing heat to be transferred from the semiconductor device during operation.

[0035] Direct bond copper (DBC) substrates are a type of substrate used with many semiconductor device types, including power semiconductor devices. Figure 1 to Figure 2 As shown, the direct bonded copper substrate 2 includes a ceramic electrical insulation layer 4 having a Figure 1 and Figure 2 The first largest plane side visible in 5 and in Figure 2The second largest planar side 6 is visible in the cross section of FIG. The first copper layer 8 is directly bonded to the first largest planar side 5, and the second copper layer 10 is directly bonded to the second largest planar side. The bonding of the copper layers can be performed using various methods of high temperature melting and diffusion or sintering, where pressure may or may not be applied to the copper layers. The material of the ceramic electrical insulating layer 4 can be aluminum oxide or aluminum nitride for direct bonding to the copper substrate.

[0036] like Figure 1 Top view and Figure 2 As shown in the cross-sectional view along the section line AA in FIG, the material 12 of the ceramic electrically insulating layer 4 extends beyond the outer edges of both the first copper layer 8 and the second copper layer 10. The reason for this is that when the substrate is energized, the extended material 12 of the ceramic electrically insulating layer 4 serves to increase the electrical isolation between the outer edges of the first copper layer 8 and the second copper layer 10 by increasing the distance that an arc travels between the outer edges of these outer edges to establish a short circuit. However, since the ceramic electrically insulating layer 4 is typically made of a mechanically brittle material, any chipping of the extended material 12 reduces the electrical isolation. If the extended material 12 is completely chipped away, the electrical isolation distance is reduced to only the thickness 14 of the electrically insulating layer 4, which may not be sufficient to prevent arcing between the first copper layer 8 and the second copper layer 10 during operation under various conditions (voltage, package design, etc.).

[0037] Various substrate implementations disclosed herein utilize scalloped edges designed to increase electrical isolation between conductive layers on each side of an electrically insulating layer. As used herein, "scalloped" refers to a pattern that includes a series of circular / elliptical segments and / or angular protrusions formed in the border / edge of a layer. Figure 3 , a substrate 16 having an electrically insulating layer 18 is shown, wherein a first conductive layer 20 and a second conductive layer 22 are coupled to the electrically insulating layer. The second conductive layer 22 is shown in a partially perspective manner and is coupled to a second maximum planar surface 24 of the electrically insulating layer 18, while the first conductive layer 20 is coupled to a first maximum planar surface 26 (see Figure 4 ).like Figure 3As shown, the scalloped edge 28 of the first conductive layer 20 is formed by a periodic pattern that meanders from one side to the other (as a non-limiting example, similar to a sinusoidal pattern), the periodic pattern being formed by circular / elliptical segments such that the scalloped edge 28 alternates between a first point 30 closest to the outer edge 34 of the electrically insulating layer 18 and a second point 32 farthest from the outer edge 34 (with a total amplitude of s1+s1). The second conductive layer 22 also includes a scalloped edge 36 that includes a substantially similar periodic pattern that is also formed by circular / elliptical segments such that the edge 36 alternates between a first point 38 farthest from the outer edge 34 and a second point 40 closest to the outer edge 34 of the electrically insulating layer 18 (s2 is the distance between the second point 40 and the outer edge 34). Upon inspection, the periodic pattern of the first conductive layer 20 is approximately 180 degrees out of phase with the periodic pattern of the second conductive layer 22 so that they intersect regularly but ensure that the first points 30, 38 and second points 32, 40 are always as far away from each other as possible when viewed from the top down.

[0038] Figure 4 and Figure 5 Details of cross sections of substrate 16 taken along section lines BB and CC are shown, respectively. Figure 4 , a scalloped edge 28 at a first point 30 of the first conductive layer 20 and a scalloped edge 36 at a second point 38 of the second conductive layer 22 are shown, respectively. By inspection, it can be seen that in this view, the distance between the scalloped edges 28, 36 is maximized. Figure 5 The scalloped edge 28 of the first conductive layer 20 at its second point 32 and the scalloped edge 36 of the second conductive layer 22 at its second point 40 are shown. In this view, the distance between the scalloped edges 28, 36 is also maximized. Figure 8 A perspective view of scalloped edge 28 and scalloped edge 36 relative to edge 34 of electrically insulating layer 18 is shown. Fig. 9 is a longer partial perspective view of the scalloped edges 28 and 36 together with the edge 34 of the electrically insulating layer 18 .

[0039] like Figure 4 As shown, if the entire length 42 of the extension 44 of the electrically insulating layer 18 is broken off, the remaining separation between the scalloped edges 28, 36 is substantially more than just the thickness of the electrically insulating layer 18 itself. Figure 2 The substrate shown. Therefore, Figures 3 to 5 The substrate 16 shown is Figure 1 to Figure 2The illustrated substrate 2 has a more robust electrical isolation. Even at a set of closest points 46 where the scalloped edges 28, 36 intersect, where the first conductive layer 20 and the second conductive layer 22 are theoretically separated only by the thickness of the electrically insulating layer 18, the likelihood that a chip could occur all the way to that point is reduced. This is because the material of the first conductive layer 20 and the material of the second conductive layer 22 act as mechanical support and prevent chipping and / or shavings from spreading into / reaching that location without leaving residual electrically insulating material.

[0040] In addition, if Figure 8 and Fig. 9 As shown, the frequency of the maxima and minima of the scalloped edges 28, 36 may be set to values ​​that minimize the number of closest points to reduce the risk of chipping. However, in other implementations, the frequency of the maxima and minima of the scalloped edges 28, 36 may be maximized to produce many closely spaced closest points so as to make it difficult for any chip to propagate sufficiently into the material of the electrically insulating layer 18 to reach any particular closest point. Since the scalloped edges can produce a finite (rather than an infinite) number of closest points where a chip could cause an insulation failure, the Figure 1 to Figure 2 Compared to the substrate 2 shown, any given chipping may result in Figures 3 to 5 The scalloped edge design of substrate 16 significantly reduces the chance of electrical isolation failure.

[0041] A variety of repeating shapes may be used in various implementations of the scalloped edge. Figure 6 and Figure 7 , shows a first scalloped edge 48 and a second scalloped edge 50, wherein the first scalloped edge and the second scalloped edge are each formed by a set of repeating angular protrusions. As shown, the first set of angular protrusions of the first scalloped edge 48 is formed by a set of first angled lines that connect the outer edge 52 and the inner edge 56 of the first conductive layer 54. Similarly, the second set of angular protrusions of the second scalloped edge 50 is formed by a set of corresponding alternating / intersecting second angled lines that connect the outer edge 58 with the inner edge 60 of the second conductive layer 62. Figures 3 to 5 and Figures 8 to 9As with the periodic pattern of the specific implementation, there is a set of closest points 64 at which the first set of angled lines and the second set of angled lines intersect. The number of angular protrusions in each of the first scalloped edge 48 and the second scalloped edge 50 is determined by the angle at which the first set of angled lines and the second set of angled lines meet the outer edges 52, 58 and the inner edges 56, 60, respectively. Where the angles are less obtuse (closer to 90 degrees), more angular protrusions will be included in the first scalloped edge 48 and the second scalloped edge 50; where the angles become more obtuse (away from 90 degrees), fewer angular protrusions will be included in the first scalloped edge and the second scalloped edge. By changing the angles of the first set of angled lines and the second set of angled lines, the number of angular protrusions can be adjusted and a similar electrical isolation enhancement effect can be provided in response to the fragmentation of the electrical insulation layer 66.

[0042] exist Figure 6 to Figure 7 In the illustrated implementation, the shape of each angular projection is an isosceles trapezoid. However, in various implementations, many other shapes are possible, depending on the specific spacing used between the groups of angled lines. In the case where the spacing becomes substantially zero, meaning that all the angled lines intersect, the shape of each angular projection becomes triangular. In the case where the angle becomes close to 90 degrees, the shape of the angled projection approaches a rectangular shape (although still remaining a trapezoid). However, in other implementations, instead of using angled lines, arcs may be used between the outer edges 52, 58 and the inner edges 56, 60 to form a shape with straight outer edges but with curved side edges. In various implementations, the arcs may be all convex, all concave, or a mixture of convex and concave. In the case where the spacing between the arcs becomes substantially zero, the shape of the angular projection may take the shape of the curved edge points or be circular or elliptical (depending on whether concave or convex lines are used).

[0043] However, in other implementations, various combinations of straight lines and arcs may be employed, wherein instead of a single angled line extending between the outer edges 52, 58 and the inner edges 56, 60, multiple angled lines, multiple arcs, or any combination of angled lines and arcs may be used to form a more complex angled protrusion. Additionally, instead of angled lines in various implementations, the edge of the angled protrusion may be formed as a set of two or more steps formed into the edge / side of each angled protrusion to form a plurality of angled lines, arcs, or any combination of angled lines and arcs. Figure 7 , which does not have any angled lines but still forms an alternating stepped pattern on each side of the electrically insulating layer.

[0044] While an alternating pattern is used for the scalloped edges where the pattern of the first conductive layer is the same or substantially the same as the pattern of the second conductive layer, in other implementations, a different pattern may be used for each scalloped edge. For example, a periodic pattern may be used for the first conductive layer, and a pattern with repeated corner protrusions may be used for the second conductive layer. In such implementations, the specific pattern type selected for each layer may be determined by the desired number / position of the resulting closest points. In other implementations, the pattern type for each scalloped edge may be determined by the degree of chipping resilience (isolation risk tolerance) desired for the surface of the electrically insulating layer adjacent to either conductive layer. For example, if a semiconductor die is attached to the first conductive layer and the second conductive layer is to be bonded to a heat sink, meaning that the side of the electrically insulating layer coupled to the second conductive layer is unlikely to be contacted during processing or during use of the resulting package, a pattern with fewer protrusions / rounded / curved portions may be used on the scalloped edges of the second conductive layer, while a pattern with more protrusions may be used for the scalloped edges of the first conductive layer (or vice versa). While using a symmetrical pattern for the scalloped edges prevents any warping effects caused by unequal amounts of conductive material on each side of the electrically insulating layer, the use of an asymmetrical pattern may not be significant enough to appreciably affect warping, depending on the type of shape employed and whether the total area of ​​conductive material on each side remains sufficiently equal.

[0045] In some implementations, the cross-sectional shape of the edge of the first conductive layer and / or the second conductive layer may not be as shown in FIG. Figure 4 and Figure 5 The substantially straight or 90 degrees shown in , but can be angled or curved in other ways. The ability to change the cross-sectional shape of the edge of one or both of the conductive layers can allow for adjustment of warping, stress and / or increase resilience against cracking of the electrically insulating layer.

[0046] In various substrate implementations, the material for the first conductive layer and the second conductive layer may be formed of a metal or a metal alloy. In some implementations, the material for the two conductive layers may be the same; however, in other implementations, different materials / alloys may be used. By way of non-limiting example, the material for the conductive layer may be copper, aluminum, a copper alloy, an aluminum alloy, or another conductive metal. By way of non-limiting example, the material for the electrically insulating layer may be (as a non-limiting example) alumina, aluminum oxide, aluminum nitride, multiple layers of the same or different electrically insulating layers, any combination thereof, or any other electrically insulating material capable of being coupled to the conductive layer. In addition, any of a variety of semiconductor dies may be used with the various substrate implementations disclosed herein, including (as a non-limiting example) power semiconductor dies, silicon carbide dies, metal oxide field effect transistors (MOSFETs), diodes, insulated gate bipolar transistors (IGBITs), or any other semiconductor device type.

[0047] Various substrate implementations disclosed herein can be manufactured using various implementations of a method for forming a substrate. The method includes providing an electrically insulating layer having a first maximum planar side and a second maximum planar side opposite the first maximum planar side, with a thickness therebetween. The electrically insulating material can be any of the materials disclosed in this document. The method also includes coupling a first conductive layer to the first maximum planar side and coupling a second conductive layer to the second maximum planar side. In various method implementations, the coupling can be achieved by (as a non-limiting example) sintering, brazing, active metal brazing, thermocompression bonding, ultrasonic bonding, heating, gluing, welding, or any other technique for fixing the material of the conductive layer to the material of the electrically insulating layer. In various method implementations, a first scalloped edge is formed in the first conductive layer. A second scalloped edge is formed in the second conductive layer. The pattern of the first scalloped edge alternates with the pattern of the second scalloped edge.

[0048] In various method implementations, the formation of the first scalloped edge and the second scalloped edge may occur simultaneously. In other method implementations, the first scalloped edge and the second scalloped edge may be formed separately. In various method implementations, the pattern of each scalloped edge may be formed by applying a mask and patterning the mask before etching the pattern into the material of the first conductive layer or the second conductive layer. In the case of using a patterned mask, applying a mask and patterning the mask may occur before forming the first scalloped edge (and before forming the second scalloped edge in some implementations). In other implementations, applying a mask and patterning the mask may occur before forming the second scalloped edge (and before forming the first scalloped edge in some implementations). Depending on the material of the conductive layer, the process of etching the material of the conductive layer may include (as a non-limiting example) wet etching, dry etching, any combination thereof, or any other etching / patterning process capable of removing the material of the conductive layer.

[0049] Where the above description relates to specific implementations of substrates and implementation components, subcomponents, methods and sub-methods, it should be apparent that various modifications may be made without departing from the essence thereof, and that these implementations, implementation components, subcomponents, methods and sub-methods may be applied to other substrates.

Claims

1. A substrate, comprising: an electrically insulating layer (18) having a first maximum planar side (26) and a second maximum planar side (24) opposite the first maximum planar side (26); a first conductive layer (20) coupled to the first maximum planar side (26) and comprising a first scalloped edge (28) having a first pattern; and a second conductive layer (22) coupled to the second largest planar side (24) and comprising a second scalloped edge (36) having a second pattern; The first pattern and the second pattern alternate along at least one edge of the first maximum planar side (26) and at least one edge of the second maximum planar side (24), respectively. The substrate according to claim 1 , wherein the first pattern is periodic. The substrate according to claim 1 , wherein the second pattern is periodic. The substrate of claim 1 , wherein the first pattern comprises repeating angular protrusions. The substrate of claim 1 , wherein the second pattern comprises repeating angular protrusions. The substrate of claim 2 , wherein the second pattern is periodic.

7. The substrate of claim 4, wherein the second pattern comprises repeating angular protrusions.

8. A substrate, comprising: an electrically insulating layer (18) having a first maximum planar side (26) and a second maximum planar side (24) opposite the first maximum planar side (26); a first conductive layer (20) coupled to the first maximum planar side (26) and comprising a first scalloped edge (28) having a first pattern; and A second conductive layer (22) is coupled to the second largest planar side (24) and includes a second scalloped edge (36) having a second pattern that alternates with the first pattern.

9. The substrate of claim 8, wherein the first pattern is periodic.

10. The substrate of claim 8, wherein the second pattern is periodic.

11. The substrate of claim 8, wherein the first pattern comprises repeating angular protrusions.

12. The substrate of claim 8, wherein the second pattern comprises repeating angular protrusions.

13. The substrate of claim 9, wherein the second pattern is periodic.

14. The substrate of claim 11, wherein the second pattern comprises repeating angular protrusions.

15. A method of forming a substrate, the method comprising: Providing an electrically insulating layer (18) having a first maximally planar side (26) and a second maximally planar side (24) opposite the first maximally planar side (26); coupling a first conductive layer (20) to the first largest planar side (26); coupling a second conductive layer (22) to the second largest planar side (24); forming a first scalloped edge (28) having a first pattern in the first conductive layer (20); as well as A second scalloped edge (36) having a second pattern is formed in the second conductive layer (22).

16. The method of claim 15, wherein forming the first scalloped edge (28) and forming the second scalloped edge (36) occur simultaneously.

17. The method of claim 15, wherein forming the first scalloped edge (28) and forming the second scalloped edge (36) occur separately.

18. The method according to claim 15, further comprising: A mask is applied and patterned prior to forming the first scalloped edge (28).

19. The method according to claim 15, further comprising: A mask is applied and patterned prior to forming the second scalloped edge (36).

20. The method of claim 15, wherein the first conductive layer (20) and the second conductive layer (22) comprise copper.

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