Motor controller circuit system and motor controller

By designing a drive detection circuit in the motor controller, comparing the PWM signals output from the main controller and the drive circuit, the diagnosis of the faults of the drive chip and the drive circuit is achieved, and the problem of insufficient detection of the drive signal fault in the prior art is solved, and the problem of improved Safety and integrity of the car.

CN119217978APending Publication Date: 2024-12-31JING JIN ELECTRIC TECH HEZE CO LTD
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Patent Information

Application Number
CN202411336379.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-24
Publication Date
2024-12-31

AI Technical Summary

Technical Problem

The existing motor controller driver signal fault detection methods are limited to monitoring the driver chip, making it difficult to accurately diagnose problems such as open circuit or short circuit of other driver circuits, resulting in insufficient automotive safety integrity levels.

Method used

A motor controller circuit system is designed, including a main controller and a driving circuit. The PWM signal output from the main controller and the driving circuit is read through the driving detection circuit, the two are compared and the fault diagnosis results are output, and the driver is output to the main controller. Circuit fault indication signal to realize the diagnosis of driver chip and driver circuit faults.

Benefits of technology

It improves the coverage of driver circuit fault diagnosis, enhances the safety integrity level of the car, and avoids motor controller failures caused by failure of the drive signal processing circuit or driver chip.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a motor controller circuit system and a motor controller, and is applied to driving fault detection of the motor controller, the circuit system comprises a driving detection circuit, the driving detection circuit is respectively connected with a main controller and a driving circuit, and through the driving detection circuit, a first PWM signal sent by the main controller is firstly read; a second PWM signal output by the driving circuit is read back; secondly, comparing the first PWM signal with the second PWM signal and outputting a fault diagnosis result; and then, according to a fault diagnosis result, a driving circuit fault indication signal is output to the main controller, so that a safety state is output through the main controller. According to the technical scheme, on one hand, the fault of the driving chip can be diagnosed, and on the other hand, fault conditions such as failure of the driving circuit can be diagnosed, so that the coverage rate of fault diagnosis of the driving circuit is improved, and the safety integrity level of the automobile ASILD is further improved.
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Description

Technical Field

[0001] The present application relates to the technical field of motor controllers, and in particular to a motor controller circuit system and a motor controller. Background Art

[0002] The motor controller is the core of the vehicle power system. Once the drive signal fails, the motor controller will not be able to effectively perform its functions, and may even cause damage to the power circuit, leading to personal safety accidents. Therefore, it is very important to monitor the drive signal of the motor controller.

[0003] However, existing drive circuit design solutions are limited to monitoring driver chip-related faults. In current main designs, drive signal fault detection is not fully implemented, or it relies solely on the driver chip to monitor the entire system. This detection method can only cover driver chip-related faults, and it is difficult to make accurate diagnosis for other drive circuit failures, such as open or short circuits in the drive signal processing circuit. Summary of the invention

[0004] In view of the above problems, the present application is proposed to provide a motor controller circuit system and a motor controller to achieve the technical effect of diagnosing driver chip and driver signal failures and improving the safety integrity level of the vehicle.

[0005] According to the first aspect of the present application, a motor controller circuit system is proposed, which is applied to drive fault detection of a motor controller, wherein the motor controller at least includes a main controller and a drive circuit, wherein the main controller is connected to the drive circuit, and the circuit system includes a drive detection circuit, wherein the drive detection circuit is respectively connected to the main controller and the drive circuit, and the drive detection circuit is used to read a first PWM signal emitted by the main controller; read back a second PWM signal output by the drive circuit; compare the first PWM signal and the second PWM signal and output a fault diagnosis result; and output a drive circuit fault indication signal to the main controller according to the fault diagnosis result, so as to output a safe state through the main controller.

[0006] Optionally, the motor controller further includes a power device, the drive circuit includes a drive signal processing circuit and a drive chip, the input end of the drive signal processing circuit is connected to the main controller, and the output end of the drive chip is connected to the power device;

[0007] The first input terminal of the drive detection circuit is connected between the output terminal of the main controller and the input terminal of the drive signal processing circuit;

[0008] The second input terminal of the driving detection circuit is connected between the output terminal of the driving chip and the input terminal of the power device.

[0009] Optionally, the drive detection circuit includes an isolation circuit,

[0010] The input end of the isolation circuit serves as the second input end of the drive detection circuit, and is used to receive and isolate the second PWM signal of the drive chip.

[0011] Optionally, the drive detection circuit includes a comparison circuit connected to the isolation circuit.

[0012] The first input end of the comparison circuit serves as the first input end of the drive detection circuit and is used to receive the first PWM signal sent by the main controller;

[0013] The second input end of the comparison circuit serves as the second input end of the drive detection circuit and is used to receive the low-voltage second PWM signal output by the isolation circuit;

[0014] The comparison circuit is further used to detect and compare the consistency between the first PWM signal and the low-voltage second PWM signal, and output a consistency diagnosis signal.

[0015] Optionally, the drive detection circuit further includes a fault delay circuit connected to the comparison circuit.

[0016] The input end of the fault delay circuit is used to receive the consistency diagnosis signal output by the comparison circuit, and when the consistency diagnosis signal indicates that the first PWM signal and the low-voltage second PWM signal are inconsistent and the duration is not less than a preset time threshold, the drive circuit fault indication signal is output to the main controller through the output end of the fault delay circuit.

[0017] Optionally, the isolation circuit includes at least an optocoupler isolation chip, which is used to convert the high-voltage second PWM signal into a low-voltage second PWM signal.

[0018] Optionally, the comparison circuit includes at least an XOR logic chip, which is used to

[0019] When the first PWM signal and the low-voltage second PWM signal are inconsistent, a high-level consistency diagnosis signal is output to the fault delay circuit,

[0020] When the first PWM signal and the low-voltage second PWM signal are consistent, a low-level consistency diagnosis signal is output to the fault delay circuit.

[0021] Optionally, the fault delay circuit includes at least a NE555 chip module, which is used to count the consistency diagnosis signal within a preset time threshold in a monostable mode.

[0022] Optionally, the driver chip is connected to the main controller and is used to output a driver chip fault indication signal to the main controller, so as to output a safe state through the main controller.

[0023] According to a second aspect of the present application, a motor controller is proposed, comprising a motor controller circuit system as described in any one of the first aspects above.

[0024] As can be seen from the above, at least one of the above technical solutions adopted in the embodiments of the present application can achieve the following beneficial effects: the motor controller circuit system of the embodiments of the present application is applied to the drive fault detection of the motor controller, the motor controller includes at least a main controller and a drive circuit, and the circuit system includes a drive detection circuit; through the drive detection circuit, first read the first PWM signal sent by the main controller, and read back the second PWM signal output by the drive circuit; secondly, compare the first PWM signal and the second PWM signal and output the fault diagnosis result; then, according to the fault diagnosis result, output the drive circuit fault indication signal to the main controller, so as to output the safe state through the main controller. The technical solution of the present application can diagnose the fault of the driver chip on the one hand, and on the other hand, can also diagnose the failure of the driver circuit and other fault conditions, thereby improving the coverage of the drive circuit fault diagnosis and further improving the safety integrity level of the vehicle.

[0025] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Various other advantages and benefits will become apparent to those of ordinary skill in the art by reading the detailed description of the preferred embodiments below. The accompanying drawings are only for the purpose of illustrating the preferred embodiments and are not to be considered as limiting the present application. Also, the same reference symbols are used throughout the accompanying drawings to represent the same components. In the accompanying drawings:

[0027] Figure 1 It is a structural schematic diagram of a motor controller circuit system in one embodiment of the present application;

[0028] Figure 2 A circuit connection diagram of a motor controller circuit system in one embodiment of the present application;

[0029] Figure 3This is a schematic diagram of the operation logic of the motor controller circuit system in one embodiment of the present application;

[0030] In the figure: 100, main controller; 200, drive circuit; 300, drive detection circuit; 400, power device; 210, drive signal processing circuit; 220, drive chip; 310, isolation circuit; 320, comparison circuit; 330, fault delay circuit. DETAILED DESCRIPTION

[0031] The exemplary embodiments of the present application will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present application are shown in the accompanying drawings, it should be understood that the present application can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided in order to enable a more thorough understanding of the present application and to fully convey the scope of the present application to those skilled in the art.

[0032] The technical solutions provided by various embodiments of the present application are described in detail below in conjunction with the accompanying drawings.

[0033] In one embodiment of the present application, Figure 1 As shown, a structural schematic diagram of a motor controller circuit system is provided; the motor controller circuit system of an embodiment of the present application is applied to drive fault detection of a motor controller, the motor controller at least includes a main controller 100 and a drive circuit 200, the main controller 100 is connected to the drive circuit 200, the motor controller circuit system includes a drive detection circuit 300, the drive detection circuit 300 is respectively connected to the main controller 100 and the drive circuit 200, the drive detection circuit 300 is used to read a first PWM signal issued by the main controller 100; read back a second PWM signal output by the drive circuit 200; compare the first PWM signal and the second PWM signal and output a fault diagnosis result; according to the fault diagnosis result, output a drive circuit fault indication signal to the main controller 100 to output a safe state through the main controller 100.

[0034] Specifically, the main controller 100 in the embodiment of the present application includes a single chip microcomputer, for example, a TC377 chip with a high functional safety level is selected; the drive detection circuit 300 is independent of the drive chip of the motor controller, and the drive detection circuit 300 is mainly used to monitor and detect the drive signal and related circuit components transmitted in the drive circuit 200 of the motor controller in real time, that is, to read back the second PWM signal output by the drive circuit 200, and compare it with the first PWM signal issued by the main controller 100. When the two PWM signals are inconsistent, it is determined that the relevant circuit of the drive circuit 200 has a PWM signal failure, and then the drive detection circuit 300 sends a fault indication signal to the main controller 100 for error reporting; for example, the drive circuit fault indication signal in this embodiment indicates that the drive signal transmission circuit has a PWM signal failure, and the failure includes but is not limited to the open circuit or short circuit of the drive signal processing circuit and other drive circuit failures. When the two PWM signals are consistent, it is determined that the drive signal of the drive circuit 200 and its circuit components are working normally, and then the drive detection circuit 300 can report normal to the main controller 100, which will not be repeated here.

[0035] It is not difficult for relevant technical personnel in the field to understand that the first PWM signal and the second PWM signal of this embodiment each include multiple ones, for example, the first PWM signal emitted by the main controller 100 includes 6, each of which has a different type or control function, and the second PWM signal output by the drive circuit 200 includes 6, each of which has a different type or control function; at the same time, the difference between the first PWM signal and the second PWM signal lies in the different collection positions, and the specific type and number of the collected PWM signals can be adjusted and set by relevant technical personnel in the field in combination with actual conditions, and this application will not elaborate on them.

[0036] Of course, the above contents about the types, connection methods, signal acquisition locations, etc. of each circuit component in the main controller 100, the drive circuit 200, and the drive detection circuit 300 are only for the convenience of understanding and simplified description, and cannot be regarded as limitations on the present application.

[0037] Different from the existing technical solutions that only monitor driver chip-related faults, the motor controller circuit system of the embodiment of the present application can, on the one hand, diagnose driver chip faults, and on the other hand, can also diagnose drive signal faults caused by drive circuit failure, thereby improving the coverage of drive circuit fault diagnosis and further improving the vehicle safety integrity level.

[0038] In some embodiments, continue to refer to Figure 1As shown, the motor controller also includes a power device 400, the drive circuit 200 includes a drive signal processing circuit 210 and a drive chip 220, the input end of the drive signal processing circuit 210 is connected to the main controller 100, and the output end of the drive chip 220 is connected to the power device 400; the first input end of the drive detection circuit 300 is connected between the output end of the main controller 100 and the input end of the drive signal processing circuit 210; the second input end of the drive detection circuit 300 is connected between the output end of the drive chip 220 and the input end of the power device 400.

[0039] Specifically, the power device 400 includes at least an IGBT power unit. After the PWM signal emitted by the main controller 100 passes through the drive circuit 200, it can be converted and output as a motor control signal through the IGBT power unit, thereby controlling and adjusting the speed and torque of the motor. Therefore, in this embodiment, after the main controller 100 and before the drive signal processing circuit 210, a first PWM signal can be acquired through the first input end of the drive detection circuit 300. After the drive chip 220 and before the power device 400, a PWM readback is performed on the drive signal emitted by the drive circuit 200, and a second PWM signal can be acquired through the second input end of the drive detection circuit 300. Thus, by comparing the first PWM signal with the second PWM signal, fault detection and diagnosis of the drive circuit 200 can be realized.

[0040] In some embodiments, the drive detection circuit 300 includes an isolation circuit 310, and an input end of the isolation circuit 310 serves as a second input end of the drive detection circuit 300, for receiving and isolating a second PWM signal of the drive chip to output a low-voltage second PWM signal.

[0041] In some embodiments, the drive detection circuit 300 includes a comparison circuit 320 connected to the isolation circuit 310, the first input end of the comparison circuit 320 is used as the first input end of the drive detection circuit 300, and is used to receive the first PWM signal issued by the main controller 100; the second input end of the comparison circuit 320 is used as the second input end of the drive detection circuit 300, and is used to receive the low-voltage second PWM signal output by the isolation circuit 310; the comparison circuit 320 is also used to detect and compare the consistency of the first PWM signal and the low-voltage second PWM signal, and output a consistency diagnosis signal. That is, through the comparison circuit 320, the drive signal output by the isolation circuit 310 is received and compared with the signal issued by the main controller 100; and when the two signals are detected to be inconsistent, the output level is sent to the fault delay circuit 330.

[0042] In some embodiments, the drive detection circuit 300 further includes a fault delay circuit 330 connected to the comparison circuit 320, and the input end of the fault delay circuit is used to receive the consistency diagnosis signal output by the comparison circuit, and when the consistency diagnosis signal indicates that the first PWM signal and the low-voltage second PWM signal are inconsistent and the duration is not less than the preset time threshold, the drive circuit fault indication signal is output to the main controller 100 through the output end of the fault delay circuit 330. That is, the consistency diagnosis signal output by the comparison circuit 320 is received by the fault delay circuit 330 to avoid the influence of the signal delay in the circuit; the consistency diagnosis signal may include the diagnosis result of the two signals being consistent or inconsistent, and when it is detected that the output signal of the main controller 100 is inconsistent with the output signal of the driver chip 220 and exceeds the preset time threshold, the fault delay circuit 330 outputs the drive circuit fault indication signal to the main controller 100.

[0043] In some embodiments of the present application, the isolation circuit 310 includes at least an optocoupler isolation chip, which is used to convert the high-voltage second PWM signal into a low-voltage second PWM signal. For example, an ISO7741QDWRQ1 digital signal isolation chip can be selected, and there is no limitation here.

[0044] Preferably, the comparison circuit 320 includes at least an XOR logic chip, which is used to output a high-level consistency diagnosis signal to the fault delay circuit 330 when the first PWM signal and the low-voltage second PWM signal are inconsistent, and output a low-level consistency diagnosis signal to the fault delay circuit 330 when the first PWM signal and the low-voltage second PWM signal are consistent; for example, a SN74LVC1G86DCKR general logic gate chip can be selected, and there is no limitation here.

[0045] Specifically, for the first PWM signal issued by the main controller 100 and the second PWM signal issued by the driving chip 220, when one of them is a high-level signal and the other is a low-level signal, a high-level consistency diagnostic signal is output through the comparison circuit 320, that is, the output is a high-level signal indicating that the first PWM signal and the second PWM signal are inconsistent; and in other cases, such as when the two signals are both high-level or both low-level, a low-level consistency diagnostic signal is output through the comparison circuit 320, that is, the output is a low-level signal indicating that the first PWM signal and the second PWM signal are consistent.

[0046] Preferably, the fault delay circuit 330 includes at least a NE555 chip module, which is used to count the consistency diagnosis signal within the preset time threshold in the monostable mode, that is, to count the comparison result within the preset time threshold to eliminate the erroneous judgment caused by the delay. It can be understood that the NE555 chip module is a multifunctional integrated circuit, mainly composed of a comparator, an RS trigger, an RS latch, and an output driver. In the monostable mode, the NE555 chip can be used as a single, timed delay device, and the output pin OUT is always in a low level state until the input trigger pulse arrives. Once the trigger pulse arrives, the output pin OUT will jump, output a high level signal for a period of time and then return to a low level state. For example, when the trigger pin TRIG receives a falling edge, the timer starts timing, and the output pin OUT will send a pulse, the pulse width is determined by the capacitor and the resistor, and when the pulse ends, the output pin OUT returns to a low level; wherein the pulse width = 1.1 × R2 × C7, thereby the required delay time can be achieved by selecting appropriate resistors and capacitors to compare the duration of the received level signal with the preset time threshold, thereby improving the accuracy of signal detection.

[0047] In some embodiments of the present application, Figure 2 As shown, a circuit connection diagram of the motor controller circuit system of an embodiment of the present application is provided; the circuit system of the embodiment of the present application may specifically include 2 isolation circuits 310, 6 comparison circuits 320 and 6 fault delay circuits 330, and the first PWM signal and the second PWM signal each include 6.

[0048] Among them, the six second PWM signals are collected through two optocoupler isolation chips U14 respectively, that is, each U14 can collect UVW three-phase PWM signals, and each phase PWM signal is divided into two signals, TOP and BOT. For the sake of simplicity, only the TOP signal is shown in the figure, and the BOT signal is not shown; for example, the third pin INA of U14 is used to collect the U_TOP signal, the fourth pin INB of U14 is used to collect the V_TOP signal, and the fifth pin INC of U14 is used to collect the W_TOP signal, and the six low-voltage second PWM signals after isolation and conversion by U14 can be sent to the first pin A of U12 through the fourteenth pin OUTA of U14. At the same time, the six first PWM signals are collected respectively through the XOR logic chip U12 in the six comparison circuits 320, such as the second pin B of U12 is used to collect the first PWM signal sent by the main controller 100, the first pin A of U12 is used to receive the second PWM signal sent by the optical coupling isolation chip U14, and the fourth pin Y of U12 is used to send the comparison result of the two signals to the fault delay circuit 330; at the same time, the NE555 chip U15 receives the consistency diagnosis signal sent by the comparison circuit 320 through the trigger pin TRIG, and then connects to the main controller 100 through the output pin OUT to output the fault indication signal ( Figure 2 MCU stands for main controller).

[0049] certainly, Figure 2 The component types, quantities, and connection relationships of the various circuits shown are only for ease of understanding and simplified description and should not be construed as limitations on the present application. In addition, the connection method of each chip may be adjusted by referring to the relevant chip manual and will not be elaborated here.

[0050] In some embodiments, the driver chip 220 is connected to the main controller 100 and is used to output a driver chip fault indication signal to the main controller 100 to output a safe state through the main controller 100, so that the driver chip can be monitored in real time by the main controller and diagnosed whether it has a fault.

[0051] Therefore, the fault indication signals received by the main controller 100 in the embodiment of the present application include two types, namely, a drive circuit fault indication signal and a drive chip fault indication signal, thereby improving the coverage of motor controller drive fault detection, avoiding motor controller failure caused by failure of the drive signal processing circuit or the drive chip, ensuring the stable operation of the motor controller, and improving the vehicle's ASIL D safety integrity level.

[0052] In some embodiments, Figure 3As shown, a schematic diagram of the operating logic of the motor controller circuit system of an embodiment of the present application is provided; after receiving the fault indication signal issued by the drive detection circuit 300, the main controller 100 needs to further diagnose whether there are various types of faults related to the hardware of the motor controller, so as to clarify the specific fault type and report the vehicle operating abnormality, so as to request the system to enter a safe state through the fault delay circuit.

[0053] For example, through the circuit system of this embodiment, it is first determined whether the motor controller has a PWM signal-related fault, that is, whether the main controller 100 receives a drive circuit fault indication signal that the two PWM signals are inconsistent and last for a period of time. Secondly, if there is no PWM signal-related fault, the motor control function is performed normally; if there is a PWM signal-related fault, it is determined whether the motor controller starts the hardware fault protection. Finally, if the hardware fault protection is started, it is considered that there is a hardware fault, that is, the inconsistency of the two PWM signals is caused by a hardware fault. At this time, it is necessary to report the hardware fault and output a safe state, where the safe state means turning off all drive signals so that the vehicle does not perform the motor control function; if the hardware fault protection is not started, it is considered that there is no hardware fault, that is, the inconsistency of the PWM signals is caused by the failure of the drive circuit, etc. At this time, it is necessary to report the drive circuit fault and output a safe state to turn off all drive signals. Such a design can respond quickly when a drive fault is detected, further improve the coverage of the motor controller fault diagnosis, and protect the motor and the vehicle from damage, avoiding driving risks caused by drive faults.

[0054] In another embodiment of the present application, a motor controller is also proposed, including the motor controller circuit system of any one of the aforementioned embodiments. Applying the motor controller circuit system to the motor controller can further improve the safety and stability of the motor controller. At the same time, applying the motor controller of this embodiment to new energy vehicles can improve the ASIL D safety integrity level of the vehicle, bringing a more reliable, efficient and comfortable driving experience to users.

[0055] In summary, the technical solution of the present application has achieved at least the following technical effects: on the one hand, it can diagnose driver chip failures, and on the other hand, it can also diagnose driver circuit failures and other faults. This improves the coverage of driver circuit fault diagnosis, improves the ASIL D safety integrity level of the vehicle, and avoids driving risks caused by driver failures.

[0056] It should be noted that:

[0057] In the description provided herein, a large number of specific details are described. However, it is understood that the embodiments of the present application can be practiced without these specific details. In some instances, well-known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this description.

[0058] It should be noted that the above embodiments illustrate the present application rather than limit the present application, and that those skilled in the art may design alternative embodiments without departing from the scope of the appended claims. The words "comprise" and "include" do not exclude the presence of elements or steps not listed in the claims. The word "one" or "an" preceding an element does not exclude the presence of multiple such elements. The present application may be implemented with the aid of hardware including several different elements and with the aid of appropriately programmed computers. In a unit claim that lists several devices, several of these devices may be embodied by the same hardware item. The use of the words first, second, and third, etc. does not indicate any order. These words may be interpreted as names.

Claims

1. A motor controller circuit system, applied to drive fault detection of a motor controller, wherein the motor controller comprises at least a main controller and a drive circuit, wherein the main controller is connected to the drive circuit, and wherein: The circuit system includes a drive detection circuit, which is connected to the main controller and the drive circuit respectively, and is used to Reading a first PWM signal sent by the main controller; reading back a second PWM signal output by the driving circuit; comparing the first PWM signal and the second PWM signal and outputting a fault diagnosis result; According to the fault diagnosis result, a drive circuit fault indication signal is output to the main controller, so as to output a safe state through the main controller.

2. The circuit system according to claim 1, characterized in that: The motor controller further includes a power device, the drive circuit includes a drive signal processing circuit and a drive chip, the input end of the drive signal processing circuit is connected to the main controller, and the output end of the drive chip is connected to the power device; The first input terminal of the drive detection circuit is connected between the output terminal of the main controller and the input terminal of the drive signal processing circuit; The second input terminal of the driving detection circuit is connected between the output terminal of the driving chip and the input terminal of the power device.

3. The circuit system according to claim 2, characterized in that: The drive detection circuit includes an isolation circuit, The input end of the isolation circuit serves as the second input end of the drive detection circuit, and is used to receive and isolate the second PWM signal of the drive chip.

4. The circuit system according to claim 3, characterized in that: The drive detection circuit includes a comparison circuit connected to the isolation circuit. The first input end of the comparison circuit serves as the first input end of the drive detection circuit and is used to receive the first PWM signal sent by the main controller; The second input end of the comparison circuit serves as the second input end of the drive detection circuit and is used to receive the low-voltage second PWM signal output by the isolation circuit; The comparison circuit is further used to detect and compare the consistency between the first PWM signal and the low-voltage second PWM signal, and output a consistency diagnosis signal.

5. The circuit system according to claim 4, characterized in that: The drive detection circuit also includes a fault delay circuit connected to the comparison circuit. The input end of the fault delay circuit is used to receive the consistency diagnosis signal output by the comparison circuit, and when the consistency diagnosis signal indicates that the first PWM signal and the low-voltage second PWM signal are inconsistent and the duration is not less than a preset time threshold, the drive circuit fault indication signal is output to the main controller through the output end of the fault delay circuit.

6. The circuit system according to claim 3, characterized in that: The isolation circuit at least includes an optocoupler isolation chip, which is used to convert the high-voltage second PWM signal into a low-voltage second PWM signal.

7. The circuit system according to claim 5, characterized in that: The comparison circuit at least includes an XOR logic chip, which is used to When the first PWM signal and the low-voltage second PWM signal are inconsistent, a high-level consistency diagnosis signal is output to the fault delay circuit, When the first PWM signal and the low-voltage second PWM signal are consistent, a low-level consistency diagnosis signal is output to the fault delay circuit.

8. The circuit system according to claim 5, characterized in that: The fault delay circuit at least includes a NE555 chip module, which is used to count the consistency diagnosis signal within a preset time threshold in a monostable mode.

9. The circuit system according to claim 5, characterized in that: The driving chip is connected to the main controller and is used to output a driving chip fault indication signal to the main controller so as to output a safe state through the main controller.

10. A motor controller, characterized in that: Comprising a motor controller circuit system as claimed in any one of claims 1 to 9.

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