Device and method for determining the rotor position of a brushed DC motor motor by pattern

Abstract

The invention relates to a device and a method for detecting fluctuations in the rotor current of a brushed DC motor 103, having means 105 for detecting the rotor current of the DC motor 103. The devices 105 detect the rotor current of the DC motor 103 and generate an analog rotor current signal 107, the value curve of which depends on the time curve of the rotor current. An analog-to-digital converter 510 samples the rotor current signal 107 and generates a sampled value. The signal level extraction means 120 filters the generated sample values into low-pass filtered sample values. An adder 123 subtracts the low-pass filtered sample values from a sum of an optional offset value 140 and the resulting sample values to produce internal sample values, in particular internal sample values of the fluctuation signal 196. The device stores the internal sampled value as a stored sampled value in a FIFO memory 165. The apparatus applies a pattern recognition method to the sampled values stored in the FIFO memory 165 and determines whether there is a fluctuation in the FIFO memory 165.

Description

Technical Field

[0001] The present invention relates to a method for detecting rotor current fluctuations of a brushed DC motor by analyzing commutator current pulses with the aid of a pattern recognition device and an associated pattern recognition method, wherein a neural network and / or an optimal filter and / or a Kalman filter is preferably used as the pattern recognition device. Background Art

[0002] The technical teaching presented in this document relates to the determination of the position of the rotor of a brushed DC motor. Such a brushed DC motor usually has a commutator. In this respect, the document refers to the Wikipedia pages https: / / de.wikipedia.org / wiki / Gleichstrommaschine and https: / / de.wikipedia.org / wiki / Kommutator_%28Elektrotechnik%29.

[0003] When commutation is performed with the aid of a commutator, current pulses are generated if the brushes of a brushed DC motor switch between two contact surfaces of the commutator due to the rotation of the rotor of the brushed DC motor. This document uses the English term "ripples" to refer to these current pulses. It is known from the prior art that these ripples are counted in order to determine the position of an actuator driven by a DC motor. To this end, this document refers, for example, to German patents DE 42 17 265 C2 and DE 19511 307 C1. In this prior art, the ripples are extracted from the signal curve of the value curve of the motor current of each DC motor by means of an analog circuit. Here, the method according to the prior art is limited to analog filtering and, for example, comparison with a threshold value by means of a comparator. Such a circuit is firstly prone to malfunctions (loss of step = generation of offset errors) and secondly, the testing in the final production test is complex and expensive.

[0004] Modern cars often still include a series of brushed DC motors. Possible automotive applications for such brushed DC motors are, for example, regulating drives for air conditioning flaps or for so-called grilles (Grill-Shutter), which are used to optimize the CW value of the air intake of the internal combustion engine. The technical solution proposed in this article can also be used for DC motor fans with speed controllers. At present, car manufacturers in Asia, the United States and southern Europe mainly use brushed DC motor air conditioning flap actuators instead of stepper motors.

[0005] Manufacturers usually combine brushed DC motors with potentiometers to determine the position. The potentiometers are usually connected via an electrically conductive connecting cable. Manufacturers usually control brushed DC motors via corresponding electrically conductive connecting cables.

[0006] Automakers need to reduce the complexity and weight of wiring harnesses. The cost of DC motors will increase in the coming years. Automakers want to replace potentiometer solutions for detecting the respective position of actuators driven by DC motors in order to save connecting wires. Therefore, manufacturers often recommend replacing the potentiometer-based position sensors of the respective actuators with sensorless solutions.

[0007] Therefore, the technical revelation proposed in this paper is to replace this potentiometer-based position sensor with a sensorless DC motor pulse count solution based on a hybrid solution of analog and digital.

[0008] The technical inspiration presented below can be implemented as a pure software solution and / or by integrating acceleration circuit blocks.

[0009] Here, special conditions that currently constitute a technical challenge are presented:

[0010] 1. The technical solution must keep CPU utilization below 80%;

[0011] 2. It should be able to measure the current fluctuation of the DC motor and control the PWM voltage at the same time;

[0012] 3. The measurement accuracy of the current fluctuations should still allow data transmission at 19200 baud, for example via a LIN data bus interface.

[0013] Prior art

[0014] Modern circuits for automotive control circuits preferably have a three-stage basic structure. In the first stage, such circuits detect the analog quantity whose value is to be evaluated, convert it into an electrical measurement signal, amplify and filter the electrical measurement signal, and sample it and digitize it into a digital measurement signal. Usually, the first stage includes an analog-to-digital converter. Usually, the analog-to-digital converter samples the electrical measurement signal at a sampling rate and a sampling frequency. In the second stage, such circuits process the digital measurement signal into a digital control signal according to the control method. Usually, the second stage includes a microcontroller for processing the digital measurement signal. In the third stage, such circuits convert the digital control signal into an analog control signal. Usually, the third stage includes a digital-to-analog converter, which generates the digital control signal at a maximum conversion rate and a maximum conversion frequency.

[0015] The technical revelation proposed in this article solves the following basic problem: when digitizing the current pulses of the brush commutation of the DC motor, individual current pulses of the brush commutation of the DC motor may be lost and / or may be undersampled. The reason is that the duration of the current pulses of the brush commutation of the DC motor corresponds to the minimum current pulse frequency. As long as the sampling frequency of the analog-to-digital converter in the first stage of the circuit is not greater than twice the current pulse frequency of the current pulses of the brush commutation of the DC motor, the Nyquist theorem is violated and aliasing effects occur, which leads to the loss of individual current pulses of the brush commutation of the DC motor. The first reason is that the microprocessor in the second stage of the circuit is not designed to handle such a high data rate of the analog-to-digital converter. The second reason is that the analog-to-digital converter in the first stage usually cannot provide such a data rate and cannot provide such a high sampling frequency. Usually, more powerful processors and analog-to-digital converters require larger chip areas and require more power, which is usually completely inconsistent with the design goals and increases costs.

[0016] Therefore, solutions known in the prior art are based on analog amplification, analog filtering, analog detection, analog decoupling and digital arbitration.

[0017] Today, DC drives that require precise positioning use absolute sensors such as potentiometers or magnetic angle sensors. Absolute position sensors are expensive, but they provide position feedback once power is applied to them and control the position of the application in a closed-loop control circuit.

[0018] Incremental fluctuation control requires a completely different strategy to provide accurate position feedback for the position of the regulating mechanism of a brushed DC motor drive:

[0019] - the controller of the actuator must determine an initial reference position and a repeated reference position of the positioning of the regulating mechanism of the actuator corresponding to a reference position of the rotor of the brushed DC motor; and

[0020] - The controller of the actuator controls the positioning of the actuator's adjustment mechanism by controlling a brushed DC motor starting from an initial reference position in a typical open-loop control circuit.

[0021] The following issues need to be addressed in particular when using brushed DC motors for positioning drives:

[0022] - The microcontroller cannot rely on the activation time for precise positioning. Therefore, solutions according to the prior art for position control of actuators driven by brushed DC motors usually have to be integrated with an additional physical position sensor (e.g. a potentiometer);

[0023] - In terms of system cost, the current state of the art is to control brushed DC motors and potentiometer sensors via conductive cables through a central unit, which results in corresponding wiring harness weight and complexity; and

[0024] The resulting multiplexing structure and the required precise absolute positioning of the actuator adjustment mechanism often make the system cost prohibitive.

[0025] DC motor-actuator multiplexing is usually affordable only when the cost of the embedded electronics is offset by the reduction in system cost.

[0026] Avoiding the use of position sensors is one of the main reasons for using a multiplexed structure to drive a brushed DC motor. One solution is to perform incremental positioning without using a fluctuation count sensor. In the sense of this document, a fluctuation count sensor is a sensor that detects and counts the commutation pulses in the rotor coil current of a brushed DC motor.

[0027] Such DC motor brush commutation counting devices for wave counting sensors have been used as hardware solutions for sensorless incremental positioning. However, when implemented as micro-integrated circuits, these solutions require increased chip area, resulting in corresponding costs.

[0028] For example, the AN3049 product of Microchip Corporation is known in the prior art.

[0029] The difference between the new technical revelation described in this document and the technical revelation in the AN3049 product datasheet of Microchip is the implementation of counting the current pulses for motor current commutation of a brushed DC motor. This document also uses the English term "Ripple-Count" to briefly describe the counting of current pulses for motor current commutation of a brushed DC motor.

[0030] In the technical disclosure of the product data sheet of Microchip, the motor current is sensed. In the technical disclosure of the product data sheet of Microchip, the subsequent analog filtering is performed by discrete components outside the micro integrated circuit.

[0031] Microchip's product data sheet technical inspiration solves this problem in six steps:

[0032] 1. Motor current signal;

[0033] 2. Motor current detection;

[0034] 3. Signal conditioning level A;

[0035] 4. Signal conditioning level B;

[0036] 5. Comparator stage; and

[0037] 6. Passed to microcontroller.

[0038] In terms of the manner and method of detecting the commutation current pulses of the rotor coil current of a brushed DC motor, the method proposed in this document for filtering the commutation current pulses (fluctuations) of the rotor coil current of a brushed DC motor is very different from the method technically disclosed in the product data sheet of Microchip.

[0039] Pure hardware solutions according to the prior art require some special silicon detector modules. These special detector modules may include, in particular, circuit modules for nonlinear current amplification, sinusoidal and pulse detectors and, for example, arbitration modules. These pure hardware solutions are usually expensive and require a lot of chip space. They also usually require special test equipment in production testing. Summary of the invention

[0040] Task

[0041] It is therefore an object of the present invention to provide a solution which does not have the above-mentioned disadvantages of the prior art and which has other advantages.

[0042] This object is achieved by the technical teachings of the independent claims. Other improved examples may be the subject of the dependent claims.

[0043] Solution to the task

[0044] The proposed solution relates to a preferably computer-implemented method for detecting fluctuations in the rotor current of a brushed DC motor and to an associated device for preferably executing the computer-implemented method and a storage medium and / or memory comprising a program code for a preferably computer-implemented program. A brushed DC motor generally has a rotor of a brushed DC motor that can be powered via at least two terminals of the brushed DC motor. The proposed preferably computer-implemented method generally begins with applying a voltage to at least two terminals of the brushed DC motor by means of the device proposed herein. The rotor current of the brushed DC motor is then preferably detected, for example, by special devices such as shunt resistors, AMR or GMR sensors, Hall plates and their evaluation devices. They detect the rotor current of the brushed DC motor and generate a preferably analog rotor current signal. Here, the value curve of the analog rotor current signal preferably depends on the time curve of the rotor current in a proportional manner or preferably at least according to a linear mapping. Typically, the rotor current signal is then preferably sampled by an analog-to-digital converter of the proposed device, generating a typical binary and / or digitized sampled value, which is, for example, in the form of a digitized rotor current signal. In a further step, the generated sampled values, preferably the sampled values ​​of the digitized rotor current signal, are usually low-pass filtered in the signal level extraction device and / or by the microcontroller. Preferably, the low-pass filtering is performed by a computer-implemented low-pass filtering method, the program code of which is executed by the signal level extraction device and / or the microcontroller in one or more memories and / or one or more storage media of the proposed device. The result of this preferably computer-implemented low-pass filtering is usually low-pass filtered sampled values, which are preferably generated in the form of a filtered digital rotor current signal and are preferably stored in one or more memories and / or one or more storage media of the device. In this case, the generated sampled values, preferably the sampled values ​​of the digitized rotor current signal, usually correspond to the low-pass filtered sampled values ​​of the filtered digital rotor current signal. In a subsequent step, for example, an adder and / or a microcontroller subtracts the low-pass filtered sampled values ​​of the filtered digital rotor current signal, for example, from the sum of the optional offset value and the generated corresponding sampled values ​​of the digital rotor current signal, for example. Preferably, the adder and / or microcontroller performs the subtraction step in the form of a computer-implemented method step in one or more memories and / or one or more storage media of the device. Preferably, the program code for the computer-implemented method step performed by the adder and / or microcontroller is stored in one or more memories and / or one or more storage media of the device. When performing the method step, the proposed device usually generates an internal sampled value, such as an internal sampled value of a fluctuation signal, by a preferably computer-implemented method. Then, the internal sampled value is preferably stored in the memory or storage medium as a stored sampled value. For example, the memory or storage medium can be a FIFO memory.The memory generally comprises a storage unit. The special feature of the technical teaching presented herein is that, for example by means of a microcontroller and / or by means of a pattern recognition device and / or another sub-device of the device, a preferably computer-implemented pattern recognition method is applied to the sampled values ​​stored in the memory or storage medium, in particular the FIFO memory, and then based on the pattern recognition result of the preferably computer-implemented pattern recognition method, it is determined whether there is a fluctuation in the memory or storage medium, in particular the FIFO memory.

[0045] In another embodiment of the preferably computer-implemented method, if there is a fluctuation in the memory or storage medium, in particular the FIFO memory, the fluctuation flag is preferably set by the microcontroller and / or the pattern recognition device, and if there is no fluctuation in the memory or storage medium, in particular the FIFO memory, the fluctuation flag is preferably deleted by the microcontroller and / or the pattern recognition device. This enables the query whether there is a fluctuation at any time.

[0046] Preferably, the device includes a timer. When the fluctuation flag is set, the device preferably stores the time at which the fluctuation occurred in a memory or storage medium. Preferably, an external device can query the state of the fluctuation flag via an external data bus and, if necessary, the time at which the fluctuation occurred. If a computer-implemented neural network model is used, the device can typically also output a value indicating the reliability of the fluctuation identification in addition to the information about the presence of the fluctuation when performing the preferably computer-implemented method. When performing the preferably computer-implemented method, the device can typically also output a value indicating the reliability of the absence of the fluctuation in addition to the information about the absence of the fluctuation. These other devices can then use these values ​​for other control purposes.

[0047] In an embodiment of the proposed, preferably computer-implemented method, the memory is a FIFO memory. This has the advantage that the device can use the history of the value curve of the rotor current values ​​and the values ​​possibly derived therefrom as feature vectors and / or generate feature vectors for use as input information for the preferably computer-implemented pattern recognition.

[0048] In another embodiment of the method, the preferably computer-implemented pattern recognition method, preferably performed by a microcontroller and / or a pattern recognition device, comprises applying and / or executing a preferably computer-implemented neural network model, in particular by means of a microcontroller and / or a pattern recognition device. Here, the input signal of the preferably computer-implemented neural network model comprises a signal with a value from a memory or a storage medium, in particular a storage cell of a FIFO memory. The output signal of the preferably computer-implemented neural network model preferably comprises a control signal for setting and / or deleting a fluctuation flag and / or a signal of a fluctuation flag. In this way, the fluctuation flag is controlled by the preferably computer-implemented AI program. Compared to the threshold value control known from the prior art for setting the fluctuation flag, this is significantly more precise.

[0049] In another embodiment, the proposed preferably computer-implemented method comprises applying the preferably computer-implemented method as described above for detecting fluctuations in the rotor current of a brushed DC motor and counting the detected fluctuations in the rotor current of the brushed DC motor to determine a counter reading with a counting direction. The proposed preferably computer-implemented method then uses the counter reading as a rotor position value. Since fewer undetected commutation pulses are present and the frequency of counting of non-existent commutation pulses is lower, the device is able to determine the rotor position significantly better than the prior art.

[0050] In another embodiment of the method, which is preferably implemented by a computer, the device and / or the microcontroller and / or the pattern recognition device stores internal sample values, such as fluctuation signals, as storage sample values ​​in a memory or storage medium with storage units, in particular a FIFO memory. Preferably, the microcontroller and / or the pattern recognition device at least subtracts a first pair of two storage sample values ​​of two different storage units of the memory (i.e., a first storage sample value of the first storage unit and a second storage sample value of the second storage unit) to form a first differential signal value. Preferably, the microcontroller and / or the pattern recognition device at least subtracts a second pair of two storage sample values ​​of another two different storage units of the memory (i.e., a third storage sample value of the third storage unit and a fourth storage sample value of the fourth storage unit) to form a second differential signal value. Here, the second and third storage units can be identical. Then, the microcontroller and / or the pattern recognition device preferably adds the first differential signal value and the second differential signal value to form a sum value. Then, the microcontroller and / or the pattern recognition device preferably determines whether fluctuations are likely to exist or are likely to exist based on the sum value. This is preferably achieved by comparing the sum value with a threshold value. This has the advantage that the rising and falling edges of the fluctuations produce clear signals. In practice, this is preferably a computer-implemented differentiation, which can provide more dimensions for the subsequent feature vectors used for pattern recognition, thereby increasing the significance of such feature vectors. Therefore, the number of false identifications of non-existent fluctuations and unidentified but present fluctuations is further reduced. When the corresponding device has additionally evaluated other factors, the device according to the technical teaching proposed in this article usually performs the final evaluation of whether the fluctuation is actually present at a later time by means of a preferably computer-implemented method.

[0051] In a further refinement, the microcontroller and / or the pattern recognition device compares the value of the sum value with a first threshold value. This is a particularly simple, preferably computer-implemented method for identifying potential fluctuations. If this is the case, then, when the value of the sum value is above the first threshold value, a fluctuation flag is set, in particular by the microcontroller and / or the pattern recognition device, according to a preferably computer-implemented method, and when the value of the sum value is below the first threshold value, the fluctuation flag is deleted, in particular by the microcontroller and / or the pattern recognition device.

[0052] In another variant of the method, which is preferably implemented by a computer, the microcontroller and / or pattern recognition device stores the sum value as a stored sum value in another memory or storage medium with a storage unit, in particular a high-pass current signal value FIFO, according to the method, which is preferably implemented by a computer. Therefore, the historical record of the sum value can also be used for pattern recognition or the method, which is preferably implemented by a computer. Therefore, the microcontroller and / or pattern recognition device preferably applies a corresponding other preferably computer-implemented pattern recognition method to the sum value stored in another memory or storage medium according to the method, which is preferably implemented by a computer, and preferably determines whether there is a fluctuation in another memory or storage medium by means of a typical computer-implemented method. Here, when preferably using the method, which is preferably implemented by a computer, the microcontroller and / or pattern recognition device preferably considers other values ​​of other feature vectors. Therefore, the recognition performance of the preferably computer-implemented fluctuation recognition is further improved.

[0053] If there is a fluctuation in the other memory or storage medium, the microcontroller and / or the pattern recognition device preferably sets another fluctuation flag, and / or deletes the other fluctuation flag if there is no fluctuation in the other memory or storage medium. By means of the fluctuation flag and the other fluctuation flag, the external device can identify the reason why the device identified the fluctuation when accessing these flags.

[0054] Preferably, the further memory or storage medium further comprises a further FIFO memory. The function of the FIFO memory in the sense of this document will be described in more detail below. As mentioned above, the FIFO memory provides a history record for pattern recognition.

[0055] According to a further improvement example, the microcontroller and / or the pattern recognition device preferably performs another preferably computer-implemented pattern recognition method, wherein, in this further improvement example, the another preferably computer-implemented pattern recognition method comprises applying another preferably computer-implemented neural network model. Preferably, the input signal of the another preferably computer-implemented neural network model comprises a signal with a value from a storage unit of another memory or storage medium. Preferably, the output signal of the another preferably computer-implemented neural network model comprises a control signal for setting and / or deleting another fluctuation flag and / or a signal of another fluctuation flag. Therefore, the preferably computer-implemented neural network model can signal an external device with higher accuracy to notify the fluctuation recognition or the absence of fluctuation in the rotor current signal.

[0056] As an application of an improved device and an improved, preferably computer-implemented method for fluctuation identification, the present document proposes a method or a device extension for determining the rotor position of a rotor of a brushed DC motor in the form of a rotor position value. The present document proposes using the above-described, preferably computer-implemented method for detecting fluctuations in the rotor current of a brushed DC motor or using a device using this preferably computer-implemented method, and determining the detected fluctuations in the rotor current of the brushed DC motor by means of a microcontroller or a counter by determining the counter reading and applying the counting direction. Preferably, the device and / or a superordinate device then uses this counter reading as the rotor position value.

[0057] The technical teaching of this document proposes a device preferably having a micro-integrated circuit 592. Preferably, the micro-integrated circuit 592 comprises a microcontroller 501 and suitable other means (505, 510, 511, 593, 516, 509, 508, 591), in particular one or more FIFO memories, so as to better identify the commutation pulses in the simulated rotor current signal of the rotor current of the brushed DC motor 103 when there are commutation pulses in the simulated rotor current signal 107 by means of a pattern recognition method preferably implemented by a computer, and to avoid erroneous identification of such commutation pulses with higher reliability when there are no commutation pulses. Therefore, this is improved in the following aspects:

[0058] First, the frequency of erroneous identification of commutation pulses as so-called commutation pulses that are not present in the simulated rotor current signal 107 is known in English terminology as the "False Acceptance Rate"; and

[0059] Secondly, there is the frequency of commutation pulses that are erroneously not recognized that are actually present in the simulated rotor current signal 107, which is referred to as the "False Rejection Rate".

[0060] Preferably, according to the technical teachings described in this document, a computer core, for example in the form of a microcontroller 501, executes program data (513, 515, 517, 520, 525, 530, 535, 540, 550, 565, 567, 570, 575, 580, 585, 595, 596, 597) of a preferably computer-implemented method, which are stored in a memory 509 or storage medium of the proposed device. The brushed DC motor 103 typically generates an analog rotor current signal 107 of the brushed DC motor 103, whose instantaneous value preferably corresponds to the instantaneous value of the current through the excitation coil of the brushed DC motor 103. Preferably, the brushed DC motor 103 includes means 105 for detecting the rotor current values ​​of the brushed DC motor 103 and generating the analog rotor current signal 107 based on these detected rotor current values ​​of the brushed DC motor 103. This is typically the means 105 for detecting the current through the excitation coil of the brushed DC motor 103. For example, these means may include a shunt resistor, which is inserted into the power supply line of the rotor brushes, and the H-bridge 5 supplies power to the brushed DC motor 103 through the shunt resistor. Instead of the H-bridge 5, the device may also have a half-bridge for supplying power to the brushed DC motor 103. Instead of the H-bridge 5, the device may also have a voltage and / or current supply for supplying power to the brushed DC motor 103. In this regard, the H-bridge 5 in this document generally represents the output stage of the device for supplying power to the brushed DC motor 103. The proposed device in the technical revelation of this document uses current sensing and digitization of a microcontroller 501 connected to the proposed device in the first stage 10 of the proposed device. Preferably, the first stage 10 includes an analog-to-digital conversion 110 by means of an analog-to-digital converter 510. In this case, the first stage 10 preferably generates a digitized rotor current signal 113 from the analog rotor current signal 107 of the brushed DC motor 103. The proposed device in the technical teaching of this document uses an analysis device 20 in the second stage 20 of the device, which is used to analyze the time curve of the motor current of the brushed DC motor 103 in the form of the detected digitized rotor current signal 113. The second stage 20 of the device can also be called an analysis device 20. This analysis can also be called current waveform analysis. In this case, the analysis device 20 generates a fluctuation recognition signal 175 from the digitized rotor current signal 113 of the brushed DC motor 103 by means of a preferably computer-implemented method. Preferably, the current value of the fluctuation recognition signal 175 signals the system consisting of the first stage 10 and the analysis device 20 whether a pulse waveform corresponding to the fluctuation caused by the commutation of the brushed DC motor 103 is recognized in the digitized rotor current signal 113 of the brushed DC motor 103. In the subsequent third stage 30, the proposed device preferably processes the time value curve of the fluctuation recognition signal 175 by a preferably computer-implemented method and, for example, counts the number of detected fluctuations.Preferably, the third stage 30 of the proposed device comprises a counter 180 which counts the pulses of the fluctuation identification signal 175 and thus generates a rotor position signal 185 .

[0061] Preferably, the microcontroller 501 simulates the functionality of the first stage 10, the second stage 20 and the third stage 30 by executing one or more programs in its program memory 509 by means of a preferably computer-implemented method. Typically, the analog circuit parts of the first stage 10 and the functionality 110 of the analog-to-digital converter 510 are not included in this preferably computer-implemented simulation of the microcontroller 501. However, this simulation of the microcontroller 501 uses the analog circuit parts of the first stage 10 and the digital output data of the analog-to-digital converter 510. In the sense of the present document, a sub-device of the claimed device is considered to be present if a computer core (e.g., the microcontroller 501) is able to simulate the functionality of the sub-device of the claimed device at least temporarily (e.g., in a time-multiplexed manner with other functions), for example, by means of a preferably computer-implemented method.

[0062] The device proposed herein optimizes the hardware-specific wave counting silicon module in the device according to the prior art. The preferably software-based solution of simulating the device components by using preferably computer-implemented methods with the aid of a microcontroller 501 is generally a low-cost solution. It can be easily embedded in and simulated by any microcontroller 501 with sufficient computing power.

[0063] The technical teaching of this document is particularly suitable for use in an actuator that uses a brushed DC motor 103 as an actuating drive for a positioning system of the actuator. The technical teaching of this document proposes that if the micro-integrated control circuit 592 of the brushed DC motor 103 of the actuator includes a microcontroller 501 or a similar device, the cost of the positioning system of the brushed DC motor 103 of the actuator can be reduced to zero. When the term "microcontroller 501" is used in this document, functionally equivalent device components are included. The present invention utilizes the computing power of the corresponding microcontroller 501 to digitize the current waveform of the rotor current of the brushed DC motor 103 into a digitized rotor current signal 113 during fast sampling, and to identify and count the current fluctuations of the sampled values ​​of the detected digitized rotor current signal 113 by means of a preferably computer-implemented method during commutation of the rotor current of the brushes of the brushed DC motor 103. During power commutation of the brushed DC motor 103, the current fluctuations of the sampled values ​​in the digitized rotor current signal 113 are usually displayed in the form of current pulses in the time curve of the sampled values ​​in the digitized rotor current signal 113. In the following text, this document also refers to these current pulses in the time curve of the sampled values ​​in the digitized rotor current signal 113 as ripples.

[0064] Typically, the proposed device uses an H-bridge driver to drive the excitation coil of the rotor of the brushed DC motor 103. For example, the proposed device can operate the brushed DC motor 103 by PWM modulated DC motor voltage control. For example, the PWM modulation here can be a modulation with a PWM fixed frequency and a variable duty cycle. When the commutation brushes of the commutator of the brushed DC motor 103 are not commutating, the inductance of the rotor coil generally smoothes the rotor current.

[0065] In the following, this document describes a preferably computer-implemented method for detecting fluctuations in the motor current of a brushed DC motor 103, in which the brushed DC motor 103 comprises a rotor with associated rotor coils, which rotor can be powered via at least two terminals of the brushed DC motor 103. Of course, it is conceivable that the exemplary brushed DC motor 103 has additional terminals. A brushed DC motor 103 with more than two terminals is also a brushed DC motor 103 with two terminals in the sense of this document and is therefore explicitly included in the present disclosure and claims.

[0066] The counting of commutation pulses (ripples) by software of a preferably computer-implemented method performed by a microcontroller 501 and by preferably computer-implemented pattern recognition performed by the microcontroller 501 proposed in this document uses DC motor voltage control by fixed frequency PWM to preferably sample the rotor current entering the brushed DC motor 103 from the H-bridge driver 5. The first stage 10 of the proposed device performs current sampling of the analog rotor current signal 107, for example, by analog-to-digital conversion 110 in an analog-to-digital converter 510, and, if necessary, typically generates a digitized rotor current signal 113 after digital post-processing in a digital filter and / or preferably computer-implemented filtering method, etc. For example, the first stage 10 of the proposed device can perform current sampling of the analog rotor current signal 107 by using mirror current measurement through the analog-to-digital converter 510.

[0067] Thus, the preferably computer-implemented method proposed herein performed by the proposed device starts with applying a voltage of a voltage signal 7 of the H-bridge 5 to at least two terminals of the brushed DC motor 103 through the H-bridge 5 of the proposed device. Preferably, the microcontroller 501 and / or the sub-devices (505) of the proposed device controlled by the microcontroller 501 control and / or influence the H-bridge 5 and thus the voltage signal 7 of the H-bridge 5, by which the H-bridge 5 supplies power to the brushed DC motor 103. Preferably, the sub-devices (505) controlled by the microcontroller 501 through the preferably computer-implemented method include an H-bridge controller 505, which controls the H-bridge 5 or its functional equivalent components described above through an H-bridge control signal 506. Thus, the proposed H-bridge controller 505 preferably controls the brushed DC motor 103 through the H-bridge control signal 506. Preferably, the H-bridge controller 505 receives information about the status of the H-bridge 5 and its sub-devices via an H-bridge status line 507. Preferably, the H-bridge controller 505 controls the H-bridge 5 or its functional equivalent as a function of the signal of the H-bridge status line 507 and the value received by the H-bridge controller 505 from the microcontroller 501 preferably via the internal data bus 516 of the micro-integrated control circuit. The device proposed herein detects the rotor current of the brushed DC motor 103 as a rotor current signal 107 in its first stage 10 and generates a typical internal simulated rotor current signal 107 internally by amplification and / or filtering, which thus depends on the time curve of the rotor current of the brushed DC motor 103.

[0068] If necessary, the proposed device amplifies and filters the simulated rotor current signal 107 in the first stage 10 to form a filtered simulated rotor current signal.

[0069] For example, the proposed device samples the analog rotor current signal 107 and / or the filtered analog rotor current signal in its first stage 10 by means of an analog-to-digital converter 510 to produce a sampled value. When performing this analog-to-digital conversion 110 in the analog-to-digital converter 510, the proposed device generally produces a digitized rotor current signal 113. Preferably, the digitized rotor current signal 113 can be a digital rotor current signal storage area 513 in the memory 509 of the microintegrated circuit 592, which the microcontroller 501 accesses via an internal data bus 516 when executing the preferably computer-implemented method. Preferably, the proposed device temporarily stores the digitized rotor current signal 113 in its first stage 10, for example by storing 115 in a current register 515, and thus produces a stored rotor current signal value 117. Preferably, the stored rotor current signal value 117 may be a rotor current signal value memory 517 in a memory 509 of the microintegrated circuit 592 or in a storage medium, which the microcontroller 501 accesses via an internal data bus 516 when executing the preferably computer-implemented method. Preferably, the current register 515 is a storage area 509 of the microintegrated circuit 592. In the sense of the present document, the current register 515 may be considered as part of the first stage 10 and / or the second stage 20.

[0070] If necessary, the second stage 20 of the proposed device, which is located downstream of the first stage 10 on the signal path, also filters and processes the detected sampled values ​​of the digitized rotor current signal 113 of the first stage 10 in the form of a time curve of the stored rotor current signal value 117 by a preferably computer-implemented method. To this end, the device preferably stores the detected sampled values ​​of the digitized rotor current signal 113 of the first stage 10 in the current register 515 by storing 115. Preferably, the current register 515 provides one or more detected sampled values ​​135 of the digitized rotor current signal 113 of the first stage 10 stored therein for processing in subsequent sub-devices of the proposed device. Preferably, the processing of the second stage 20 is linear mapping, filtering and other signal operations in signal processing technology by a preferably computer-implemented method. Preferably, one of the filtering is a low-pass filtering. The purpose of this low-pass filtering is to separate fluctuations from the signal background of the digitized rotor current signal 113. In this way, the second stage 20 of the proposed device generates a digital output variable with a time curve in the form of a possibly filtered digital rotor current signal 113 in the form of the values ​​of the stored rotor current signal values ​​117 based on the sampled value sequence of the analog rotor current signal 107. After sampling the analog rotor current signal 107 to generate the sampled values ​​of the digital rotor current signal 113, the generated sampled values ​​of the digital rotor current signal 113 are preferably low-pass filtered in a signal level extraction 120, for example by means of a preferably computer-implemented signal level extraction program 520, for example by a microcontroller 501, to form low-pass filtered sampled values ​​of the filtered digital rotor current signal 197. These low-pass filtered sampled values ​​of the filtered digital rotor current signal 197 generally represent the current signal level 197 in the absence of commutation fluctuations of the analog rotor current signal 107 of the brushless DC motor 103. In this case, each generated sampled value 135 of the digital rotor current signal 113, which is preferably stored in the current register 515, preferably corresponds to a low-pass filtered sampled value of the filtered digital rotor current signal 197.

[0071] The preferably computer-implemented method proposed herein, performed by the proposed device, proposes that the low-pass filtered negative sampled values ​​of the filtered digital rotor current signal 197 and the offset value in the form of the optional initialization parameter 125 are added to the corresponding sampled values ​​135 of the digital rotor current signal 113, for example by adding in an adder 123 by means of a preferably computer-implemented method, to produce the internal sampled values ​​196. This corresponds to subtracting the low-pass filtered sampled values ​​of the filtered digital rotor current signal 197 from the sum of the offset value in the form of the optional initialization parameter 125 and the corresponding sampled values ​​135 of the digital rotor current signal 113, to produce the internal sampled values ​​196. Thus, the adder 123 forms the fluctuation signal 196 from the internal sampled values ​​by means of the initialization parameter 125 (e.g. as an offset) by means of the preferably computer-implemented method from the corresponding values ​​of the filtered digital rotor current signal 197 and the corresponding values ​​of the digital rotor current signal 113. For example, the microcontroller 501 can perform this addition of the adder 123 by means of a preferably computer-implemented method. Preferably, the fluctuation signal 196 can be stored in a fluctuation storage location 596 in the memory 509 of the micro integrated circuit 592, and the microcontroller 501 accesses the fluctuation storage location 596 via the internal data bus 516 when executing the preferably computer-implemented method. The low-pass filtered sampled values ​​197 basically represent the time value curve of the digital rotor current signal 113 when there is no fluctuation of the rotor current brush commutation of the analog rotor current signal 107 of the brushless DC motor 103. Therefore, the purpose of performing such a subtraction in the adder 123, for example by the preferably computer-implemented method, is to separate the fluctuation from the actual rotor current value curve of the digitized rotor current signal 113 and generate the fluctuation signal 196. Therefore, this step can be regarded as a step for separating the digitized fluctuation signal 196.

[0072] The technical teaching of this document proposes storing the internal sampled values ​​of the fluctuation signal 196 in the memory 509 or storage medium of the device, for example, at the fluctuation storage location 596 in the memory 509 or storage medium of the micro-integrated circuit 592. Preferably, the memory 509 or storage medium includes a FIFO memory 165. Typically, the FIFO storage area 565 of the memory 509 or storage medium of the micro-integrated circuit 592 forms a storage area of ​​the FIFO memory 165. Preferably, the microcontroller 501 of the micro-integrated circuit 592 operates the FIFO storage area 565 as the FIFO memory 165.

[0073] In the sense of this document, a FIFO memory generally includes m storage units for storing values in the FIFO memory. Preferably, these storage units are part of the memory 509 of the micro integrated circuit 592 or a storage medium. The storage units of each FIFO memory (e.g., 160, 165) can generally be numbered from 1 to m. Here, m is generally a positive integer greater than 1. If the microcontroller 501 of the proposed device wants to write a new value into such a FIFO memory, the relevant FIFO memory generally deletes the content of its m-th storage unit. Hereinafter, j is a positive integer and 0 < j < m. Starting from the (m - 1)-th storage unit (i.e., j = m - 1), the control device of the relevant FIFO memory copies the content of the j-th storage unit of the relevant FIFO memory to the (j + 1)-th storage unit of the relevant FIFO memory, and its previous content is generally overwritten and / or deleted. Then, the control device moves to the (j - 1)-th storage unit of the FIFO memory, so this storage unit becomes the new j-th storage unit of the relevant FIFO memory, and copies the content of this new j-th storage unit of the relevant FIFO memory to the new (j + 1)-th storage unit of the relevant FIFO memory, and this new (j + 1)-th storage unit corresponds to the old j-th storage unit of the relevant FIFO memory. The control device of the relevant FIFO memory continues in this way until all the contents of the relevant FIFO memory are shifted forward by one memory location in the direction of the m-th memory location in this way. Thus, the first storage unit of the relevant FIFO memory becomes free, and the control device of the relevant FIFO memory can deposit the new value to be stored into the first storage unit of the relevant FIFO memory. The storage units of the relevant FIFO memory can be located in a sub-address area (Teil-Adressbereich) of the memory 509 of the microcontroller 501 of the device. The microcontroller 501 can be the control device of the relevant FIFO memory (e.g., 160, 165), or the control device of the relevant FIFO memory can include the microcontroller 501. This behavior of the relevant FIFO memory can also be implemented in a functionally equivalent manner by, for example, changing the write and read pointers in a similar way within the scope of a preferably computer-implemented method. Finally, the relevant FIFO memory (e.g., 165, 160) assumes the function of a shift register for the relevant values in the sense of this document. This also applies to the average high-pass current signal value FIFO 160, which is generally also such a FIFO memory in the sense of this document.

[0074] Preferably, the memory 509 of the device comprises a storage unit. Preferably, the memory 509 is a storage area of ​​a read / write memory of the microcontroller 501 of the device. Preferably, the microcontroller 501 of the device stores the internal sampled value of the fluctuation signal 196 as a storage sampled value in the fluctuation storage location 596 and / or the fluctuation storage area 596 in the memory 509 of the micro integrated circuit 592.

[0075] The technical revelation of the present document now proposes that, instead of inferring fluctuations in the FIFO storage area 565 of the FIFO memory 165 by comparing the numerical value of the sampled values ​​stored in the fluctuation storage area 596 with a threshold or by comparing the numerical value of the sampled values ​​stored in the fluctuation storage area 596 with a threshold as in the prior art, for example by means of a preferably computer-implemented method, a more advanced method is used to identify fluctuations.

[0076] In particular, the present document proposes that the microcontroller 501 of the proposed device executes a preferably computer-implemented program for pattern recognition in the FIFO storage area 565 of the FIFO memory 165 and / or in the high-pass current signal value FIFO storage area 560 of the average high-pass current signal value FIFO 160. Preferably, the instruction code of the program is stored in the memory 509 or storage medium of the microelectronic circuit 592. Preferably, the microcontroller 501 accesses the program data and the instruction code of the program in the memory 509 or storage medium of the microelectronic circuit 592 of the device via the internal data bus 516. In the process of executing such a program for preferably computer-implemented pattern recognition in the stored sampled values, the microcontroller 501 of the device can also use hardware acceleration blocks here, for example, to increase the computing power and / or reduce the power consumption, without giving up the load. Therefore, the preferably computer-implemented method in the sense of the present document can be explicitly performed partly or completely by a special hardware circuit. Therefore, the technical revelation of the present document proposes to apply a preferably computer-implemented pattern recognition method executed by the microcontroller 501 of the device to the sampled values ​​stored in the FIFO storage area 565 of the FIFO memory 165 and / or the high-pass current signal value FIFO storage area 560 of the average high-pass current signal value FIFO 160 by the microcontroller 501 of the device. In addition, the technical revelation of the present document proposes, for example, by a preferably computer-implemented method, to determine whether there is a fluctuation in the FIFO storage area 565 of the FIFO memory 165 and / or the high-pass current signal value FIFO storage area 560 of the average high-pass current signal value FIFO 160. That is, the technical revelation of the present document proposes that the microcontroller 501 of the proposed device, for example, by a preferably computer-implemented method, determines whether the sampled values ​​in the FIFO storage area 565 of the FIFO memory 165 and / or the high-pass current signal value FIFO storage area 560 of the average high-pass current signal value FIFO 160 include fluctuating sampled values.

[0077] For example, the microcontroller 501 can form a dynamic threshold signal, for example by a preferably computer-implemented method, based on the filtered sampled values ​​of the filtered digital rotor current signal 197 in the storage area 597 of the filtered sampled values ​​of the filtered digital rotor current signal 197 and / or based on the sampled values ​​of the digital rotor current signal 113 in the digital rotor current signal storage area 513 in the memory 509 of the microintegrated circuit 592, and compare the internal sampled value of the fluctuation signal 196 in the fluctuation storage location 596 for the fluctuation signal 196 in the memory 509 or storage medium of the microintegrated circuit 592 with the dynamic threshold signal. In this way, the microcontroller 501 can generate a dynamic comparison result, for example by a preferably computer-implemented method, and use it together with the internal sampled value of the fluctuation signal 196 and / or the sampled value stored in the FIFO memory 165 of the device and / or the average high-pass current signal value FIFO 160 as an input value of the preferably computer-implemented pattern recognition program executed by the microcontroller 501. The program data and instruction codes of the preferably computer-implemented pattern recognition program are preferably again located in the memory 509 or storage medium of the micro-integrated circuit 592 of the device, so that the microcontroller 501 can access the program data or instruction codes of the preferably computer-implemented pattern recognition program via the internal data bus 516. Therefore, this method represents a combination of the previous analog methods and now digital methods in the prior art with the program proposed herein for preferably computer-implemented pattern recognition used by the microcontroller 501 of the device. This can combine the advantages of both methods and improve the quality of the fluctuation recognition results of the device. This minimizes the number of signal structures that are mistakenly recognized as fluctuations by the device and the number of fluctuations that are not recognized by the device.

[0078] One idea is to modify the fluctuation count signal appropriately so that digital processing can be performed using a conventional microprocessor 501 without potential data loss despite the limited computational power of the microcontroller 501 .

[0079] The proposed device reduces the amplitude of the sampled values ​​of the measured analog rotor current signal 107 in its first stage 10. Preferably, the analog-to-digital converter 510 used for the analog-to-digital conversion 110 has a bit width of 16 bits or similar. If necessary, the analog-to-digital converter 510 can use an oversampling method in the analog-to-digital conversion 110 to achieve the necessary bit width. Preferably, the microcontroller 501 filters the sampled values ​​of the digitized rotor current signal 113 in the digital rotor current signal storage area 513 in the memory 509 or storage medium of the microintegrated circuit 592 into the filtered sampled values ​​of the filtered digital rotor current signal 197, for example, the low-pass filtered sampled values ​​of the filtered digital rotor current signal 197 in the storage area 597, by a preferably computer-implemented low-pass filtering procedure for the signal level extraction 120 in the analog signal level extraction device 520. The proposed device can also perform this low-pass filtering by a low-pass filter implemented in hardware of the microelectronic circuit 592, for example, the low-pass filter is controlled by the microcontroller 501 or other suitable sub-device of the proposed device in a preferably computer-implemented method. In this case, the microcontroller 501 preferably uses this low-pass filter implemented in hardware when executing the preferably computer-implemented low-pass filtering program. The program data of the preferably computer-implemented low-pass filtering program are preferably again located in the memory 509 or storage medium of the micro-integrated circuit 592 of the device, so that the microcontroller 501 can access the program data and / or instruction code of the preferably computer-implemented low-pass filtering program via the internal data bus 516. Preferably, the low-pass filtering of the digital preferably computer-implemented signal level extraction 120 uses the low-pass filtered sampled values ​​of the filtered digital rotor current signal 197, the adjustable start parameters in the form of initialization parameters 125, and the adjustable offset parameters. Preferably, the initialization parameters 125 are located in the initialization parameter storage area 525 of the memory 509 or storage medium of the micro-integrated circuit 592, so that the microcontroller 501 can access these initialization parameters 125 via the internal data bus 516. Preferably, the offset parameters are located in the offset parameter storage area of ​​the memory 509 or storage medium of the micro-integrated circuit 592, so that the microcontroller 501 can access these offset parameters via the internal data bus 516. When forming the internal sampled values ​​of the fluctuation signal 196, the fluctuation structure of the signal is retained in the internal sampled values ​​in the fluctuation storage area 596 for the fluctuation signal 196 in the memory 509 or storage medium of the microintegrated circuit 592. The device and in particular its microcontroller 501 can generally further digitally process the internal sampled values ​​of the fluctuation signal 196 formed in this way, for example by a preferably computer-implemented method. Preferably, the internal sampled values ​​of the fluctuation signal 196 in the fluctuation storage area 596 for the fluctuation signal 196 in the memory 509 or storage medium of the microintegrated circuit 592 have a bit width of only 8 bits.The bit width of the internal sampled values ​​of the fluctuation signal 196 is thus preferably reduced compared to the bit width of the sampled values ​​of the digital rotor current signal 113. This reduces the necessary hardware costs for the FIFO storage area 565 of the FIFO memory 165 and / or for the high-pass current signal value FIFO storage area 560 of the average high-pass current signal value FIFO 160. This also significantly reduces the hardware costs required for further processing. Preferably, the FIFO memory 165 for the internal sampled values ​​of the fluctuation signal 196 and / or the memory of the average high-pass current signal value FIFO 160 is designed as a FIFO memory in the sense of this document. Therefore, these internal sampled values ​​of the fluctuation signal 196 usually form the input signal of the FIFO memory.

[0080] Preferably, the device and in particular the microcontroller 501 of the device stores the internal sampling values ​​of the fluctuation signal 196 as a single data point (stored sampling value) of the reduced fluctuation count signal in the FIFO storage area 565 of the FIFO memory 165 within the device's memory 509 or storage medium.

[0081] Preferably, each time an internal sampled value of the fluctuation signal 196 is stored in the FIFO memory 165, the logical position of the sampled value stored in the FIFO memory 165 is shifted by one position as in a shift register.

[0082] Preferably, the device and / or the microcontroller 501 of the device executes a program for performing a preferably computer-implemented pattern recognition of a predetermined sampled value pattern in the sampled values ​​stored in the FIFO memory 165 of the device and / or in the average high-pass current signal value FIFO 160. Preferably, the program data of the program for performing a preferably computer-implemented pattern recognition of a predetermined sampled value pattern is again located in the memory 509 or storage medium of the microintegrated circuit 592 of the device, so that the microcontroller 501 can access the program data or instruction code of the program for performing a preferably computer-implemented pattern recognition of a predetermined sampled value pattern via the internal data bus 516. By executing such a program for preferably computer-implemented pattern recognition, the device and / or the microcontroller 501 of the device performs a preferably computer-implemented pattern recognition method, which detects fluctuations in the internal sampled values ​​stored in the FIFO memory 165 and / or in the sampled values ​​stored in the average high-pass current signal value FIFO 160 of the device. Preferably, the device proposed in this article and / or the microcontroller 501 of the device proposed in this article compares the bit-width reduced current signal value 195 stored in the FIFO memory 165 of the device and / or the average high-pass current signal value 198 stored in the average high-pass current signal value FIFO 160 of the device with each other through a method preferably implemented by a computer.

[0083] The proposed device and / or the microcontroller 501 of the proposed device can recognize the pattern of the predetermined pulse waveform as the fluctuation of the brush commutation of the brush DC motor 103 by executing the program for preferably computer-implemented pattern recognition. Here, the proposed device and / or the microcontroller 503 of the proposed device executes a preferably computer-implemented pattern recognition program, which applies the preferably computer-implemented pattern recognition to the sampled values ​​stored in one or more FIFO memories (160, 165) and / or other memories of the device. Here, the proposed device and / or the microcontroller 501 of the proposed device preferably executes a preferably computer-implemented pattern recognition program, which applies the preferably computer-implemented pattern recognition to the bit-width reduced current signal values ​​195 stored in the FIFO memory 165 of the device and / or the average high-pass current signal values ​​stored in the average high-pass current signal value FIFO 160 of the device. Preferably, the proposed device and / or the microcontroller 501 evaluates the signal waveform of the signal portion of the sampled values ​​stored in the FIFO memory 165 and / or the average high-pass current signal value FIFO 160 of the device or in another memory or storage medium of the device. Preferably, the proposed device and / or the microcontroller 501 of the proposed device determines the pulse waveform of the potential fluctuation in the sampled values ​​stored in the FIFO memory 165 and / or the average high-pass current signal value FIFO 160 of the device (or in the relevant memory of the proposed device) in this way, for example, by a preferably computer-implemented method. Preferably, the proposed device and / or the microcontroller 501 of the proposed device classifies the pulse waveform of the potential pulse in the sampled values ​​stored in the FIFO memory 165 and / or the average high-pass current signal value FIFO 160 of the device or in another memory of the proposed device, for example, by a preferably computer-implemented method. By evaluating and / or classifying the pulse waveform with the help of this preferably computer-implemented exemplary method, the proposed device and / or the microcontroller 501 can determine whether it is a signal from the brushed DC motor 103 or an "external signal". For example, such an external signal may be a signal coupled into the equipment circuit via EMC.Thus, the technical teachings presented herein avoid the loss of fluctuations or the false identification of fluctuations where no fluctuations exist.

[0084] The technical implications presented herein enable the identification of the "external signals" themselves and then filtering them out and / or ignoring or skipping them.

[0085] a. Therefore, a first special feature of the technical teaching proposed herein is that a preferably computer-implemented pattern recognition method for fluctuation identification is performed by the proposed device and / or by the microcontroller 501 of the proposed device. On the one hand, this increases the probability of correctly identifying fluctuations that are actually present in the simulated rotor current signal 107. On the other hand, this also reduces the false identification of fluctuations that are not present in the simulated rotor current signal 107.

[0086] b. Here, a second special feature is that the detected current value is preprocessed (feature extraction) by the microcontroller 501 of the device or the proposed device, for example by a preferably computer-implemented method. The proposed device or the microcontroller 501 of the proposed device executes a program for performing the preprocessing (also called feature extraction) in a preferably computer-implemented manner in order to increase the significance. The preferably computer-implemented preprocessing program is preferably stored in the memory 509 or storage medium of the microintegrated circuit 592, so that, for example, the microcontroller 501 can access the program data and / or instruction codes of the preferably computer-implemented preprocessing program. For example, the preferably computer-implemented preprocessing can include, for example, differentiation, filtering, etc. Therefore, the preferably computer-implemented preprocessing program can include corresponding differentiation programs and / or filtering programs and / or other subroutines, in particular for preferably computer-implemented signal processing. In this way, the proposed device and / or the microcontroller 501 of the proposed device generally generates a feature vector from the sampled values ​​of the analog rotor current signal 107 or from the digitized rotor current signal 113. These feature vectors typically form input values ​​for a preferably computer-implemented pattern recognition program executed by the proposed device and / or the microcontroller 501 of the proposed device. The preferably computer-implemented feature extraction program can also be regarded as a part of the preferably computer-implemented pattern recognition program. The preferably computer-implemented feature extraction program and / or the preferably computer-implemented pattern recognition program is preferably stored in the memory 509 or storage medium of the microintegrated circuit 592, so that, for example, the microcontroller 501 can access program data and / or instruction codes of the preferably computer-implemented feature extraction program and / or the preferably computer-implemented pattern recognition program.

[0087] c. The third special feature of the technical teaching proposed in this document is the use of FIFO memory (e.g., 160, 165). The proposed device or the microcontroller 501 of the proposed device preferably operates the memory or the storage area of ​​the memory or storage medium of the device as a virtual shift register, in particular operates the FIFO memory 165 of the device and / or the average high-pass current signal value FIFO 160. In other words: the proposed device or the microcontroller 501 of the proposed device, for example, by a preferably computer-implemented method, preferably operates the FIFO storage area 565 of the FIFO memory 165 and / or the high-pass current signal value FIFO storage area 560 of the average high-pass current signal value FIFO 160 as a virtual shift register. If the newly added internal sampled value is to be stored in the storage area of ​​the relevant FIFO memory, the proposed device and / or the microcontroller 501 of the proposed device discards the oldest sampled value stored in the relevant FIFO memory of the device. As mentioned above, the relevant FIFO memory can also be just a storage area in the memory 509 or storage medium of the device. The proposed device and / or the microcontroller 501 of the proposed device usually modifies the logical content of the relevant FIFO memory so that the previous second oldest sampled value stored in the relevant FIFO memory is now the oldest sampled value stored in the relevant FIFO memory, and the latest sampled value in the relevant FIFO memory is now the second latest sampled value stored in the relevant FIFO memory. Therefore, the sampled value stored in the relevant FIFO memory is just moved forward by one virtual position in the relevant FIFO memory. Therefore, the first storage position in the relevant FIFO memory is released for the latest stored sampled value. The proposed device or the microcontroller of the proposed device stores the newly added internal sampled value in this first free storage position of the relevant FIFO memory, for example by a preferably computer-implemented method. Therefore, the newly added internal sampled value becomes the latest sampled value stored in the relevant FIFO memory. The proposed device and / or the microcontroller 501 of the proposed device use the sampled values ​​stored in the relevant FIFO memory when, for example, executing a preferably computer-implemented program for preferably computer-implemented feature extraction and / or for preferably computer-implemented pattern recognition by the microcontroller 501. It is conceivable that the proposed device and / or the microcontroller 501 of the proposed device has executed a program for extracting the feature vector, preferably computer-implemented, before storing the internal sampling value of the fluctuation signal 196 in the fluctuation storage area 596 for the fluctuation signal 196 in the memory 509 of the microintegrated circuit 592.Then, the proposed device and / or the microcontroller 501 of the proposed device preferably generates a feature vector (in the form of, for example, an average high-pass current signal value 198 (e.g., in the storage area 598 of the average high-pass current signal value 198) for each internal sampled value in the fluctuation storage area 596 of the fluctuation signal 196 in the memory 509 or storage medium of the microintegrated circuit 592, and the device can store this feature vector together with the internal sampled values ​​of the fluctuation signal 196 as stored sampled values ​​in one or more FIFO memories (e.g., FIFO memory 165 and / or average high-pass current signal value FIFO 160). Therefore, in this sense, the stored sampled values ​​may include the stored values ​​of the internal sampled values ​​of the fluctuation signal 196 and the stored values ​​of the first feature vector (e.g., the average high-pass current signal value 198), as well as other feature vectors that may be extracted in different ways from the digitized rotor current signal 113. It is conceivable that the proposed device and / or the microcontroller 501 of the proposed device then executes a second program for generating a second feature vector based on these stored sampled values ​​in a preferably computer-implemented manner. Preferably, the program data of the second program for the preferably computer-implemented extraction of the second feature vector are also stored in the memory 509 of the device, so that, for example, the microcontroller 501 can access the program data and / or instruction codes of the program via the internal data bus 516 of the microintegrated circuit 592. It is conceivable that the proposed device and / or the microcontroller 501 of the proposed device then repeatedly executes an additional program for generating additional feature vectors, respectively, based on these stored sample values ​​in a preferably computer-implemented manner. Preferably, the program data and / or instruction codes of the additional program for the preferably computer-implemented extraction of the additional feature vector are also stored in the memory 509 or storage medium of the device, so that, for example, the microcontroller 501 can access the program data and / or instruction codes of the additional program via the internal data bus 516 of the microintegrated circuit 592. It is conceivable that the proposed device and / or the microcontroller 501 of the proposed device uses these additional feature vectors and / or second feature vectors and / or stored sample values ​​and / or internal sample values ​​to execute a program for preferably computer-implemented pattern recognition in order to recognize pulses and / or fluctuations and to classify them. Preferably, program data and / or instruction codes of this program for preferably computer-implemented pattern recognition and for preferably computer-implemented classification are also stored in the memory 509 or storage medium of the device, so that, for example, the microcontroller 501 can access the program data and / or instruction codes of this program for preferably computer-implemented pattern recognition and for preferably computer-implemented classification via the internal data bus 516 of the microintegrated circuit 592.

[0088] d. A fourth particular feature of the technical teaching proposed herein is that a program for preferably computer-implemented pattern recognition is executed by the proposed device and / or the microcontroller 501 of the proposed device. Preferably, program data and / or instruction codes of the program for preferably computer-implemented pattern recognition and for preferably computer-implemented classification are also stored in the memory 509 of the device, so that, for example, the microcontroller 501 can access the program data and / or instruction codes of the program for preferably computer-implemented pattern recognition and for preferably computer-implemented classification via the internal data bus 516 of the microintegrated circuit 592. For example, by forming a correlation integral or a similar correlation function between the sampled values ​​stored, for example, in the FIFO memory (160, 165) and a predetermined curve pattern stored in a storage area of ​​the memory 509 or storage medium of the microelectronic circuit 592, the proposed device and / or the microcontroller 501 can calculate a correlation value for the correlation curve pattern by a preferably computer-implemented method. For example, the proposed device and / or microcontroller 501 can, for example, by a preferably computer-implemented method, multiply each sample value stored in the associated FIFO memory (160, 165) by a corresponding value of a predetermined curve pattern value stored in a memory 509 of the microelectronic circuit 592 or a storage area of ​​a storage medium, and add the product value thus obtained to all other product values ​​of other sample values ​​stored in the associated FIFO memory (160, 165) to form an exemplary correlation value for the associated curve pattern. This corresponds to a discrete L2 product. (For more information in this regard, see, for example, https: / / mathworld.wolfram.com / L2-InnerProduct.html) For more information and exemplary correlation integrals, see: https: / / de.wikipedia.org / wiki / Korrelation_(Signalverarbeitung). Preferably, the device and / or microcontroller 501, for example, by a preferably computer-implemented method, calculates a correlation value associated with the predetermined curve pattern for preferably each predetermined curve pattern. If the correlation value of a predetermined curve pattern calculated in this way is above the correlation threshold and if this correlation value of the predetermined curve pattern is the maximum correlation threshold of a predetermined subset or set of predetermined curve patterns, the proposed device and / or microcontroller 501 can generally conclude, for example by a preferably computer-implemented method, that a pulse with the predetermined curve pattern is present in the FIFO memory, for example in the FIFO memory 165 and / or in the average high-pass current signal value FIFO 160. For this correlation method, the device and / or microcontroller 501 preferably executes a preferably computer-implemented correlation program.The program data and / or instruction codes of the preferably computer-implemented related program are preferably stored in the memory 509 or storage medium of the micro-integrated circuit 592 of the proposed device. During the execution of the preferably computer-implemented related program, if there are fluctuations in the digitized rotor current signal 113, the proposed device and / or the microcontroller 501 of the proposed device generally recognizes these predetermined current curve patterns as fluctuations by forming correlation values ​​between the feature vectors in the FIFO memory (e.g., in the FIFO memory 165 and / or in the average high-pass current signal value FIFO 160) and the predetermined curve patterns. During the execution of the preferably computer-implemented related program, if there are no fluctuations in the digitized rotor current signal 113, the proposed device and / or the microcontroller 501 of the proposed device generally recognizes these predetermined current curve patterns as non-fluctuations by forming correlation values ​​between the feature vectors in the FIFO memory (e.g., in the FIFO memory 165 and / or in the average high-pass current signal value FIFO 160) and the predetermined curve patterns. In this case, the proposed device and / or the microcontroller 501 also preferably evaluates the sequence of feature vectors, for example by a preferably computer-implemented method. In order to detect the fluctuation, the third stage 30 may also and, if necessary, alternatively have a special filter, which is particularly sensitive and selectively responsive to the predetermined signal waveform of the current curve pattern. The proposed device and / or the microcontroller 501 can simulate these filters, for example, by a preferably computer-implemented method. Such filters include, for example, Kalman filters and / or optimal filters, etc. For example, the micro-integrated circuit 592 may include hardware-implemented circuits of such Kalman filters and / or optimal filters or similar signal processing devices, and in the process of executing the preferably computer-implemented method, the microcontroller 501 preferably controls these circuits via the internal data bus 516, and the microcontroller 501 reads out its results, for example, via the internal data bus 516, and uses its results for other programs, stores them in the memory 509 or storage medium, or outputs them via the data interface 508 and the external data bus 591.

[0089] In summary, the technical teaching proposed herein is characterized in that the proposed device performs a preferably computer-implemented extraction of the fluctuation signal 196 after the analog-to-digital conversion 110, and then performs a preferably computer-implemented feature extraction with a typical result in the form of a preferably multi-dimensional feature vector, so that the device then provides the value of the extracted, preferably multi-dimensional feature vector in one of the memories (the FIFO memories 160, 165) or storage medium for evaluation, and the proposed device performs a retrospective analysis of the historical curve of the value of the extracted, preferably multi-dimensional feature vector, in particular by pattern recognition and classification, for example by means of a preferably computer-implemented method, within a period predefined by the number of values ​​of the extracted, preferably multi-dimensional feature vector. Therefore, compared with the prior art, the proposed device can identify fluctuations based on the signal waveform and not only on the level exceedance, which better avoids fluctuation losses and reduces erroneous fluctuation identification.

[0090] advantage

[0091] The main advantage of the technical revelation presented in this article is that it provides a cost-effective solution for the identification of fluctuations in the current curve of a brushed DC motor, since only a minimum silicon surface area of ​​the microintegrated circuit is required for this specific application when integrated into a corresponding microintegrated circuit for controlling such a brushed DC motor.

[0092] Typically, the resources required for implementing the method proposed herein, which is preferably mainly computer-implemented, are already present in the commonly used micro-integrated control circuits for controlling brushed DC motors. This mainly involves the commonly existing microcontrollers. Therefore, the circuit development of special components with fluctuation recognition functions for these brushed DC motors is usually omitted. Instead, firmware changes of such microelectronic circuits are usually sufficient to obtain a device functionally equivalent to the proposed device, which is also within the scope of the claims and has a preferably computer-implemented functionally equivalent method.

[0093] If the relevant customer does not need a wave counting solution, no additional silicon surface of the microelectronic circuit is usually needed for wave recognition.The firmware for the preferably computer-implemented simulation of the proposed device can generally be executed by any microcontroller with sufficient computing power.

[0094] Preferably, this typical, mainly software-based solution with a preferably computer-implemented method is used for sensorless positioning of a brushed DC actuator with a brushed DC motor drive in an open-loop control circuit.

[0095] This software-based, preferably computer-implemented simulation solution for simulating the proposed device can be ported to any microcontroller with sufficient computing power.

[0096] This software-based and preferably computer-implemented simulation solution for simulating the proposed device can only be used if the electronics are embedded in a DC actuator with a brushed DC motor drive.

[0097] This solution is difficult to manage in a control-by-wire architecture, as the CPU load required to manage several actuators in parallel is too high and it may introduce the risk of EMC line interference, which may affect the accuracy of the position rounding count.

[0098] However, the advantages are not limited to the above-mentioned advantages. BRIEF DESCRIPTION OF THE DRAWINGS

[0099] Figure 1 The process of gradually extracting the fluctuations from the simulated rotor current signal 107 of one of the brushed DC motors 103 to form the rotor position signal 185 is shown.

[0100] Figure 2 An exemplary structure of fluctuation recognition is shown.

[0101] Figure 3 Typical curves of the values ​​of the digitized rotor current signal 113 , low-pass filtered sampled values ​​of the filtered digital rotor current signal 197 and a fluctuation signal 196 from internal sampled values ​​in the form of high-pass current signal values ​​196 are shown.

[0102] Figure 4 An exemplary method for implementing the apparatus according to the present invention is shown.

[0103] Figure 5 The signal processing process is explained. DETAILED DESCRIPTION

[0104] Figure 1

[0105] Figure 1 The process of gradually extracting the fluctuations from the simulated rotor current signal 107 of one of the brushed DC motors 103 to form the rotor position signal 185 is shown.

[0106] The brushed DC motor 103 typically includes an excitation coil. In addition, the brushed DC motor 103 typically includes a device 105 for detecting a current through the excitation coil of the brushed DC motor 103. This document hereinafter refers to this current through the excitation coil of the brushed DC motor 103 as the motor current. The device 105 for detecting the motor current of the brushed DC motor 103 typically transmits an analog rotor current signal 107 to an analog-to-digital converter stage 110. This document hereinafter also refers to the analog-to-digital converter stage 110 as ADC. The ADC 110 converts the analog rotor current signal 107 into a digitized motor current signal 113. Preferably, the digital current register 515 temporarily stores the current value of the digitized rotor current signal 113. Here, the ADC 110 and the current register 515 operate using an ADC converter clock having an ADC conversion frequency. The signal level extraction 120 extracts the current signal level 197 from the stored rotor current signal value 117. Preferably, at the beginning of operation, the device loads the initialization parameters 125 into the registers of the signal level extraction 120. Preferably, at the beginning of operation, the device loads a stop parameter 130 into some registers of the signal level extraction 120, which stop parameter 130 prevents the integration parameter within the signal level extraction 120 from rising or falling without limit. The current signal level 197 usually has a bit width of 16 bits. The adder 123 adds the stored rotor current signal value 117 and the offset value 140, and subtracts the stored motor current signal value 197 therefrom to form a high-pass current signal value in the form of a fluctuation signal 196. The reduction device 150 reduces the bit width of the high-pass current signal value in the form of the fluctuation signal 196 to the effective bit of the high-pass current signal value of the fluctuation signal 196, and thus generates a current signal value 195 with a reduced bit width. For each bit width reduced high pass current signal value 195 determined in this way, the mean filter 155 determines the average value of the determined bit width reduced high pass current signal value 195 and the immediately preceding previously determined bit width reduced high pass current signal value 195 and / or another previously determined bit width reduced high pass current signal value 195, i.e. the associated average high pass current signal value 198. The device proposed in this document temporarily stores the average high pass current signal value 198 in the average high pass current signal value FIFO 160. The device proposed in this document stores the bit width reduced current signal value 195 in the current signal value FIFO 165. In this document, the proposed device uses the combined vector of the values ​​stored in the current signal value FIFO 165 and the average high pass current signal value FIFO 160 as a feature vector 167. The pattern recognition device 170 evaluates the feature vector 167. For example, the pattern recognition device 170 may include a computer core, or may be simulated by a computer core or a microcontroller 501 as a preferably computer-implemented pattern recognition. For example, the computer core may be a microcontroller 501 and / or an ARM processor.The computer core is typically connected via an internal data bus 516 to a memory 509, which typically comprises a program memory and a data memory. The program memory and the data memory may be merged into a common physical memory 509. Preferably, the program memory comprises a program for executing a neural network model and / or a Kalman filter and / or an optimal filter for a preferably computer-implemented simulation of the pattern recognition device 170. In the case of a computer-implemented neural network model, the parameters of the computer-implemented neural network model are preferably trained such that the computer core is able to recognize the occurrence of fluctuations in the digitized rotor current signal 113 when executing the computer-implemented neural network model. If fluctuations occur in the rotor current signal 107 and therefore in the digitized rotor current signal 113, this results in a signal value curve in the current signal value FIFO 165 and in the average high-pass current signal value FIFO 160, which corresponds to or is similar to one or more predetermined signal curve portions. By means of a preferably computer-implemented method, the device can quantitatively detect and evaluate this similarity on a measurement basis. Preferably, the signal values ​​in the current signal value FIFO 165 and the average high-pass current signal value FIFO 160 and / or the values ​​possibly derived therefrom form a feature vector 167. In order to enable the pattern recognition device 170 to recognize these predetermined signal curve portions in the feature vector 167, the preferably computer-implemented neural network model of the pattern recognition device 170 is preferably trained in advance in the design phase with the values ​​of these predetermined signal curve portions, by means of a preferably computer-implemented training method, on a corresponding suitable training platform. Preferably, the output signal of the pattern recognition device 170 or the output signal of the microcontroller 501 to the preferably computer-implemented simulation of the pattern recognition device 170 is a fluctuation recognition signal 175. Preferably, the fluctuation recognition signal 175 becomes effective when the pattern recognition device 170 or its preferably computer-implemented simulation recognizes such fluctuations in the values ​​of the current signal value FIFO 165 and in the values ​​of the average high-pass current signal value FIFO 160 or in the feature vector 167. When the pattern recognition device 170 or its preferably computer-implemented simulation does not recognize such fluctuations in the value of the current signal value FIFO 165 and in the value of the average high-pass current signal value FIFO 160, the fluctuation recognition signal 175 becomes invalid. Preferably, the device counts the fluctuations notified via the fluctuation recognition signal 175 by means of a counter 180 and thus generates a rotor position signal 185, whose rotor position value is a measurement of the rotor position relative to the housing of the brushed DC motor. Preferably, the device determines the counting direction of the counter 180 according to the previously known rotation direction of the brushed DC motor 103.

[0107] Figure 2

[0108] Figure 2 An exemplary structure of fluctuation recognition is shown.

[0109] The H-bridge 5 supplies power to the brushed DC motor 103 via the voltage signal 7 of the H-bridge 5. As a result, the brushed DC motor 103 starts to rotate. The device 105 for detecting the rotor current of the brushed DC motor 103 generates an analog rotor current signal 107, whose time value curve generally reflects the current value curve of the rotor current. The device 105 is generally a device 105 for detecting the current passing through the excitation coil of the brushed DC motor 103. The analog-to-digital converter 110 generates a digitized rotor current signal 113 having a sampled value from the analog rotor current signal 107. The memory 115 of the digitized rotor current signal 113 temporarily stores the sampled value in, for example, a current register 515. Preferably, the signal level extraction 120 performs low-pass filtering on the stored rotor current signal value 117, and thus generates a low-pass filtered sampled value of the filtered digital rotor current signal 197. For the low-pass filtering, the signal level extraction 120 preferably uses the initialization parameter 125 and the stop parameter 130. The adder 123 forms the sum of the generated sampled values ​​135 of the digital rotor current signal 113, wherein these generated sampled values ​​135 of the digital rotor current signal 113 generally coincide with the sampled values ​​of the digital rotor current signal 113. Preferably, the adder 123 subtracts the corresponding value of the filtered digital rotor current signal 197 from the sum and thus forms the fluctuation signal 196. The reduction device 150 reduces the bit width (=high-pass current signal value) of the fluctuation signal 196 to the effective bits of this high-pass current signal value of the fluctuation signal 196 and thus generates a current signal value 195 with a reduced bit width. The current signal value FIFO 165 (also referred to as FIFO memory in this document) stores the current signal value 195 with a reduced bit width and its history. The first eigenvector component is thus formed. For each bit width reduced high-pass current signal value 195 determined in this manner, the mean filter 155 determines the average value of the determined bit width reduced high-pass current signal value 195 and the immediately preceding previously determined bit width reduced high-pass current signal value 195 and / or another previously determined bit width reduced high-pass current signal value 195, i.e., the related average high-pass current signal value 198. The average high-pass current signal value FIFO 160 stores the average high-pass current signal value 198 and its historical record. A second eigenvector component is thereby formed. Preferably, the eigenvector 167 includes a first eigenvector component and a second eigenvector component. Preferably, the pattern recognition device 170 uses the eigenvector 167 to perform a preferably computer-implemented pattern recognition method. For example, this preferably computer-implemented pattern recognition method can be the execution of a preferably computer-implemented neural network model. As an example of a pattern recognition method, this document refers to the following works:

[0110] Liu Yunpeng, Lu Fangcheng, Chen Zhiye, and Li Yanqing, “Data compression and pattern recognition for partial discharge ultrasonic signal based on fractal theory,” in Proceedings, International Conference on Power System Technology, Kunming, China, 2002, volume 2, pages 958–961. doi: 10.1109 / ICPST.2002.1047541.

[0111] N. Mansor, R. Flynn, and M. Daly, “Multi-Resolution Pre-Processing for Pattern Recognition in Images and Audio Signals,” in 2021 32nd Irish Signals and Systems Conference (ISSC), Athlone, Ireland, 2021, pp. 1–6. doi: 10.1109 / ISSC52156.2021.9467861.

[0112] J. A. O'Sullivan and Po-Hsiang Lai, “Pattern recognition system designbased on LDPC matrices,” in Proceedings of the International Symposium on Information Theory, 2005, ISIT 2005, Adelaide, South Australia, 2005, pp. 33–36. doi: 10.1109 / ISIT.2005.1523287.

[0113] Z. Bojkovic, D. Milovanovic, and N. Mastorakis, “Neural networks applications for multimedia processing,” in Proceedings of the Fifth Symposium on Applications of Neural Networks in Electrical Engineering, NEUREL 2000 (IEEE Cat. No. 00EX287), Belgrade, Serbia, 2000, pp. 87–91. doi: 10.1109 / NEUREL.2000.902390.

[0114] E. Mese and D.A. Torrey, “An approach for sensorless position estimation for switched reluctance motors using artifical neural networks,” IEEE Transactions on Power Electronics, vol. 17, no. 1, pp. 66–75, January 2002, doi: 10.1109 / 63.988671.

[0115] M. Sharma, “A Review on DC Motor Speed ​​Control using Artificial Neural Network,” International Journal of Engineering and Science Research, Vol. 7, No. 8, August 2018, ISSN: 2347-6532.

[0116] When the pattern recognition device 170 detects a fluctuation in the value in the current signal value FIFO 165 and / or in the value in the average high-pass current signal value FIFO 160, the pattern recognition device 170 generates a fluctuation recognition signal 175. The counter 180 counts the fluctuation. Based on the signal curve of the fluctuation, the pattern recognition device 170 can also generally recognize the rotation direction of the brushed DC motor 103 through its preferably computer-implemented neural network model. Therefore, the pattern recognition device 170 preferably not only signals the counter 180 that it has detected a fluctuation, but also signals the counter 180 the rotation direction of the brushed DC motor 103. Preferably, the counter 180 counts the fluctuations recognized by the pattern recognition device 170. Here, the counter 180 counts up or down according to the rotation direction of the brushed DC motor 103 recognized by the pattern recognition device 170. Instead of recognizing the rotation direction of the brushed DC motor 103, the counter 180 can also use a counting direction corresponding to an externally specified or generated regulation. Preferably, counter 180 or another device generates rotor position signal 185 based on its counter.

[0117] Figure 3

[0118] Figure 3 Typical curves of the values ​​of the digitized rotor current signal 113 , low-pass filtered sampled values ​​of the filtered digital rotor current signal 197 and a fluctuation signal 196 from internal sampled values ​​in the form of high-pass current signal values ​​196 are shown.

[0119] Figure 4

[0120] Figure 4 An exemplary method for implementing an apparatus according to the present invention is shown. The method is based on a microintegrated circuit 592. In this example, the microintegrated circuit 592 includes a microcontroller 501, a memory 509, an H-bridge controller 505, an analog-to-digital converter 510, an analog signal processor 511, a data interface 508, and other circuit blocks 593 of the microintegrated circuit 592. The microcontroller 501 communicates with the memory 509 and / or other sub-devices of the microintegrated circuit 592 (e.g., 508, 505, 510, 511, 593) via an internal data bus 516 of the microintegrated circuit 592. The microcontroller 501 accesses the contents of the memory 509 and / or other sub-devices of the microintegrated circuit 592 (e.g., 508, 505, 510, 511, 593) via the internal data bus 516.

[0121] Preferably, the memory 509 includes a digital rotor current signal storage area 513 in the memory 509 of the microintegrated circuit 592 , in which digital rotor current signal storage area 513 the microcontroller preferably stores sampled values ​​of the digitized rotor current signal 113 .

[0122] Preferably, the memory 509 comprises a current register storage area 515 of a current register, in which the microcontroller 501 temporarily stores the digitized rotor current signal 113 .

[0123] Preferably, the memory 509 includes a rotor current signal value memory 517 in the memory 509 of the microintegrated circuit 592 , in which rotor current signal value memory 517 the microcontroller 501 preferably stores the stored rotor current signal value 117 .

[0124] Preferably, the memory 509 comprises a storage area 520 for computer-implemented simulation of a computer-implemented signal level extraction device for the signal level extraction 120 .

[0125] Preferably, the memory 509 comprises an initialization parameter storage area 525 of the memory 509 of the microintegrated circuit 592 , in which initialization parameter storage area 525 the microcontroller 501 preferably stores the initialization parameters 125 .

[0126] Preferably, the memory 509 comprises a stop parameter storage area 530 for the stop parameter 130, in which the microcontroller 501 preferably stores the stop parameter 130. When the stop parameter 130 is exceeded, the microcontroller 501 preferably stops the preferably computer-implemented low-pass integration.

[0127] The memory 509 may include a sample value storage area 535 for the generated sample values ​​135 of the digital rotor current signal 113 .

[0128] Preferably, the memory 509 comprises an offset value storage area 540 for the offset value 140 .

[0129] Preferably, the memory 509 comprises a reduction program memory 550. Preferably, a reduction program for computer-implemented simulation of the reduction device 150 by the microcontroller 501 is stored in the reduction program memory 550 of the memory 509. Preferably, signal data for computer-implemented simulation of the reduction device 150 by the microcontroller 501 is stored in the reduction program memory 550 of the memory 509. Preferably, the computer-implemented reduction device 150 reduces the bit width of the high-pass current signal value in the form of the fluctuation signal 196 to the effective bits of the high-pass current signal value of the fluctuation signal 196, and thus generates the current signal value 195 with reduced bit width. Preferably, the microcontroller 501 simulates the reduction device 150 by executing the preferably computer-implemented reduction program for simulating the reduction device 150. In the preferably computer-implemented simulation as the reduction device 150, the microcontroller 501 reduces the bit width of the high-pass current signal value in the form of the fluctuation signal 196 to the effective bits of the high-pass current signal value of the fluctuation signal 196, and thus generates the current signal value 195 with reduced bit width. Preferably, the microcontroller 501 stores the bit-width-reduced current signal value 195 in a storage area 595 for the bit-width-reduced current signal value 195. This document also refers to the storage area 595 for the bit-width-reduced current signal value 195 as a high-pass current signal value storage area 595. This document also refers to the bit-width-reduced current signal value 195 as a bit-width-reduced high-pass current signal value 195.

[0130] Preferably, the memory 509 includes a storage area 598 for the average high-pass current signal value 198. Preferably, the microcontroller 501 stores the high-pass current signal value 198 generated by the averaging filter 155 or generated by the microcontroller 501 performing a preferably computer-implemented simulation of the averaging filter 155 in the storage area 598 for the average high-pass current signal value 198.

[0131] Preferably, the memory 509 includes a mean filter program memory 555. Preferably, a mean filter program for performing a preferably computer-implemented simulation of the mean filter 155 by the microcontroller 501 is stored in the mean filter program memory 555 of the memory 509. For the determined reduced-bit-width high-pass current signal value 195, the mean filter 155 determines an average value of the determined reduced-bit-width high-pass current signal value 195 and the immediately preceding previously determined reduced-bit-width high-pass current signal value 195 and / or another previously determined reduced-bit-width high-pass current signal value 195, i.e., a related average high-pass current signal value 198.

[0132] When the mean filter 155 is subjected to a preferably computer-implemented simulation by the mean filter program in the mean filter program memory 555, for the determined high-pass current signal value 195 with a reduced bit width in the high-pass current signal value storage area 595, the microcontroller 501 determines the average value of the determined high-pass current signal value 195 with a reduced bit width in the high-pass current signal value storage area 595 and the immediately preceding previously determined high-pass current signal value 195 with a reduced bit width in the high-pass current signal value storage area 595 and / or another previously determined high-pass current signal value 195 with a reduced bit width in the high-pass current signal value storage area 595, i.e. the associated average high-pass current signal value 198. In the preferably computer-implemented simulation, the microcontroller 501 then stores the average high-pass current signal value 198 determined in this way in the storage area 598 for the average high-pass current signal value 198.

[0133] Preferably, the memory 509 includes a FIFO storage area 565 of the FIFO memory 165. Preferably, the FIFO storage area 565 of the FIFO memory 165 includes storage cells in the memory 509 required for storing the generated bit-width reduced current signal value 195. In addition, the FIFO storage area 565 of the FIFO memory 165 preferably includes a FIFO simulation program code storage area, in which the FIFO simulation program code for performing a preferably computer-implemented simulation of the FIFO memory is preferably stored. For example, the microcontroller 501 can simulate the FIFO memory 165 by executing the FIFO simulation program code in the simulation program code storage area of ​​the storage area 565 of the FIFO memory 165 by means of a preferably computer-implemented method. In a simulation of the preferably computer-implemented FIFO memory 165, the microcontroller 501 preferably provides a feature sub-vector of the feature vector 167 in the first feature vector storage area 567 for further processing based on the contents of a storage cell in the memory 509 for storing the generated bit-width reduced current signal value 195 within the FIFO storage area 565 of the FIFO memory 165.

[0134] Preferably, the memory 509 includes a first feature sub-vector storage area 567 for the feature vector 167 .

[0135] Preferably, the memory 509 includes a pattern recognition program storage area 570 for a preferably computer-implemented pattern recognition program in the memory 509 of the microelectronic device 592. Preferably, the microcontroller 501 simulates the pattern recognition device 170 by executing the preferably computer-implemented pattern recognition program in the pattern recognition program storage area 570 of the memory 509. In the preferably computer-implemented simulation of the pattern recognition device 170, the microcontroller 501 preferably evaluates the value in the first feature subvector storage area 567 of the feature vector 167 and preferably generates a fluctuation identification signal 175. Preferably, the microcontroller 501 stores the value of the generated fluctuation identification signal 175 in the fluctuation identification signal storage area 575 of the memory 509.

[0136] Preferably, the memory 509 comprises a counter storage area 580 of the memory 509. Preferably, the counter storage area 580 comprises program code of a counter simulation program. By executing the counter simulation program in the counter storage area 580 of the memory 509, the microcontroller 501 can generally simulate the counter 180 by means of a preferably computer-implemented method. For example, in the preferably computer-implemented simulation of the counter 180, the microcontroller 501 can count fluctuations signaled by the value in the fluctuation identification signal storage area 575 of the memory 509 by increasing or decreasing the counter reading value in the counter storage area 580 of the memory 509 according to the above-mentioned counting direction. Preferably, in the preferably computer-implemented simulation of the counter 180, the microcontroller 501 provides the current value of the counter reading value in the counter storage area 580 of the memory 509 and / or the value curve of the counter reading value in the counter storage area 580 of the memory 509 as one or more values ​​of the rotor position signal 185 in the rotor position signal storage area 585. Preferably, the memory 509 comprises this rotor position signal storage area 585. Microcontroller 501 provides one or more values ​​of rotor position signal 185 in rotor position signal storage area 585 .

[0137] Preferably, the memory 509 includes a high-pass current signal value storage area 595. When the mean filter 155 is preferably simulated by a mean filter program in the mean filter program memory 555, for the determined high-pass current signal value 195 with a reduced bit width in the high-pass current signal value storage area 595, the microcontroller 501 determines the average value of the determined high-pass current signal value 195 with a reduced bit width in the high-pass current signal value storage area 595 and the immediately preceding previously determined high-pass current signal value 195 with a reduced bit width in the high-pass current signal value storage area 595 and / or another previously determined high-pass current signal value 195 with a reduced bit width in the high-pass current signal value storage area 595, i.e., the related average high-pass current signal value 198.

[0138] Preferably, the memory 509 includes the fluctuation storage area 596 in the memory 509 of the microintegrated circuit 592, and the fluctuation storage area 596 is used to store one or more values ​​of the fluctuation signal 196.

[0139] Preferably, the memory 509 comprises a storage area 597 for the filtered sampled values ​​of the filtered digital rotor current signal 197 , which is used to store the filtered sampled values ​​of the filtered digital rotor current signal 197 .

[0140] In a preferably computer-implemented simulation of the counter 180, the microcontroller 501 preferably provides the current value of the counter reading value in the counter storage area 580 of the memory 509 and / or a value curve of the counter reading value in the counter storage area 580 of the memory 509 as one or more values ​​of the rotor position signal 185 in the rotor position signal storage area 585, and outputs the current value of the counter reading value in the counter storage area 580 of the memory 509 and / or a value curve of the counter reading value in the counter storage area 580 of the memory 509 as one or more values ​​of the rotor position signal 185 via the internal data bus 516 and data interface 508 of the microelectronic circuit 592 and the external data bus 591, in particular in response to a request from a superior system.

[0141] Typically, the microcontroller 501 configures the analog signal processor 511 via the internal data bus 516. The analog signal processor 511 amplifies and / or filters and / or processes the analog rotor current signal 107 into a processed analog rotor current signal 512 in a suitable manner.

[0142] The analog-to-digital converter 510 converts the processed analog rotor current signal 512 into a digitized rotor current signal 113, typically through analog-to-digital conversion 110. The microcontroller 501 reads the digitized output value of the analog-to-digital converter 510 via the internal data bus 516, and preferably stores the value in a digital rotor current signal storage area 513 in the memory 509 of the microintegrated circuit 592.

[0143] The device 105 for detecting the rotor current of the brushed DC motor 103 detects the rotor current passing through the rotor coil of the brushed DC motor 103. Here, the device 105 for detecting the rotor current of the brushed DC motor 103 generates an analog rotor current signal 107 according to the rotor current passing through the rotor coil of the brushed DC motor 103.

[0144] The H-bridge 5 supplies power to the brushed DC motor 103 .

[0145] The H-bridge 5 generates a first monitoring signal 514 of the H-bridge 5 according to the state of the H-bridge 5. The analog-to-digital converter 510 generally converts the first monitoring signal 514 of the H-bridge 5 into a digitized signal, and the microcontroller 501 reads the digitized signal from the analog-to-digital converter 510 via the internal data bus 516. Preferably, the microcontroller 501 controls the analog-to-digital converter 510 via the internal data bus 516, and preferably determines the signal converted by the analog-to-digital converter 510.

[0146] The H-bridge 5 generates an H-bridge status signal on the H-bridge status line 507 according to the state of the H-bridge 5. The H-bridge controller 505 evaluates the bridge status signal on the H-bridge status line 507 and controls the H-bridge 5 via the H-bridge control signal 506 according to the signaling from the microcontroller 501 via the internal data bus 516 to the H-bridge controller 505.

[0147] The H-bridge 5 supplies power to the brushed DC motor 103 through the voltage signal 7 of the H-bridge 5 according to the state and signaling of the H-bridge control signal 506 of the H-bridge controller 505 .

[0148] The microcontroller 501 communicates with possible further circuit blocks 593 of the microintegrated circuit 592 via a data bus 516 .

[0149] Figure 5

[0150] Figure 5 The signal processing process is explained.

[0151] The signal level extraction 120 usually generates a filtered digital rotor current signal 197 from the stored rotor current signal values ​​117, which correspond to the digitized rotor current signal 113, by means of a preferably computer-implemented method. Usually, this filtered digital rotor current signal 197 has no fluctuations or only a small fluctuation. The adder 123 subtracts the filtered digital rotor current signal 197 from the digitized rotor current signal 113 or the usually correspondingly generated sampled values ​​135 of the digital rotor current signal 113, and thus generates the fluctuation signal 196 in the form of high-pass current signal values ​​196 from the internal sampled values. The reduction device 150 and the mean filter 155 generate values ​​that can be used as a first feature subvector of the feature vector 167 in the average high-pass current signal value FIFO 160. In this case, the FIFO memory 165 temporarily stores the time value sequence of the current signal values ​​195 with a reduced bit width generated by the reduction device 150 from the fluctuation signal 196, and provides the values ​​stored in the FIFO memory 165 as a second feature subvector of the feature vector 167. The pattern recognition device 170 can, for example, compare the feature vector 167 with the prototype feature vectors in the database 610 by means of a preferably computer-implemented method and set the logic state of the fluctuation recognition signal 175 according to the comparison result. Instead of such a database comparison, the pattern recognition device 170 can have a suitable filter, for example based on a preferably computer-implemented filtering method, for each prototype feature vector, so that if there is a sufficient similarity between the feature vector 167 and the prototype feature vector of the filter, the logic state of the fluctuation recognition signal 175 is set accordingly. It is particularly preferred that a preferably computer-implemented neural network model is used in the pattern recognition device 170, wherein the preferably computer-implemented neural network model is preferably trained with the prototype feature vectors. When the similarity between the feature vector 167 and one of the prototype feature vectors used to train the preferably computer-implemented neural network model is sufficiently high, the preferably computer-implemented neural network model executing the pattern recognition device 170 sets the logic state of the fluctuation recognition signal 175 accordingly.

[0152] other

[0153] The above description is not exhaustive and does not limit the present disclosure to the examples shown. Other variations of the disclosed examples can be understood and implemented by those of ordinary skill in the art based on the accompanying drawings, the disclosure and the claims. The indefinite article "one" or "an" and its variants do not exclude a plurality, and the reference to a specific number of elements does not exclude the possibility of more or fewer elements. A single unit can perform the functions of a plurality of elements mentioned in the present disclosure, and conversely, a plurality of elements can perform the functions of a unit. Various alternatives, equivalents, variations and combinations are possible without departing from the scope of application of the present disclosure.

[0154] Unless otherwise stated, all features of the invention can be freely combined with one another. This relates to the entire content of this document. Unless otherwise stated, the features described in the description of the figures can also be freely combined with other features as features of the invention. There is no explicit provision here to restrict individual features of the exemplary embodiment to combinations with other features of the exemplary embodiment. Furthermore, object features of the device can also be rewritten as method features and method features can also be rewritten as object features of the device. This rewriting is therefore automatically disclosed.

[0155] In the above detailed description, reference is made to the accompanying drawings. The examples in the description and drawings should be regarded as illustrative and not limiting of the specific examples or elements described. Multiple examples can be derived from the above description and / or drawings and / or claims by modifying, combining or changing specific elements. In addition, those skilled in the art can deduce examples or elements not described literally from the description and / or drawings.

[0156] Reference numerals list

[0157] 5 H bridge;

[0158] 7 Voltage signal 7 of H bridge 5;

[0159] 10 Current sampling and digitization in the first stage 10;

[0160] 20 second level;

[0161] 30 Level 3;

[0162] 103 Brushed DC motor;

[0163] 105 means 105 for detecting the rotor current of the brushed DC motor 103. These are typically means 105 for detecting the current through the field coil of the brushed DC motor 103;

[0164] 107 simulates the rotor current signal 107;

[0165] 110ADC. Herein, the term ADC 110 refers to analog-to-digital conversion 110;

[0166] 113 digitized rotor current signal 113;

[0167] 115 digitized rotor current signal 113 , for example, storage 115 in current register 515 ; 117 stored rotor current signal value 117 ;

[0168] 120 signal level extraction 120;

[0169] 123 adder 123;

[0170] 125 Initialization parameters 125;

[0171] 130 stop parameter 130;

[0172] 135 generated sampled values ​​135 of the digital rotor current signal 113. Typically, these generated sampled values ​​of the digital rotor current signal 113 are consistent with the sampled values ​​of the digital rotor current signal 113;

[0173] 140 offset value 140;

[0174] 150 reduction device 150;

[0175] 155 Mean filter 155. For the high-pass current signal value 195 with a reduced bit width determined in this way, the mean filter 155 determines the average value of the determined high-pass current signal value 195 with a reduced bit width and the immediately preceding previously determined high-pass current signal value 195 with a reduced bit width and / or another previously determined high-pass current signal value 195 with a reduced bit width, i.e., the associated average high-pass current signal value 198;

[0176] 160 average high-pass current signal value FIFO 160;

[0177] 165 current signal value FIFO 165. This document also refers to the signal value FIFO 165 as FIFO memory 165;

[0178] 167 eigenvector 167;

[0179] 170 pattern recognition device 170;

[0180] 175 Fluctuation identification signal 175;

[0181] 180 counter 180;

[0182] 185 rotor position signal 185;

[0183] 195 bit width reduced current signal value 195;

[0184] 196 Fluctuation signal 196 from internal sampled values ​​in the form of high-pass current signal value 196; 197 Current signal level 197, which is referred to in this document as the low-pass filtered sampled value of the filtered digital rotor current signal 197;

[0185] 198 Average high-pass current signal value 198;

[0186] 501 microcontroller 501;

[0187] 505H bridge controller 505;

[0188] 506H bridge control signal 506;

[0189] 507H bridge status line 507;

[0190] 508 Data interface 508 of microelectronic circuit 592;

[0191] 540 an offset parameter storage area of ​​the memory 509 of the micro integrated circuit 592;

[0192] 510 ADC. Here, ADC 510 refers to an analog-to-digital converter 510 that generally performs analog-to-digital conversion 110.

[0193] 511 analog signal processor 511;

[0194] 512 a processed simulated rotor current signal 512 after the simulated rotor current signal 107 is processed by the analog signal processor 511;

[0195] 513 A digital rotor current signal storage area 513 in the memory 509 of the micro integrated circuit 592;

[0196] 514 The first monitoring signal 514 of the H bridge 5;

[0197] 515 Current register 515. Preferably, current register 515 comprises a current register storage area in memory 509 of micro integrated circuit 592;

[0198] 516 an internal data bus 516 of the microintegrated circuit 592 via which the microcontroller 501 accesses the contents of the memory 509 and / or other sub-devices (e.g., 508 , 505 , 510 , 511 , 593 ) of the microelectronic circuit 592 ;

[0199] 517 A rotor current signal value storage area 517 in the memory 509 of the micro integrated circuit 592;

[0200] 520 is a storage area 520 for simulating a signal level extraction device for signal level extraction 120;

[0201] 525 initialization parameter storage area 525 of the memory 509 of the micro integrated circuit 592;

[0202] 530 is a stop parameter storage area 530 for the stop parameter 130;

[0203] 535 A sample value storage area 535 of the generated sample values ​​135 of the digital rotor current signal 113. The sample value storage area 535 is generally equivalent to the digital rotor current signal storage area 513 in the memory 509 of the micro integrated circuit 592;

[0204] 540 an offset value storage area 540 for the offset value 140 of the memory 509 of the micro integrated circuit 592;

[0205] 550 a reduced program storage area 550 in the memory 509 of the microintegrated circuit 592;

[0206] 555 Mean filter program storage area 555 in the memory 509 of the micro-integrated circuit 592; 560 High-pass current signal value FIFO storage area 560 for averaging high-pass current signal value FIFO 160 in the memory 509 of the micro-integrated circuit 592; 565 FIFO storage area 565 of the FIFO memory 165 in the memory 509 of the micro-integrated circuit 592;

[0207] 567 Feature vector storage area 567 for feature vector 167 in memory 509 of microintegrated circuit 592;

[0208] 570 a pattern recognition program storage area 570 in the memory 509 of the microintegrated circuit 592 for the pattern recognition program in the memory 509 of the microelectronic circuit 592; 575 a fluctuation identification signal storage area 575 in the memory 509 of the microintegrated circuit 592 for the value of the fluctuation identification signal 175;

[0209] 580 counter storage area 580 in memory 509 of micro integrated circuit 592;

[0210] 585 rotor position signal storage area 585 in memory 509 of micro integrated circuit 592; 591 external data bus 591;

[0211] 592 micro integrated circuit 592;

[0212] 593 Other circuit blocks 593 of the micro integrated circuit 592;

[0213] 595 A high-pass current signal value storage area 595 in the memory 509 of the micro integrated circuit 592;

[0214] 596 a fluctuation storage area 596 for the fluctuation signal 196 in the memory 509 of the micro integrated circuit 592;

[0215] 597 a storage area 597 in the memory 509 of the microintegrated circuit 592 for filtered sampled values ​​of the filtered digital rotor current signal 197 ;

[0216] 598 A storage area 598 for the average high-pass current signal value 198 in the memory 509 of the micro-integrated circuit 592;

[0217] 610 A database 610 with prototype feature vectors.

[0218] Citation list

[0219] Patent Literature

[0220] DE 42 17 265 C2,

[0221] DE 195 11 307 C1,

[0222] Non-patent literature

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[0225] https: / / mathworld.wolfram.com / L2-InnerProduct.html)

[0226] https: / / de.wikipedia.org / wiki / Korrelation_(Signalverarbeitung)

[0227] Liu Yunpeng, Lu Fangcheng, Chen Zhiye, and Li Yanqing, “Data compression and pattern recognition for partial discharge ultrasonic signal based on fractal theory,” in Proceedings, International Conference on Power System Technology, Kunming, China, 2002, volume 2, pages 958–961. doi: 10.1109 / ICPST.2002.1047541.

[0228] N. Mansor, R. Flynn, and M. Daly, “Multi-Resolution Pre-Processing for Pattern Recognition in Images and Audio Signals,” in 2021 32nd Irish Signals and Systems Conference (ISSC), Athlone, Ireland, 2021, pp. 1–6. doi: 10.1109 / ISSC52156.2021.9467861.

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[0231] E. Mese and D.A. Torrey, “An approach for sensorless position estimation for switched reluctance motors using artifical neural networks,” IEEE Transactions on Power Electronics, vol. 17, no. 1, pp. 66–75, January 2002, doi: 10.1109 / 63.988671.

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Claims

1. A device for detecting fluctuations in rotor current of a brushed DC motor (103), in, The device comprises means (105) for detecting the rotor current of the brushed DC motor (103), and wherein the device comprises an analog-to-digital converter (510), and The device comprises a signal level extraction device (520), and wherein the device comprises an adder (123), and The device comprises a microcontroller (501) and / or a pattern recognition device (170), and The brushed DC motor (103) has a rotor of the brushed DC motor (103) capable of being powered via at least two terminals of the brushed DC motor (103). The device (105) for detecting the rotor current of the brushed DC motor (103) is configured to detect the rotor current of the brushed DC motor (103) and generate a simulated rotor current signal (107), and wherein the value curve of the simulated rotor current signal (107) depends on the time curve of the rotor current, and The analog-to-digital converter (510) is configured to sample the rotor current signal (107), and The analog-to-digital converter (510) is configured to generate sampled values, the generated sampled values ​​being in particular in the form of a digitized rotor current signal (113), and The signal level extraction device (120) is configured to low-pass filter the generated sampled values, in particular the sampled values ​​of the digitized rotor current signal (113), into low-pass filtered sampled values, in particular the form of filtered digital rotor current signals (197), and wherein each generated sampled value (135), in particular a sampled value of the digitized rotor current signal (113), corresponds to a low-pass filtered sampled value, in particular to a low-pass filtered sampled value of the filtered digital rotor current signal (197), wherein the adder (123) is configured to subtract the low-pass filtered sampled value, in particular the low-pass filtered sampled value of the filtered digital rotor current signal (197), from a sum of an optional offset value (140) and a corresponding generated sampled value (135), in particular the sampled value of the digital rotor current signal (113), to generate an internal sampled value, in particular the internal sampled value of the fluctuation signal (196), and The device and / or the microcontroller (501) is configured to store the internal sampled value, in particular the internal sampled value of the fluctuation signal (196), as a storage sampled value in a memory (509) having a storage unit, in particular in a FIFO memory (165), and In which, the device and / or the microcontroller (501) and / or the pattern recognition device (170) are configured to apply a pattern recognition method to sample values ​​stored in the memory, in particular stored in the FIFO memory (165), and determine whether there is fluctuation in the memory, in particular in the FIFO memory (165).

2. The device according to claim 1, in, The device and / or the microcontroller (501) and / or the pattern recognition means (170) are configured to set a fluctuation flag if there is fluctuation in the memory, in particular in the FIFO memory (165), and / or Therein, the device and / or the microcontroller (501) and / or the pattern recognition device (170) are configured to delete the fluctuation flag if there is no fluctuation in the memory, in particular in the FIFO memory (165).

3. The device according to claim 1 or 2, in, The memory is a FIFO memory (165).

4. The device according to any one of claims 1 to 3, in, The device and / or the microcontroller (501) and / or the pattern recognition means (170) are configured to perform a pattern recognition method, the pattern recognition method comprising applying and / or executing a neural network model, and wherein the input signal of the neural network model comprises a signal having a value of a storage unit of the memory, in particular the FIFO memory (165), and The output signal of the neural network model includes a control signal for setting and / or deleting the fluctuation flag and / or a signal of the fluctuation flag.

5. A device for detecting fluctuations in the rotor current of a brushed DC motor (103), in particular a device according to any one of claims 1 to 4, in, The device comprises means (105) for detecting the rotor current of the brushed DC motor (103), and wherein the device comprises an analog-to-digital converter (510), and The device (105) for detecting the rotor current of the brushed DC motor (103) is configured to detect the rotor current of the brushed DC motor (103) and generate a simulated rotor current signal (107), and wherein the value curve of the simulated rotor current signal (107) depends on the curve of the rotor current, and The analog-to-digital converter (510) is configured to sample the rotor current signal (107), and The analog-to-digital converter (510) is configured to generate sampled values, the generated sampled values ​​being in particular in the form of a digitized rotor current signal (113), and The signal level extraction device (120) is configured to low-pass filter the generated sampled values, in particular the sampled values ​​of the digitized rotor current signal (113), into low-pass filtered sampled values, in particular the form of filtered digital rotor current signals (197), and wherein each generated sampled value (135), in particular a sampled value of the digitized rotor current signal (113), corresponds to a low-pass filtered sampled value, in particular to a low-pass filtered sampled value of the filtered digital rotor current signal (197), wherein the adder (123) is configured to subtract the low-pass filtered sampled value, in particular the low-pass filtered sampled value of the filtered digital rotor current signal (197), from a sum of an optional offset value (140) and a corresponding generated sampled value (135), in particular the sampled value of the digital rotor current signal (113), to generate an internal sampled value, in particular the internal sampled value of the fluctuation signal (196), and The device is configured to store the internal sampled value, in particular the internal sampled value of the fluctuation signal (196), as a storage sampled value in a memory (509) having a storage unit, in particular in a FIFO memory (165), and The device is configured to subtract at least a first pair of two stored sample values ​​from two different storage units of the memory (192), namely a first stored sample value of the first storage unit and a second stored sample value of the second storage unit, to form a first differential signal value, in particular by means of the microcontroller (501) and / or by means of the pattern recognition device (170), and wherein the device is configured to, in particular by means of the microcontroller (501) and / or by means of the pattern recognition device (170), subtract at least a second pair consisting of two stored sample values ​​of two further different storage units of the memory, namely a third stored sample value of a third storage unit and a fourth stored sample value of a fourth storage unit, to form a second differential signal value, and wherein the second storage unit and the third storage unit may be identical, wherein the device is configured to add the first differential signal value and the second differential signal value to form a sum value, in particular by means of the microcontroller (501) and / or by means of the pattern recognition means (170), and Therein, the device is configured to determine whether there is a fluctuation based on the sum value, in particular by comparing the sum value with a threshold value, in particular by the microcontroller (501) and / or by the pattern recognition device (170).

6. The device according to claim 5, in, The device and / or the microcontroller (501) and / or the pattern recognition device (170) are configured to compare the value of the sum value with a first threshold value and generate a comparison result, and wherein the device and / or the microcontroller (501) and / or the pattern recognition device (170) is configured to set a fluctuation flag if the value of the sum value corresponding to the comparison result is higher than the first threshold value, and / or The device and / or the microcontroller (501) and / or the pattern recognition device (170) are configured to delete the fluctuation flag if the value of the sum value corresponding to the comparison result is lower than the first threshold value.

7. The device according to claim 6, in, The device and / or the microcontroller (501) and / or the pattern recognition device (170) are configured to store the sum value as a stored sum value in another memory having a storage unit, in particular in a high-pass current signal value FIFO (160), and Wherein, the device and / or the microcontroller (501) and / or the pattern recognition device (170) are configured to apply another pattern recognition method to the sum value stored in the other memory, and in particular to determine whether there is a fluctuation in the other memory based on the sum value and / or based on a comparison result of the sum value with a threshold.

8. The device according to claim 7, in, The device and / or the microcontroller (501) and / or the pattern recognition means (170) are configured to set another fluctuation flag if fluctuations are present in the another memory, and / or The device and / or the microcontroller (501) and / or the pattern recognition means (170) are configured to delete another fluctuation flag if there is no fluctuation in the another memory.

9. The device according to claim 7 or 8, in, The other memory is another FIFO memory (160).

10. The device according to any one of claims 7 to 9, in, The further pattern recognition method comprises applying, in particular by the device and / or by the microcontroller (501) and / or by the pattern recognition means (170), a further neural network model, and wherein the input signal of the another neural network model comprises a signal having a value of a storage unit of the another memory, and The output signal of the other neural network model includes a control signal for setting and / or deleting the other fluctuation flag and / or a signal of the other fluctuation flag.

11. A device for determining the rotor position of a rotor of a brushed DC motor (103) in the form of a rotor position value, in, The device comprises a device for detecting fluctuations in rotor current of the brushed DC motor (103) according to any one of claims 1 to 10, and Wherein, the device comprises a counter (180) and / or a microcontroller (501), and The device comprises a counter (180) or a microcontroller (501), wherein the counter (180) or the microcontroller (501) is configured to count the detected fluctuations of the rotor current of the brushed DC motor (103) to determine the counter reading using the counting direction, and Therein, the device and / or the microcontroller (501) is configured to use and / or output the counter reading or a value derived therefrom as a rotor position value.

12. A method for detecting fluctuations in rotor current of a brushed DC motor (103), in, The brushed DC motor (103) has a rotor of the brushed DC motor (103) capable of being powered via at least two terminals of the brushed DC motor (103), The method comprises the following steps: Applying voltage to the at least two terminals of the brushed DC motor (103); In particular, by means of a device (105) for detecting the rotor current of the brushed DC motor (103), the rotor current of the brushed DC motor (103) is detected, and in particular, by means of the device (105), a simulated rotor current signal (107) is generated, wherein a value curve of the simulated rotor current signal (107) depends on a time curve of the rotor current; In particular, the rotor current signal (107) is sampled by an analog-to-digital converter (510) to generate a sampled value, wherein the generated sampled value is in particular in the form of a digitized rotor current signal (113); In particular, in the signal level extraction device (120) and / or by the microcontroller (501), the generated sampled values, in particular the sampled values ​​of the digitized rotor current signal (113), are low-pass filtered into low-pass filtered sampled values, the low-pass filtered sampled values ​​are in the form of a filtered digital rotor current signal (197), wherein each generated sampled value (135), in particular the sampled value of the digitized rotor current signal (113), corresponds to a low-pass filtered sampled value, in particular to a low-pass filtered sampled value of the filtered digital rotor current signal (197); subtracting the low-pass filtered sampled value, in particular the low-pass filtered sampled value of the filtered digital rotor current signal (197), from a sum of an optional offset value (140) and a corresponding generated sampled value (135), in particular the sampled value of the digital rotor current signal (113), in particular by means of an adder (123) and / or the microcontroller (501), in order to generate an internal sampled value, in particular an internal sampled value of the fluctuation signal (196); In particular, by means of the microcontroller (501) and / or by means of the pattern recognition device (170), the internal sampled values, in particular the internal sampled values ​​of the fluctuation signal (196), are stored as storage sampled values ​​in a memory (509) having a storage unit, in particular in a FIFO memory (165); and In particular, through the microcontroller (501) and / or through the pattern recognition device (170), a pattern recognition method is applied to the sampled values ​​stored in the memory, in particular stored in the FIFO memory (165), and it is determined whether there is a fluctuation in the memory, in particular in the FIFO memory (165).

13. The method according to claim 12, comprising the following steps: If there are fluctuations in the memory, in particular in the FIFO memory (165), a fluctuation flag is set, in particular by the microcontroller (501) and / or the pattern recognition device (170), and / or If no fluctuations are present in the memory, in particular in the FIFO memory (165), the fluctuation flag is deleted, in particular by the microcontroller (501) and / or the pattern recognition device (170).

14. The method according to claim 12 or 13, in, The memory is a FIFO memory (165).

15. The method according to any one of claims 12 to 14, in, The pattern recognition method, in particular performed by the microcontroller (501) and / or the pattern recognition device (170), comprises applying and / or executing a neural network model, in particular by the microcontroller (501) and / or the pattern recognition device (170), and wherein the input signal of the neural network model comprises a signal having a value of a storage unit of the memory, in particular the FIFO memory (165), and The output signal of the neural network model includes a control signal for setting and / or deleting the fluctuation flag and / or a signal of the fluctuation flag.

16. A method for determining the rotor position of a brushed DC motor (103) in the form of a rotor position value, comprising the following steps: Applying the method for detecting the fluctuation of the rotor current of the brushed DC motor (103) according to any one of claims 12 to 15; In particular, the detected fluctuations of the rotor current of the brushed DC motor are counted by the microcontroller (501) or the counter (180) to determine the counter reading using the counting direction; and Use the counter reading as the rotor position value.

17. A method for detecting fluctuations in the rotor current of a brushed DC motor (103), in particular according to any one of claims 12 to 17, in, The brushed DC motor (103) has a rotor of the brushed DC motor (103) capable of being powered via at least two terminals of the brushed DC motor (103), The method comprises the following steps: Applying voltage to the at least two terminals of the brushed DC motor (103); In particular, by means (105) for detecting the rotor current of the brushed DC motor (103), the rotor current of the brushed DC motor (103) is detected, and in particular, by means (105), a simulated rotor current signal (107) is generated, wherein a value curve of the simulated rotor current signal (107) depends on a curve of the rotor current; In particular, the rotor current signal (107) is sampled by an analog-to-digital converter (510) to generate a sampled value, in particular a sampled value of a digitized rotor current signal (113); In particular, by means of a microcontroller (501) and / or a signal level extraction device (120), the generated sampled values, in particular the sampled values ​​of the digitized rotor current signal (113), are low-pass filtered into low-pass filtered sampled values, in particular in the form of a filtered digital rotor current signal (197), wherein each generated sampled value (135), in particular a sampled value of the digitized rotor current signal (113), corresponds to a low-pass filtered sampled value, in particular a low-pass filtered sampled value of the filtered digital rotor current signal (197); subtracting the low-pass filtered sampled value, in particular the low-pass filtered sampled value of the filtered digital rotor current signal (197), from a sum of an optional offset value (140) and a corresponding generated sampled value (135), in particular the sampled value of the digital rotor current signal (113), in particular by means of an adder (123) or by means of the microcontroller (501), to generate an internal sampled value, in particular an internal sampled value of the fluctuation signal (196); In particular, by means of the microcontroller (501) and / or the pattern recognition device (170), the internal sampled value, in particular the internal sampled value of the fluctuation signal (196), is stored as a storage sampled value in a memory (509) having a storage unit, in particular in a FIFO memory (165); In particular, by means of the microcontroller (501) and / or the pattern recognition device (170), at least a first pair consisting of two stored sample values ​​of two different storage units of the memory (192), namely a first stored sample value of the first storage unit and a second stored sample value of the second storage unit, is subtracted to form a first differential signal value; In particular, by means of the microcontroller (501) and / or the pattern recognition device (170), at least a second pair consisting of two stored sample values ​​of two other different storage units of the memory, namely a third stored sample value of a third storage unit and a fourth stored sample value of a fourth storage unit, is subtracted to form a second differential signal value, wherein the second storage unit and the third storage unit may be the same; In particular, by means of the microcontroller (501) and / or the pattern recognition device (170), the first differential signal value and the second differential signal value are added to form a sum value; and In particular, the microcontroller (501) and / or the pattern recognition device (170) determines whether a fluctuation exists based on the sum value, in particular by comparing the sum value with a threshold value.

18. The method according to claim 17, In particular, by means of the microcontroller (501) and / or the pattern recognition device (170), the value of the sum is compared with a first threshold value; If the value of the sum is higher than the first threshold, a fluctuation flag is set, in particular by the microcontroller (501) and / or the pattern recognition device (170); and / or If the value of the sum is below the first threshold value, the fluctuation flag is deleted, in particular by the microcontroller (501) and / or the pattern recognition device (170).

19. The method according to claim 18, In particular, by means of the microcontroller (501) and / or the pattern recognition device (170), the sum value is stored as a stored sum value in another memory having a storage unit, in particular in a high-pass current signal value FIFO (160); In particular, by means of the microcontroller (501), another pattern recognition method is applied to the sum value stored in the other memory, and in particular, by means of the microcontroller (501) and / or the pattern recognition device (170), it is determined whether there is a fluctuation in the other memory.

20. The method according to claim 19, comprising the steps of: If fluctuations are present in the further memory, a further fluctuation flag is set, in particular by the microcontroller (501) and / or the pattern recognition device (170); and / or If no fluctuation is present in the further memory, the further fluctuation flag is deleted, in particular by the microcontroller (501) and / or the pattern recognition device (170).

21. The method according to claim 19 or 20, in, The other memory is another FIFO memory (160).

22. The method according to any one of claims 19 to 21, in, The further pattern recognition method comprises applying, in particular by means of the microcontroller (501) and / or the pattern recognition device (170), another neural network model, and wherein the input signal of the another neural network model comprises a signal having a value of a storage unit of the another memory, and The output signal of the other neural network model includes a control signal for setting and / or deleting the other fluctuation flag and / or a signal of the other fluctuation flag.

23. A method for determining the rotor position of a rotor of a brushed DC motor (103) in the form of a rotor position value, comprising the following steps: Applying a method for detecting fluctuations in the rotor current of the brushed DC motor (103) according to any one of claims 12 to 17 and / or any one of claims 18 to 22; Counting detected fluctuations of the rotor current of the brushed DC motor (103), in particular by the microcontroller (501) and / or by the counter (180), in order to determine a counter reading, in particular by applying a counting direction by the microcontroller (501) and / or by the counter (180); The counter reading is used as rotor position value, in particular by the microcontroller (501).

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