Mainboard, in-situ detection method of external board card and readable storage medium

Abstract

The invention discloses a mainboard, an in-situ detection method of an external board card and a readable storage medium, and belongs to the technical field of electronic equipment. A first controller in the mainboard is used for controlling a first serial data pin and a first serial clock pin to be connected with a second level circuit through a switching circuit under the condition that the board card in-place detection condition is met, and the first serial data pin and the first serial clock pin are disconnected with a first level circuit; receiving a first level signal provided by a first level circuit of the external board card in response to the first serial data pin and the first serial clock pin, and determining that the external board card is connected with the mainboard; receiving a second level signal provided by a second level circuit in response to the first serial data pin and the first serial clock pin, and determining that the external board card is not connected with the mainboard. According to the invention, the number of pins for in-situ detection on the mainboard and the external board card is reduced, and the cost of the main line and the external board card is reduced.

Description

Technical Field

[0001] The present application belongs to the technical field of electronic equipment, and specifically relates to a method for detecting the presence of a mainboard and an external board, and a readable storage medium. Background Art

[0002] The external board structure is one of the common structures in the server system. The motherboard needs to correctly detect the insertion of the external board and ensure a reliable connection.

[0003] At present, the in-situ detection technology of external boards usually relies on a transmitter dedicated to the external board and a receiver dedicated to the mainboard. Among them, an equivalent impedance to ground is set in the receiver. When the external board is not inserted into the mainboard, the equivalent impedance to ground in the receiver is in an open circuit state. When the external board is inserted into the mainboard, the transmitter is connected to the receiver, and the equivalent impedance to ground in the receiver is in a pass state. At this time, the mainboard can read an impedance value from the receiver to determine that the external board is inserted into the mainboard. Among them, the impedance value is usually 40 ohms (Ω) ~ 40Ω.

[0004] However, the current in-place detection method for external boards requires that a dedicated transmitter be set up for the external board, and correspondingly, a dedicated receiver be set up in the mainboard to provide different impedance values ​​when the external board is inserted into the mainboard and when it is not inserted into the mainboard. Obviously, the dedicated transmitter and receiver increase the extra cost of the external board and the mainboard, so improvement is urgently needed. Summary of the invention

[0005] The purpose of the embodiments of the present application is to provide a method for detecting an in-situ mainboard and an external board and a readable storage medium, which can solve the problem of high cost of boards and mainboards in the current in-situ detection scheme of external boards.

[0006] In order to solve the above technical problems, this application is implemented as follows:

[0007] In a first aspect, an embodiment of the present application provides a mainboard, the mainboard comprising: a first controller, a first serial data SDA pin, a first serial clock SCL pin, a switch circuit, a first level circuit and a second level circuit, wherein the first level circuit and the second level circuit are used to provide different level signals;

[0008] The first SDA pin is connected to the first controller, and is also connected to the first level circuit and the second level circuit respectively through the switch circuit; the first SCL pin is connected to the first controller, and is also connected to the first level circuit and the second level circuit respectively through the switch circuit;

[0009] The first controller is connected to the switch circuit, and is used for controlling the first SDA pin and the first SCL pin to be connected to the second level circuit through the switch circuit, and the first SDA pin and the first SCL pin to be disconnected from the first level circuit when a board presence detection condition is met; in response to receiving a first level signal provided by the first level circuit of the external board through the first SDA pin and the first SCL pin, it is determined that the external board is connected to the mainboard; in response to receiving a second level signal provided by the second level circuit through the first SDA pin and the first SCL pin, it is determined that the external board is not connected to the mainboard; the external board also includes a second SDA pin and a second SCL pin, and the second SDA pin and the second SCL pin are both connected to the first level circuit of the external board.

[0010] In a second aspect, an embodiment of the present application provides a method for detecting an external board in place, which is applied to a first controller of a mainboard, wherein the mainboard further includes a first serial data SDA pin, a first serial clock SCL pin, a switch circuit, a first level circuit and a second level circuit, wherein the first level circuit and the second level circuit are used to provide different level signals; the method includes:

[0011] When a board presence detection condition is met, the first SDA pin and the first SCL pin are controlled by the switch circuit to be connected to the second level circuit, and the first SDA pin and the first SCL pin are disconnected from the first level circuit;

[0012] In response to receiving a first level signal provided by a first level circuit of an external board through the first SDA pin and the first SCL pin, determining that the external board is connected to the main board;

[0013] In response to receiving a second level signal provided by the second level circuit through the first SDA pin and the first SCL pin, it is determined that the external board is not connected to the main board, and the external board also includes a second SDA pin and a second SCL pin, and the second SDA pin and the second SCL pin are both connected to the first level circuit of the external board.

[0014] In a third aspect, an embodiment of the present application provides an electronic device, which further includes: a processor, a memory, and a program or instruction stored in the memory and executable on the processor, wherein the program or instruction, when executed by the processor, implements the method for detecting an external board as described in any one of the second aspects.

[0015] In a fourth aspect, an embodiment of the present application provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, the method for detecting an external board in place as described in any one of the second aspects is implemented.

[0016] In a fifth aspect, an embodiment of the present application provides a chip, comprising a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is used to run a program or instruction to implement the in-place detection method of an external board as described in any one of the second aspects.

[0017] In an embodiment of the present application, the external board includes a first circuit level, a second SDA pin and a second SCL pin. And the second SDA pin and the second SCL pin are both connected to the first level circuit of the external board. The main board includes a first controller, a first SDA pin, a first SCL pin, a switch circuit, a first level circuit and a second level circuit. And the first SDA pin is connected to the first controller, and is also connected to the first level circuit and the second level circuit respectively through the switch circuit, and the first SCL pin is connected to the first controller, and is also connected to the first level circuit and the second level circuit respectively through the switch circuit.

[0018] In the technical scheme, the first controller is used to control the first SDA pin and the first SCL pin to be connected to the second level circuit through the switch circuit when the board in-place detection condition is met, and the first SDA pin and the first SCL pin are disconnected from the first level circuit; in response to receiving the first level signal provided by the first level circuit of the external board through the first SDA pin and the first SCL pin, it is determined that the external board is connected to the mainboard; in response to receiving the second level signal provided by the second level circuit through the first SDA pin and the first SCL pin, it is determined that the external board is not connected to the mainboard, and the mainboard detects the external board in-place. In addition, since the technical scheme of the present application realizes the in-place detection of the external board by reusing the I2C bus between the mainboard and the external board. Therefore, the mainboard and the external board do not need to add additional IO pins. Compared with the related art, the output pins of the dedicated transmitter on the external board and the output pins of the receiver on the mainboard are avoided, and the number of pins used for in-place detection on the mainboard and the external board is reduced, thereby reducing the cost of the main line and the external board. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is a structural diagram of a server system provided by the related technology;

[0020] Figure 2 It is a structural diagram of a server system provided in an embodiment of the present application;

[0021] Figure 3It is a flow chart of an in-place detection method of an external board provided in an embodiment of the present application;

[0022] Figure 4 It is a flow chart of another method for detecting an external board in place provided in an embodiment of the present application. DETAILED DESCRIPTION

[0023] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0024] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally indicates that the objects associated with each other are in an "or" relationship.

[0025] The external board structure is one of the common structures in the server system. The motherboard needs to correctly detect the insertion of the external board and ensure a reliable connection.

[0026] Currently, the in-place detection technology of the external board can also be used to detect whether the external board is connected to the mainboard by additionally designing an input / output (IO) pin. Figure 1 As shown, the main board 10 is used to connect to an external board through an I2C (InterIntegrated Circuit, I2C) bus. I2C is a serial communication bus, which includes two lines, namely serial data (Serial Data, SDA) and serial clock (Serial Clock, SCL), SDA and SCL transmit messages between devices connected to the I2C bus.

[0027] The mainboard 10 includes a first controller 101, a first pull-up resistor R11, a second pull-up resistor R12, a third pull-up resistor R13, a first SDA pin PIN11, a first SCL pin PIN12, and a first in-position pin PIN13. The first controller 101 is connected to the first SDA pin PIN11, the first SCL pin PIN12, and the first in-position pin PIN13, respectively.

[0028] One end of the first pull-up resistor R11 is connected to the power supply terminal VDD, and the other end is connected to the first SDA pin PIN11. One end of the second pull-up resistor R12 is connected to the power supply terminal VDD, and the other end is connected to the first SCL pin PIN12. One end of the third pull-up resistor R13 is connected to the power supply terminal VDD, and the other end is connected to the first in-position pin PIN13.

[0029] The external board 20 includes: a second controller 201, a second SDA pin PIN21, a second SCL pin PIN22 and a second in-position pin PIN23. The second controller 201 is connected to the second SDA pin PIN21 and the second SCL pin PIN22 respectively, and the second in-position pin PIN23 is grounded.

[0030] When the external board 20 is not connected to the mainboard 10, the first on-position pin PIN13 of the mainboard 10 is pulled up and connected to the power supply through the third pull-up resistor R13. The first controller 101 receives a high-level signal through the first on-position pin PIN13. When the external board 20 is connected to the mainboard 10, the first on-position pin PIN13 of the mainboard 10 is connected to the second on-position pin PIN23 of the external board 20, and then grounded through the second on-position pin PIN23. The first controller 101 receives a low-level signal through the first on-position pin PIN13.

[0031] In this way, the first controller 101 of the mainboard 10 can be used to collect the presence detection signal of the first presence pin PIN13. In response to receiving a high-level presence detection signal through the first presence pin PIN13, it is determined that the external board 20 is not connected to the mainboard 10; in response to receiving a low-level presence detection signal through the first presence pin PIN13, it is determined that the external board 20 is connected to the mainboard 10.

[0032] However, Figure 1 The in-situ detection method of the external board shown has the problem of occupying too many pins, and the pin resources of both the main board and the external board are relatively tight, so it is also urgently needed to be improved.

[0033] Please refer to Figure 2 , which shows a schematic diagram of the structure of a server system provided by an embodiment of the present application. The server system includes a mainboard and an external board. The mainboard can be used to perform in-situ detection on the external board to solve the above-mentioned problem to a certain extent. Figure 2 As shown, the server system includes: a mainboard 10 and an external board 20. The external board 20 can be connected to the mainboard 10 via an I2C bus.

[0034] The external board 20 includes: a first level circuit 202, a second SDA pin PIN21 and a second SCL pin PIN22. The second SDA pin PIN21 and the second SCL pin PIN22 are both connected to the first level circuit 202 of the external board 20. The first level circuit 202 of the external board 20 and the first level circuit 103 of the main board 10 are used to provide the same level signal. Optionally, the external board 20 also includes: a second controller 201. The second controller 201 is respectively connected to the second SDA pin PIN21 and the second SCL pin PIN22. For example, the second controller 201 can be any one of a central processing unit (CPU), a driver (Device), a complex programmable logic device (CPLD) and a programmable array logic (FPGA) on the external board 20.

[0035] The mainboard 10 includes: a first controller 101, a first SDA pin PIN11, a first SCL pin PIN12, a switch circuit 102, a first level circuit 103 and a second level circuit 104. The first level circuit 103 and the second level circuit 104 are used to provide different level signals. Optionally, the first level circuit 103 can be a pull-up circuit for providing a high level signal; the second level circuit 104 can be a pull-down circuit for providing a low level signal. Alternatively, the first level circuit 103 can be a pull-down circuit for providing a low level signal; the second level circuit 104 can be a pull-up circuit for providing a high level signal. Further optionally, the first controller 101 can be any one of the CPU, CPLD and FPGA on the mainboard 10.

[0036] The first SDA pin PIN11 is connected to the first controller 101, and the first SDA pin PIN11 is also connected to the first level circuit 103 and the second level circuit 104 through the switch circuit 102. The first SCL pin PIN12 is connected to the first controller 101, and the first SCL pin PIN12 is also connected to the first level circuit 103 and the second level circuit 104 through the switch circuit 102. The switch circuit 102 is used to control the first SDA pin PIN11 and the first level circuit 103, the first SDA pin PIN11 and the second level circuit 104, the first SCL pin PIN12 and the first level circuit 103, and the first SCL pin PIN12 and the second level circuit 104 to be turned on or off.

[0037] The first controller 101 is connected to the switch circuit 102. The first controller 101 is used to control the first SDA pin PIN11 and the first SCL pin PIN12 to be connected to the second level circuit 104 through the switch circuit 102, and the first SDA pin PIN11 and the first SCL pin PIN12 to be disconnected from the first level circuit 103 when the board presence detection condition is met, and to determine that the external board 20 is connected to the mainboard 10 in response to receiving the first level signal provided by the first level circuit 202 of the external board 20 through the first SDA pin PIN11 and the first SCL pin PIN12, and to determine that the external board 20 is not connected to the mainboard 10 in response to receiving the second level signal provided by the second level circuit 104 through the first SDA pin PIN11 and the first SCL pin PIN12.

[0038] In the embodiment of the present application, in the mainboard 10, when the first SDA pin PIN11 and the second level circuit 104 are turned on, the first SCL pin PIN12 and the second level circuit 104 are turned on, the first SDA pin PIN11 and the first level circuit 103 are turned off, and the first SCL pin PIN12 and the first level circuit 103 are turned off,

[0039] If the external board 20 is not connected to the mainboard 10, the first SDA pin PIN11 of the mainboard 10 transmits the second level signal provided by the second level circuit 104 to the first controller 101 through the second level circuit 104. In addition, the first SCL pin PIN12 of the mainboard 10 transmits the second level signal to the first controller 101 through the second level circuit 104. If the external board 20 is connected to the mainboard 10, the first SDA pin PIN11 of the mainboard 10 is connected to the second SDA pin PIN21 of the external board 20, and then transmits the first level signal provided by the first level circuit 202 to the first controller 101 through the first level circuit 202 of the external board 20. In addition, the first SCL pin PIN12 of the mainboard 10 is connected to the second SCL pin PIN22 of the external board 20, and then transmits the first level signal to the first controller 101 through the first level circuit 202 of the external board 20.

[0040] In this way, the first controller 101 of the mainboard 10 can control the first SDA pin PIN11 and the first SCL pin PIN12 to be turned on with the second level circuit 104 through the switch circuit 102, and the first SDA pin PIN11 and the first SCL pin PIN12 are disconnected from the first level circuit 103 when the board in-place detection condition is met. Further, in response to receiving the first level signal through the first SDA pin PIN11 and the first SCL pin PIN12, it is determined that the external board 20 is connected to the mainboard 10; in response to receiving the second level signal through the first SDA pin PIN11 and the first SCL pin PIN12, it is determined that the external board 20 is not connected to the mainboard 10. Optionally, meeting the board in-place detection condition may include at least one of the following: the mainboard 10 is initially powered on, an in-place detection instruction of the external board is received, etc.

[0041] Optionally, the first controller 101 is also used to: in response to receiving a first level signal provided by the first level circuit 202 of the external board 20 through the first SDA pin PIN11 and the first SCL pin PIN12, determine that the external board 20 is connected to the mainboard 10, and control the first SDA pin PIN11 and the first SCL pin PIN12 to be disconnected from the second level circuit 104 through the switching circuit 102, and the first SDA pin PIN11 and the first SCL pin PIN12 to be disconnected from the first level circuit 103. That is, after the first control 101 of the mainboard 10 determines that the external board 20 is connected to the mainboard 10 and completes the in-place detection of the external board, the first SDA pin PIN11 and the first SCL pin PIN12 can be controlled by the switch circuit 102 to be disconnected from the second level circuit 104, and the first SDA pin PIN11 and the first SCL pin PIN12 can be disconnected from the first level circuit 103, so as to avoid repeated pull-up and pull-down of the first level circuit 103, the second level circuit 104 and the first level circuit 202 of the external board 20, so as to affect the normal transmission signal between the external board 20 and the mainboard 10.

[0042] Further optionally, in the case where the first level circuit 103 is a pull-up circuit and the second level circuit 104 is a pull-down circuit, the first controller 101 is also used to: in response to receiving the second level signal provided by the second level circuit 104 through the first SDA pin PIN11 and the first SCL pin PIN12, determine that the external board 20 is not connected to the mainboard 10, and control the first SDA pin PIN11 and the first SCL pin PIN12 to be disconnected from the second level circuit 104 through the switch circuit 102, and the first SDA pin PIN11 and the first SCL pin PIN12 to be connected to the first level circuit 103. In this way, other I2C devices on the mainboard 10 can be pulled up normally through the first level circuit. And, if Figure 1The external board 20 in the related art shown can also be normally pulled up by the first level circuit so as not to affect data transmission.

[0043] In an embodiment of the present application, the external board includes a first circuit level, a second SDA pin and a second SCL pin. And the second SDA pin and the second SCL pin are both connected to the first level circuit of the external board. The main board includes a first controller, a first SDA pin, a first SCL pin, a switch circuit, a first level circuit and a second level circuit. And the first SDA pin is connected to the first controller, and is also connected to the first level circuit and the second level circuit respectively through the switch circuit, and the first SCL pin is connected to the first controller, and is also connected to the first level circuit and the second level circuit respectively through the switch circuit.

[0044] In the technical scheme, the first controller is used to control the first SDA pin and the first SCL pin to be connected to the second level circuit through the switch circuit when the board in-place detection condition is met, and the first SDA pin and the first SCL pin are disconnected from the first level circuit; in response to receiving the first level signal provided by the first level circuit of the external board through the first SDA pin and the first SCL pin, it is determined that the external board is connected to the mainboard; in response to receiving the second level signal provided by the second level circuit through the first SDA pin and the first SCL pin, it is determined that the external board is not connected to the mainboard, and the mainboard detects the external board in-place. In addition, since the technical scheme of the present application realizes the in-place detection of the external board by reusing the I2C bus between the mainboard and the external board. Therefore, the mainboard and the external board do not need to add additional IO pins. Compared with the related art, the output pins of the dedicated transmitter on the external board and the output pins of the receiver on the mainboard are avoided, and the number of pins used for in-place detection on the mainboard and the external board is reduced, thereby reducing the cost of the main line and the external board.

[0045] Moreover, compared with Figure 1 The in-situ detection scheme of the external board shown also reduces the setting of the first in-situ pin on the main board and the second in-situ pin on the external board accordingly, reduces the number of pins used for in-situ detection on the main board and the external board, and thus reduces the cost of the main line and the external board.

[0046] Alternatively, if Figure 2 As shown, the switch circuit 102 includes: a first switch unit 1021 and a second switch unit 1022 .

[0047] The first switch unit 1021 is respectively connected to the first SDA pin PIN11, the first SCL pin PIN12 and the first level circuit 103. The first switch unit 1021 is used to control the first SDA pin PIN11 and the first level circuit 103, and the first SCL pin PIN12 and the first level circuit 103 to be turned on or off.

[0048] The second switch unit 1022 is respectively connected to the first SDA pin PIN11, the first SCL pin PIN12 and the second level circuit 104. The second switch unit 1022 is used to control the first SDA pin PIN11 and the second level circuit 104, and the first SCL pin PIN12 and the second level circuit 104 to be turned on or off.

[0049] Accordingly, the first controller 101 can be used to control the first SDA pin PIN11 and the first level circuit 103, and the first SCL pin PIN12 and the first level circuit 103 to be turned on or off through the first switch unit 1021. And it is also used to control the first SDA pin PIN11 and the second level circuit 104, and the first SCL pin PIN12 and the second level circuit 104 to be turned on or off through the second switch unit 1022.

[0050] Further optionally, the first switch unit 1021 further includes a first switch element and a second switch element. The first switch element is respectively connected to the first SDA pin PIN11, the first level circuit 103 and the first controller 101. The first switch element is used to control the conduction or disconnection of the first SDA pin PIN11 and the first level circuit 103. The second switch element is respectively connected to the first SCL pin PIN12, the first level circuit 103 and the first controller 101. The second switch element is used to control the conduction or disconnection of the first SCL pin PIN12 and the first level circuit 103.

[0051] The first switch unit 1021 further includes a third switch and a fourth switch. The third switch is respectively connected to the first SDA pin PIN11, the second level circuit 104 and the first controller 101. The third switch is used to control the conduction or disconnection of the first SDA pin PIN11 and the second level circuit 104. The fourth switch is respectively connected to the first SCL pin PIN12, the second level circuit 104 and the first controller 101. The fourth switch is used to control the conduction or disconnection of the first SCL pin PIN12 and the second level circuit 104.

[0052] For example, the first switch element, the second switch element, the third switch element and the fourth switch element may be power tubes, that is, the first switch unit 1021 includes a first power tube Q1 and a second power tube Q2.

[0053] The output end of the first power tube Q1 is connected to the first SDA pin PIN11, the power supply end of the first power tube Q1 is connected to the first level circuit 103, and the control end of the first power tube Q1 is connected to the first controller 101. The first controller 101 is used to control the first power tube Q1 to be turned on or off, so as to control the first SDA pin PIN11 and the first level circuit 103 to be turned on or off.

[0054] The output end of the second power tube Q2 is connected to the first SCL pin PIN12, the power supply end of the second power tube Q2 is connected to the first level circuit 103, and the control end of the second power tube Q2 is connected to the first controller 101. The first controller 101 is used to control the second power tube Q2 to be turned on or off, so as to control the first SCL pin PIN12 and the first level circuit 103 to be turned on or off.

[0055] Correspondingly, the second switch unit 1022 includes a third power tube Q3 and a fourth power tube Q4. The output end of the third power tube Q3 is connected to the second level circuit 104, the power supply end of the third power tube Q3 is connected to the first SDA pin PIN11, and the control end of the third power tube Q3 is connected to the first controller 101. The first controller 101 is used to control the third power tube Q3 to be turned on or off, so as to control the first SDA pin PIN11 and the second level circuit 104 to be turned on or off.

[0056] The output end of the fourth power tube Q4 is connected to the second level circuit 104, the power supply end of the fourth power tube Q4 is connected to the first SCL pin PIN12, and the control end of the fourth power tube Q4 is connected to the first controller 101. The first controller 101 is used to control the fourth power tube Q4 to be turned on or off, so as to control the first SCL pin PIN12 and the second level circuit 104 to be turned on or off.

[0057] Optionally, the first controller 101 is also used to control the third power tube Q3 and the fourth power tube Q4 to be turned on, and control the first power tube Q1 and the second power tube Q2 to be turned off when the board presence detection condition is met; in response to receiving a first level signal provided by the first level circuit 202 of the external board 20 through the first SDA pin PIN11 and the first SCL pin PIN12, determine that the external board 20 is connected to the mainboard 10; in response to receiving a second level signal provided by the second level circuit 104 of the mainboard 10 through the first SDA pin PIN11 and the first SCL pin PIN12, determine that the external board 10 is not connected to the mainboard 20.

[0058] Further optionally, the first controller 101 is further used to: after determining that the external board 20 is connected to the mainboard 10, control the first power tube Q1, the second power tube Q2, the third power tube Q3 and the fourth power tube Q4 to be disconnected. The first controller 101 is further used to: after determining that the external board 20 is not connected to the mainboard 10, control the third power tube Q3 and the fourth power tube Q4 to be disconnected, and control the first power tube Q1 and the second power tube Q2 to be turned on.

[0059] For example, the first power tube Q1, the second power tube Q2, the third power tube Q3 and the fourth power tube Q4 are NMOS tubes. The first controller 101 can be used to transmit a high-level signal to the third power tube Q3 and the fourth power tube Q4, and transmit a low-level signal to the first power tube Q1 and the second power tube Q2, so as to control the third power tube Q3 and the fourth power tube Q4 to be turned on, and control the first power tube Q1 and the second power tube Q2 to be turned off, when the board presence detection condition is met.

[0060] The first controller 101 is also used to respond to receiving a first level signal through the first SDA pin PIN11 and the first SCL pin PIN12, determine that the external board 20 is connected to the mainboard 10, and transmit a low level signal to the first power tube Q1, the second power tube Q2, the third power tube Q3 and the fourth power tube Q4 to control the first power tube Q1, the second power tube Q2, the third power tube Q3 and the fourth power tube Q4 to be disconnected.

[0061] The first controller 101 is also used to respond to receiving the second level signal provided by the second level circuit 104 of the mainboard 10 through the first SDA pin PIN11 and the first SCL pin PIN12, determine that the external board 10 is not connected to the mainboard 20, transmit a low level signal to the third power tube Q3 and the fourth power tube Q4, and transmit a high level signal to the first power tube Q1 and the second power tube Q2 to control the third power tube Q3 and the fourth power tube Q4 to be disconnected, and control the first power tube Q1 and the second power tube Q2 to be turned on.

[0062] In some embodiments of the present application, the first level circuit 103 in the mainboard 10 can be a pull-up circuit, and the second level circuit 104 can be a pull-down circuit. Correspondingly, the first level circuit 202 in the external board 20 is a pull-up circuit. Alternatively, the first level circuit 103 in the mainboard 10 can be a pull-down circuit, and the second level circuit 104 can be a pull-up circuit. Correspondingly, the first level circuit 202 in the external board 20 is a pull-down circuit. The following embodiments are described by taking the example that the first level circuit 103 in the mainboard 10 can be a pull-up circuit, and the second level circuit 104 can be a pull-down circuit.

[0063] In an alternative case, if Figure 2As shown, the first level circuit 103 of the mainboard 10 includes: a first pull-up resistor R11 and a second pull-up resistor R12. One end of the first pull-up resistor R11 is connected to the power supply terminal VDD, and the other end is connected to the first SDA pin PIN11 through the switch circuit 102. One end of the second pull-up resistor R12 is connected to the power supply terminal VDD, and the other end is connected to the first SCL pin PIN12 through the switch circuit 102.

[0064] The second level circuit 104 of the mainboard 10 includes a first pull-down resistor R14 and a second pull-down resistor R15. One end of the first pull-down resistor R14 is grounded, and the other end is connected to the first SDA pin PIN11 through the switch circuit 102. One end of the second pull-down resistor R15 is grounded, and the other end is connected to the first SCL pin PIN12 through the switch circuit 102. Among them, the resistance of the first pull-down resistor R14 and the second pull-down resistor R15 can be much smaller than the resistance of the first pull-up resistor R11 and the second pull-up resistor R12. For example, the resistance of the first pull-up resistor R11 and the second pull-up resistor R12 can be greater than or equal to 1 kiloohm (kΩ) and less than or equal to 4.7kΩ. The resistance of the first pull-down resistor R14 and the second pull-down resistor R15 can be greater than or equal to 1 megohm (MΩ) and less than or equal to 4.7MΩ. For example, the resistance of the first pull-up resistor R11 and the second pull-up resistor R12 can be 4.7kΩ. The resistance values ​​of the first pull-down resistor R14 and the second pull-down resistor R15 may be 1 MΩ.

[0065] Similarly, the first level circuit 202 of the external board 20 includes: a fourth pull-up resistor R21 and a fifth pull-up resistor R22. One end of the fourth pull-up resistor R21 is connected to the power supply terminal VDD, and the other end is connected to the second SDA pin PIN21. One end of the fifth pull-up resistor R22 is connected to the power supply terminal VDD, and the other end is connected to the second SCL pin PIN22. Optionally, the resistance of the fourth pull-up resistor R21 and the fifth pull-up resistor R22 can be equal to the resistance of the first pull-up resistor R11 and the second pull-up resistor R12. The resistance of the fourth pull-up resistor R21 and the fifth pull-up resistor R22 can be greater than or equal to 1kΩ and less than or equal to 4.7kΩ. For example, the resistance of the fourth pull-up resistor R21 and the fifth pull-up resistor R22 can be 4.7kΩ.

[0066] Further optionally, the switch circuit 102 includes a first power tube Q1, a second power tube Q2, a third power tube Q3 and a fourth power tube Q4. Figure 2 As shown, the first level circuit 103 of the mainboard 10 includes: a first pull-up resistor R11 and a second pull-up resistor R12. One end of the first pull-up resistor R11 is connected to the power supply terminal VDD, and the other end is connected to the power supply terminal of the first power tube Q1. One end of the second pull-up resistor R12 is connected to the power supply terminal VDD, and the other end is connected to the power supply terminal of the second power tube Q2.

[0067] The second level circuit 104 of the mainboard 10 includes a first pull-down resistor R14 and a second pull-down resistor R15. One end of the first pull-down resistor R14 is grounded, and the other end is connected to the output end of the third power tube Q3. One end of the second pull-down resistor R15 is grounded, and the other end is connected to the output end of the fourth power tube Q4.

[0068] In this way, when the first power tube Q1 and the second power tube Q2 are turned off, and the third power tube Q3 and the fourth power tube Q4 are turned on, that is, the first SDA pin PIN11 and the second level circuit 104 in the mainboard 10 are turned on, the first SCL pin PIN12 and the second level circuit 104 are turned on, the first SDA pin PIN11 and the first level circuit 103 are disconnected, and the first SCL pin PIN12 and the first level circuit 103 are disconnected:

[0069] If the external board 20 is not connected to the mainboard 10, the first SDA pin PIN11 of the mainboard 10 is pulled down to ground through the first pull-down resistor R14. The first controller 101 receives a low-level signal through the first SDA pin PIN11. The first SCL pin PIN12 of the mainboard 10 is pulled down to ground through the second pull-down resistor R15. The first controller 101 receives a low-level signal through the first SCL pin PIN12.

[0070] If the external board 20 is connected to the mainboard 10, the first SDA pin PIN11 of the mainboard 10 is connected to the second SDA pin PIN21 of the external board 20, and then pulled up to the power supply through the fourth pull-up resistor R21 of the external board 20. The first controller 101 receives a high-level signal through the first SDA pin PIN11. The first SCL pin PIN12 of the mainboard 10 is connected to the second SCL pin PIN22 of the external board 20, and then pulled up to the power supply through the fifth pull-up resistor R22 of the external board 20. The first controller 101 receives a high-level signal through the second SCL pin PIN22.

[0071] In this way, the first controller 101 of the mainboard 10 can be used to control the third power tube Q3 and the fourth power tube Q4 to be turned on, and control the first power tube Q1 and the second power tube Q2 to be turned off when the board presence detection condition is met.

[0072] The first controller 101 is also used to determine that the external board 20 is connected to the main board 10 in response to receiving a high-level signal through the first SDA pin PIN11 and the first SCL pin PIN12, and control the first power tube Q1, the second power tube Q2, the third power tube Q3 and the fourth power tube Q4 to be disconnected to avoid repeated pull-up / pull-down of the first pull-up resistor R11 and the second pull-up resistor R12, the first pull-down resistor R14 and the second pull-down resistor R15, and the fourth pull-up resistor R21 and the fifth pull-up resistor R22, so as to affect the normal transmission signal between the external board 20 and the main board 10.

[0073] The first controller 101 is also used to respond to receiving a low level signal through the first SDA pin PIN11 and the first SCL pin PIN12, determine that the external board 10 is not connected to the mainboard 20, control the third power tube Q3 and the fourth power tube Q4 to be disconnected, and control the first power tube Q1 and the second power tube Q2 to be turned on. In this way, other I2C devices on the mainboard 10 can be pulled up normally through the first level circuit. And, if Figure 1 The external board 20 in the related art shown can also be normally pulled up by the first level circuit so as not to affect data transmission.

[0074] In an embodiment of the present application, the external board includes a first circuit level, a second SDA pin and a second SCL pin. And the second SDA pin and the second SCL pin are both connected to the first level circuit of the external board. The main board includes a first controller, a first SDA pin, a first SCL pin, a switch circuit, a first level circuit and a second level circuit. And the first SDA pin is connected to the first controller, and is also connected to the first level circuit and the second level circuit respectively through the switch circuit, and the first SCL pin is connected to the first controller, and is also connected to the first level circuit and the second level circuit respectively through the switch circuit.

[0075] In the technical scheme, the first controller is used to control the first SDA pin and the first SCL pin to be connected to the second level circuit through the switch circuit when the board in-place detection condition is met, and the first SDA pin and the first SCL pin are disconnected from the first level circuit; in response to receiving the first level signal provided by the first level circuit of the external board through the first SDA pin and the first SCL pin, it is determined that the external board is connected to the mainboard; in response to receiving the second level signal provided by the second level circuit through the first SDA pin and the first SCL pin, it is determined that the external board is not connected to the mainboard, and the mainboard detects the external board in-place. In addition, since the technical scheme of the present application realizes the in-place detection of the external board by reusing the I2C bus between the mainboard and the external board. Therefore, the mainboard and the external board do not need to add additional IO pins. Compared with the related art, the output pins of the dedicated transmitter on the external board and the output pins of the receiver on the mainboard are avoided, and the number of pins used for in-place detection on the mainboard and the external board is reduced, thereby reducing the cost of the main line and the external board.

[0076] Moreover, compared with Figure 1 The in-situ detection scheme of the external board shown also reduces the setting of the first in-situ pin on the main board and the second in-situ pin on the external board accordingly, reduces the number of pins used for in-situ detection on the main board and the external board, and thus reduces the cost of the main line and the external board.

[0077] Please refer to Figure 3 , which shows a flow chart of a method for detecting the presence of an external board provided in an embodiment of the present application. The method for detecting the presence of an external board can be applied to the mainboard and the external board provided in an embodiment of the present application. The method for detecting the presence of an external board can be executed by a first controller. Figure 2 As shown, the in-place detection method of the external board includes:

[0078] Step 301: When a board presence detection condition is met, a switch circuit is used to control a first SDA pin and a first SCL pin to be connected to a second level circuit, and the first SDA pin and the first SCL pin to be disconnected from a first level circuit.

[0079] Optionally, satisfying the board presence detection condition may include at least one of the following: the mainboard 10 is initially powered on, a presence detection instruction of an external board is received, and the like.

[0080] Step 302: In response to receiving a first level signal provided by a first level circuit of an external board through a first SDA pin and a first SCL pin, it is determined that the external board is connected to the main board.

[0081] In the embodiment of the present application, in the mainboard 10, when the first SDA pin PIN11 and the second level circuit 104 are turned on, the first SCL pin PIN12 and the second level circuit 104 are turned on, the first SDA pin PIN11 and the first level circuit 103 are turned off, and the first SCL pin PIN12 and the first level circuit 103 are turned off, if the external board 20 is not connected to the mainboard 10, the first SDA pin PIN11 of the mainboard 10 transmits the second level signal provided by the second level circuit 104 to the first controller 101 through the second level circuit 104. In addition, the first SCL pin PIN12 of the mainboard 10 transmits the second level signal to the first controller 101 through the second level circuit 104. Based on this, the first controller can determine that the external board is connected to the mainboard in response to receiving the first level signal provided by the first level circuit of the external board through the first SDA pin and the first SCL pin.

[0082] Step 303: In response to receiving a second level signal provided by a second level circuit through the first SDA pin and the first SCL pin, it is determined that the external board is not connected to the main board.

[0083] In the embodiment of the present application, in the mainboard 10, when the first SDA pin PIN11 and the second level circuit 104 are turned on, the first SCL pin PIN12 and the second level circuit 104 are turned on, the first SDA pin PIN11 and the first level circuit 103 are turned off, and the first SCL pin PIN12 and the first level circuit 103 are turned off, if the external board 20 is connected to the mainboard 10, the first SDA pin PIN11 of the mainboard 10 is connected to the second SDA pin PIN21 of the external board 20, and then the first level signal provided by the first level circuit 202 is transmitted to the first controller 101 through the first level circuit 202 of the external board 20. In addition, the first SCL pin PIN12 of the mainboard 10 is connected to the second SCL pin PIN22 of the external board 20, and then the first level signal is transmitted to the first controller 101 through the first level circuit 202 of the external board 20. Based on this, the first controller can determine that the external board is not connected to the mainboard in response to receiving the second level signal provided by the second level circuit through the first SDA pin and the first SCL pin.

[0084] In the embodiment of the present application, by controlling the first SDA pin and the first SCL pin to be connected to the second level circuit through the switch circuit when the board in-place detection condition is met, and the first SDA pin and the first SCL pin are disconnected from the first level circuit, in response to receiving the first level signal provided by the first level circuit of the external board through the first SDA pin and the first SCL pin, it is determined that the external board is connected to the mainboard; in response to receiving the second level signal provided by the second level circuit through the first SDA pin and the first SCL pin, it is determined that the external board is not connected to the mainboard, and the mainboard detects the external board in-place. In addition, since the technical solution of the present application realizes the in-place detection of the external board by reusing the I2C bus between the mainboard and the external board. Therefore, the mainboard and the external board do not need to add additional IO pins, and compared with the related art, the output pins of the dedicated transmitter on the external board and the output pins of the receiver on the mainboard are avoided, and the number of pins used for in-place detection on the mainboard and the external board is reduced, thereby reducing the cost of the main line and the external board.

[0085] Moreover, compared with Figure 1 The in-situ detection scheme of the external board shown also reduces the setting of the first in-situ pin on the main board and the second in-situ pin on the external board accordingly, reduces the number of pins used for in-situ detection on the main board and the external board, and thus reduces the cost of the main line and the external board.

[0086] Optionally, after determining that the external board is connected to the mainboard, the external board in-place detection method further includes: controlling the first SDA pin and the first SCL pin to be disconnected from the second level circuit and the first SDA pin and the first SCL pin to be disconnected from the first level circuit through a switching circuit.

[0087] Further optionally, after determining that the external board is not connected to the mainboard, the external board in-place detection method also includes: controlling the first SDA pin and the first SCL pin to be disconnected from the second level circuit and the first SDA pin and the first SCL pin to be connected to the first level circuit through a switching circuit.

[0088] It should be noted that the implementation method of each step in the embodiment of the method side can refer to the relevant introduction in the aforementioned device test embodiment, and the embodiment of the present application will not be elaborated on this.

[0089] In order to better understand the technical solution of this application, the following is further explained by way of example. Figure 4As shown, when the first controller of the mainboard is initialized and powered on, the pull-up control signal (Pull-up Control) is set to a low level and the pull-down control signal (Pull-down Control) is set to a high level. The first controller transmits a pull-up control signal (low level signal) to the first power tube Q1 and the second power tube Q2, and controls the first power tube Q1 and the second power tube Q2 to be turned off to turn off the pull-up. In addition, the first controller transmits a pull-down control signal (high level signal) to the third power tube Q3 and the fourth power tube Q4, and controls the third power tube Q3 and the fourth power tube Q4 to be turned on to turn on the pull-down.

[0090] The first controller reads the signals of the first SDA pin and the first SCL pin. When the first SDA pin and the first SCL pin are high level signals, it is determined that the external board is in place, that is, the external board is connected to the main board. The pull-up control signal and the pull-down control signal are both set to low high level. The first controller transmits a pull-up control signal (low level signal) to the first power tube Q1 and the second power tube Q2, and transmits a pull-down control signal (low level signal) to the third power tube Q3 and the fourth power tube Q4 to the first controller to control the first power tube Q1, the second power tube Q2, the third power tube Q3 and the fourth power tube Q4 to turn off. The external board can start to transmit data normally to the main board.

[0091] When the first SDA pin and the first SCL pin are low level signals, it is determined that the external board is not in place, that is, the external board is not connected to the mainboard. The pull-up control signal is set to a high level signal, and the pull-down control signal is set to a low high level signal. The first controller transmits a pull-up control signal (high level signal) to the first power tube Q1 and the second power tube Q2, and transmits a pull-down control signal (low level signal) to the third power tube Q3 and the fourth power tube Q4 to the first controller to control the first power tube Q1 and the second power tube Q2 to be turned on, and to control the third power tube Q3 and the fourth power tube Q4 to be turned off. Other I2C devices on the mainboard can start to transmit data normally to the mainboard.

[0092] In the embodiment of the present application, by controlling the first SDA pin and the first SCL pin to be connected to the second level circuit through the switch circuit when the board in-place detection condition is met, and the first SDA pin and the first SCL pin are disconnected from the first level circuit, in response to receiving the first level signal provided by the first level circuit of the external board through the first SDA pin and the first SCL pin, it is determined that the external board is connected to the mainboard; in response to receiving the second level signal provided by the second level circuit through the first SDA pin and the first SCL pin, it is determined that the external board is not connected to the mainboard, and the mainboard detects the external board in-place. In addition, since the technical solution of the present application realizes the in-place detection of the external board by reusing the I2C bus between the mainboard and the external board. Therefore, the mainboard and the external board do not need to add additional IO pins, and compared with the related art, the output pins of the dedicated transmitter on the external board and the output pins of the receiver on the mainboard are avoided, and the number of pins used for in-place detection on the mainboard and the external board is reduced, thereby reducing the cost of the main line and the external board.

[0093] Moreover, compared with Figure 1 The in-situ detection scheme of the external board shown also reduces the setting of the first in-situ pin on the main board and the second in-situ pin on the external board accordingly, reduces the number of pins used for in-situ detection on the main board and the external board, and thus reduces the cost of the main line and the external board.

[0094] An embodiment of the present application also provides an electronic device, comprising: a processor, a memory, and a program or instruction stored in the memory and executable on the processor, wherein the program or instruction, when executed by the processor, implements any of the methods for detecting the presence of an external board provided in the embodiments of the present application.

[0095] An embodiment of the present application also provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, each process of the above-mentioned embodiment of the in-place detection method of the external board is implemented, and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0096] The processor is a processor in the electronic device described in the above embodiment. The readable storage medium includes a computer readable storage medium, such as a computer read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0097] An embodiment of the present application further provides a chip, which includes a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is used to run programs or instructions to implement the various processes of the above-mentioned embodiment of the in-place detection method of the external board, and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0098] It should be understood that the chip mentioned in the embodiments of the present application can also be called a system-level chip, a system chip, a chip system or a system-on-chip chip, etc.

[0099] It should be noted that, in this article, the terms "comprise", "include" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise one..." do not exclude the presence of other identical elements in the process, method, article or device including the element. In addition, it should be pointed out that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in reverse order according to the functions involved, for example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0100] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, a magnetic disk, or an optical disk), and includes a number of instructions for a terminal (which can be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) to execute the methods described in each embodiment of the present application.

[0101] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

Claims

1. A motherboard, characterized in that: The mainboard includes: a first controller, a first serial data SDA pin, a first serial clock SCL pin, a switch circuit, a first level circuit and a second level circuit, wherein the first level circuit and the second level circuit are used to provide different level signals; The first SDA pin is connected to the first controller, and is also connected to the first level circuit and the second level circuit respectively through the switch circuit; the first SCL pin is connected to the first controller, and is also connected to the first level circuit and the second level circuit respectively through the switch circuit; The first controller is connected to the switch circuit, and is used for controlling the first SDA pin and the first SCL pin to be connected to the second level circuit through the switch circuit, and the first SDA pin and the first SCL pin to be disconnected from the first level circuit when a board presence detection condition is met; in response to receiving a first level signal provided by the first level circuit of the external board through the first SDA pin and the first SCL pin, it is determined that the external board is connected to the mainboard; in response to receiving a second level signal provided by the second level circuit through the first SDA pin and the first SCL pin, it is determined that the external board is not connected to the mainboard; the external board also includes a second SDA pin and a second SCL pin, and the second SDA pin and the second SCL pin are both connected to the first level circuit of the external board.

2. The mainboard according to claim 1, characterized in that: The switch circuit comprises: a first switch unit and a second switch unit; The first switch unit is connected to the first SDA pin, the first SCL pin and the first level circuit respectively, and the first switch unit is used to control the first SDA pin and the first level circuit, and the first SCL pin and the first level circuit to be turned on or off; The second switch unit is connected to the first SDA pin, the first SCL pin and the second level circuit respectively, and is used to control the first SDA pin and the second level circuit, and the first SCL pin and the second level circuit to be turned on or off.

3. The mainboard according to claim 2, characterized in that: The first switch unit includes a first power tube and a second power tube; The output end of the first power tube is connected to the first SDA pin, the power supply end of the first power tube is connected to the first level circuit, and the control end of the first power tube is connected to the first controller; the output end of the second power tube is connected to the first SCL pin, the power supply end of the second power tube is connected to the first level circuit, and the control end of the second power tube is connected to the first controller; The second switch unit includes a third power tube and a fourth power tube; The output end of the third power tube is connected to the second level circuit, the power supply end of the third power tube is connected to the first SDA pin, and the control end of the third power tube is connected to the first controller; the output end of the fourth power tube is connected to the second level circuit, the power supply end of the fourth power tube is connected to the first SCL pin, and the control end of the fourth power tube is connected to the first controller.

4. The mainboard according to claim 3, characterized in that: The first level circuit of the mainboard includes a first pull-up resistor and a second pull-up resistor; one end of the first pull-up resistor is connected to the power supply end, and the other end is connected to the power supply end of the first power tube; one end of the second pull-up resistor is connected to the power supply end, and the other end is connected to the power supply end of the second power tube; The second level circuit includes a first pull-down resistor and a second pull-down resistor; One end of the first pull-down resistor is grounded, and the other end is connected to the output end of the third power tube; one end of the second pull-down resistor is grounded, and the other end is connected to the output end of the fourth power tube.

5. The mainboard according to claim 4, characterized in that: The first controller is also used to control the third power tube and the fourth power tube to be turned on, and control the first power tube and the second power tube to be turned off when a board presence detection condition is met; in response to receiving a first level signal provided by a first level circuit of an external board through the first SDA pin and the first SCL pin, determine that the external board is connected to the mainboard; in response to receiving a second level signal provided by the second level circuit through the first SDA pin and the first SCL pin, determine that the external board is not connected to the mainboard.

6. The mainboard according to claim 1, characterized in that: The first controller is further configured to, in response to receiving a first level signal provided by a first level circuit of an external board through the first SDA pin and the first SCL pin, determine that the external board is connected to the main board, and control the first SDA pin and the first SCL pin to be disconnected from the second level circuit through the switch circuit, and the first SDA pin and the first SCL pin to be disconnected from the first level circuit; The first level circuit is a pull-up circuit, and the second level circuit is a pull-down circuit; the first controller is also used to respond to receiving a second level signal provided by the second level circuit through the first SDA pin and the first SCL pin, determine that the external board is not connected to the main board, and control the first SDA pin and the first SCL pin to be disconnected from the second level circuit through the switch circuit, and the first SDA pin and the first SCL pin to be connected to the first level circuit.

7. A method for detecting an external board in place, characterized in that: A first controller applied to a mainboard, the mainboard further comprising a first serial data SDA pin, a first serial clock SCL pin, a switch circuit, a first level circuit and a second level circuit, wherein the first level circuit and the second level circuit are used to provide different level signals; The method comprises: When a board presence detection condition is met, the first SDA pin and the first SCL pin are controlled by the switch circuit to be connected to the second level circuit, and the first SDA pin and the first SCL pin are disconnected from the first level circuit; In response to receiving a first level signal provided by a first level circuit of an external board through the first SDA pin and the first SCL pin, determining that the external board is connected to the main board; In response to receiving a second level signal provided by the second level circuit through the first SDA pin and the first SCL pin, it is determined that the external board is not connected to the main board, and the external board also includes a second SDA pin and a second SCL pin, and the second SDA pin and the second SCL pin are both connected to the first level circuit of the external board.

8. The method according to claim 7, characterized in that After determining that the external board is connected to the main board, the method further includes: The first SDA pin and the first SCL pin are controlled by the switch circuit to be disconnected from the second level circuit, and the first SDA pin and the first SCL pin are disconnected from the first level circuit.

9. The method according to claim 7 or 8, characterized in that: After determining that the external board is not connected to the main board, the method further includes: The switch circuit controls the first SDA pin and the first SCL pin to be disconnected from the second level circuit, and the first SDA pin and the first SCL pin to be connected to the first level circuit.

10. A readable storage medium, characterized in that: The readable storage medium stores a program or instruction, and when the program or instruction is executed by the processor, the method for detecting the presence of an external board as described in any one of claims 7 to 9 is implemented.

Images