Bootstrap program selection method

Abstract

The description relates to a bootstrap program selection method. More specifically, a method of selecting bootstraps is described, each bootstrap being contained in two separate storage memories of a microprocessor, where an option register read first during a reset of the microprocessor decides the selection of one of the bootstraps.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to French patent application No. FR2306974, filed on June 30, 2023, entitled “Procédé de Sélection de Programmes de Démarrage”, which is incorporated herein by reference to the maximum extent permitted by law. Technical Field

[0003] The present disclosure generally relates to methods for selecting a boot program in a microprocessor, and microprocessors implementing such methods. Background Art

[0004] Many electronic circuits, such as microcontrollers, including systems on a chip (SOCs), include an architecture that enables the selection of the security level of resources and memory used by applications implemented in these circuits.

[0005] However, some architectures do not substantially enable selection between multiple security levels. Summary of the invention

[0006] There is a need to provide methods for enabling selection between multiple security levels in circuits having an architecture that does not substantially support selection between multiple security levels.

[0007] The embodiments overcome all or part of the disadvantages of the known methods.

[0008] An embodiment provides a method for selecting boot programs, each boot program contained in two separate storage memories of a microprocessor, wherein an option register that is read first during a reset of the microprocessor conditions the selection of one of the boot programs.

[0009] In an embodiment, the first boot program is contained in user memory and the second boot program is contained in system memory.

[0010] In an embodiment, when the system is initialized, when the option register has a first value, a first boot program is selected.

[0011] In an embodiment, at system initialization, when the option register has another value, the second boot program is selected.

[0012] In an embodiment, when the first boot program is selected, the first boot program is configured to modify the value of a second register representing the size of the access-prohibited area of ​​the system memory containing the second boot program, so that the second boot program is inaccessible.

[0013] In an embodiment, when the first boot program is selected, the first boot program is configured to modify the value of a second register representing the size of the access-prohibited area of ​​the system memory containing the second boot program and the third boot program so that the second boot program and the third boot program are inaccessible.

[0014] In an embodiment, the value of the second register can only be incremented.

[0015] In an embodiment, the modification of said value of the second register is an increase of more than one bit.

[0016] In an embodiment, after selecting the first boot program, at least one application may be executed from the user memory.

[0017] In an embodiment, when the first boot program is selected, the first boot program implements configuration of the microprocessor so that it is in a secure mode and returns an error when a non-secure transaction requires access to a secure resource of the microprocessor.

[0018] In an embodiment, when the first boot program is selected, the first boot program implements configuration of the microprocessor so that it is in a secure mode and an error is returned when a secure transaction requires access to a non-secure resource of the microprocessor.

[0019] In an embodiment, when the first boot program is selected, the first boot program enables a debug function authorized to access one or more areas of the memory corresponding to the value of the second register containing the second boot program and the third boot program.

[0020] In an embodiment, the user memory is a non-volatile memory or a RAM type memory.

[0021] In an embodiment, multiple applications may be executed from user memory after using the first boot program, and each of these applications is in the same security mode.

[0022] An embodiment provides a microprocessor including a system memory and a user memory, and configured to implement the method as described above. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The above features and advantages as well as other features and advantages will be described in detail in the remainder of the present disclosure with reference to specific embodiments given by way of example and not limitation, with reference to the accompanying drawings, in which:

[0024] Figure 1 An example of an integrated circuit of the type to which the described embodiments are applicable is shown very schematically in block form;

[0025] Figure 2 Illustration of the selection for Figure 1 An implementation mode of the boot procedure method of the circuit; and

[0026] Figure 3 Illustration of the selection for Figure 1 Another implementation mode of the bootstrap method of the circuit. DETAILED DESCRIPTION

[0027] Similar features are denoted by similar reference numerals in the various figures. In particular, common structural and / or functional features between various embodiments may have the same reference numerals and may be provided with the same structure, dimensions, and material properties.

[0028] For clarity, only the steps and elements that are useful for understanding the described embodiments are illustrated and described in detail.

[0029] Unless otherwise specified, when referring to two elements being connected together, this means a direct connection without any intermediate elements except conductors, and when referring to two elements being coupled together, this means the two elements may be connected or they may be coupled via one or more other elements.

[0030] In the following description, when reference is made to terms defining absolute positions, such as terms "edge", "back", "up", "down", "left", "right", etc., or terms defining relative positions, such as terms "above", "below", "upper", "lower", etc., or terms defining directions, such as terms "horizontal", "vertical", etc., unless otherwise specified, they refer to the orientation of the drawing.

[0031] Unless otherwise indicated, the expressions "about", "approximately", "substantially" and "approximately" mean plus or minus 10%, preferably plus or minus 5%.

[0032] Figure 1 An example of an integrated circuit 100 of the type to which the described embodiments apply is shown very schematically in block form.

[0033] The circuit 100 includes a non-volatile memory 104 (FLASH MEMORY), for example a flash memory type, which can communicate with a non-volatile memory interface 106 (flash memory interface) via a communication bus 114, which is configured to write data to the non-volatile memory 104 or read data from the non-volatile memory 104. In an example, a system program and / or an application (such as a boot program) is implemented in the memory 104.

[0034] The circuit 100 also includes, for example, a processing unit 110 (CPU) including one or more processors controlled by instructions stored in a system instruction memory 112 (INSTR MEM). The instruction memory 112 is, for example, a volatile random access memory (RAM). The processing unit 110 and the memory 112 communicate, for example, via a system (data, address and control) bus 140. The flash memory 104 is coupled to the system bus 140 via a non-volatile memory interface 106 and via a bus 114. The device 100 also includes an input / output interface 108 (I / O interface) coupled to the system bus 140 for communication with the outside.

[0035] The circuit 100 also comprises another memory 120 (USER MEM), for example of non-volatile type or RAM type. This memory 120 is coupled to the system bus 140 directly or via a memory interface (not shown) having a role similar to that of the interface 106, for example.

[0036] The device 100 may integrate other circuits (e.g., one or more volatile and / or non-volatile memories, other processing units) to implement other functions. Figure 1 Among these other circuits, the circuit 100 includes, for example, a read-only or static memory 118 (ROM).

[0037] For example, during a factory programming process, one or more boot programs of the circuit are transferred directly to the memory 104. Once the boot program(s) have been transferred to the flash memory 104, they cannot be modified unless the circuit 100 is reset. To this end, this provides for locking access to the flash memory area containing the boot program, so that it cannot be accessed without a reboot. This is achieved, for example, by implementing a register (HDPL), for example monotonically increasing, whose value represents the size of the prohibited access area of ​​the memory containing the boot program(s), so that the boot program(s) cannot be accessed. For example, when the value of the register HDPL is 1, the boot program located in the area of ​​the memory associated with the value 1 can be executed. After execution, the value HDPL is incremented to 2, which prohibits access to the boot program located in the area of ​​the memory associated with the value 2. If a second boot program has been loaded into the memory in the sector between HDPL1 and HDPL2, then the program can be executed, after which the value HDPL is incremented to 3, which prohibits access to both boot programs located in the area of ​​the memory associated with the values ​​1 and 2. Then, for example, an application can be implemented in the memory without the same access restriction level.

[0038] In some architectures, such as v8M or M33 type architecture, by selecting options during development, circuit resources or memory and certain programs can be partitioned into different security levels. In these examples, this mechanism is called "Trustzone". For example, the first security level (secure) is achieved by establishing the following mechanism, that is, when a non-secure transaction requires access to the secure resources of the microprocessor, an error is returned, for example, through bus 140, and when a secure transaction requires access to the non-secure resources of the microprocessor, an error is also returned. Then, for example, the rest of the circuit and / or program can implement less strict security principles, such as programs with a security level lower than the first level can only access non-secure resources and memory of circuit 100.

[0039] In some architectures, such as M85 type architectures do not have an option for selecting whether to partition circuit resources, memories, and programs with different security levels. In these architectures, only a high security level is available. In other words, in these architectures, there is no possibility of disabling the "Trustzone" mechanism itself. Therefore, there is basically an isolation (e.g., called TZIsolation) between resources, memories, or programs with a first security level and a lower security mode. This causes problems, making it impossible to easily develop applications that do not require security isolation (e.g., the "Trustzone" mechanism) or even do not require protection at all.

[0040] The described embodiments provide a method for implementing the selection of boot programs, each boot program being contained in two separate memories of a microprocessor, wherein the option register which is read first when the microprocessor is reset determines the selection of one of the boot programs.

[0041] For example, this makes it possible to avoid systematically implementing a system that partitions resources, memory or programs between multiple security levels. Thus, it is possible to obtain a single security level, or generate a single security level for all resources, memory and programs used.

[0042] This further enables a software solution to be obtained that facilitates the development of applications that do not require a high level of security. This mode is for example called "legacy".

[0043] Since no hardware modifications are made and no code natively embedded in the circuitry is modified to implement the described embodiments, no additional vulnerabilities are introduced in terms of security.

[0044] Figure 2 Illustration of the selection for Figure 1 Implementation mode of the bootstrap method of the circuit.

[0045] In a first step 202 (Start), the method starts. This step corresponds, for example, to a reset of the circuit 100.

[0046] In the second step 204 (check NoTZIsolation register value), the register NoTZIsolation is read before the boot procedure is executed. For example, if the value of register NoTZIsolation=0, then step 206 is executed (starting the boot 1 / 2 procedure), and if for example NoTZIsolation=1, then step 208 is executed (starting the initialization function).

[0047] At step 206, a boot program boot1 is implemented from the system memory of the circuit 100. The system memory is, for example, the flash memory 104 or the memory 112. This boot program boot1 enables, for example, partitioning between circuit resources or memories, and enables certain programs with different security levels, such as The brand’s “Trustzone” model.

[0048] At step 208, another boot program, also referred to as an initialization function (init), is executed from user memory (eg, memory 120).

[0049] In the example, the initialization function init is configured to modify the value of the register HDPL, which represents the size of the prohibited access area of ​​the system memory containing the boot program boot1, so the boot program boot1 and other boot programs that may be located immediately after it in the system memory cannot be accessed or executed before the boot program init is executed. When there is only the boot program boot1 in the system memory, the modification of the value of the register HDPL by the initialization function init includes increasing the value HDPL by one bit, for example, from 1 to 2. For example, the register HDPL increases monotonically, which makes the boot program boot1 impossible to implement because it is no longer accessed. For example, when there is a boot program boot2 in addition to the boot program boot1 in the system memory, the modification of the value of the register HDPL by the initialization function init includes increasing the value HDPL by more than one bit. Then, HDPL changes from 1 to 3, for example, which makes both the boot programs boot1 and boot2 unable to execute because they can no longer be accessed. The initialization function init is implemented only as a boot program, which makes it possible to avoid a system that systematically implements partitioning of resources, memory or programs between multiple security levels. Due to the initialization function init, it is possible to obtain a single security level, or to generate the same security level for all resources, memories and programs used by an application developed using the initialization function init.

[0050] In an example, when bootloader init is selected, bootloader init implements configuration of the microprocessor such that it is in a secure mode, wherein an error is returned, for example via bus 140, when a non-secure transaction requires access to a secure resource of the microprocessor.

[0051] In another example, when bootloader init is selected, bootloader init implements configuration of the microprocessor such that it is in a secure mode, wherein an error is returned when a secure transaction requires access to a non-secure resource of the microprocessor.

[0052] Figure 3 Illustration of the selection for Figure 1 Another implementation of a method for a bootstrap program of a circuit.

[0053] More specifically, the illustrated example depicts user memory (eg, implemented by memory 120 ) and system memory (eg, implemented by one of memories 104 or 112 ).

[0054] In the example shown, two consecutive boot programs boot1 and boot2 have been preloaded into the system memory, and the initialization function init is present in the user memory 120 or is loaded during a reset of the circuit 100 .

[0055] At reset Reset of the circuit 100 , and as in the example shown, the read value of the register NoTZIsolation is 1 (NoTZIsolation=1), and this is before the programs boot1 and boot2 are implemented.

[0056] At reset, the processing unit 110 will start by executing, and may have previously loaded, the initialization function init, so this function is executed first. This function changes the value of the register HDPL from 1 to 3 to prevent the implementation (e.g., execution) of the boot programs boot1 and boot2, which creates a partition in terms of security levels of resources, memory, and programs.

[0057] The initialization function init configures the circuit 100 to a secure mode, for example, in which resources, application memory and programs have the same security level, ie there is no partition with multiple security levels.

[0058] Then, one or more applications 320 are executed with the security level established by the initialization function init (AppliNoTZIsolation).

[0059] In an example, the initialization function init, when selected, enables a debug function that is authorized to access one or more areas of the user memory 120 and / or the system memory 104, 112. For example, if only boot1 exists, then this debug function may be limited to applications on memory sectors corresponding to values ​​of the register HDPL greater than or equal to 2, or if boot1 and boot2 exist, then this debug function is limited to applications on memory sectors corresponding to values ​​of the register HDPL greater than or equal to 3.

[0060] When the read value of the register NoTZIsolation is 0 (NoTZIsolation=0) when the circuit 100 is reset, the programs boot1 and boot2 are implemented without implementing the initialization function init.

[0061] Depending on the value of the register NoTZIsolation, different boot programs init, boot1 / boot2 can be executed. Therefore, different security architectures can be provided according to the value read during Reset.

[0062] The register NoTZIsolation is not present, for example, directly in the circuit or microcontroller 100. It is present, for example, in another circuit, such as a development or programming circuit board or a computer circuit, which is coupled to the circuit or microcontroller 100, for example, via a JTAG connection.

[0063] The system memory is, for example, a portion or the entire memory that is reserved, for example, for the manufacturer of the circuit or microcontroller 100. This system memory contains a boot loader and other security functions that only the manufacturer can access. The system memory is programmed, for example, during the manufacturing process of the circuit or microcontroller 100. The user (e.g., an integrator or OEM) cannot modify the system memory. On the other hand, the user memory is part or all of the memory reserved for the user, and it will contain user application firmware. In one example, the system memory and the user memory are two different areas of non-volatile memory. In another example, the system memory and the user memory are two areas of the same non-volatile memory (e.g., flash memory).

[0064] Various embodiments and variations have been described. Those skilled in the art will appreciate that certain features of these various embodiments and variations can be combined, and those skilled in the art will recognize other variations.

[0065] Finally, based on the functional indications given above, the actual implementation of the embodiments and variants is within the capabilities of a person skilled in the art. In particular, with regard to the user memory, a person skilled in the art may, for example, implement it in a dedicated area of ​​the memory 104 that is different from and isolated from the area dedicated to the boot program boot1. In addition, although the example mentioned mentions modifying the register HDPL to implement the initialization function init without implementing boot1 and / or boot2, a person skilled in the art may implement any similar mechanism that makes it possible to prevent the implementation of the boot program boot1 / boot2 after the initialization function init has already started.

Claims

1. A method of selecting a boot program from a plurality of boot programs, each boot program being contained in two separate storage memories of a microprocessor, wherein an option register which is read first during a reset of the microprocessor determines the selection of one of the plurality of boot programs. 2 . The method of claim 1 , wherein the first boot program is contained in a user memory and the second boot program is contained in a system memory.

3. The method of claim 1, wherein at initialization of a system including the microprocessor, when the option register has a first value, the first boot program is selected.

4. The method of claim 3, wherein at system initialization, when the option register has a value other than the first value, the second boot program is selected.

5. The method of claim 3, wherein when the first boot program is selected, the first boot program is configured to modify a value of a second register representing a size of an access-prohibited area of ​​a system memory containing a second boot program so that the second boot program is inaccessible.

6. The method of claim 5, wherein when the first boot program is selected, the first boot program is configured to modify the value of the second register representing the size of the access-prohibited area of ​​the system memory containing the second boot program and the third boot program so that the second boot program and the third boot program are inaccessible.

7. The method of claim 5, wherein the value of the second register can only be incremented.

8. The method of claim 6, wherein modifying the value of the second register comprises increasing by more than one bit.

9. The method of claim 2, wherein after selecting the first boot program, at least one application is executable from the user memory.

10. The method of claim 2, wherein when the first boot program is selected, the first boot program implements configuration of the microprocessor so that it is in a secure mode and returns an error when a non-secure transaction requires access to secure resources of the microprocessor.

11. The method of claim 2, wherein when the first boot program is selected, the first boot program implements configuration of the microprocessor so that it is in a secure mode and returns an error when a secure transaction requires access to a non-secure resource of the microprocessor.

12. The method of claim 6, wherein when the first boot program is selected, the first boot program enables a debug function authorized to access one or more areas of the system memory corresponding to the value of the second register containing the second boot program and the third boot program.

13. The method of claim 2, wherein the user memory is a non-volatile memory or a RAM type memory.

14. The method of claim 9, wherein a plurality of applications are executable from the user memory after using the first boot program, and each of the applications is in the same security mode.

15. The method of claim 1, wherein the option register is external to the microprocessor.

16. The method of claim 15, wherein the option register is in a computer coupled to the microprocessor.

17. A microprocessor comprising a system memory and a user memory, wherein the microprocessor is configured to implement the method of claim 1.

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