Charge pump circuit, control method thereof and phase-locked loop circuit

Abstract

The invention discloses a charge pump circuit, a control method thereof and a phase-locked loop circuit. The charge pump circuit comprises a basic charge pump and one or more adjusting charge pumps, and the output ends of the basic charge pump and the one or more adjusting charge pumps are connected to serve as output nodes of the charge pump circuit; the method comprises the following steps: controlling the basic charge pump to work normally after electrifying; when current switching is carried out, the equivalent current of the basic charge pump before and after current switching is controlled to be kept unchanged, and the equivalent current of the adjusting charge pump before and after current switching is controlled to be changed. By means of the scheme, sudden change of the voltage of the output node when the current of the charge pump circuit changes can be avoided, and then the influence on the output clock signal of the phase-locked loop is avoided.

Description

Technical Field

[0001] The present invention relates to the field of circuit technology, in particular to a charge pump circuit and a control method thereof, and also to a phase-locked loop circuit. Background Art

[0002] As an important module in the phase-locked loop circuit, the charge pump receives the output signal of the phase frequency detector and generates a corresponding current, which is output to the loop filter to generate a control voltage for controlling the voltage-controlled oscillator to obtain the desired output frequency of the phase-locked loop.

[0003] Figure 1 This is a typical charge pump circuit structure diagram in the prior art, which is mainly composed of two adjustable current sources (charging current source Iup and discharging current source Idn), four switches S1~S4, and an operational amplifier OP1. Switch S1 is controlled by the up signal up, switch S3 is controlled by the inverse signal upb of the up signal; switch S2 is controlled by the down signal dn, and switch S4 is controlled by the inverse signal dnb of the down signal dn.

[0004] When the input up signal up is at a high level, the switch S1 is turned on, and the charging current source Iup charges the node Vc1 through the switch S1. At this time, the signal upb is at a low level, the switch S3 is turned off, and the voltage of the node Vc1 increases;

[0005] When the input down signal dn is at a high level, the switch S2 is turned on, and the discharge current source Idn discharges the node Vc1 through the switch S2. At this time, the signal dnb is at a low level, the switch S4 is turned off, and the voltage of the node Vc1 decreases.

[0006] When the input up signal up and down signal dn are both at high level, the node Vc1 is neither charged nor discharged, and the voltage of the node Vc1 remains unchanged;

[0007] When the input up signal up and down signal dn are both at low level, switches S1 and S2 are both disconnected, the voltage at node Vc1 is maintained by the capacitor of the loop filter, switches S3 and S4 are both turned on, and current flows from switch S3 to switch S4 via node Vcc.

[0008] Figure 1 The operational amplifier OP1 in the circuit is used for clamping, so that the voltage of the node Vcc follows the voltage of the node Vc1, and the influence of the non-ideal factors of the charge pump on the voltage of the node Vc1 is weakened.

[0009] When the current of the charging current source Iup and the discharging current source Idn switches from I1 to I2, due to the on-resistance of the switch, the voltage difference between the two ends of the switch is different when the current of different magnitudes flows through it. Therefore, after the current switches from I1 to I2, the voltage of node X and node Y changes (for example, the voltage of node X increases and the voltage of node Y decreases), and the parasitic capacitance Cx of node X and the parasitic capacitance Cy of node Y share charge with the capacitance of the loop filter. The net effect is to extract or deliver charge from the loop filter, thereby causing the voltage of node Vc1 to suddenly change at the moment t1 of the current switching, and the phase-locked loop needs to be re-locked, resulting in greater jitter of the phase-locked loop output clock signal.

[0010] Figure 2 is the simulation result of one of the cases, that is, the change of the voltage of node Vc1 when the charge pump current switches from a smaller current to a larger current. Figure 2 It can be seen that at time t1, a large instantaneous current flows from the loop filter to the charge pump, causing the voltage of the node Vc1 to suddenly change downward. Figure 2 The vertical coordinate of the medium voltage Vc1 ranges from 490 to 515 mV, and the vertical coordinate of the current Ic ranges from -0.5 to 3.5 mA.

[0011] In order to solve the problem that the conventional charge pump causes Vc fluctuation when switching current, another charge pump circuit in the prior art is as follows: Figure 3 The timing diagram is shown in Figure 4 shown.

[0012] Figure 4 In the figure, ctr is the switching control signal; ctr_sw is the switch control signal. When ctr_sw is at a low level, the corresponding switch S5 is turned on and the switch S6 is turned off; when the ctr_sw signal is at a high level, the corresponding switch S5 is turned off and the switch S6 is turned on.

[0013] Also refer to Figure 3 and Figure 4 When the current of the charging current source Iup and the discharging current source Idn are switched from I1 to I2 under the action of the switching control signal ctr, the nodes X and Y share charges with the loop filter, resulting in fluctuations in the voltage of the node Vc1. In order to avoid the voltage fluctuation from causing noise disturbance to the output clock of the phase-locked loop, compared with Figure 1 The circuit shown, Figure 3The improved solution adds switches S5, S6, and operational amplifier OP2. Among them, node Vc2 is connected to the voltage-controlled oscillator. Before the current switching, switch S5 is turned on and switch S6 is turned off; at time t1, when the current switches from I1 to I2 (I1 < I2 in this example), switch S5 is turned off and switch S6 is turned on. At this time, the voltage fluctuation of node Vc1 caused by charge sharing cannot be transmitted to node Vc2, avoiding the influence of the voltage fluctuation of node Vc1 on the output clock of the voltage-controlled oscillator. At time t1' after the current switching for a period of time, the voltage of node Vc1 gradually returns to the normal value, and due to the clamping effect of operational amplifier OP2, the voltage of node Vc1 after stabilization is equal to the voltage of node Vc2. At this time, control switch S5 to be turned on and switch S6 to be turned off, so that the phase-locked loop resumes closed-loop operation.

[0014] Obviously, Figure 3 The solution shown is considered from the perspective of avoiding the influence of voltage ripple during switching on the output clock, and does not avoid the generation of voltage ripple. Moreover Figure 3 The solution shown also has the following disadvantages:

[0015] On the one hand, adding the extra switches S5 and S6, and operational amplifier OP2 will increase the area and power consumption of the circuit; on the other hand, in the timing control, the switch control signal ctr_sw requires not only the switching information at time t1, but also the switching information at time t1', and the time difference between t1' and t1 should be sufficient for node Vc1 to return to the stable value, so the timing control is relatively complex. Summary of the Invention

[0016] On the one hand, embodiments of the present invention provide a charge pump circuit and its control method to avoid the output node voltage from mutating when the current in the charge pump circuit changes, thereby avoiding affecting the output clock signal of the phase-locked loop.

[0017] On the other hand, embodiments of the present invention also provide a phase-locked loop circuit, which can reduce power consumption and ensure the stability of the output clock signal.

[0018] Embodiments of the present invention provide the following technical solutions:

[0019] Embodiments of the present invention provide a control method for a charge pump circuit. The charge pump circuit includes a basic charge pump and one or more adjustable charge pumps. The output ends of the basic charge pump and the one or more adjustable charge pumps are connected as the output node of the charge pump circuit; the method includes:

[0020] After power-on, control the basic charge pump to work normally;

[0021] When current switching is performed, the equivalent current of the basic charge pump is controlled to remain unchanged before and after the current switching, and the equivalent current of the regulating charge pump is controlled to change before and after the current switching.

[0022] Optionally, the regulating charge pump is one; the equivalent current of the basic charge pump is I1, and the current switching is switching from current I1 to current I2, I1 <I2;

[0023] The controlling the equivalent current of the regulating charge pump to change before and after the current switching comprises:

[0024] The regulating charge pump is controlled to change the equivalent current 0 before the current switching to the equivalent current I2-I1 after the current switching.

[0025] Optionally, the regulating charge pump is one; the equivalent current of the basic charge pump is I1, and the current is switched from current I2 to current I1, I1 <I2;

[0026] The controlling the equivalent current of the regulating charge pump to change before and after the current switching comprises:

[0027] The regulating charge pump is controlled to change the equivalent current I2-I1 before current switching to the equivalent current 0 after current switching.

[0028] Optionally, performing current switching includes: performing current switching when a switching control signal is received.

[0029] An embodiment of the present invention also provides a charge pump circuit, which includes: a basic charge pump and one or more adjustable charge pumps, wherein the output ends of the basic charge pump and the one or more adjustable charge pumps are connected as output nodes of the charge pump circuit; wherein the basic charge pump operates normally after power-on, and the equivalent current remains unchanged before and after current switching; and the equivalent current of the adjustable charge pump changes before and after current switching.

[0030] Optionally, the regulating charge pump is one; the equivalent current of the basic charge pump is I1, and the current switching is switching from current I1 to current I2, I1 <I2;

[0031] The equivalent current of the regulating charge pump before current switching is 0, and the equivalent current after current switching is I2-I1.

[0032] Optionally, the regulating charge pump is one; the equivalent current of the basic charge pump is I1, and the current is switched from current I2 to current I1, I1 <I2;

[0033] The equivalent current of the regulating charge pump before current switching is I2-I1, and the equivalent current after current switching is 0.

[0034] Optionally, the basic charge pump and the regulating charge pump both include: a charging current source, a discharging current source, an upper switch group, and a lower switch group; the upper switch group is connected to the charging current source, the lower switch group is connected to the discharging current source, the upper switch group is connected to the lower switch group, and has a first connection node and a second connection node;

[0035] The second connection node of the basic charge pump is connected to the second connection node of the regulating charge pump and serves as an output node of the charge pump circuit.

[0036] Optionally, the basic charge pump further comprises a first operational amplifier connected between a first connection node and a second connection node of the basic charge pump, wherein the first operational amplifier is used to clamp a voltage of the first connection node of the basic charge pump to a voltage of the second connection node;

[0037] A first connection node of the basic charge pump is connected to a first connection node of the regulating charge pump.

[0038] Optionally, the basic charge pump further comprises a first operational amplifier connected between a first connection node and a second connection node of the basic charge pump, wherein the first operational amplifier is used to clamp a voltage of the first connection node of the basic charge pump to a voltage of the second connection node;

[0039] The regulating charge pump further comprises a second operational amplifier connected between the first connection node and the second connection node of the regulating charge pump, wherein the second operational amplifier is used for clamping the voltage of the first connection node of the regulating charge pump to the voltage of the second connection node.

[0040] Optionally, the output terminal of the first operational amplifier is connected to the first connection node of the basic charge pump, the positive input terminal of the first operational amplifier is connected to the second connection node of the basic charge pump, and the negative input terminal of the first operational amplifier is connected to the output terminal of the first operational amplifier;

[0041] The output end of the second operational amplifier is connected to the first connection node of the regulating charge pump, the positive input end of the second operational amplifier is connected to the second connection node of the regulating charge pump, and the negative input end of the second operational amplifier is connected to the output end of the second operational amplifier.

[0042] Optionally, the upper switch group includes a first switch and a third switch, the lower switch group includes a second switch and a fourth switch, the first switch is connected to the second switch and the connection point is the second connection node, and the third switch is connected to the fourth switch and the connection point is the first connection node;

[0043] Before current switching, the first switch and the second switch of the regulating charge pump are in an open state, the third switch and the fourth switch of the regulating charge pump are in a closed state, and the current of the regulating charge pump flows through a pseudo path formed by the third switch and the fourth switch; after current switching, the regulating charge pump operates normally, and the current of the regulating charge pump alternately flows through the pseudo path and the output path formed by the first switch and the second switch.

[0044] Optionally, the ratio of the sizes of switches of the basic charge pump to corresponding switches of the regulating charge pump is equal to the ratio of the equivalent current of the basic charge pump to the equivalent current of the regulating charge pump.

[0045] Optionally, the phase of the control signal of the switch of the basic charge pump is the same as the phase of the control signal of the corresponding switch of the regulating charge pump.

[0046] The embodiment of the present invention further provides a phase-locked loop circuit, the phase-locked loop circuit comprising a phase frequency detector, a loop filter, and the charge pump circuit described above;

[0047] The phase frequency detector is used to output a control signal according to a reference clock signal and a feedback clock signal of a phase locked loop;

[0048] The charge pump circuit is used to input a charging current to the loop filter or extract a discharging current from the loop filter according to a control signal output by the frequency and phase detector;

[0049] The loop filter is used to generate a voltage signal according to the charging current and the discharging current;

[0050] The charge pump circuit is also used to perform current switching during operation, and the voltage signal of the output node remains stable during switching.

[0051] Optionally, the phase-locked loop circuit further includes: a switching control module, configured to generate a switching control signal, and control the charge pump circuit to change the output equivalent current according to the switching control signal.

[0052] Optionally, the switching control module generates the switching control signal after the phase-locked loop is locked.

[0053] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects:

[0054] The charge pump circuit and control method thereof provided in the embodiment of the present invention utilize multiple charge pumps to form a charge pump circuit. When current switching is required, the equivalent current of one or more charge pumps before and after switching is changed, thereby avoiding sudden changes in the voltage of the charging current source and discharging current source nodes, thereby avoiding affecting the output node voltage and ensuring smooth switching of the charge pump current.

[0055] Correspondingly, the phase-locked loop circuit provided in the embodiment of the present invention utilizes the above-mentioned charge pump circuit to realize current switching. Before the clock signal is locked, the charge pump circuit is controlled to operate with a small current. After the clock signal is locked, the charge pump circuit is switched to operate with a large current, thereby reducing the power consumption of the phase-locked loop circuit. In addition, by utilizing the charge pump circuit provided in the embodiment of the present invention, the influence of current switching on the output clock signal is avoided, thereby ensuring the stability of the output clock signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] Figure 1 It is a structural schematic diagram of an existing charge pump circuit;

[0057] Figure 2 It is a schematic diagram of simulation results of the voltage of the node Vc when the current in the existing charge pump circuit changes from small to large;

[0058] Figure 3 It is a structural schematic diagram of another existing charge pump circuit;

[0059] Figure 4 yes Figure 3 A timing signal diagram of the charge pump circuit shown;

[0060] Figure 5 is a flow chart of a control method of a charge pump circuit provided by an embodiment of the present invention;

[0061] Figure 6 is a structural schematic diagram of a charge pump circuit provided by an embodiment of the present invention;

[0062] Figure 7 yes Figure 6 A schematic diagram of simulation results of current switching of the charge pump circuit shown;

[0063] Figure 8 is another structural schematic diagram of a charge pump circuit provided by an embodiment of the present invention;

[0064] Fig. 9 yes Figure 6 and Figure 8 A timing diagram of a control signal input to the charge pump circuit shown;

[0065] Fig.10 yes Figure 6 and Figure 8Another control signal timing diagram of the charge pump circuit input shown;

[0066] Fig.11 It is a logic circuit schematic diagram for generating a control signal for a charge pump circuit;

[0067] Fig.12 is another logic circuit schematic diagram for generating a charge pump circuit control signal;

[0068] Fig.13 is another structural schematic diagram of a charge pump circuit provided by an embodiment of the present invention;

[0069] Fig.14 yes Fig.13 A schematic diagram of the relationship between a control signal and current change of the charge pump circuit shown;

[0070] Fig.15 yes Fig.13 Another schematic diagram of the relationship between the control signal and the current change of the charge pump circuit shown;

[0071] Fig.16 It is a schematic diagram of the structure of a phase-locked loop circuit provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0072] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0073] An embodiment of the present invention provides a charge pump circuit and a control method thereof, and a phase-locked loop circuit, which adopts a multi-stage charge pump structure. Specifically, the charge pump circuit includes a basic charge pump and one or more regulating charge pumps. The output ends of the basic charge pump and the one or more regulating charge pumps are connected as output nodes of the charge pump circuit. By controlling the equivalent current of the regulating charge pump before and after current switching, the charge sharing effect can be avoided from the source, that is, the generation of voltage ripple can be avoided.

[0074] like Figure 5 FIG. 1 is a flow chart of a control method for a charge pump circuit provided by an embodiment of the present invention. Based on the charge pump circuit of the multi-stage charge pump structure, the method includes the following steps:

[0075] Step 501, after power-on, control the basic charge pump to work normally;

[0076] Step 502: When current switching is performed, the equivalent current of the basic charge pump is controlled to remain unchanged before and after the current switching, and the equivalent current of the regulating charge pump is controlled to change before and after the current switching.

[0077] In a specific application, the current switching can be controlled by a corresponding switching control signal. Correspondingly, in a non-limiting embodiment, the current switching can be performed when the switching control signal is received.

[0078] The following takes an adjustable charge pump as an example for illustration. Assume that the equivalent current of the basic charge pump is I1. When the current switches from current I1 to current I2 (I1 < I2), it is necessary to control the adjustable charge pump to change from the equivalent current 0 before the current switching to the equivalent current I2 - I1 after the current switching; when the current switches from current I2 to current I1, it is necessary to control the adjustable charge pump to change from the equivalent current I2 - I1 before the current switching to the equivalent current 0 after the current switching.

[0079] The following also takes an adjustable charge pump as an example to elaborate in detail on the structure of the charge pump circuit provided by the embodiments of the present invention.

[0080] As Figure 6 shown, it is a schematic structural diagram of a charge pump circuit provided by an embodiment of the present invention.

[0081] The charge pump circuit includes: a basic charge pump 60 and an adjustable charge pump 61. The output terminals of the basic charge pump 60 and the adjustable charge pump 61 are connected and serve as the output node of the charge pump circuit. Among them, the basic charge pump 60 operates normally after being powered on, and the equivalent current remains unchanged before and after the current switching; the equivalent current of the adjustable charge pump 61 changes before and after the current switching.

[0082] Referring to Figure 6 , Iup1 and Idn1 are respectively the charging current source and the discharging current source of the basic charge pump 60, and Iup2 and Idn2 are respectively the charging current source and the discharging current source of the adjustable charge pump 61.

[0083] The basic charge pump 60 includes: the above-mentioned charging current source Iup1 and discharging current source Idn1, and also includes an upper switch group S1_1 and S3_1, and a lower switch group S2_1 and S4_1; the upper switch group is connected to the charging current source Iup1, the lower switch group is connected to the discharging current source Idn1, the upper switch group is connected to the lower switch group, and has a first connection node and a second connection node; among them, the first connection node refers to the connection point of switches S3_1 and S4_1, and the second connection node refers to the connection point of switches S1_1 and S2_1.

[0084] The adjustment charge pump 61 includes: the above-mentioned charging current source Iup2 and discharging current source Idn2, and also includes an upper switch group S1_2 and S3_2, and a lower switch group S2_2 and S4_2; the upper switch group is connected to the charging current source Iup2, the lower switch group is connected to the discharging current source Idn2, the upper switch group is connected to the lower switch group, and has a first connection node and a second connection node; wherein, the first connection node refers to the connection point of switches S3_2 and S4_2, and the second connection node refers to the connection point of switches S1_2 and S2_2.

[0085] In this embodiment, the first connection node of the basic charge pump 60 is connected to the first connection node of the adjustment charge pump 61 and serves as the input node of the charge pump circuit. For convenience of description, this input node is labeled as node Vcc; the second connection node of the basic charge pump 60 is connected to the second connection node of the adjustment charge pump 61 and serves as the output node of the charge pump circuit. For convenience of description, this output node is labeled as node Vc.

[0086] It should be noted that switches S1_1 and S1_2, S2_1 and S2_2, S3_1 and S3_2, S4_1 and S4_2 respectively have the same functions as switches S1~S4 in Figure 1 .

[0087] In this embodiment, the difference between the basic charge pump 60 and the adjustment charge pump 61 is that the basic charge pump 60 further includes a first operational amplifier OP1 connected between the first connection node and the second connection node of the basic charge pump 60, and the first operational amplifier OP1 is used to clamp the voltage of the first connection node of the basic charge pump 60 to the voltage of the second connection node.

[0088] Taking the example of switching the equivalent current of the charge pump circuit from I1 to I2 (I1 < I2) below, the working principle of this embodiment is described. Figure 7 The simulation result of the current switching of the charge pump circuit in this embodiment is shown.

[0089] Referring to Figure 6 and Figure 7 simultaneously, the currents of the charging current source Iup1 and discharging current source Idn1 of the basic charge pump 60 are set to I1, and the charging current source Iup2 and discharging current source Idn2 of the adjustment charge pump 61 are set to I2 - I1.

[0090] After the charge pump circuit is powered on, the basic charge pump 60 works normally. Switches S1_2 and S2_2 of the adjustment charge pump 61 are in the off state, and switches S3_2 and S4_2 are in the on state. At this time, the current of the adjustment charge pump 61 flows through the pseudo-path 2 and does not affect node Vc. In this stage, the equivalent current of the charge pump circuit is I1.

[0091] Before current switching, the first switch and the second switch of the regulating charge pump 61 are in an open state, the third switch and the fourth switch of the regulating charge pump are in a closed state, and the current of the regulating charge pump flows through a pseudo path formed by the third switch and the fourth switch; after current switching, the regulating charge pump operates normally, and the current of the regulating charge pump alternately flows through the pseudo path and the output path formed by the first switch and the second switch.

[0092] At time t1, current switching is performed, and the equivalent current of the charge pump circuit after switching is I2, that is, at time t1, the working current of the charge pump circuit is switched from I1 to I2. Specifically, after the current switching is performed, the charge pump 61 is adjusted to start working normally, and at this time, the equivalent current of the charge pump circuit is I1+(I2-I1)=I2.

[0093] For the basic charge pump 60 part, around time t1, the current alternately flows through the pseudo path 1 and the output path 1 under the action of the input up signal up1 / upb1 and the down signal dn1 / dnb1, and the state of the basic charge pump 60 part does not suddenly change around time t1, so the parasitic capacitors Cx1 and Cy1 do not share charge with the loop filter; for the adjustment charge pump 61 part, before time t1, the current only flows through the pseudo path 2, and after time t1, the current alternately flows through the pseudo path 2 and the output path 2 under the action of the input up signal up2 / upb2 and the down signal dn2 / dnb2, and the current sources Iup2 and Idn2 are also in working state around time t1, and the voltages of the nodes X2 and Y2 do not suddenly change around time t1, so the charge stored in the parasitic capacitors Cx2 and Cy2 does not suddenly change due to charge sharing. Therefore, under this charge pump circuit structure, the charge pump circuit current can be switched from I1 to I2 at time t1 without affecting the voltage of the output node Vc, that is, smooth switching of the charge pump circuit current is achieved.

[0094] Figure 7 is with Figure 2 Simulation results under the same conditions, where the vertical coordinate range of the voltage at the node Vc and the current Ic flowing from the loop filter to the charge pump is Figure 2 Consistent. Figure 7 It can be seen from the simulation results that: before and after the current is switched at time t1, the voltage of the node Vc and the current Ic of the output node do not change significantly, that is, the smooth switching of the current of the charge pump circuit is achieved.

[0095] In general, the size ratio of the switch of the basic charge pump 60 to the corresponding switch of the regulating charge pump 61 can be made equal to the ratio of the equivalent current I1 of the basic charge pump 60 to the equivalent current I2-I1 of the regulating charge pump 62, that is, the size ratio of the switches S1_1 to S1_2, the size ratio of S2_1 to S2_2, the size ratio of S3_1 to S3_2, and the size ratio of S4_1 to S4_2 are equal to the current ratio of Iup1 / Idn1 and Iup2 / Idn2, that is, I1: (I2-I1). A larger current requires a larger switch size, which can ensure that the corresponding node states of the basic charge pump and the regulating charge pump are basically consistent.

[0096] Furthermore, the phase of the control signal of the switches of the basic charge pump 60 is identical to the phase of the control signal of the corresponding switches of the regulating charge pump 61 .

[0097] It can be seen that the charge pump circuit of this embodiment utilizes an adjustable charge pump to avoid sudden changes in the voltages of the charging current source and discharging current source nodes by changing its equivalent current during current switching, thereby avoiding an impact on the output node voltage and ensuring smooth switching of the charge pump current.

[0098] like Figure 8 , which is another structural schematic diagram of a charge pump circuit provided in an embodiment of the present invention.

[0099] and Figure 6 The difference from the embodiment shown is that in this embodiment, the regulating charge pump 61 further includes a second operational amplifier OP2 connected between the first connection node and the second connection node of the regulating charge pump 61. Figure 6 The difference of the embodiment shown is that in this embodiment, the first connection node Vcc1 of the basic charge pump 60 and the first connection node Vcc2 of the regulating charge pump 61 are independent of each other, that is, the two nodes are not connected. The second connection node of the basic charge pump 60 is connected to the second connection node of the regulating charge pump 61, that is, Figure 8 The node Vc shown in .

[0100] In this embodiment, the first operational amplifier OP1 is used to clamp the voltage of the first connection node of the basic charge pump 60 to the voltage of the second connection node, and the second operational amplifier OP2 is used to clamp the voltage of the first connection node of the adjustment charge pump 61 to the voltage of the second connection node. Figure 6 The circuit structures shown have similar working processes and have the same effects.

[0101] Fig. 9 Shows Figure 6 and Figure 8 The timing diagram of the control signal input to the charge pump circuit shown.

[0102] Reference Fig. 9 , the driving signals (i.e., the upward signal and the downward signal) up1 / upb1 / dn1 / dnb1 respectively control the switches S1_1 / S3_1 / S2_1 / S4_1, and the driving signals up2 / upb2 / dn2 / dnb2 respectively control the switches S1_2 / S3_2 / S2_2 / S4_2, and the switches are turned on when the level is high, and the switches are turned off when the level is low. ctr is a switching control signal, and the equivalent current of the charge pump circuit is I1 when ctr is low, and the equivalent current of the charge pump circuit is I2 when ctr is high. Under the action of the up1 / upb1 / dn1 / dnb1 signals, the basic charge pump 60 part works normally before and after the time t1, and outputs the equivalent current I1; under the action of the up2 / upb2 / dn2 / dnb2 signals, the charge pump 61 part is adjusted to output the equivalent current 0 before the time t1, and output the equivalent current I2-I1 after the time t1. Therefore, the charge pump structure provided by the embodiment of the present invention switches the equivalent current of the charge pump circuit from I1 to I2 at time t1, and does not affect the voltage of the node Vc during the switching, thereby achieving smooth switching.

[0103] For the above Figure 6 and Figure 8 In the charge pump structure of the embodiment shown, if the charge pump circuit switches from a larger current I2 to a smaller current I1 at time t1, it is only necessary to set the current of the current source Iup1 / Idn1 of the basic charge pump 60 part to I1, and the current of the current source Iup2 / Idn2 of the regulating charge pump 61 part to I2-I1. Before time t1, the switching control signal ctr is at a high level, and the equivalent current of the charge pump circuit is the sum of the two currents, that is, I1+(I2-I1)=I2; at time t1, the switching control signal ctr becomes a low level, and the switches S1_2 and S2_2 of the regulating charge pump 61 are disconnected, and the switches S3_2 and S4_2 remain closed. At this time, the current of the regulating charge pump 61 flows through the pseudo path 2 without affecting the node Vc, so that the equivalent current of the charge pump circuit is the current I1 of the basic charge pump 60 part. The timing waveform diagram in this case is as follows: Fig.10 .

[0104] Fig.11It is a schematic diagram of a logic circuit that generates the above driving signals up1 / upb1 / dn1 / dnb1 and up2 / upb2 / dn2 / dnb2. The input signals up / upb / dn / dnb respectively pass through buffers to generate the signals up1 / upb1 / dn1 / dnb1; the input signals up and dn respectively perform AND logic with ctr to generate the signals up2 and dn2, and the input signals upb and dnb respectively perform OR logic with ctrb to generate the signals upb2 and dnb2. Among them, ctrb is the inverted signal of the ctr signal. This circuit requires that up1 and up2 are phase-aligned, and the same applies to the other three pairs of signals.

[0105] For more convenient phase matching of corresponding signals, the circuit in Fig.12 can be used to replace the circuit in Fig.11 , where the ratio of the driver sizes of the driving signals up1 / upb1 / dn1 / dnb1 to the driver sizes of the driving signals up2 / upb2 / dn2 / dnb2 can be equal to the ratio of the sizes of S1_1 and S1_2.

[0106] As shown in Fig.13 , it is another schematic diagram of the charge pump circuit provided by the embodiment of the present invention. This embodiment is a three-stage charge pump structure, including a basic charge pump 60, a first regulated charge pump 61, and a second regulated charge pump 62.

[0107] Of course, the above structure is also applicable to the case where the number of stages is greater than 3.

[0108] Referring to Fig.13 , taking I1 < I2 < I3 as an example, the charging and discharging current Iup1 = Idn1 = I1 of the basic charge pump 60, the charging and discharging current Iup2 = Idn2 = I2 - I1 of the first regulated charge pump 61, and the charging and discharging current Iup3 = Idn3 = I3 - I2 of the second regulated charge pump 62.

[0109] After power-on, the basic charge pump 60 operates normally, and the currents of the first regulated charge pump 61 and the second regulated charge pump 62 only flow through their respective dummy paths. At this time, the equivalent output current of the charge pump circuit is I1;

[0110] After time t1, the first regulated charge pump 61 starts to operate normally, and the current of the second regulated charge pump 62 only flows through its dummy path 3. At this time, the equivalent output current of the charge pump circuit is I2;

[0111] After time t2, the second regulated charge pump 62 also starts to operate normally. At this time, the equivalent output current of the charge pump circuit is I3.

[0112] The control signals and current variation relationship of the above charge pump circuit are as shown in Fig.14 .

[0113] It should be noted that when the value of the equivalent current of the charge pump circuit is greater than or equal to three, there may be multiple combinations.

[0114] For example, still taking I1 < I2 < I3 as an example, the charging and discharging current of the basic charge pump 60 is I1, the charging and discharging current of the first adjustable charge pump 61 is I2 - I1, and the charging and discharging current of the second adjustable charge pump 62 is I3 - I1.

[0115] After power-on, the basic charge pump 60 operates normally, and the currents of the first adjustable charge pump 61 and the second adjustable charge pump 62 only flow through their respective pseudo-paths. At this time, the equivalent output current of the charge pump circuit is I1;

[0116] After time t1, the first adjustable charge pump 61 starts to operate normally, and the current of the second adjustable charge pump 62 only flows through its pseudo-path 3. At this time, the equivalent output current of the charge pump circuit is I2;

[0117] After time t2, the second adjustable charge pump 62 starts to operate normally, but the first adjustable charge pump 61 returns to the state before time t1. At this time, the equivalent output current of the charge pump circuit is I3.

[0118] The control signals and current change relationships of the above charge pump circuit are as Fig.15 shown.

[0119] It should be noted that ct1 in the above Fig.14 and Fig.15 represents the first switching control signal, and ct2 represents the second switching control signal.

[0120] It can be seen that whether a two-stage or more than two-stage charge pump structure is adopted, it is possible to avoid the sudden change of the output node voltage when the current of the charge pump circuit changes, thereby avoiding the influence on the output clock signal of the phase-locked loop, and thus meeting the requirements of various different applications.

[0121] Correspondingly, an embodiment of the present invention further provides a phase-locked loop circuit, as Fig.16 shown. The phase-locked loop circuit includes: a frequency discriminator and phase detector 151, a loop filter 152, and the charge pump circuit 600 described above.

[0122] Among them:

[0123] The frequency discriminator and phase detector 151 is used to output a control signal according to the reference clock signal and the feedback clock signal of the phase-locked loop;

[0124] The charge pump circuit 600 is used to input a charging current to the loop filter 152 or extract a discharging current from the loop filter 152 according to the control signal output by the frequency discriminator and phase detector 151;

[0125] The loop filter 152 is used to generate a voltage signal according to the charging current and the discharging current;

[0126] The charge pump circuit 600 is also used to perform current switching during operation, and the voltage signal of the output node remains stable during switching.

[0127] In a non-limiting embodiment, the phase-locked loop circuit may further include: a switching control module (not shown) for generating a switching control signal and controlling the charge pump circuit 600 to change the output equivalent current according to the switching control signal.

[0128] In practical applications, the switching control module may generate the switching control signal after the phase-locked loop is locked.

[0129] The phase-locked loop circuit provided in the embodiment of the present invention utilizes the above-mentioned charge pump circuit to realize current switching. Before the clock signal is locked, the charge pump circuit is controlled to operate with a small current. After the clock signal is locked, the charge pump circuit is switched to operate with a large current, thereby reducing the power consumption of the phase-locked loop circuit. In addition, by utilizing the charge pump circuit provided in the embodiment of the present invention, the influence of current switching on the output clock signal is avoided, thereby ensuring the stability of the output clock signal.

[0130] It should be understood that the term "and / or" in this article is only a description of the association relationship of the associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article indicates that the associated objects before and after are in an "or" relationship.

[0131] The first, second, etc. descriptions appearing in the embodiments of the present application are only used for illustration and distinction of the description objects. There is no order, nor do they indicate any special limitation on the number of devices in the embodiments of the present application, and cannot constitute any limitation on the embodiments of the present application.

[0132] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

[0133] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A control method for a charge pump circuit, characterized in that: The charge pump circuit comprises a basic charge pump and one or more regulating charge pumps, wherein output ends of the basic charge pump and the one or more regulating charge pumps are connected as output nodes of the charge pump circuit; the method comprises: After power-on, controlling the basic charge pump to work normally; When current switching is performed, the equivalent current of the basic charge pump is controlled to remain unchanged before and after the current switching, and the equivalent current of the regulating charge pump is controlled to change before and after the current switching.

2. The method according to claim 1, characterized in that: The regulating charge pump is one; the equivalent current of the basic charge pump is I1, and the current switching is from current I1 to current I2, I1 <I2; The controlling the equivalent current of the regulating charge pump to change before and after the current switching comprises: The regulating charge pump is controlled to change the equivalent current 0 before the current switching to the equivalent current I2-I1 after the current switching.

3. The method according to claim 1, characterized in that The regulating charge pump is one; the equivalent current of the basic charge pump is I1, and the current switching is from current I2 to current I1, I1 <I2; The controlling the equivalent current of the regulating charge pump to change before and after the current switching comprises: The regulating charge pump is controlled to change the equivalent current I2-I1 before current switching to the equivalent current 0 after current switching.

4. The method according to any one of claims 1 to 3, characterized in that: The current switching comprises: When a switching control signal is received, current switching is performed.

5. A charge pump circuit, characterized in that: The charge pump circuit includes: a basic charge pump and one or more adjustable charge pumps, wherein the output ends of the basic charge pump and the one or more adjustable charge pumps are connected as output nodes of the charge pump circuit; wherein the basic charge pump operates normally after power-on, and the equivalent current remains unchanged before and after current switching; and the equivalent current of the adjustable charge pump changes before and after current switching.

6. The charge pump circuit according to claim 5, characterized in that: The regulating charge pump is one; the equivalent current of the basic charge pump is I1, and the current switching is from current I1 to current I2, I1 <I2; The equivalent current of the regulating charge pump before current switching is 0, and the equivalent current after current switching is I2-I1.

7. The charge pump circuit according to claim 5, characterized in that: The regulating charge pump is one; the equivalent current of the basic charge pump is I1, and the current switching is from current I2 to current I1, I1 <I2; The equivalent current of the regulating charge pump before current switching is I2-I1, and the equivalent current after current switching is 0.

8. The charge pump circuit according to claim 5, characterized in that: The basic charge pump and the regulating charge pump both include: a charging current source, a discharging current source, an upper switch group, and a lower switch group; the upper switch group is connected to the charging current source, the lower switch group is connected to the discharging current source, the upper switch group is connected to the lower switch group, and has a first connection node and a second connection node; The second connection node of the basic charge pump is connected to the second connection node of the regulating charge pump and serves as an output node of the charge pump circuit.

9. The charge pump circuit according to claim 8, characterized in that: The basic charge pump further comprises a first operational amplifier connected between a first connection node and a second connection node of the basic charge pump, the first operational amplifier being used to clamp a voltage of the first connection node of the basic charge pump to a voltage of the second connection node; A first connection node of the basic charge pump is connected to a first connection node of the regulating charge pump.

10. The charge pump circuit according to claim 8, characterized in that: The basic charge pump further comprises a first operational amplifier connected between a first connection node and a second connection node of the basic charge pump, the first operational amplifier being used to clamp a voltage of the first connection node of the basic charge pump to a voltage of the second connection node; The regulating charge pump further comprises a second operational amplifier connected between the first connection node and the second connection node of the regulating charge pump, wherein the second operational amplifier is used for clamping the voltage of the first connection node of the regulating charge pump to the voltage of the second connection node.

11. The charge pump circuit according to claim 10, characterized in that: The output terminal of the first operational amplifier is connected to the first connection node of the basic charge pump, the positive input terminal of the first operational amplifier is connected to the second connection node of the basic charge pump, and the negative input terminal of the first operational amplifier is connected to the output terminal of the first operational amplifier; The output end of the second operational amplifier is connected to the first connection node of the regulating charge pump, the positive input end of the second operational amplifier is connected to the second connection node of the regulating charge pump, and the negative input end of the second operational amplifier is connected to the output end of the second operational amplifier.

12. The charge pump circuit according to any one of claims 8 to 11, characterized in that: The upper switch group includes a first switch and a third switch, the lower switch group includes a second switch and a fourth switch, the first switch is connected to the second switch and the connection point is the second connection node, the third switch is connected to the fourth switch and the connection point is the first connection node; Before current switching, the first switch and the second switch of the regulating charge pump are in an open state, the third switch and the fourth switch of the regulating charge pump are in a closed state, and the current of the regulating charge pump flows through a pseudo path formed by the third switch and the fourth switch; After the current switching, the regulating charge pump operates normally, and the current of the regulating charge pump alternately flows through the pseudo path and the output path formed by the first switch and the second switch.

13. The charge pump circuit according to claim 12, characterized in that: The ratio of the sizes of the switches of the basic charge pump to the corresponding switches of the regulating charge pump is equal to the ratio of the equivalent current of the basic charge pump to the equivalent current of the regulating charge pump.

14. The charge pump circuit according to claim 12, characterized in that: The phase of the control signal of the switch of the basic charge pump is the same as the phase of the control signal of the corresponding switch of the regulating charge pump.

15. A phase-locked loop circuit, characterized in that: The phase-locked loop circuit comprises a phase frequency detector, a loop filter, and a charge pump circuit as claimed in any one of claims 5 to 14; The phase frequency detector is used to output a control signal according to a reference clock signal and a feedback clock signal of a phase locked loop; The charge pump circuit is used to input a charging current to the loop filter or extract a discharging current from the loop filter according to a control signal output by the frequency and phase detector; The loop filter is used to generate a voltage signal according to the charging current and the discharging current; The charge pump circuit is also used to perform current switching during operation, and the voltage signal of the output node remains stable during switching.

16. The phase-locked loop circuit according to claim 15, characterized in that: The phase-locked loop circuit also includes: The switching control module is used to generate a switching control signal and control the charge pump circuit to change the output equivalent current according to the switching control signal.

17. The phase-locked loop circuit according to claim 16, characterized in that: The switching control module generates the switching control signal after the phase-locked loop is locked.

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