Dual-motor controller control method and device, electronic equipment, storage medium and vehicle

Abstract

The invention discloses a dual-motor controller control method and device, electronic equipment, a storage medium and a vehicle. The method comprises the following steps: generating a first group of gate pole driving signals and a second group of gate pole driving signals, wherein the phase angle of the first group of gate pole driving signals differs from the phase angle of the second group of gate pole driving signals by a first phase difference; and outputting the first group of gate pole driving signals to a first inverter bridge of the dual-motor controller, and outputting the second group of gate pole driving signals to a second inverter bridge of the dual-motor controller, so that phase angles of ripple currents generated by the first inverter bridge and the second inverter bridge at the bus capacitor are different by a second phase difference. A certain phase difference exists between phase angles of the first group of gate pole driving signals and the second group of gate pole driving signals, so that a certain phase difference also exists between ripple currents generated on a bus capacitor by two inverter bridges in the dual-motor controller, and the ripple currents can be counteracted mutually, so that the ripple currents of the bus capacitor are reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of vehicle-related technologies, and in particular to a dual-motor controller control method, device, electronic equipment, storage medium and vehicle. Background Art

[0002] With the rapid development of the new energy vehicle market, industry competition is becoming increasingly fierce. Improving product power density and reducing component size is a major trend. As an energy conversion component of new energy vehicles, the core of the motor controller is to realize the function of inverter from DC to AC. In the motor controller, capacitors are needed to provide the main energy for the power tube switching process. The current on-board inverter mainly uses thin-film capacitors, which account for a large proportion of the volume in the motor controller.

[0003] For some dual-inverter application scenarios, such as the extended-range vehicles that have developed relatively well in recent years, the front drive is generally a dual-motor controller. The dual-motor controller connects two sets of three-phase inverter bridges in parallel to the same capacitor, and its capacitance will be larger. However, since the control algorithms of existing dual-motor controllers are relatively independent in terms of control timing, the ripple currents of the two sets of inverters in the capacitors may be superimposed. In order to ensure the normal operation of the dual-motor controller, only larger capacitors can be used, which increases the overall volume of the dual-motor controller. Summary of the invention

[0004] Based on this, it is necessary to provide a dual-motor controller control method, device, electronic device, storage medium and vehicle to address the technical problem of excessive ripple current in the bus capacitor of the dual-motor controller in the prior art.

[0005] The present invention provides a control method for a dual-motor controller, wherein one end of a first inverter bridge of the dual-motor controller is electrically connected to a bus capacitor, and one end of a second inverter bridge of the dual-motor controller is electrically connected to the bus capacitor, and the method comprises:

[0006] Generate a first group of gate drive signals and a second group of gate drive signals, wherein a phase angle of the first group of gate drive signals differs from a phase angle of the second group of gate drive signals by a first phase difference;

[0007] The first group of gate drive signals is output to the first inverter bridge of the dual-motor controller, and the second group of gate drive signals is output to the second inverter bridge of the dual-motor controller, so that the phase angles of the ripple currents generated by the first inverter bridge and the second inverter bridge on the bus capacitor differ by a second phase difference.

[0008] Further, the generating of the first group of gate drive signals and the second group of gate drive signals specifically includes:

[0009] Obtaining a candidate first group of gate drive signals and a candidate second group of gate drive signals;

[0010] The candidate second group of gate drive signals are moved by the first phase difference relative to the candidate first group of gate drive signals, and the gate drive signals obtained after moving by the first phase difference are updated as the second group of gate drive signals; and the candidate first group of gate drive signals are determined as the first group of gate-level drive signals.

[0011] Furthermore, the step of shifting the candidate second group of gate drive signals relative to the candidate first group of gate drive signals by the first phase difference specifically includes:

[0012] Acquire a first motor mode of a first motor electrically connected to the other end of the first inverter bridge and a second motor mode of a second motor electrically connected to the other end of the second inverter bridge;

[0013] The first phase difference for moving the candidate second group of gate drive signals relative to the candidate first group of gate drive signals is determined according to whether the first motor mode is the same as the second motor mode and the pre-stored correspondence between whether the two motor modes are the same and the phase difference.

[0014] Further, the determining the first phase difference by which the candidate second group of gate drive signals is moved relative to the candidate first group of gate drive signals according to whether the first motor mode is the same as the second motor mode and the pre-stored correspondence between whether the two motor modes are the same and the phase difference specifically includes:

[0015] If the first motor mode is the same as the second motor mode, determining the first phase difference of the candidate second group of gate drive signals relative to the candidate first group of gate drive signals as a first mode phase difference;

[0016] If the first motor mode is different from the second motor mode, the first phase difference of the candidate second group of gate drive signals relative to the candidate first group of gate drive signals is determined to be a second mode phase difference, which is different from the first mode phase difference.

[0017] Furthermore, the first mode phase difference is 90°, and the second mode phase difference is 180°.

[0018] Further, the first group of gate drive signals and the second group of gate drive signals both include three-phase gate drive signals, and the outputting of the first group of gate drive signals to the first inverter bridge of the dual-motor controller and the outputting of the second group of gate drive signals to the second inverter bridge of the dual-motor controller specifically include:

[0019] The three-phase gate drive signals of the first group of gate drive signals are output to the three-phase switch tubes of the first inverter bridge of the dual motor controller respectively, and the three-phase gate drive signals of the second group of gate drive signals are output to the three-phase switch tubes of the second inverter bridge of the dual motor controller respectively.

[0020] The present invention provides a dual-motor controller control device, wherein one end of a first inverter bridge of the dual-motor controller is electrically connected to a bus capacitor, and one end of a second inverter bridge of the dual-motor controller is electrically connected to the bus capacitor, and the device comprises:

[0021] A signal generating module, configured to generate a first set of gate drive signals and a second set of gate drive signals, wherein a phase angle of the first set of gate drive signals differs from a phase angle of the second set of gate drive signals by a first phase difference;

[0022] A signal output module is used to output the first group of gate drive signals to the first inverter bridge of the dual-motor controller, and output the second group of gate drive signals to the second inverter bridge of the dual-motor controller, so that the phase angles of the ripple currents generated by the first inverter bridge and the second inverter bridge on the bus capacitor differ by a second phase difference.

[0023] The present invention provides an electronic device, comprising:

[0024] at least one processor; and,

[0025] a memory communicatively connected to at least one of the processors; wherein,

[0026] The memory stores instructions that can be executed by at least one of the processors. The instructions are executed by at least one of the processors to enable the at least one of the processors to execute the dual-motor controller control method as described above.

[0027] The present invention provides a storage medium, which stores computer instructions. When a computer executes the computer instructions, it is used to execute all steps of the dual-motor controller control method as described above.

[0028] The present invention provides a vehicle, comprising the dual-motor controller control device as described above, or the electronic device as described above.

[0029] The present invention generates a first group of gate drive signals and a second group of gate drive signals, and outputs the first group of gate drive signals to the first inverter bridge of the dual motor controller, and outputs the second group of gate drive signals to the second inverter bridge of the dual motor controller. Since there is a certain phase difference between the phase angle of the first group of gate drive signals and the phase angle of the second group of gate drive signals, there is also a certain phase difference between the phase angles of the ripple currents generated by the two inverter bridges in the dual motor controller on the bus capacitor, thereby enabling the ripple currents generated by the two inverter bridges in the dual motor controller on the bus capacitor to offset each other, thereby reducing the ripple current of the bus capacitor. Since the ripple current of the bus capacitor is reduced, a smaller capacitor can be used in the dual motor controller, thereby reducing the overall volume of the dual motor controller. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 This is a working flow chart of a dual-motor controller control method according to an embodiment of the present invention;

[0031] Figure 2 A schematic diagram of a dual-motor controller according to an example of the present invention;

[0032] Figure 3 A schematic diagram of ripple current according to an example of the present invention;

[0033] Figure 4 This is a working flow chart of a dual-motor controller control method according to another embodiment of the present invention;

[0034] Figure 5 A schematic diagram showing a comparison between a first group of gate driving signals and a second group of gate driving signals according to an example of the present invention;

[0035] Figure 6 A schematic diagram of a dual-motor controller control device according to an embodiment of the present invention;

[0036] Figure 7 The figure is a schematic diagram of the hardware structure of an electronic device of the present invention. DETAILED DESCRIPTION

[0037] The specific embodiments of the present invention are further described below in conjunction with the accompanying drawings. The same components are represented by the same reference numerals. It should be noted that the words "front", "rear", "left", "right", "upper" and "lower" used in the following description refer to directions in the accompanying drawings, and the words "inner" and "outer" refer to directions toward or away from the geometric center of a specific component, respectively.

[0038] like Figure 1The figure shows a working flow chart of a dual-motor controller control method according to an embodiment of the present invention. One end of a first inverter bridge of the dual-motor controller is electrically connected to a bus capacitor, and one end of a second inverter bridge of the dual-motor controller is electrically connected to the bus capacitor. The method includes:

[0039] Step S101, generating a first group of gate drive signals and a second group of gate drive signals, wherein a phase angle of the first group of gate drive signals differs from a phase angle of the second group of gate drive signals by a first phase difference;

[0040] Step S102, outputting the first group of gate drive signals to the first inverter bridge of the dual-motor controller, and outputting the second group of gate drive signals to the second inverter bridge of the dual-motor controller, so that the phase angles of the ripple currents generated by the first inverter bridge and the second inverter bridge in the bus capacitor differ by a second phase difference.

[0041] Specifically, the present invention can be applied to electronic devices of a vehicle having processing capabilities, such as an electronic control unit (ECU) or an extended domain control unit (XCU).

[0042] First, the electronic device executes step S101 to generate a first set of gate drive signals and a second set of gate drive signals.

[0043] In some embodiments, the first group of gate drive signals and the second group of gate drive signals both include three-phase gate drive signals.

[0044] In some embodiments, the three-phase gate drive signal includes a U-phase gate drive signal, a V-phase gate drive signal, and a W-phase gate drive signal.

[0045] In some embodiments, the first group of gate drive signals and the second group of gate drive signals are both switching signals, and there is a certain phase difference between the phase angle of the first group of gate drive signals and the phase angle of the second group of gate drive signals, that is, there is a certain deviation between the center line of the switching cycle of the first group of gate drive signals and the center line of the switching cycle of the second group of gate drive signals.

[0046] Then, the electronic device executes step S102 to output a first set of gate drive signals to the first inverter bridge of the dual-motor controller, and output a second set of gate drive signals to the second inverter bridge of the dual-motor controller.

[0047] In one embodiment, the outputting the first group of gate drive signals to the first inverter bridge of the dual-motor controller and the outputting the second group of gate drive signals to the second inverter bridge of the dual-motor controller specifically includes:

[0048] The three-phase gate drive signals of the first group of gate drive signals are output to the three-phase switch tubes of the first inverter bridge of the dual motor controller respectively, and the three-phase gate drive signals of the second group of gate drive signals are output to the three-phase switch tubes of the second inverter bridge of the dual motor controller respectively.

[0049] In some embodiments, one end of the first inverter bridge is electrically connected to the bus capacitor, and the other end is electrically connected to the first motor; one end of the second inverter bridge is electrically connected to the bus capacitor, and the other end is electrically connected to the second motor.

[0050] Specifically, if Figure 2 The figure shows a schematic diagram of a dual-motor controller, including: a first inverter bridge 23 electrically connected to a first motor 21, a second inverter bridge 24 electrically connected to a second motor 22, a bus capacitor 25 and a DC battery 26, wherein:

[0051] The first inverter bridge 23 includes an upper bridge switch tube T1 of the first motor U1 phase, an upper bridge switch tube T2 of the first motor V1 phase, an upper bridge switch tube T3 of the first motor W1 phase, a lower bridge switch tube T4 of the first motor U1 phase, a lower bridge switch tube T5 of the first motor V1 phase, and a lower bridge switch tube T6 of the first motor W1 phase. The upper bridge switch tube T1 of the first motor U1 phase is electrically connected to the lower bridge switch tube T4 of the first motor U1 phase, the upper bridge switch tube T2 of the first motor V1 phase is electrically connected to the lower bridge switch tube T5 of the first motor V1 phase, and the upper bridge switch tube T3 of the first motor W1 phase is electrically connected to the lower bridge switch tube T6 of the first motor W1 phase;

[0052] The second inverter bridge 24 includes a second motor U2-phase upper bridge switch tube T7, a second motor V2-phase upper bridge switch tube T8, a second motor W2-phase upper bridge switch tube T9, a second motor U2-phase lower bridge switch tube T10, a second motor V2-phase lower bridge switch tube T11, and a second motor W2-phase lower bridge switch tube T12, the second motor U2-phase upper bridge switch tube T7 is electrically connected to the second motor U2-phase lower bridge switch tube T10, the second motor V2-phase upper bridge switch tube T8 is electrically connected to the second motor V2-phase lower bridge switch tube T11, and the second motor W2-phase upper bridge switch tube T9 is electrically connected to the second motor W2-phase lower bridge switch tube T12;

[0053] The upper bridge switch tube T1 of the first motor U1 phase, the upper bridge switch tube T2 of the first motor V1 phase, the upper bridge switch tube T3 of the first motor W1 phase, the upper bridge switch tube T7 of the second motor U2 phase, the upper bridge switch tube T8 of the second motor V2 phase, and the upper bridge switch tube T9 of the second motor W2 phase are electrically connected to one end of the bus capacitor 25 and one end of the DC battery 26 respectively;

[0054] The first motor U1 phase lower bridge switch tube T4, the first motor V1 phase lower bridge switch tube T5, the first motor W1 phase lower bridge switch tube T6, the second motor U2 phase lower bridge switch tube T10, the second motor V2 phase lower bridge switch tube T11, and the second motor W2 phase lower bridge switch tube T12 are electrically connected to the other end of the bus capacitor 25 and the other end of the DC battery 26 respectively.

[0055] The electronic device executes step S102, and outputs the three-phase gate drive signals of the first group of gate drive signals to the three-phase switch tubes of the first inverter bridge 23 of the dual motor controller, and outputs the three-phase gate drive signals of the second group of gate drive signals to the three-phase switch tubes of the second inverter bridge 24 of the dual motor controller.

[0056] The three-phase gate drive signals of the first group of gate drive signals include: a U1-phase upper bridge gate drive signal G1 for controlling the upper bridge switch tube T1 of the first motor U1 phase, a V1-phase upper bridge gate drive signal G2 for controlling the upper bridge switch tube T2 of the first motor V1 phase, a W1-phase upper bridge gate drive signal G3 for controlling the upper bridge switch tube T3 of the first motor W1 phase, a U1-phase lower bridge gate drive signal G4 for controlling the lower bridge switch tube T4 of the first motor U1 phase, a V1-phase upper bridge gate drive signal G5 for controlling the lower bridge switch tube T5 of the first motor V1 phase, and a W1-phase upper bridge gate drive signal G6 for controlling the lower bridge switch tube T6 of the first motor W1 phase;

[0057] The three-phase gate drive signals of the second group of gate drive signals include: the U2-phase upper bridge gate drive signal G7 for controlling the upper bridge switch tube T7 of the second motor U2 phase, the V2-phase upper bridge gate drive signal G8 for controlling the upper bridge switch tube T8 of the second motor V2 phase, the W2-phase upper bridge gate drive signal G9 for controlling the upper bridge switch tube T9 of the second motor W2 phase, the U2-phase lower bridge gate drive signal G10 for controlling the lower bridge switch tube T10 of the second motor U2 phase, the V2-phase lower bridge gate drive signal G11 for controlling the lower bridge switch tube T11 of the second motor V2 phase, and the W2-phase lower bridge gate drive signal G12 for controlling the lower bridge switch tube T12 of the second motor W2 phase.

[0058] Among them, the control logic requires that the upper and lower tubes of each phase in the same inverter bridge are complementary and conductive. In order to more conveniently explain the method of the present invention, the dead zone control is temporarily ignored. Taking the U1 phase as an example, if the U1 phase upper bridge gate drive signal G1 of the upper bridge switch tube T1 of the first motor U1 phase at a certain moment is logical 1, the complementary U1 phase lower bridge gate drive signal G4 of the lower bridge switch tube T4 of the first motor U1 phase is 0; if G1 is logical 0, G4 is logical 1. When the drive signal is logical 1, the driven switch tube is turned on, and when the drive signal is logical 0, the driven switch tube is turned off.

[0059] like Figure 3 The present invention is shown in an example for Figure 2The diagram shows a schematic diagram of the three-phase gate drive signal of the first inverter bridge 23 of the dual-motor controller and the ripple current of the bus capacitor generated therefrom. Figure 3 In the figure, the horizontal axis is time, with the unit being s; the vertical axis of G1, G2, and G3 represents the switch state, 1 represents that the upper tube of the corresponding bridge arm is turned on and the lower tube is turned off; 0 represents that the upper tube of the corresponding bridge arm is turned off and the lower tube is turned on; the vertical axis of the ripple current 31 of the bus capacitor represents the ripple current value, with the unit being ampere A.

[0060] In the assumption Figure 2 The switch tubes T7 to T12 are all in the off state, and the three-phase currents of the second motor 22 are all 0, that is, the second inverter bridge 24 of the second motor 22 does not work. Figure 3 The four waveforms in the figure are, from top to bottom, the upper bridge gate drive signal G1 of the U1 phase, the upper bridge gate drive signal G2 of the V1 phase, the upper bridge gate drive signal G3 of the W1 phase, and the ripple current 31 of the bus capacitor. Since the upper and lower tubes of each phase are complementary, the lower bridge gate drive signal G4 of the U1 phase is in anti-phase with the upper bridge gate drive signal G1 of the U1 phase, the upper bridge gate drive signal G5 of the V1 phase is in anti-phase with the upper bridge gate drive signal G2 of the V1 phase, and the upper bridge gate drive signal G6 of the W1 phase is in anti-phase with the upper bridge gate drive signal G3 of the W1 phase.

[0061] The ripple current of the bus capacitor 25 is the current passing through the bus capacitor. When the bus capacitor 25 supplies power to the first motor 21 or the second motor 22, the ripple current flowing out of the bus capacitor 25 is positive. When the bus capacitor 25 does not supply power to the first motor 21 and the second motor 22, the DC battery 26 supplies power to the bus capacitor 25, and the ripple current flowing into the bus capacitor 25 is negative. In a switching cycle, when the level states of G1, G2, and G3 are all 1, the switch tubes T1, T2, and T3 are turned on, but the switch tubes T4, T5, and T6 are turned off. At this time, the bus capacitor 25 cannot supply power to the first motor 21 and the second motor 22, and only the DC battery 26 supplies power to the bus capacitor 25. At this time, the ripple current flowing into the bus capacitor 25 is negative. Similarly, when the level states of G1, G2, and G3 are all 0, the switches T1, T2, and T3 are turned off, and the switches T4, T5, and T6 are turned on. At this time, the bus capacitor 25 is also unable to supply power to the first motor 21 and the second motor 22, and only the DC battery 26 supplies power to the bus capacitor 25. At this time, the ripple current flowing into the bus capacitor 25 still shows a negative direction. When the level states of G1, G2, and G3 are different, the switches T1, T2, and T3 are partially turned on and partially turned off, and the switches T4, T5, and T6 are also partially turned on and partially turned off. Therefore, the bus capacitor 25 is connected to the first motor 21, and the bus capacitor 25 supplies power to the first motor 21. At this time, the ripple current flowing into the bus capacitor 25 shows a positive direction.

[0062] It can be seen from the above that in one switching cycle, the ripple current 31 of the bus capacitor 25 generated by the first set of gate drive signals is an alternating current, and the frequency of the ripple current of the bus capacitor 25 is twice the frequency of the first set of gate drive signals.

[0063] Similarly, the ripple current of the bus capacitor generated by the second set of gate driving signals is also AC.

[0064] By making a certain phase difference between the phase angle of the first group of gate drive signals and the phase angle of the second group of gate drive signals, a certain phase difference is also made between the ripple current of the bus capacitor generated by the first group of gate drive signals and the ripple current of the bus capacitor generated by the second group of gate drive signals, so that the ripple currents generated by each group can offset each other as much as possible, thereby reducing the final ripple current on the bus capacitor.

[0065] In some embodiments, a second phase difference between the phase angles of the ripple current of the bus capacitor generated by the first set of gate drive signals and the ripple current of the bus capacitor generated by the second set of gate drive signals is twice the first phase difference between the phase angles of the first set of gate drive signals and the second set of gate drive signals.

[0066] The present invention generates a first group of gate drive signals and a second group of gate drive signals, and outputs the first group of gate drive signals to the first inverter bridge of the dual motor controller, and outputs the second group of gate drive signals to the second inverter bridge of the dual motor controller. Since there is a certain phase difference between the phase angle of the first group of gate drive signals and the phase angle of the second group of gate drive signals, there is also a certain phase difference in the ripple current generated on the bus capacitor by the two inverter bridges in the dual motor controller, so that the ripple current generated on the bus capacitor by the two inverter bridges in the dual motor controller can offset each other, thereby reducing the ripple current of the bus capacitor. Since the ripple current of the bus capacitor is reduced, a smaller capacitor can be used in the dual motor controller, thereby reducing the overall volume of the dual motor controller.

[0067] like Figure 4 The figure shows a working flow chart of a dual-motor controller control method in another embodiment of the present invention, wherein one end of a first inverter bridge of the dual-motor controller is electrically connected to a bus capacitor, and one end of a second inverter bridge of the dual-motor controller is electrically connected to the bus capacitor, and the method comprises:

[0068] Step S401 , obtaining a first group of candidate gate drive signals and a second group of candidate gate drive signals.

[0069] In some embodiments, obtaining the candidate first group of gate drive signals and the candidate second group of gate drive signals specifically includes:

[0070] According to the first motor requirement, a candidate first group of gate drive signals is generated, and according to the second motor requirement, a candidate second group of gate drive signals is generated. When the motor requirements are different, the generated groups of gate drive signals are different. Step S402: the candidate second group of gate drive signals are shifted by the first phase difference relative to the candidate first group of gate drive signals, and the gate drive signals obtained after shifting by the first phase difference are updated to the second group of gate drive signals; and the candidate first group of gate drive signals are determined as the first group of gate drive signals.

[0071] In one embodiment, the step of shifting the candidate second group of gate drive signals relative to the candidate first group of gate drive signals by the first phase difference specifically includes:

[0072] Acquire a first motor mode of a first motor electrically connected to the other end of the first inverter bridge and a second motor mode of a second motor electrically connected to the other end of the second inverter bridge;

[0073] The first phase difference for moving the candidate second group of gate drive signals relative to the candidate first group of gate drive signals is determined according to whether the first motor mode is the same as the second motor mode and the pre-stored correspondence between whether the two motor modes are the same and the phase difference.

[0074] In one embodiment, determining the first phase difference by which the candidate second group of gate drive signals is moved relative to the candidate first group of gate drive signals according to whether the first motor mode is the same as the second motor mode and the pre-stored correspondence between whether the two motor modes are the same and the phase difference specifically includes:

[0075] If the first motor mode is the same as the second motor mode, determining the first phase difference of the candidate second group of gate drive signals relative to the candidate first group of gate drive signals as a first mode phase difference;

[0076] If the first motor mode is different from the second motor mode, the first phase difference of the candidate second group of gate drive signals relative to the candidate first group of gate drive signals is determined to be a second mode phase difference, which is different from the first mode phase difference.

[0077] In one embodiment, preferably, the first mode phase difference is 90°, and the second mode phase difference is 180°.

[0078] Step S403, respectively outputting the three-phase gate drive signals of the first group of gate drive signals to the three-phase switch tubes of the first inverter bridge of the dual-motor controller, and respectively outputting the three-phase gate drive signals of the second group of gate drive signals to the three-phase switch tubes of the second inverter bridge of the dual-motor controller, so that the phase angles of the ripple currents generated by the first inverter bridge and the second inverter bridge at the bus capacitor differ by a second phase difference.

[0079] Specifically, the electronic device first executes step S401 to obtain a first group of candidate gate drive signals and a second group of candidate gate drive signals.

[0080] In some embodiments, obtaining the candidate first group of gate drive signals and the candidate second group of gate drive signals specifically includes:

[0081] A first group of candidate gate drive signals is generated according to the first motor requirement, and a second group of candidate gate drive signals is generated according to the second motor requirement.

[0082] Existing technologies can be used to generate different gate drive signals according to different motor requirements.

[0083] In some embodiments, the three-phase gate drive signals of the candidate first group of gate drive signals are generated according to the first motor requirement, and the three-phase gate drive signals of the candidate second group of gate drive signals are generated according to the second motor requirement.

[0084] Since the motor requirements are different, the candidate first group of gate drive signals and the candidate second group of gate drive signals are independently generated according to their respective motor requirements.

[0085] Then, step S402 is executed to shift the candidate second group of gate drive signals by the first phase difference relative to the candidate first group of gate drive signals, and update the gate drive signals obtained after shifting by the first phase difference to the second group of gate drive signals; and determine the candidate first group of gate drive signals as the first group of gate-level drive signals.

[0086] Specifically, Figure 5 As shown, the center line 521 in the switching cycle of the second group of gate drive signals 52 is moved by a first phase difference relative to the center line 511 of the switching cycle of the first group of gate drive signals 51. Thus, the ripple current 53 of the bus capacitor after the ripple current generated by the second group of gate drive signals and the ripple current generated by the first group of gate drive signals are superimposed is reduced. Figure 5In the figure, the horizontal axis is time, with the unit of s; the vertical axis of the first group of gate drive signals 51 and the second group of gate drive signals 52 represents the switch state, 1 represents that the upper tube of the corresponding bridge arm is turned on and the lower tube is turned off; 0 represents that the upper tube of the corresponding bridge arm is turned off and the lower tube is turned on; the vertical axis of the ripple current 53 of the bus capacitor represents the ripple current value, with the unit of ampere A.

[0087] In one embodiment, the step of shifting the candidate second group of gate drive signals relative to the candidate first group of gate drive signals by the first phase difference specifically includes:

[0088] Acquire a first motor mode of a first motor electrically connected to the other end of the first inverter bridge and a second motor mode of a second motor electrically connected to the other end of the second inverter bridge;

[0089] The first phase difference for moving the candidate second group of gate drive signals relative to the candidate first group of gate drive signals is determined according to whether the first motor mode is the same as the second motor mode and the pre-stored correspondence between whether the two motor modes are the same and the phase difference.

[0090] In some embodiments, the motor mode includes a driving mode and a generating mode.

[0091] According to whether the first motor mode is a driving mode or a generating mode, and whether the second motor mode is a driving mode or a generating mode, a corresponding first phase difference is determined.

[0092] The first phase difference corresponding to the first motor mode and the second motor mode can be determined by calibration. Specifically, it is determined that:

[0093] a first phase difference when the ripple current of the bus capacitor is minimum when the first motor mode is the driving mode and the second motor mode is the driving mode;

[0094] When the first motor mode is the driving mode and the second motor mode is the generating mode, a first phase difference when the ripple current of the bus capacitor is minimum;

[0095] When the first motor mode is a generating mode and the second motor mode is a driving mode, a first phase difference when the ripple current of the bus capacitor is minimum;

[0096] When the first motor mode is the generating mode and the second motor mode is the generating mode, a first phase difference is defined when the ripple current of the bus capacitor is minimum.

[0097] This embodiment determines the corresponding first phase difference based on different motor mode combinations, so that the ripple current of the bus capacitor is minimized under different motor mode combinations.

[0098] In one embodiment, determining the first phase difference by which the candidate second group of gate drive signals is moved relative to the candidate first group of gate drive signals according to whether the first motor mode is the same as the second motor mode and the pre-stored correspondence between whether the two motor modes are the same and the phase difference specifically includes:

[0099] If the first motor mode is the same as the second motor mode, determining the first phase difference of the candidate second group of gate drive signals relative to the candidate first group of gate drive signals as a first mode phase difference;

[0100] If the first motor mode is different from the second motor mode, the first phase difference of the candidate second group of gate drive signals relative to the candidate first group of gate drive signals is determined to be a second mode phase difference, which is different from the first mode phase difference.

[0101] Specifically, when the first motor mode is the same as the second motor mode, the waveform of the ripple current generated by the candidate first group of gate drive signals is the same as or close to the waveform of the ripple current generated by the candidate second group of gate drive signals. When the first motor mode is different from the second motor mode, the waveform of the ripple current generated by the candidate first group of gate drive signals is different from the waveform of the ripple current generated by the candidate second group of gate drive signals.

[0102] Therefore, in this embodiment, the first mode phase difference corresponding to the first motor mode being the same as the second motor mode is set to be different from the second mode phase difference corresponding to the first motor mode being different from the second motor mode, so as to adapt to different motor modes.

[0103] In one embodiment, the first mode phase difference is 90°, and the second mode phase difference is 180°.

[0104] In some embodiments:

[0105] If the first motor mode is the same as the second motor mode, shifting the candidate second group of gate drive signals by 90° relative to the candidate first group of gate drive signals;

[0106] If the first motor mode is different from the second motor mode, the candidate second set of gate drive signals is shifted 180° relative to the candidate first set of gate drive signals.

[0107] Specifically, when the first motor mode is the same as the second motor mode, the waveform of the ripple current generated by the candidate first group of gate drive signals is the same as or close to the waveform of the ripple current generated by the candidate second group of gate drive signals. When the candidate second group of gate drive signals is shifted by a first phase difference α relative to the candidate first group of gate drive signals, and the gate drive signals obtained after shifting the first phase difference are updated as the second group of gate drive signals, and the candidate first group of gate drive signals are determined as the first group of gate drive signals, the ripple current generated by the second group of gate drive signals is shifted by a second phase difference 2α relative to the ripple current generated by the first group of gate drive signals. Therefore, if the candidate second group of gate drive signals is shifted by 90° relative to the candidate first group of gate drive signals, the ripple current generated by the second group of gate drive signals is shifted by 180° relative to the ripple current generated by the first group of gate drive signals, so that the ripple current generated by the second group of gate drive signals is minimized after the ripple current generated by the second group of gate drive signals is superimposed on the ripple current generated by the first group of gate drive signals.

[0108] When the first motor mode is different from the second motor mode, the waveform of the ripple current generated by the candidate first group of gate drive signals is different from the waveform of the ripple current generated by the candidate second group of gate drive signals, and the ripple current of the superposition of the two waveforms is smaller. Therefore, the candidate second group of gate drive signals is moved 180° relative to the candidate first group of gate drive signals, and the gate drive signals obtained after the first phase difference is moved are updated to the second group of gate drive signals, and the candidate first group of gate drive signals are determined as the first group of gate drive signals. After that, the ripple current generated by the second group of gate drive signals is moved 360° relative to the ripple current generated by the first group of gate drive signals, so that after the ripple current generated by the second group of gate drive signals is superimposed on the ripple current generated by the first group of gate drive signals, the ripple current is still the smallest.

[0109] It should be noted that the first mode phase difference and the second mode phase difference are respectively determined to ensure that the ripple current generated by the second set of gate drive signals is minimal after the ripple current generated by the first set of gate drive signals is superimposed. This is obtained based on actual experience and can be set as needed.

[0110] Finally, execute step S403, output the three-phase gate drive signals of the first group of gate drive signals to the three-phase switch tubes of the first inverter bridge of the dual-motor controller, and output the three-phase gate drive signals of the second group of gate drive signals to the three-phase switch tubes of the second inverter bridge of the dual-motor controller, so that the phase angles of the ripple currents generated by each of them in the bus capacitor differ by a second phase difference.

[0111] This embodiment utilizes the frequency characteristics of the ripple current, performs phase-shifting control on the control signals of the two inverter bridges, and optimizes the control timing so that the ripple currents generated by each cancel each other out. The ripple current of the bus capacitor is very small, which reduces the volume of the capacitor and also reduces the loss of the bus capacitor, providing more possibilities for improving the product strength of the electric control. The control method of this embodiment can effectively save the internal space of the controller and provide greater possibilities and flexibility for optimizing the structural layout of the controller. It can not only optimize the performance of the controller product, but also improve the power density of the product, reduce system losses, and improve efficiency, which will greatly enhance the competitiveness of the product.

[0112] As the best embodiment of the present invention, the first motor 21 works in the driving mode, and the second motor 22 works in the driving mode. When the two motors work alone, the ripple current generated by each motor is 130Arms. If the staggered phase control is not adopted, in the worst case, the ripple current of the bus capacitor is superimposed on each other and will reach nearly 260Arms. However, after adopting the dual-motor controller control method of the present invention, that is, the staggered phase control algorithm, the phase difference of the gate control signals of the two sets of inverter bridges is controlled to 90°, and the final ripple current value is only 70Arms, which greatly reduces the ripple current of the bus capacitor.

[0113] Based on the same inventive concept, Figure 6 The figure shows a schematic diagram of a dual-motor controller control device according to an embodiment of the present invention, wherein one end of a first inverter bridge of the dual-motor controller is electrically connected to a bus capacitor, and one end of a second inverter bridge of the dual-motor controller is electrically connected to the bus capacitor, and the device comprises:

[0114] A signal generating module 601 is configured to generate a first set of gate drive signals and a second set of gate drive signals, wherein a phase angle of the first set of gate drive signals differs from a phase angle of the second set of gate drive signals by a first phase difference;

[0115] The signal output module 602 is used to output the first group of gate drive signals to the first inverter bridge of the dual-motor controller, and output the second group of gate drive signals to the second inverter bridge of the dual-motor controller, so that the phase angles of the ripple currents generated by the first inverter bridge and the second inverter bridge on the bus capacitor differ by a second phase difference.

[0116] The present invention generates a first group of gate drive signals and a second group of gate drive signals, and outputs the first group of gate drive signals to the first inverter bridge of the dual motor controller, and outputs the second group of gate drive signals to the second inverter bridge of the dual motor controller. Since there is a certain phase difference between the phase angle of the first group of gate drive signals and the phase angle of the second group of gate drive signals, there is also a certain phase difference between the phase angles of the ripple currents generated by the two inverter bridges in the dual motor controller on the bus capacitor, thereby enabling the ripple currents generated by the two inverter bridges in the dual motor controller on the bus capacitor to offset each other, thereby reducing the ripple current of the bus capacitor. Since the ripple current of the bus capacitor is reduced, a smaller capacitor can be used in the dual motor controller, thereby reducing the overall volume of the dual motor controller.

[0117] In one embodiment, generating the first set of gate drive signals and the second set of gate drive signals specifically includes:

[0118] Obtaining a candidate first group of gate drive signals and a candidate second group of gate drive signals;

[0119] The candidate second group of gate drive signals are moved by the first phase difference relative to the candidate first group of gate drive signals, and the gate drive signals obtained after moving by the first phase difference are updated as the second group of gate drive signals; and the candidate first group of gate drive signals are determined as the first group of gate-level drive signals.

[0120] In one embodiment, the step of shifting the candidate second group of gate drive signals relative to the candidate first group of gate drive signals by the first phase difference specifically includes:

[0121] Acquire a first motor mode of a first motor electrically connected to the other end of the first inverter bridge and a second motor mode of a second motor electrically connected to the other end of the second inverter bridge;

[0122] The first phase difference for moving the candidate second group of gate drive signals relative to the candidate first group of gate drive signals is determined according to whether the first motor mode is the same as the second motor mode and the pre-stored correspondence between whether the two motor modes are the same and the phase difference.

[0123] In one embodiment, determining the first phase difference by which the candidate second group of gate drive signals is moved relative to the candidate first group of gate drive signals according to whether the first motor mode is the same as the second motor mode and the pre-stored correspondence between whether the two motor modes are the same and the phase difference specifically includes:

[0124] If the first motor mode is the same as the second motor mode, determining the first phase difference of the candidate second group of gate drive signals relative to the candidate first group of gate drive signals as a first mode phase difference;

[0125] If the first motor mode is different from the second motor mode, the first phase difference of the candidate second group of gate drive signals relative to the candidate first group of gate drive signals is determined to be a second mode phase difference, which is different from the first mode phase difference.

[0126] In one embodiment, the first mode phase difference is 90°, and the second mode phase difference is 180°.

[0127] In one embodiment, the first group of gate drive signals and the second group of gate drive signals both include three-phase gate drive signals, and the outputting of the first group of gate drive signals to the first inverter bridge of the dual-motor controller and the outputting of the second group of gate drive signals to the second inverter bridge of the dual-motor controller specifically include:

[0128] The three-phase gate drive signals of the first group of gate drive signals are output to the three-phase switch tubes of the first inverter bridge of the dual motor controller respectively, and the three-phase gate drive signals of the second group of gate drive signals are output to the three-phase switch tubes of the second inverter bridge of the dual motor controller respectively.

[0129] Regarding the device in the above embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be elaborated here.

[0130] like Figure 7 The figure shows a hardware structure diagram of an electronic device of the present invention, including:

[0131] at least one processor 701; and,

[0132] A memory 702 that is communicatively connected to at least one of the processors 701; wherein,

[0133] The memory 702 stores instructions that can be executed by at least one of the processors. The instructions are executed by at least one of the processors so that the at least one processor can execute the dual-motor controller control method as described above.

[0134] Figure 7 A processor 701 is taken as an example.

[0135] The electronic device may further include: an input device 703 and a display device 704 .

[0136] The processor 701, the memory 702, the input device 703 and the display device 704 may be connected via a bus or other means, and the figure takes the connection via a bus as an example.

[0137] The memory 702 is a non-volatile computer-readable storage medium that can be used to store non-volatile software programs, non-volatile computer executable programs and modules, such as program instructions / modules corresponding to the dual-motor controller control method in the embodiment of the present application, for example, Figure 1 , Figure 4 The processor 701 executes various functional applications and data processing by running the non-volatile software programs, instructions and modules stored in the memory 702, that is, the dual motor controller control method in the above embodiment is implemented.

[0138] The memory 702 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required by at least one function; the data storage area may store data created according to the use of the dual motor controller control method, etc. In addition, the memory 702 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other non-volatile solid-state storage device. In some embodiments, the memory 702 may optionally include a memory remotely arranged relative to the processor 701, and these remote memories may be connected to the device for executing the dual motor controller control method via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0139] The input device 703 can receive user clicks and generate signal inputs related to user settings and function control of the dual motor controller control method. The display device 704 can include display devices such as a display screen.

[0140] The one or more modules are stored in the memory 702 , and when executed by the one or more processors 701 , the dual motor controller control method in any of the above method embodiments is executed.

[0141] The present invention generates a first group of gate drive signals and a second group of gate drive signals, and outputs the first group of gate drive signals to the first inverter bridge of the dual motor controller, and outputs the second group of gate drive signals to the second inverter bridge of the dual motor controller. Since there is a certain phase difference between the phase angle of the first group of gate drive signals and the phase angle of the second group of gate drive signals, there is also a certain phase difference between the phase angles of the ripple currents generated by the two inverter bridges in the dual motor controller on the bus capacitor, thereby enabling the ripple currents generated by the two inverter bridges in the dual motor controller on the bus capacitor to offset each other, thereby reducing the ripple current of the bus capacitor. Since the ripple current of the bus capacitor is reduced, a smaller capacitor can be used in the dual motor controller, thereby reducing the overall volume of the dual motor controller.

[0142] An embodiment of the present invention provides a storage medium, which stores computer instructions. When a computer executes the computer instructions, it is used to execute all steps of the dual-motor controller control method as described above.

[0143] In the context of the present disclosure, a storage medium may be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, device, or apparatus. The storage medium may be a machine-readable signal medium or a machine-readable storage medium. Alternatively, the storage medium may be a non-temporary computer-readable storage medium, for example, a non-temporary computer-readable storage medium may be a ROM, a random access memory (Random Access Memory, RAM), a compact disc read-only memory (Compact Disc ROM, CD-ROM), a magnetic tape, a floppy disk, and an optical data storage device, etc.

[0144] An embodiment of the present invention provides a vehicle, including the dual motor controller control device as described above, or the electronic device as described above. It is understandable that the vehicle may also include: a processor, a memory, and a computer program. The computer program is stored in the memory and is configured to be executed by the processor to implement the dual motor controller control method provided in the embodiment of the present disclosure. The processor and the memory are already in Figure 6 The parts described in the illustrated embodiment are not repeated here.

[0145] The above-mentioned embodiments only express several implementation methods of the present invention, and the description thereof is relatively specific and detailed, but it cannot be understood as limiting the scope of the patent of the present invention. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. A dual motor controller control method, characterized in that: One end of the first inverter bridge of the dual-motor controller is electrically connected to the bus capacitor, and one end of the second inverter bridge of the dual-motor controller is electrically connected to the bus capacitor. The method includes: Generate a first group of gate drive signals and a second group of gate drive signals, wherein a phase angle of the first group of gate drive signals differs from a phase angle of the second group of gate drive signals by a first phase difference; The first group of gate drive signals is output to the first inverter bridge of the dual-motor controller, and the second group of gate drive signals is output to the second inverter bridge of the dual-motor controller, so that the phase angles of the ripple currents generated by the first inverter bridge and the second inverter bridge on the bus capacitor differ by a second phase difference.

2. The dual motor controller control method according to claim 1, characterized in that: The generating of the first group of gate drive signals and the second group of gate drive signals specifically includes: Obtaining a candidate first group of gate drive signals and a candidate second group of gate drive signals; The candidate second group of gate drive signals are moved by the first phase difference relative to the candidate first group of gate drive signals, and the gate drive signals obtained after moving by the first phase difference are updated as the second group of gate drive signals; and the candidate first group of gate drive signals are determined as the first group of gate-level drive signals.

3. The dual motor controller control method according to claim 2, characterized in that: The step of moving the candidate second group of gate drive signals relative to the candidate first group of gate drive signals by the first phase difference specifically includes: Acquire a first motor mode of a first motor electrically connected to the other end of the first inverter bridge and a second motor mode of a second motor electrically connected to the other end of the second inverter bridge; The first phase difference for moving the candidate second group of gate drive signals relative to the candidate first group of gate drive signals is determined according to whether the first motor mode is the same as the second motor mode and the pre-stored correspondence between whether the two motor modes are the same and the phase difference.

4. The dual motor controller control method according to claim 3, characterized in that: The determining, according to whether the first motor mode is the same as the second motor mode and the pre-stored correspondence between whether the two motor modes are the same and the phase difference, the first phase difference by which the candidate second group of gate drive signals is moved relative to the candidate first group of gate drive signals specifically includes: If the first motor mode is the same as the second motor mode, determining the first phase difference of the candidate second group of gate drive signals relative to the candidate first group of gate drive signals as a first mode phase difference; If the first motor mode is different from the second motor mode, the first phase difference of the candidate second group of gate drive signals relative to the candidate first group of gate drive signals is determined to be a second mode phase difference, which is different from the first mode phase difference.

5. The dual motor controller control method according to claim 4, characterized in that: The first mode phase difference is 90°, and the second mode phase difference is 180°.

6. The dual motor controller control method according to any one of claims 1 to 5, characterized in that: The first group of gate drive signals and the second group of gate drive signals both include three-phase gate drive signals, and the first group of gate drive signals are output to the first inverter bridge of the dual-motor controller, and the second group of gate drive signals are output to the second inverter bridge of the dual-motor controller, specifically including: The three-phase gate drive signals of the first group of gate drive signals are output to the three-phase switch tubes of the first inverter bridge of the dual motor controller respectively, and the three-phase gate drive signals of the second group of gate drive signals are output to the three-phase switch tubes of the second inverter bridge of the dual motor controller respectively.

7. A dual motor controller control device, characterized in that: One end of the first inverter bridge of the dual-motor controller is electrically connected to the bus capacitor, and one end of the second inverter bridge of the dual-motor controller is electrically connected to the bus capacitor. The device includes: A signal generating module, configured to generate a first set of gate drive signals and a second set of gate drive signals, wherein a phase angle of the first set of gate drive signals differs from a phase angle of the second set of gate drive signals by a first phase difference; A signal output module is used to output the first group of gate drive signals to the first inverter bridge of the dual-motor controller, and output the second group of gate drive signals to the second inverter bridge of the dual-motor controller, so that the phase angles of the ripple currents generated by the first inverter bridge and the second inverter bridge on the bus capacitor differ by a second phase difference.

8. An electronic device, characterized in that: include: at least one processor; as well as, a memory communicatively connected to at least one of the processors; wherein, The memory stores instructions that can be executed by at least one of the processors, and the instructions are executed by at least one of the processors to enable at least one of the processors to execute the dual-motor controller control method according to any one of claims 1 to 6.

9. A storage medium, characterized in that: The storage medium stores computer instructions, which, when executed by a computer, are used to execute all steps of the dual motor controller control method as described in any one of claims 1 to 6.

10. A vehicle, characterized in that: It includes the dual motor controller control device as claimed in claim 7, or the electronic device as claimed in claim 8.

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